Index: board_config.h =================================================================== --- /YC3121_SDK/fw/core/board_config.h (nonexistent) +++ /YC3121_SDK/fw/core/board_config.h (working copy) @@ -0,0 +1,146 @@ +/* +File Name : board_config.h +Author : Yichip +Version : V1.0 +Date : 2020/07/17 +Description : board I/O config file. +*/ + +#ifndef __BOARD_CONFIG_H__ +#define __BOARD_CONFIG_H__ + +#include "yc3121.h" +#include "yc_gpio.h" +#include "yc_exti.h" +#include "yc_spi.h" + +//开发板选择 +#define MPOS_BOARD_V2_1 0 +#define EPOS_BOARD_V1_0 1 +#define BOARD_VER MPOS_BOARD_V2_1 + +//ADC管脚配置 +#define ADC_IO_PORT GPIOC +#define ADC2_IO_PIN GPIO_Pin_7 +#define ADC3_IO_PIN GPIO_Pin_8 + +//外部中断管脚配置 +#define EXTI_PORT EXTI_Line0 +#define EXTI_PIN EXTI_PinSource14 + +#if (BOARD_VER == MPOS_BOARD_V2_1) +//DEBUG串口配置 +#define UARTBAUD 115200 +#define UART0_TX_IO_CONFIG GPIO_Config(GPIOA, GPIO_Pin_1, UART0_TXD); +#define UART0_RX_IO_CONFIG GPIO_Config(GPIOA, GPIO_Pin_0, UART0_RXD); + +//串口1配置 +#define UART1_TX_IO_CONFIG GPIO_Config(GPIOA, GPIO_Pin_14, UART0_TXD); +#define UART1_RX_IO_CONFIG GPIO_Config(GPIOA, GPIO_Pin_15, UART0_RXD); + +//BEEP驱动IO +#define BEEP_PORT GPIOA +#define BEEP_PIN GPIO_Pin_11 + +//IC卡在位检测IO +#define DET_PORT GPIOC +#define DET_PIN GPIO_Pin_12 + +//EEPROM写保护控制IO +#define IIC_WP2_PORT GPIOB +#define IIC_WP2_PIN GPIO_Pin_0 +#define IIC_WP128_PORT GPIOC +#define IIC_WP128_PIN GPIO_Pin_10 + +//IIC驱动IO +#define IIC_TX_IO_CONFIG GPIO_Config(GPIOB, GPIO_Pin_2, IIC_SDA); +#define IIC_RX_IO_CONFIG GPIO_Config(GPIOA, GPIO_Pin_11, IIC_SCL); + +//KEYBOARD配置 +#define GPIO_GROUP_Line_1 GPIOC +#define Line_1 GPIO_Pin_7 + +#define GPIO_GROUP_Line_2 GPIOC +#define Line_2 GPIO_Pin_9 + +#define GPIO_GROUP_Line_3 GPIOC +#define Line_3 GPIO_Pin_8 + +#define GPIO_GROUP_Line_4 GPIOC +#define Line_4 GPIO_Pin_10 + +#define GPIO_GROUP_Line_5 GPIOC +#define Line_5 GPIO_Pin_11 + +//TFT屏幕驱动配置 +#define LCD_SPI SPI0 +#define LCDSDA_PIN GPIO_Pin_1 +#define LCDSDA_PORT GPIOB +#define LCDSCL_PIN GPIO_Pin_0 +#define LCDSCL_PORT GPIOB +#define LCDCS_PIN GPIO_Pin_6 +#define LCDCS_PORT GPIOC +#define LCDRST_PIN GPIO_Pin_5 +#define LCDRST_PORT GPIOA +#define LCDA0_PIN GPIO_Pin_10 +#define LCDA0_PORT GPIOA +#define LCDBL_PIN GPIO_Pin_2 +#define LCDBL_PORT GPIOA + +#elif (BOARD_VER == EPOS_BOARD_V1_0) +//DEBUG串口配置 +#define UARTBAUD 921600 +#define UART0_TX_IO_CONFIG GPIO_Config(GPIOA, GPIO_Pin_1, UART0_TXD); +#define UART0_RX_IO_CONFIG GPIO_Config(GPIOA, GPIO_Pin_0, UART0_RXD); + +//串口1配置 +#define UART1_TX_IO_CONFIG GPIO_Config(GPIOA, GPIO_Pin_14, UART0_TXD); +#define UART1_RX_IO_CONFIG GPIO_Config(GPIOA, GPIO_Pin_15, UART0_RXD); + +//BEEP驱动IO +#define BEEP_PORT GPIOC +#define BEEP_PIN GPIO_Pin_1 + +//IC卡在位检测IO +#define DET_PORT GPIOC +#define DET_PIN GPIO_Pin_4 + +//IIC驱动IO + +//KEYBOARD配置 +#define KEY_PORT_1 GPIOA +#define KEY_PIN_1 GPIO_Pin_9 + +#define KEY_PORT_2 GPIOA +#define KEY_PIN_2 GPIO_Pin_15 + +#define KEY_PORT_3 GPIOA +#define KEY_PIN_3 GPIO_Pin_14 + +#define KEY_PORT_4 GPIOA +#define KEY_PIN_4 GPIO_Pin_8 + +#define KEY_PORT_5 GPIOA +#define KEY_PIN_5 GPIO_Pin_7 + +#define KEY_PORT_6 GPIOA +#define KEY_PIN_6 GPIO_Pin_6 + +//TFT屏幕驱动配置 +#define ST7789VTFTSPI SPI1 +#define ST7789_TFT_SDA_PIN GPIO_Pin_7 +#define ST7789_TFT_SDA_PORT GPIOC +#define ST7789_TFT_A0_PIN GPIO_Pin_10 +#define ST7789_TFT_A0_PORT GPIOA +#define ST7789_TFT_SCL_PIN GPIO_Pin_8 +#define ST7789_TFT_SCL_PORT GPIOC +#define ST7789_TFT_RST_PIN GPIO_Pin_11 +#define ST7789_TFT_RST_PORT GPIOA +#define ST7789_TFT_CS_PIN GPIO_Pin_5 +#define ST7789_TFT_CS_PORT GPIOA +#define ST7789_TFT_BL_PIN GPIO_Pin_12 +#define ST7789_TFT_BL_PORT GPIOA + +#endif + +#endif Index: bt_code.h =================================================================== --- /YC3121_SDK/fw/core/bt_code.h (nonexistent) +++ /YC3121_SDK/fw/core/bt_code.h (working copy) @@ -0,0 +1,6 @@ +#include "yc3121.h" + +#if (VERSIONS == EXIST_BT) +extern const unsigned char bt_code[]; +#elif (VERSIONS == NO_BT) +#endif Index: bt_code.c =================================================================== --- /YC3121_SDK/fw/core/bt_code.c (nonexistent) +++ /YC3121_SDK/fw/core/bt_code.c (working copy) @@ -0,0 +1,165 @@ +const unsigned char bt_code[] = { +0x00,0x02,0xaa,0x55,0x9e,0x04,0xc2,0x84,0x00,0x08,0xc0,0x00,0x80,0x11,0xc0,0x42, +0x80,0x17,0xc0,0x44,0x80,0x38,0xc0,0x51,0x00,0x41,0xc0,0x5c,0x00,0x48,0xc0,0x5d, +0x80,0x75,0x20,0x20,0x4a,0x8b,0xc0,0x01,0x80,0xd0,0xc0,0x02,0x80,0xe0,0xc0,0x03, +0x00,0xe9,0xc0,0x1d,0x00,0xee,0xc0,0x1f,0x00,0xf7,0xc0,0x20,0x81,0x09,0xc0,0x29, +0x01,0x0f,0xc0,0x4c,0x81,0x23,0x20,0x20,0x4a,0x8b,0x20,0x40,0x68,0xc4,0x20,0x40, +0x60,0xd7,0x20,0x40,0x00,0x15,0x20,0x20,0x40,0x0a,0x20,0x75,0x80,0x00,0x20,0x20, +0x7b,0x9a,0x20,0x30,0x80,0x27,0x70,0x89,0x55,0xd4,0x20,0x00,0x00,0x04,0x70,0x89, +0x55,0xd2,0x20,0x00,0x00,0x04,0x70,0x89,0x55,0xd1,0x20,0x00,0x00,0x04,0x6f,0xe2, +0x41,0xdf,0xc0,0x00,0x00,0x25,0xc0,0x00,0x80,0x35,0xc0,0x01,0x00,0x25,0xc0,0x01, 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#ifdef __cplusplus - extern "C" { +extern "C" { #endif -typedef enum{ - SVCall_IRQn = -5, //SVC_IRQHandler - PendSV_IRQn = -2, //PENDSV_IRQHandler - SysTick_IRQn = -1, //SYSTICK_IRQHandler - USB_IRQn = 0, - IIC_IRQn = 1, - QSPI_IRQn = 2, - SPI0_IRQn = 3, - SPI1_IRQn = 4, - UART0_IRQn = 5, - UART1_IRQn = 6, - MEMCP_IRQn = 7,//DMA MEM_TO_MEM - RSA_IRQn = 8, - SCI0_IRQn = 9, - SCI1_IRQn = 10, - BT_IRQn = 11, - GPIO_IRQn = 12, - TIM0_IRQn = 13, - TIM1_IRQn = 14, - TIM2_IRQn = 15, - TIM3_IRQn = 16, - TIM4_IRQn = 17, - TIM5_IRQn = 18, - TIM6_IRQn = 19, - TIM7_IRQn = 20, - TIM8_IRQn = 21, - SM4_IRQn = 22, - SEC_IRQn = 23, - MSR_IRQn = 24, - TRNG_IRQn = 25, - WDT_IRQn = 26 -}IRQn_Type; +typedef enum +{ + SVCall_IRQn = -5, //SVC_IRQHandler + PendSV_IRQn = -2, //PENDSV_IRQHandler + SysTick_IRQn = -1, //SYSTICK_IRQHandler + USB_IRQn = 0, + IIC_IRQn = 1, + QSPI_IRQn = 2, + SPI0_IRQn = 3, + SPI1_IRQn = 4, + UART0_IRQn = 5, + UART1_IRQn = 6, + MEMCP_IRQn = 7,//DMA MEM_TO_MEM + RSA_IRQn = 8, + SCI0_IRQn = 9, + SCI1_IRQn = 10, + BT_IRQn = 11, + GPIO_IRQn = 12, + TIM0_IRQn = 13, + TIM1_IRQn = 14, + TIM2_IRQn = 15, + TIM3_IRQn = 16, + TIM4_IRQn = 17, + TIM5_IRQn = 18, + TIM6_IRQn = 19, + TIM7_IRQn = 20, + TIM8_IRQn = 21, + SM4_IRQn = 22, + SEC_IRQn = 23, + MSR_IRQn = 24, + TRNG_IRQn = 25, + WDT_IRQn = 26 +} IRQn_Type; /** * @brief Enable External Interrupt Index: misc.c =================================================================== --- /YC3121_SDK/fw/core/misc.c (revision 669) +++ /YC3121_SDK/fw/core/misc.c (working copy) @@ -4,23 +4,23 @@ #define __IM volatile const /*! Defines 'read only' structure member permissions */ #define __OM volatile /*! Defines 'write only' structure member permissions */ #define __IOM volatile /*! Defines 'read / write' structure member permissions */ - + /* Memory mapping of Cortex-M0 Hardware */ #define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ - + typedef struct { - __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ - __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ - uint32_t RESERVED0; - __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ - __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ - __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ - uint32_t RESERVED1; - __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ - __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + uint32_t RESERVED0; + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + uint32_t RESERVED1; + __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ } SCB_Type; /** @@ -28,16 +28,16 @@ */ typedef struct { - __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ - uint32_t RESERVED0[31U]; - __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ - uint32_t RSERVED1[31U]; - __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ - uint32_t RESERVED2[31U]; - __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ - uint32_t RESERVED3[31U]; - uint32_t RESERVED4[64U]; - __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ + __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[31U]; + __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RSERVED1[31U]; + __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[31U]; + __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[31U]; + uint32_t RESERVED4[64U]; + __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ } NVIC_Type; #define SCB ((SCB_Type*)SCB_BASE) /*!< SCB configuration struct */ @@ -56,62 +56,62 @@ /* End of group Configuration_of_CMSIS */ uint32_t NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if ((int32_t)(IRQn) < 0) - { - SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - else - { - NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - } - return SUCCESS; +{ + if ((int32_t)(IRQn) < 0) + { + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + else + { + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + } + return SUCCESS; } #define SBC_ICSR_PENDSV_IRQ 28 void trigger_PendSV(void) { - SCB->ICSR |=(1<ICSR |= (1 << SBC_ICSR_PENDSV_IRQ); } void NVIC_EnableIRQ(IRQn_Type IRQnx) { - enable_intr((int) IRQnx); + enable_intr((int) IRQnx); } void NVIC_DisableIRQ(IRQn_Type IRQnx) { - disable_intr((int) IRQnx); -} + disable_intr((int) IRQnx); +} void soft_reset(void) { - SYSCTRL_RST_EN |= 0x01; - SYSCTRL_RESET = 0x55; - while(1); + SYSCTRL_RST_EN |= 0x01; + SYSCTRL_RESET = 0x55; + while (1); } uint32_t get_primask(void) { - __asm volatile("mrs r0, primask"); + __asm volatile("mrs r0, primask"); } uint32_t get_msp(void) { - __asm volatile("mrs r0, msp"); + __asm volatile("mrs r0, msp"); } #if defined ( __CC_ARM ) //MDK void set_msp(uint32_t mainStackPointer) { - __asm volatile("msr msp,mainStackPointer"); + __asm volatile("msr msp,mainStackPointer"); } #else void set_msp(uint32_t mainStackPointer) { - __asm volatile("msr msp,r0"); + __asm volatile("msr msp,r0"); } #endif Index: rom_api.h =================================================================== --- /YC3121_SDK/fw/core/rom_api.h (revision 669) +++ /YC3121_SDK/fw/core/rom_api.h (working copy) @@ -1,5 +1,5 @@ /* -File Name : yc3121.h +File Name : rom_api.h Author : Yichip Version : V1.0 Date : 2020/02/11 @@ -37,5 +37,6 @@ #define FUNC_QSPI_FLASH_READ_ADDR (0x48f6 + 1) #define FUNC_FLASH_BLANK_CHECK (0x513c + 1) #define FUNC_PREFETCH (0x4404 + 1) +#define FUNC_READ_FLASH_ID (0x4960 + 1) #endif Index: system.h =================================================================== --- /YC3121_SDK/fw/core/system.h (revision 669) +++ /YC3121_SDK/fw/core/system.h (working copy) @@ -28,7 +28,7 @@ */ void MyPrintf(char *format, ...); -void _assert_handler(const char* file, int line,const char* func); +void _assert_handler(const char *file, int line, const char *func); void printv(uint8_t *buf, uint32_t len, uint8_t *s); Index: system.c =================================================================== --- /YC3121_SDK/fw/core/system.c (revision 669) +++ /YC3121_SDK/fw/core/system.c (working copy) @@ -19,257 +19,257 @@ // //***************************************************************************** -static const int8_t* const g_pcHex1 = "0123456789abcdef"; -static const int8_t* const g_pcHex2 = "0123456789ABCDEF"; +static const int8_t *const g_pcHex1 = "0123456789abcdef"; +static const int8_t *const g_pcHex2 = "0123456789ABCDEF"; #ifdef ENABLE_PERIAL_TEST -extern uint8_t uart_printf_switch_gloab; + extern uint8_t uart_printf_switch_gloab; #endif -void printfsend(UART_TypeDef UARTx, uint8_t* buf, int len) +void printfsend(UART_TypeDef UARTx, uint8_t *buf, int len) { - uint8_t printbuf[256]; - for(int i=0;i0) - { + uint32_t ulIdx, ulValue, ulPos, ulCount, ulBase, ulNeg; + int8_t *pcStr, pcBuf[16], cFill; + char HexFormat; + va_list vaArgP; + + va_start(vaArgP, format); + + while (*format) + { + // Find the first non-% character, or the end of the string. + for (ulIdx = 0; (format[ulIdx] != '%') && (format[ulIdx] != '\0'); ulIdx++) + {} + + // Write this portion of the string. + if (ulIdx > 0) + { // printfsend(UART0,format, ulIdx); - printfsend(UART0,(uint8_t *)format, ulIdx); - } - - format += ulIdx; - - if(*format == '%') - { - format++; - - // Set the digit count to zero, and the fill character to space - // (i.e. to the defaults). - ulCount = 0; - cFill = ' '; + printfsend(UART0, (uint8_t *)format, ulIdx); + } + + format += ulIdx; + + if (*format == '%') + { + format++; + + // Set the digit count to zero, and the fill character to space + // (i.e. to the defaults). + ulCount = 0; + cFill = ' '; again: - switch(*format++) - { - case '0': - case '1': - case '2': - case '3': - case '4': - case '5': - case '6': - case '7': - case '8': - case '9': - { - if((format[-1] == '0') && (ulCount == 0)) - { - cFill = '0'; - } - - ulCount *= 10; - ulCount += format[-1] - '0'; - - goto again; - } - - case 'c': - { - ulValue = va_arg(vaArgP, unsigned long); + switch (*format++) + { + case '0': + case '1': + case '2': + case '3': + case '4': + case '5': + case '6': + case '7': + case '8': + case '9': + { + if ((format[-1] == '0') && (ulCount == 0)) + { + cFill = '0'; + } + + ulCount *= 10; + ulCount += format[-1] - '0'; + + goto again; + } + + case 'c': + { + ulValue = va_arg(vaArgP, unsigned long); // printfsend(UART0,(char *)&ulValue, 1); - printfsend(UART0,(uint8_t *)&ulValue, 1); - break; - } - - case 'd': - { - ulValue = va_arg(vaArgP, unsigned long); - ulPos = 0; - - if((long)ulValue < 0) - { - ulValue = -(long)ulValue; - ulNeg = 1; - } - else - { - ulNeg = 0; - } - - ulBase = 10; - goto convert; - } + printfsend(UART0, (uint8_t *)&ulValue, 1); + break; + } + + case 'd': + { + ulValue = va_arg(vaArgP, unsigned long); + ulPos = 0; + + if ((long)ulValue < 0) + { + ulValue = -(long)ulValue; + ulNeg = 1; + } + else + { + ulNeg = 0; + } + + ulBase = 10; + goto convert; + } - case 's': - { + case 's': + { // pcStr = va_arg(vaArgP, char *); - pcStr = (int8_t *)va_arg(vaArgP, char *); + pcStr = (int8_t *)va_arg(vaArgP, char *); - for(ulIdx = 0; pcStr[ulIdx] != '\0'; ulIdx++) - {} + for (ulIdx = 0; pcStr[ulIdx] != '\0'; ulIdx++) + {} // printfsend(UART0,pcStr, ulIdx); - printfsend(UART0, (uint8_t *)pcStr, ulIdx); + printfsend(UART0, (uint8_t *)pcStr, ulIdx); - if(ulCount > ulIdx) - { - ulCount -= ulIdx; - while(ulCount--) - { + if (ulCount > ulIdx) + { + ulCount -= ulIdx; + while (ulCount--) + { // printfsend(UART0, " ", 1); - printfsend(UART0, (uint8_t *)" ", 1); - } - } - break; - } - - case 'u': - { - ulValue = va_arg(vaArgP, unsigned long); - ulPos = 0; - ulBase = 10; - ulNeg = 0; - goto convert; - } - - case 'X': - { - ulValue = va_arg(vaArgP, unsigned long); - ulPos = 0; - ulBase = 16; - ulNeg = 0; - HexFormat='X'; - goto convert; - } - - case 'x': - - case 'p': - { - ulValue = va_arg(vaArgP, unsigned long); - ulPos = 0; - ulBase = 16; - ulNeg = 0; - HexFormat='x'; + printfsend(UART0, (uint8_t *)" ", 1); + } + } + break; + } + + case 'u': + { + ulValue = va_arg(vaArgP, unsigned long); + ulPos = 0; + ulBase = 10; + ulNeg = 0; + goto convert; + } + + case 'X': + { + ulValue = va_arg(vaArgP, unsigned long); + ulPos = 0; + ulBase = 16; + ulNeg = 0; + HexFormat = 'X'; + goto convert; + } + + case 'x': + + case 'p': + { + ulValue = va_arg(vaArgP, unsigned long); + ulPos = 0; + ulBase = 16; + ulNeg = 0; + HexFormat = 'x'; convert: - for(ulIdx = 1; - (((ulIdx * ulBase) <= ulValue) && - (((ulIdx * ulBase) / ulBase) == ulIdx)); - ulIdx *= ulBase, ulCount--) - { - } - - if(ulNeg) - { - ulCount--; - } - - if(ulNeg && (cFill == '0')) - { - pcBuf[ulPos++] = '-'; - ulNeg = 0; - } - - if((ulCount > 1) && (ulCount < 16)) - { - for(ulCount--; ulCount; ulCount--) - { - pcBuf[ulPos++] = cFill; - } - } - - if(ulNeg) - { - pcBuf[ulPos++] = '-'; - } - - for(; ulIdx; ulIdx /= ulBase) - { - if(HexFormat=='x') - pcBuf[ulPos++] = g_pcHex1[(ulValue / ulIdx) % ulBase];//x - else - pcBuf[ulPos++] = g_pcHex2[(ulValue / ulIdx) % ulBase];//X - } + for (ulIdx = 1; + (((ulIdx * ulBase) <= ulValue) && + (((ulIdx * ulBase) / ulBase) == ulIdx)); + ulIdx *= ulBase, ulCount--) + { + } + + if (ulNeg) + { + ulCount--; + } + + if (ulNeg && (cFill == '0')) + { + pcBuf[ulPos++] = '-'; + ulNeg = 0; + } + + if ((ulCount > 1) && (ulCount < 16)) + { + for (ulCount--; ulCount; ulCount--) + { + pcBuf[ulPos++] = cFill; + } + } + + if (ulNeg) + { + pcBuf[ulPos++] = '-'; + } + + for (; ulIdx; ulIdx /= ulBase) + { + if (HexFormat == 'x') + pcBuf[ulPos++] = g_pcHex1[(ulValue / ulIdx) % ulBase];//x + else + pcBuf[ulPos++] = g_pcHex2[(ulValue / ulIdx) % ulBase];//X + } // printfsend(UART0, pcBuf, ulPos); - printfsend(UART0, (uint8_t *)pcBuf, ulPos); - break; - } + printfsend(UART0, (uint8_t *)pcBuf, ulPos); + break; + } - case '%': - { + case '%': + { // printfsend(UART0, format - 1, 1); - printfsend(UART0, (uint8_t *)format - 1, 1); - break; - } + printfsend(UART0, (uint8_t *)format - 1, 1); + break; + } - default: - { + default: + { // printfsend(UART0, "ERROR", 5); - printfsend(UART0,(uint8_t *)"ERROR", 5); - break; - } - }//switch - }//if - }//while - va_end(vaArgP); + printfsend(UART0, (uint8_t *)"ERROR", 5); + break; + } + }//switch + }//if + }//while + va_end(vaArgP); } void printv(uint8_t *buf, uint32_t len, uint8_t *s) { - uint32_t i = 0; - uint32_t n = 0; - MyPrintf("\r\n %s:",s); - for(i = 0; i #include "rom_api.h" +#define NO_BT 0 +#define EXIST_BT 1 + +#define VERSIONS EXIST_BT //无蓝牙版本采用NO_BT + #define M0_FPGA 1 #define POS_FPGA 2 #define POS_CHIP 3 @@ -21,10 +26,10 @@ #define HARDWAER POS_CHIP #if (HARDWAER == M0_FPGA) -#define CPU_MHZ (24*1000000) + #define CPU_MHZ (24*1000000) #elif (HARDWAER == POS_CHIP) -#define CRYSTAL_CLK (192*1000000) -#define CPU_MHZ ((CRYSTAL_CLK)/((SYSCTRL_HCLK_CON&0x0f)+2)) + #define CRYSTAL_CLK (192*1000000) + #define CPU_MHZ ((CRYSTAL_CLK)/((SYSCTRL_HCLK_CON&0x0f)+2)) #endif #define noinline __attribute__((noinline)) @@ -130,7 +135,7 @@ #define SYSCTRL_ROM_SWITCH *(volatile uint8_t*)(SYSCTRL_BASEADDR + 0x3c) #define SYSCTRL_LPM_STATUS *(volatile byte *)(SYSCTRL_BASEADDR + 0x3d) #define SYSCTRL_OTPN_ADDR *(volatile uint8_t*)(SYSCTRL_BASEADDR + 0x3e) -#define SYSCTRL_OTPU_ADDR *(volatile uint8_t*)(SYSCTRL_BASEADDR + 0x3f) +#define SYSCTRL_OTPU_ADDR *(volatile uint8_t*)(SYSCTRL_BASEADDR + 0x3f) #define SECURE_CTRL *(volatile int*)(SECURE_BASEADDR + 0x0) #define SECURE_STATUS *(volatile int*)(SECURE_BASEADDR + 0x4) @@ -231,7 +236,7 @@ #define AES_KEY_REG7 ((volatile uint32_t *)(AES_BASEADDR+0x3C)) #define AES_RAND_REG0 ((volatile uint32_t *)(AES_BASEADDR+0x40)) #define AES_RAND_REG1 ((volatile uint32_t *)(AES_BASEADDR+0x44)) -#define AES_FKEY_REG0 ((volatile uint32_t *)(AES_BASEADDR+0x50)) +#define AES_FKEY_REG0 ((volatile uint32_t *)(AES_BASEADDR+0x50)) #define AES_DATAB(x) *(volatile byte*)(AES_BASEADDR + 0x10 + (x)) #define AES_KEYB(x) *(volatile byte*)(AES_BASEADDR + 0x20 + (x)) @@ -265,14 +270,14 @@ #define SM4_DATA3 ((volatile uint32_t *)(SM4_BASEADDR + 0x3c)) -#define RECR (*((volatile uint32_t *)(RSA_BASEADDR+0x00))) +#define RECR (*((volatile uint32_t *)(RSA_BASEADDR+0x00))) #define RESR (*((volatile uint32_t *)(RSA_BASEADDR+0x04))) -#define REFR (*((volatile uint32_t *)(RSA_BASEADDR+0x08))) +#define REFR (*((volatile uint32_t *)(RSA_BASEADDR+0x08))) #define RESCR (*((volatile uint32_t *)(RSA_BASEADDR+0x0c))) #define REDQR (*((volatile uint32_t *)(RSA_BASEADDR+0x10))) #define REINT (*((volatile uint32_t *)(RSA_BASEADDR+0x14))) #define RECFR (*((volatile uint32_t *)(RSA_BASEADDR+0x18))) -#define REBKR ((volatile uint32_t *)(RSA_BASEADDR+0x1c)) +#define REBKR ((volatile uint32_t *)(RSA_BASEADDR+0x1c)) #define REDRR (*((volatile uint32_t *)(RSA_BASEADDR+0x24))) #define REDAR ((volatile uint32_t *)(RSA_BASEADDR+0x100)) #define REDAR1 ((volatile uint32_t *)(RSA_BASEADDR+0x120)) @@ -358,11 +363,11 @@ /* SysTick registers */ /* SysTick control & status */ #define SYSTICK_CSR ((volatile unsigned int *)0xE000E010) -/* SysTick Reload value */ +/* SysTick Reload value */ #define SYSTICK_RVR ((volatile unsigned int *)0xE000E014) -/* SysTick Current value */ +/* SysTick Current value */ #define SYSTICK_CVR ((volatile unsigned int *)0xE000E018) -/* SysTick CSR register bits */ +/* SysTick CSR register bits */ #define SYSTICK_CSR_COUNTFLAG 16 #define SYSTICK_CSR_CLKSOURCE 2 #define SYSTICK_CSR_TICKINT 1 @@ -431,9 +436,9 @@ //==RSA== //sfr bit // RECR register -#define RECR_start 0x01 +#define RECR_start 0x01 #define RECR_idle_run 0x02 -#define RECR_bus_crypt_en 0x04 +#define RECR_bus_crypt_en 0x04 // RESR register #define RESR_error_flag 0x01 #define RESR_opdata_error 0x02 @@ -513,13 +518,13 @@ #define SM4_CNTRL_DEC 0X00 /* =============== qspi flash command =================== */ -#define W25X_WRITE_ENABLE 0x06 -#define W25X_WRITE_DISABLE 0x04 -#define W25X_READ_STATUS1 0x05 -#define W25X_READ_STATUS2 0x35 -#define W25X_WRITE_STATUS 0x01 -#define W25X_READ_DATA 0x03 -#define W25X_FASTREAD_DATA 0x0B +#define W25X_WRITE_ENABLE 0x06 +#define W25X_WRITE_DISABLE 0x04 +#define W25X_READ_STATUS1 0x05 +#define W25X_READ_STATUS2 0x35 +#define W25X_WRITE_STATUS 0x01 +#define W25X_READ_DATA 0x03 +#define W25X_FASTREAD_DATA 0x0B #define W25X_FASTREAD_DUAL1 0x3B #define W25X_FASTREAD_DUAL2 0xBB @@ -529,14 +534,14 @@ #define W25X_PAGE_PROGRAM 0x02 #define W25X_SECTOR_ERASE 0x20 -#define W25X_BLOCK_ERASE32K 0x52 -#define W25X_BLOCK_ERASE64K 0xD8 -#define W25X_CHIP_ERASE 0xC7 -#define W25X_POWER_DOWN 0xB9 -#define W25X_RELEASE_POWERDOWN 0xAB -#define W25X_DEVICEID 0xAB -#define W25X_MANUFACT_DEVICEID 0x90 -#define W25X_JEDEC_DEVICEID 0x9F +#define W25X_BLOCK_ERASE32K 0x52 +#define W25X_BLOCK_ERASE64K 0xD8 +#define W25X_CHIP_ERASE 0xC7 +#define W25X_POWER_DOWN 0xB9 +#define W25X_RELEASE_POWERDOWN 0xAB +#define W25X_DEVICEID 0xAB +#define W25X_MANUFACT_DEVICEID 0x90 +#define W25X_JEDEC_DEVICEID 0x9F #define QSPICFG_XIPEN 1 << 12 #define QSPICFG_DECEN 1 << 13 @@ -572,33 +577,33 @@ #define LPMCFG_SENSOR_LOCK 31 //gpio ctrl bit define -#define GPCFG_INPUT 0 -#define GPCFG_QSPI_NCS 2 -#define GPCFG_QSPI_SCK 3 -#define GPCFG_QSPI_IO0 4 -#define GPCFG_QSPI_IO1 5 -#define GPCFG_QSPI_IO2 6 -#define GPCFG_QSPI_IO3 7 -#define GPCFG_UART0_TXD 8 -#define GPCFG_UART0_RXD 9 -#define GPCFG_UART0_RTS 10 -#define GPCFG_UART0_CTS 11 -#define GPCFG_UART1_TXD 12 -#define GPCFG_UART1_RXD 13 -#define GPCFG_UART1_RTS 14 -#define GPCFG_UART1_CTS 15 -#define GPCFG_PWM_OUT0 16 -#define GPCFG_PWM_OUT1 17 -#define GPCFG_PWM_OUT2 18 -#define GPCFG_PWM_OUT3 19 -#define GPCFG_PWM_OUT4 20 -#define GPCFG_PWM_OUT5 21 -#define GPCFG_PWM_OUT6 22 -#define GPCFG_PWM_OUT7 23 -#define GPCFG_SPID0_NCS 24 -#define GPCFG_SPID0_SCK 25 -#define GPCFG_SPID0_MOSI 26 -#define GPCFG_SPID0_SDIO 27 +#define GPCFG_INPUT 0 +#define GPCFG_QSPI_NCS 2 +#define GPCFG_QSPI_SCK 3 +#define GPCFG_QSPI_IO0 4 +#define GPCFG_QSPI_IO1 5 +#define GPCFG_QSPI_IO2 6 +#define GPCFG_QSPI_IO3 7 +#define GPCFG_UART0_TXD 8 +#define GPCFG_UART0_RXD 9 +#define GPCFG_UART0_RTS 10 +#define GPCFG_UART0_CTS 11 +#define GPCFG_UART1_TXD 12 +#define GPCFG_UART1_RXD 13 +#define GPCFG_UART1_RTS 14 +#define GPCFG_UART1_CTS 15 +#define GPCFG_PWM_OUT0 16 +#define GPCFG_PWM_OUT1 17 +#define GPCFG_PWM_OUT2 18 +#define GPCFG_PWM_OUT3 19 +#define GPCFG_PWM_OUT4 20 +#define GPCFG_PWM_OUT5 21 +#define GPCFG_PWM_OUT6 22 +#define GPCFG_PWM_OUT7 23 +#define GPCFG_SPID0_NCS 24 +#define GPCFG_SPID0_SCK 25 +#define GPCFG_SPID0_MOSI 26 +#define GPCFG_SPID0_SDIO 27 #define GPCFG_SPID0_MISO 28 #define GPCFG_SPID0_NCSIN 29 #define GPCFG_SPID0_SCKIN 30 @@ -618,10 +623,10 @@ #define GPCFG_IIC_SCL 58 #define GPCFG_IIC_SDA 59 #define GPCFG_JTAG_SWCLK 60 -#define GPCFG_JTAG_SWDAT 61 -#define GPCFG_OUTPUT_LOW 62 -#define GPCFG_OUTPUT_HIGH 63 -#define GPCFG_PU 64 +#define GPCFG_JTAG_SWDAT 61 +#define GPCFG_OUTPUT_LOW 62 +#define GPCFG_OUTPUT_HIGH 63 +#define GPCFG_PU 64 #define GPCFG_PD 128 #define GPCFG_ANALOG 192 @@ -633,19 +638,37 @@ /* =============== macros =================== */ #define PREFETCH_LINE(addr) *(volatile int*)addr = 0 #define GETWORD(p) ((uint16_t)((*(volatile uint8_t *)((uint32_t)p)) |((((uint16_t)(*(volatile uint8_t *)((uint32_t)(p+1))))<<8) & 0xff00))) -static inline void enable_clock(int id) { SYSCTRL_CLK_CLS &= ~(1 << id);} -static inline void disable_clock(int id) { SYSCTRL_CLK_CLS |= 1 << id;} -static inline void enable_intr(int intid) { NVIC_ISER |= 1 << intid;} -static inline void disable_intr(int intid) { NVIC_ICER = 1 << intid;} -static inline int issim() { return SYSCTRL_ROM_SWITCH & 2; } -static inline void seesim(void) {*(volatile uint8_t*)(0xf853c)=(*(volatile uint8_t*)(0xf853c))&2?0:2;} -extern void delay(int);//delay(x)=delay(x*110+450ns) +static inline void enable_clock(int id) +{ + SYSCTRL_CLK_CLS &= ~(1 << id); +} +static inline void disable_clock(int id) +{ + SYSCTRL_CLK_CLS |= 1 << id; +} +static inline void enable_intr(int intid) +{ + NVIC_ISER |= 1 << intid; +} +static inline void disable_intr(int intid) +{ + NVIC_ICER = 1 << intid; +} +static inline int issim() +{ + return SYSCTRL_ROM_SWITCH & 2; +} +static inline void seesim(void) +{ + *(volatile uint8_t *)(0xf853c) = (*(volatile uint8_t *)(0xf853c)) & 2 ? 0 : 2; +} +extern void delay(int);//delay(x)=delay(x*110+450ns) extern void invalidate_icache(int addr, int len); //#define SCY_FALSE seesim1() /*********************************************/ -#define SYSCTRL_PCLK_CON *(volatile int *)0xf7208 +#define SYSCTRL_PCLK_CON *(volatile int*)0xf7208 #define SYSCTRL_POWERMODE *(volatile int*)0xf7218 //#define debug