Index: yc_usb/libraries/SCPU_USB_Device_Library/class/CDC/usbd_cdc_core.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/CDC/usbd_cdc_core.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/CDC/usbd_cdc_core.h (working copy)
@@ -0,0 +1,164 @@
+/**
+ ******************************************************************************
+ * @file usbd_cdc_core.h
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief header file for the usbd_cdc_core.c file.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+
+#ifndef __USB_CDC_CORE_H_
+#define __USB_CDC_CORE_H_
+
+#include "usbd_ioreq.h"
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+/** @defgroup usbd_cdc
+ * @brief This file is the Header file for USBD_cdc.c
+ * @{
+ */
+
+
+/** @defgroup usbd_cdc_Exported_Defines
+ * @{
+ */
+#define USB_CDC_CONFIG_DESC_SIZ (67)
+#define USB_CDC_DESC_SIZ (67-9)
+
+#define CDC_DESCRIPTOR_TYPE 0x21
+
+#define DEVICE_CLASS_CDC 0x02
+#define DEVICE_SUBCLASS_CDC 0x00
+
+
+#define USB_DEVICE_DESCRIPTOR_TYPE 0x01
+#define USB_CONFIGURATION_DESCRIPTOR_TYPE 0x02
+#define USB_STRING_DESCRIPTOR_TYPE 0x03
+#define USB_INTERFACE_DESCRIPTOR_TYPE 0x04
+#define USB_ENDPOINT_DESCRIPTOR_TYPE 0x05
+
+#define STANDARD_ENDPOINT_DESC_SIZE 0x09
+
+#define CDC_DATA_IN_PACKET_SIZE CDC_DATA_MAX_PACKET_SIZE
+
+#define CDC_DATA_OUT_PACKET_SIZE CDC_DATA_MAX_PACKET_SIZE
+
+#define CDC_APP_RX_DATA_SIZE APP_RX_DATA_SIZE
+
+#define CDC_APP_TX_DATA_SIZE APP_TX_DATA_SIZE
+
+/*---------------------------------------------------------------------*/
+/* CDC definitions */
+/*---------------------------------------------------------------------*/
+
+/**************************************************/
+/* CDC Requests */
+/**************************************************/
+#define SEND_ENCAPSULATED_COMMAND 0x00
+#define GET_ENCAPSULATED_RESPONSE 0x01
+#define SET_COMM_FEATURE 0x02
+#define GET_COMM_FEATURE 0x03
+#define CLEAR_COMM_FEATURE 0x04
+#define SET_LINE_CODING 0x20
+#define GET_LINE_CODING 0x21
+#define SET_CONTROL_LINE_STATE 0x22
+#define SEND_BREAK 0x23
+#define NO_CMD 0xFF
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_CORE_Exported_TypesDefinitions
+ * @{
+ */
+typedef struct _CDC_IF_PROP
+{
+ uint16_t (*pIf_Init) (void);
+ uint16_t (*pIf_DeInit) (void);
+ uint16_t (*pIf_Ctrl) (uint32_t Cmd, uint8_t* Buf, uint32_t Len);
+ uint16_t (*pIf_DataTx) (uint8_t* Buf, uint32_t Len);
+ uint16_t (*pIf_DataRx) (uint8_t* Buf, uint32_t Len);
+}
+CDC_IF_Prop_TypeDef;
+/**
+ * @}
+ */
+struct APP_DATA_STRUCT_DEF
+{
+ /* ͨ¹ýPC½ÓÊÕÊý¾Ý(½«»áͨ¹ý´®¿Ú·¢³öµÄÊý¾Ý)ÐÅÏ¢ */
+ struct {
+ uint8_t APP_Tx_Buffer[CDC_APP_TX_DATA_SIZE]; // ½ÓÊÕÊý¾Ý»º´æ
+ volatile uint32_t APP_Tx_ptr_in; // »º´æ½ÓÊÕÊý¾ÝÆðʼƫÒƵØÖ·
+ volatile uint32_t APP_Tx_ptr_out; // »º´æ¶ÁÈ¡Êý¾ÝÆðʼƫÒƵØÖ·
+ volatile uint32_t Tx_counter; // ·¢ËÍ»º´æµÈ´ý±»¶ÁÈ¡µÄÊý¾Ý¸öÊý
+ } tx_structure;
+ /* ͨ¹ý´®¿Ú½ÓÊÕÊý¾Ý(½«»áͨ¹ýUSB·¢Ë͸øPCµÄÊý¾Ý)ÐÅÏ¢ */
+ struct{
+ uint8_t APP_Rx_Buffer[CDC_APP_RX_DATA_SIZE]; // ½ÓÊÕÊý¾Ý»º´æ
+ volatile uint32_t APP_Rx_ptr_in; // »º´æ½ÓÊÕÊý¾ÝÆðʼƫÒƵØÖ·
+ volatile uint32_t APP_Rx_ptr_out; // »º´æ¶ÁÈ¡Êý¾ÝÆðʼƫÒƵØÖ·
+ volatile uint32_t Rx_counter; // ½ÓÊÕ»º´æµÈ´ý±»¶ÁÈ¡µÄÊý¾Ý¸öÊý
+ } rx_structure;
+ uint8_t COM_config_cmp; //´®¿Ú״̬(1:´®¿Ú´¦ÓÚÁ¬½Ó״̬£»0£º´®¿Ú´¦ÓڶϿª×´Ì¬)
+} ;
+
+
+/** @defgroup USBD_CORE_Exported_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CORE_Exported_Variables
+ * @{
+ */
+
+extern USBD_Class_cb_TypeDef USBD_CDC_cb;
+/**
+ * @}
+ */
+
+/** @defgroup USB_CORE_Exported_Functions
+ * @{
+ */
+/**
+ * @}
+ */
+
+#endif // __USB_CDC_CORE_H_
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/class/CDC/usbd_cdc_core.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/CDC/usbd_cdc_core.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/CDC/usbd_cdc_core.c (working copy)
@@ -0,0 +1,883 @@
+/**
+ ******************************************************************************
+ * @file usbd_cdc_core.c
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief This file provides the high layer firmware functions to manage the
+ * following functionalities of the USB CDC Class:
+ * - Initialization and Configuration of high and low layer
+ * - Enumeration as CDC Device (and enumeration for each implemented memory interface)
+ * - OUT/IN data transfer
+ * - Command IN transfer (class requests management)
+ * - Error management
+ *
+ * @verbatim
+ *
+ * ===================================================================
+ * CDC Class Driver Description
+ * ===================================================================
+ * This driver manages the "Universal Serial Bus Class Definitions for Communications Devices
+ * Revision 1.2 November 16, 2007" and the sub-protocol specification of "Universal Serial Bus
+ * Communications Class Subclass Specification for PSTN Devices Revision 1.2 February 9, 2007"
+ * This driver implements the following aspects of the specification:
+ * - Device descriptor management
+ * - Configuration descriptor management
+ * - Enumeration as CDC device with 2 data endpoints (IN and OUT) and 1 command endpoint (IN)
+ * - Requests management (as described in section 6.2 in specification)
+ * - Abstract Control Model compliant
+ * - Union Functional collection (using 1 IN endpoint for control)
+ * - Data interface class
+
+ * @note
+ * For the Abstract Control Model, this core allows only transmitting the requests to
+ * lower layer dispatcher (ie. usbd_cdc_vcp.c/.h) which should manage each request and
+ * perform relative actions.
+ *
+ * These aspects may be enriched or modified for a specific user application.
+ *
+ * This driver doesn't implement the following aspects of the specification
+ * (but it is possible to manage these features with some modifications on this driver):
+ * - Any class-specific aspect relative to communication classes should be managed by user application.
+ * - All communication classes other than PSTN are not managed
+ *
+ * @endverbatim
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_cdc_core.h"
+#include "usbd_desc.h"
+#include "usbd_req.h"
+#include "usbd_usr.h"
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+
+/** @defgroup usbd_cdc
+ * @brief usbd core module
+ * @{
+ */
+
+/** @defgroup usbd_cdc_Private_TypesDefinitions
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup usbd_cdc_Private_Defines
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup usbd_cdc_Private_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup usbd_cdc_Private_FunctionPrototypes
+ * @{
+ */
+
+/*********************************************
+ CDC Device library callbacks
+ *********************************************/
+static uint8_t usbd_cdc_Init (void *pdev, uint8_t cfgidx);
+static uint8_t usbd_cdc_DeInit (void *pdev, uint8_t cfgidx);
+static uint8_t usbd_cdc_Setup (void *pdev, USB_SETUP_REQ *req);
+static uint8_t usbd_cdc_EP0_RxReady (void *pdev);
+static uint8_t usbd_cdc_DataIn (void *pdev, uint8_t epnum);
+static uint8_t usbd_cdc_DataOut (void *pdev, uint8_t epnum);
+static uint8_t usbd_cdc_SOF (void *pdev);
+
+/*********************************************
+ CDC specific management functions
+ *********************************************/
+static void Handle_USBAsynchXfer (void *pdev);
+static uint8_t *USBD_cdc_GetCfgDesc (uint8_t speed, uint16_t *length);
+#ifdef USE_USB_OTG_HS
+static uint8_t *USBD_cdc_GetOtherCfgDesc (uint8_t speed, uint16_t *length);
+#endif
+/**
+ * @}
+ */
+
+/** @defgroup usbd_cdc_Private_Variables
+ * @{
+ */
+extern CDC_IF_Prop_TypeDef APP_FOPS;
+extern uint8_t USBD_DeviceDesc [USB_SIZ_DEVICE_DESC];
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+__ALIGN_BEGIN uint8_t usbd_cdc_CfgDesc [USB_CDC_CONFIG_DESC_SIZ] __ALIGN_END ;
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+__ALIGN_BEGIN uint8_t usbd_cdc_OtherCfgDesc [USB_CDC_CONFIG_DESC_SIZ] __ALIGN_END ;
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+__ALIGN_BEGIN static uint32_t usbd_cdc_AltSet __ALIGN_END = 0;
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+__ALIGN_BEGIN uint8_t USB_Rx_Buffer [CDC_DATA_MAX_PACKET_SIZE] __ALIGN_END ;
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+
+#ifdef USER_SPECIFIED_DATA_SOURCE
+uint8_t *APP_Rx_Buffer = NULL;
+#else
+//__ALIGN_BEGIN uint8_t APP_Rx_Buffer [APP_RX_DATA_SIZE] __ALIGN_END ;
+struct APP_DATA_STRUCT_DEF APP_Gdata_param;
+#endif
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+__ALIGN_BEGIN uint8_t CmdBuff[CDC_CMD_PACKET_SZE] __ALIGN_END ;
+
+//volatile uint32_t APP_Rx_ptr_in = 0;
+//volatile uint32_t APP_Rx_ptr_out = 0;
+uint32_t APP_Rx_length = 0;
+
+uint8_t USB_Tx_State = 0;
+
+static uint32_t cdcCmd = 0xFF;
+static uint32_t cdcLen = 0;
+
+/* CDC interface class callbacks structure */
+USBD_Class_cb_TypeDef USBD_CDC_cb =
+{
+ usbd_cdc_Init,
+ usbd_cdc_DeInit,
+ usbd_cdc_Setup,
+ NULL, /* EP0_TxSent, */
+ usbd_cdc_EP0_RxReady,
+ usbd_cdc_DataIn,
+ usbd_cdc_DataOut,
+ usbd_cdc_SOF,
+ NULL,
+ NULL,
+ USBD_cdc_GetCfgDesc,
+#ifdef USE_USB_OTG_HS
+ USBD_cdc_GetOtherCfgDesc, /* use same cobfig as per FS */
+#endif /* USE_USB_OTG_HS */
+};
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+/* USB CDC device Configuration Descriptor */
+__ALIGN_BEGIN uint8_t usbd_cdc_CfgDesc[USB_CDC_CONFIG_DESC_SIZ] __ALIGN_END =
+{
+ /*Configuration Descriptor*/
+ 0x09, /* bLength: Configuration Descriptor size */
+ USB_CONFIGURATION_DESCRIPTOR_TYPE, /* bDescriptorType: Configuration */
+ USB_CDC_CONFIG_DESC_SIZ, /* wTotalLength:no of returned bytes */
+ 0x00,
+ 0x02, /* bNumInterfaces: 2 interface */
+ 0x01, /* bConfigurationValue: Configuration value */
+ 0x00, /* iConfiguration: Index of string descriptor describing the configuration */
+ 0xC0, /* bmAttributes: self powered */
+ 0x32, /* MaxPower 0 mA */
+
+ /*---------------------------------------------------------------------------*/
+
+ /*Interface Descriptor */
+ 0x09, /* bLength: Interface Descriptor size */
+ USB_INTERFACE_DESCRIPTOR_TYPE, /* bDescriptorType: Interface */
+ /* Interface descriptor type */
+ 0x00, /* bInterfaceNumber: Number of Interface */
+ 0x00, /* bAlternateSetting: Alternate setting */
+ 0x01, /* bNumEndpoints: One endpoints used */
+ 0x02, /* bInterfaceClass: Communication Interface Class */
+ 0x02, /* bInterfaceSubClass: Abstract Control Model */
+ 0x01, /* bInterfaceProtocol: Common AT commands */
+ 0x00, /* iInterface: */
+
+ /*Header Functional Descriptor*/
+ 0x05, /* bLength: Endpoint Descriptor size */
+ 0x24, /* bDescriptorType: CS_INTERFACE */
+ 0x00, /* bDescriptorSubtype: Header Func Desc */
+ 0x10, /* bcdCDC: spec release number */
+ 0x01,
+
+ /*Call Management Functional Descriptor*/
+ 0x05, /* bFunctionLength */
+ 0x24, /* bDescriptorType: CS_INTERFACE */
+ 0x01, /* bDescriptorSubtype: Call Management Func Desc */
+ 0x00, /* bmCapabilities: D0+D1 */
+ 0x00, /* bDataInterface: 0 */
+// 0x01, /* bDataInterface: 1 */
+
+ /*ACM Functional Descriptor*/
+ 0x04, /* bFunctionLength */
+ 0x24, /* bDescriptorType: CS_INTERFACE */
+ 0x02, /* bDescriptorSubtype: Abstract Control Management desc */
+ 0x02, /* bmCapabilities */
+
+ /*Union Functional Descriptor*/
+ 0x05, /* bFunctionLength */
+ 0x24, /* bDescriptorType: CS_INTERFACE */
+ 0x06, /* bDescriptorSubtype: Union func desc */
+ 0x00, /* bMasterInterface: Communication class interface */
+ 0x01, /* bSlaveInterface0: Data Class Interface */
+
+ /*Endpoint 2 Descriptor*/
+ 0x07, /* bLength: Endpoint Descriptor size */
+ USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType: Endpoint */
+ CDC_CMD_EP, /* bEndpointAddress */
+ 0x03, /* bmAttributes: Interrupt */
+ LOBYTE(CDC_CMD_PACKET_SZE), /* wMaxPacketSize: */
+ HIBYTE(CDC_CMD_PACKET_SZE),
+#ifdef USE_USB_OTG_HS
+ 0x10, /* bInterval: */
+#else
+ 0xFF, /* bInterval: */
+#endif /* USE_USB_OTG_HS */
+
+ /*---------------------------------------------------------------------------*/
+
+ /*Data class interface descriptor*/
+ 0x09, /* bLength: Endpoint Descriptor size */
+ USB_INTERFACE_DESCRIPTOR_TYPE, /* bDescriptorType: */
+ 0x01, /* bInterfaceNumber: Number of Interface */
+ 0x00, /* bAlternateSetting: Alternate setting */
+ 0x02, /* bNumEndpoints: Two endpoints used */
+ 0x0A, /* bInterfaceClass: CDC */
+ 0x00, /* bInterfaceSubClass: */
+ 0x00, /* bInterfaceProtocol: */
+ 0x00, /* iInterface: */
+
+ /*Endpoint OUT Descriptor*/
+ 0x07, /* bLength: Endpoint Descriptor size */
+ USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType: Endpoint */
+ CDC_OUT_EP, /* bEndpointAddress */
+ 0x02, /* bmAttributes: Bulk */
+ LOBYTE(CDC_DATA_MAX_PACKET_SIZE), /* wMaxPacketSize: */
+ HIBYTE(CDC_DATA_MAX_PACKET_SIZE),
+ 0x00, /* bInterval: ignore for Bulk transfer */
+
+ /*Endpoint IN Descriptor*/
+ 0x07, /* bLength: Endpoint Descriptor size */
+ USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType: Endpoint */
+ CDC_IN_EP, /* bEndpointAddress */
+ 0x02, /* bmAttributes: Bulk */
+ LOBYTE(CDC_DATA_MAX_PACKET_SIZE), /* wMaxPacketSize: */
+ HIBYTE(CDC_DATA_MAX_PACKET_SIZE),
+ 0x00 /* bInterval: ignore for Bulk transfer */
+} ;
+
+#ifdef USE_USB_OTG_HS
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+__ALIGN_BEGIN uint8_t usbd_cdc_OtherCfgDesc[USB_CDC_CONFIG_DESC_SIZ] __ALIGN_END =
+{
+ 0x09, /* bLength: Configuation Descriptor size */
+ USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION,
+ USB_CDC_CONFIG_DESC_SIZ,
+ 0x00,
+ 0x02, /* bNumInterfaces: 2 interfaces */
+ 0x01, /* bConfigurationValue: */
+ 0x04, /* iConfiguration: */
+ 0xC0, /* bmAttributes: */
+ 0x32, /* MaxPower 100 mA */
+
+ /*Interface Descriptor */
+ 0x09, /* bLength: Interface Descriptor size */
+ USB_INTERFACE_DESCRIPTOR_TYPE, /* bDescriptorType: Interface */
+ /* Interface descriptor type */
+ 0x00, /* bInterfaceNumber: Number of Interface */
+ 0x00, /* bAlternateSetting: Alternate setting */
+ 0x01, /* bNumEndpoints: One endpoints used */
+ 0x02, /* bInterfaceClass: Communication Interface Class */
+ 0x02, /* bInterfaceSubClass: Abstract Control Model */
+ 0x01, /* bInterfaceProtocol: Common AT commands */
+ 0x00, /* iInterface: */
+
+ /*Header Functional Descriptor*/
+ 0x05, /* bLength: Endpoint Descriptor size */
+ 0x24, /* bDescriptorType: CS_INTERFACE */
+ 0x00, /* bDescriptorSubtype: Header Func Desc */
+ 0x10, /* bcdCDC: spec release number */
+ 0x01,
+
+ /*Call Management Functional Descriptor*/
+ 0x05, /* bFunctionLength */
+ 0x24, /* bDescriptorType: CS_INTERFACE */
+ 0x01, /* bDescriptorSubtype: Call Management Func Desc */
+ 0x00, /* bmCapabilities: D0+D1 */
+ 0x01, /* bDataInterface: 1 */
+
+ /*ACM Functional Descriptor*/
+ 0x04, /* bFunctionLength */
+ 0x24, /* bDescriptorType: CS_INTERFACE */
+ 0x02, /* bDescriptorSubtype: Abstract Control Management desc */
+ 0x02, /* bmCapabilities */
+
+ /*Union Functional Descriptor*/
+ 0x05, /* bFunctionLength */
+ 0x24, /* bDescriptorType: CS_INTERFACE */
+ 0x06, /* bDescriptorSubtype: Union func desc */
+ 0x00, /* bMasterInterface: Communication class interface */
+ 0x01, /* bSlaveInterface0: Data Class Interface */
+
+ /*Endpoint 2 Descriptor*/
+ 0x07, /* bLength: Endpoint Descriptor size */
+ USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType: Endpoint */
+ CDC_CMD_EP, /* bEndpointAddress */
+ 0x03, /* bmAttributes: Interrupt */
+ LOBYTE(CDC_CMD_PACKET_SZE), /* wMaxPacketSize: */
+ HIBYTE(CDC_CMD_PACKET_SZE),
+ 0xFF, /* bInterval: */
+
+ /*---------------------------------------------------------------------------*/
+
+ /*Data class interface descriptor*/
+ 0x09, /* bLength: Endpoint Descriptor size */
+ USB_INTERFACE_DESCRIPTOR_TYPE, /* bDescriptorType: */
+ 0x01, /* bInterfaceNumber: Number of Interface */
+ 0x00, /* bAlternateSetting: Alternate setting */
+ 0x02, /* bNumEndpoints: Two endpoints used */
+ 0x0A, /* bInterfaceClass: CDC */
+ 0x00, /* bInterfaceSubClass: */
+ 0x00, /* bInterfaceProtocol: */
+ 0x00, /* iInterface: */
+
+ /*Endpoint OUT Descriptor*/
+ 0x07, /* bLength: Endpoint Descriptor size */
+ USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType: Endpoint */
+ CDC_OUT_EP, /* bEndpointAddress */
+ 0x02, /* bmAttributes: Bulk */
+ 0x40, /* wMaxPacketSize: */
+ 0x00,
+ 0x00, /* bInterval: ignore for Bulk transfer */
+
+ /*Endpoint IN Descriptor*/
+ 0x07, /* bLength: Endpoint Descriptor size */
+ USB_ENDPOINT_DESCRIPTOR_TYPE, /* bDescriptorType: Endpoint */
+ CDC_IN_EP, /* bEndpointAddress */
+ 0x02, /* bmAttributes: Bulk */
+ 0x40, /* wMaxPacketSize: */
+ 0x00,
+ 0x00 /* bInterval */
+};
+#endif /* USE_USB_OTG_HS */
+
+/**
+ * @}
+ */
+
+/** @defgroup usbd_cdc_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief usbd_cdc_Init
+ * Initilaize the CDC interface
+ * @param pdev: device instance
+ * @param cfgidx: Configuration index
+ * @retval status
+ */
+static uint8_t usbd_cdc_Init (void *pdev,
+ uint8_t cfgidx)
+{
+ uint8_t *pbuf;
+
+ /* Open EP IN */
+ DCD_EP_Open(pdev,
+ CDC_IN_EP,
+ CDC_DATA_IN_PACKET_SIZE,
+ USB_OTG_EP_BULK);
+
+ /* Open EP OUT */
+ DCD_EP_Open(pdev,
+ CDC_OUT_EP,
+ CDC_DATA_OUT_PACKET_SIZE,
+ USB_OTG_EP_BULK);
+
+ /* Open Command IN EP */
+ DCD_EP_Open(pdev,
+ CDC_CMD_EP,
+ CDC_CMD_PACKET_SZE,
+ USB_OTG_EP_INT);
+
+ pbuf = (uint8_t *)USBD_DeviceDesc;
+ pbuf[4] = DEVICE_CLASS_CDC;
+ pbuf[5] = DEVICE_SUBCLASS_CDC;
+
+ /* Initialize the Interface physical components */
+ APP_FOPS.pIf_Init();
+
+ /* Prepare Out endpoint to receive next packet */
+ DCD_EP_PrepareRx(pdev,
+ CDC_OUT_EP,
+ (uint8_t*)(USB_Rx_Buffer),
+ CDC_DATA_OUT_PACKET_SIZE);
+
+ return USBD_OK;
+}
+
+/**
+ * @brief usbd_cdc_Init
+ * DeInitialize the CDC layer
+ * @param pdev: device instance
+ * @param cfgidx: Configuration index
+ * @retval status
+ */
+static uint8_t usbd_cdc_DeInit (void *pdev,
+ uint8_t cfgidx)
+{
+ /* Open EP IN */
+ DCD_EP_Close(pdev,
+ CDC_IN_EP);
+
+ /* Open EP OUT */
+ DCD_EP_Close(pdev,
+ CDC_OUT_EP);
+
+ /* Open Command IN EP */
+ DCD_EP_Close(pdev,
+ CDC_CMD_EP);
+
+ /* Restore default state of the Interface physical components */
+ APP_FOPS.pIf_DeInit();
+
+ return USBD_OK;
+}
+
+/**
+ * @brief usbd_cdc_Setup
+ * Handle the CDC specific requests
+ * @param pdev: instance
+ * @param req: usb requests
+ * @retval status
+ */
+static uint8_t usbd_cdc_Setup (void *pdev,
+ USB_SETUP_REQ *req)
+{
+ uint16_t len=USB_CDC_DESC_SIZ;
+ uint8_t *pbuf=usbd_cdc_CfgDesc + 9;
+
+ switch (req->bmRequest & USB_REQ_TYPE_MASK)
+ {
+ /* CDC Class Requests -------------------------------*/
+ case USB_REQ_TYPE_CLASS :
+ /* Check if the request is a data setup packet */
+ if (req->wLength)
+ {
+ /* Check if the request is Device-to-Host */
+ if (req->bmRequest & 0x80)
+ {
+ /* Get the data to be sent to Host from interface layer */
+ APP_FOPS.pIf_Ctrl(req->bRequest, CmdBuff, req->wLength);
+
+ /* Send the data to the host */
+ USBD_CtlSendData (pdev,
+ CmdBuff,
+ req->wLength);
+ }
+ else /* Host-to-Device requeset */
+ {
+ /* Set the value of the current command to be processed */
+ cdcCmd = req->bRequest;
+ cdcLen = req->wLength;
+
+ /* Prepare the reception of the buffer over EP0
+ Next step: the received data will be managed in usbd_cdc_EP0_TxSent()
+ function. */
+ // MyPrintf("cdc class \n\r");
+ USBD_CtlPrepareRx (pdev,
+ CmdBuff,
+ req->wLength);
+ APP_FOPS.pIf_Ctrl(req->bRequest, CmdBuff, req->wLength);
+ if(req->wLength != 0)
+ {
+ USBD_CtlSendStatus(pdev);
+ }
+ }
+ }
+ else /* No Data request */
+ {
+ /* Transfer the command to the interface layer */
+ APP_FOPS.pIf_Ctrl(req->bRequest, NULL, 0);
+ }
+
+ return USBD_OK;
+
+ default:
+ USBD_CtlError (pdev, req);
+ return USBD_FAIL;
+
+
+
+ /* Standard Requests -------------------------------*/
+ case USB_REQ_TYPE_STANDARD:
+ switch (req->bRequest)
+ {
+ case USB_REQ_GET_DESCRIPTOR:
+ if( (req->wValue >> 8) == CDC_DESCRIPTOR_TYPE)
+ {
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ pbuf = usbd_cdc_Desc;
+#else
+ pbuf = usbd_cdc_CfgDesc + 9 + (9 * USBD_ITF_MAX_NUM);
+#endif
+ len = MIN(USB_CDC_DESC_SIZ , req->wLength);
+ }
+
+ USBD_CtlSendData (pdev,
+ pbuf,
+ len);
+ break;
+
+ case USB_REQ_GET_INTERFACE :
+ USBD_CtlSendData (pdev,
+ (uint8_t *)&usbd_cdc_AltSet,
+ 1);
+ break;
+
+ case USB_REQ_SET_INTERFACE :
+ if ((uint8_t)(req->wValue) < USBD_ITF_MAX_NUM)
+ {
+ usbd_cdc_AltSet = (uint8_t)(req->wValue);
+ }
+ else
+ {
+ /* Call the error management function (command will be nacked */
+ USBD_CtlError (pdev, req);
+ }
+ break;
+ }
+ }
+ return USBD_OK;
+}
+
+/**
+ * @brief usbd_cdc_EP0_RxReady
+ * Data received on control endpoint
+ * @param pdev: device device instance
+ * @retval status
+ */
+static uint8_t usbd_cdc_EP0_RxReady (void *pdev)
+{
+ if (cdcCmd != NO_CMD)
+ {
+ /* Process the data */
+ APP_FOPS.pIf_Ctrl(cdcCmd, CmdBuff, cdcLen);
+
+ /* Reset the command variable to default value */
+ cdcCmd = NO_CMD;
+ }
+
+ return USBD_OK;
+}
+
+/**
+ * @brief usbd_audio_DataIn
+ * Data sent on non-control IN endpoint
+ * @param pdev: device instance
+ * @param epnum: endpoint number
+ * @retval status
+ */
+static uint8_t usbd_cdc_DataIn (void *pdev, uint8_t epnum)
+{
+ uint16_t USB_Tx_ptr;
+ uint16_t USB_Tx_length = 0;
+
+ if (USB_Tx_State == 1)
+ {
+ if (APP_Rx_length == 0)
+ {
+ USB_Tx_State = 0;
+ }
+ else
+ {
+ if (APP_Rx_length > CDC_DATA_IN_PACKET_SIZE)
+ {
+ USB_Tx_ptr = APP_Gdata_param.rx_structure.APP_Rx_ptr_out;
+ if (APP_Gdata_param.rx_structure.APP_Rx_ptr_out + CDC_DATA_IN_PACKET_SIZE >= APP_RX_DATA_SIZE)
+ {
+ USB_Tx_length = APP_RX_DATA_SIZE - APP_Gdata_param.rx_structure.APP_Rx_ptr_out;
+ APP_Gdata_param.rx_structure.APP_Rx_ptr_out = 0;
+ APP_Rx_length -= USB_Tx_length;
+ APP_Gdata_param.rx_structure.Rx_counter -= USB_Tx_length;
+ }else{
+ USB_Tx_length = CDC_DATA_IN_PACKET_SIZE;
+ APP_Gdata_param.rx_structure.APP_Rx_ptr_out += CDC_DATA_IN_PACKET_SIZE;
+ APP_Rx_length -= CDC_DATA_IN_PACKET_SIZE;
+ APP_Gdata_param.rx_structure.Rx_counter -= CDC_DATA_IN_PACKET_SIZE;
+ }
+ }
+ else
+ {
+ USB_Tx_ptr = APP_Gdata_param.rx_structure.APP_Rx_ptr_out;
+ if (APP_Gdata_param.rx_structure.APP_Rx_ptr_out + APP_Rx_length >= APP_RX_DATA_SIZE)
+ {
+ USB_Tx_length = APP_RX_DATA_SIZE - APP_Gdata_param.rx_structure.APP_Rx_ptr_out;
+ APP_Gdata_param.rx_structure.APP_Rx_ptr_out = 0;
+ APP_Rx_length -= USB_Tx_length;
+ APP_Gdata_param.rx_structure.Rx_counter -= USB_Tx_length;
+ }else{
+ USB_Tx_length = APP_Rx_length;
+ APP_Gdata_param.rx_structure.APP_Rx_ptr_out += APP_Rx_length;
+ APP_Gdata_param.rx_structure.Rx_counter -= APP_Rx_length;
+ APP_Rx_length = 0;
+ }
+ }
+ }
+ /* Prepare the available data buffer to be sent on IN endpoint */
+ DCD_EP_Tx(pdev,
+ CDC_IN_EP,
+ (uint8_t*)&APP_Gdata_param.rx_structure.APP_Rx_Buffer[USB_Tx_ptr],
+ USB_Tx_length);
+ }
+
+ return USBD_OK;
+}
+
+/**
+ * @brief usbd_cdc_DataOut
+ * Data received on non-control Out endpoint
+ * @param pdev: device instance
+ * @param epnum: endpoint number
+ * @retval status
+ */
+ uint8_t CDC_Recv_Flag;
+static uint8_t usbd_cdc_DataOut (void *pdev, uint8_t epnum)
+{
+ uint16_t USB_Rx_Cnt;
+
+ /* Get the received data buffer and update the counter */
+
+ /* USB data will be immediately processed, this allow next USB traffic being
+ NAKed till the end of the application Xfer */
+ /* Prepare Out endpoint to receive next packet */
+ DCD_EP_PrepareRx(pdev,
+ CDC_OUT_EP,
+ (uint8_t*)(USB_Rx_Buffer),
+ CDC_DATA_OUT_PACKET_SIZE);
+ USB_Rx_Cnt = ((USB_OTG_CORE_HANDLE*)pdev)->dev.out_ep[epnum].xfer_count;
+ APP_FOPS.pIf_DataRx(USB_Rx_Buffer, USB_Rx_Cnt);
+ if(USB_Rx_Cnt == CDC_DATA_OUT_PACKET_SIZE)
+ {
+ my_delay_ms(1);
+ usbd_cdc_DataOut(pdev,epnum);
+ }
+ CDC_Recv_Flag =1;
+ return USBD_OK;
+}
+
+/**
+ * @brief usbd_audio_SOF
+ * Start Of Frame event management
+ * @param pdev: instance
+ * @param epnum: endpoint number
+ * @retval status
+ */
+static uint8_t usbd_cdc_SOF (void *pdev)
+{
+ static uint32_t FrameCount = 0;
+
+ if (FrameCount++ == CDC_IN_FRAME_INTERVAL)
+ {
+ /* Reset the frame counter */
+ FrameCount = 0;
+
+ /* Check the data to be sent through IN pipe */
+ Handle_USBAsynchXfer(pdev);
+ }
+
+ return USBD_OK;
+}
+
+/**
+ * @brief Handle_USBAsynchXfer
+ * Send data to USB
+ * @param pdev: instance
+ * @retval None
+ */
+static void Handle_USBAsynchXfer (void *pdev)
+{
+ uint16_t USB_Tx_ptr;
+ uint16_t USB_Tx_length;
+
+ if(USB_Tx_State != 1)
+ {
+ if (APP_Gdata_param.rx_structure.APP_Rx_ptr_out == CDC_APP_RX_DATA_SIZE)
+ {
+ APP_Gdata_param.rx_structure.APP_Rx_ptr_out = 0;
+ }
+ #if 1
+ if (!APP_Gdata_param.rx_structure.Rx_counter)
+ {
+ USB_Tx_State = 0;
+ return;
+ }
+ APP_Rx_length = APP_Gdata_param.rx_structure.Rx_counter;
+ #else
+ /* */
+// if (!APP_Gdata_param.rx_structure.Rx_counter)
+ if (APP_Gdata_param.rx_structure.APP_Rx_ptr_out == \
+ APP_Gdata_param.rx_structure.APP_Rx_ptr_in)
+ {
+ USB_Tx_State = 0;
+ return;
+ }
+// APP_Rx_length = APP_Gdata_param.rx_structure.Rx_counter;
+// APP_Rx_length = APP_Gdata_param.rx_structure.APP_Rx_ptr_in - \
+// APP_Gdata_param.rx_structure.APP_Rx_ptr_out;
+// if(APP_Gdata_param.rx_structure.APP_Rx_ptr_out == APP_Gdata_param.rx_structure.APP_Rx_ptr_in)
+// {
+// USB_Tx_State = 0;
+// return;
+// }
+
+ if(APP_Gdata_param.rx_structure.APP_Rx_ptr_out > APP_Gdata_param.rx_structure.APP_Rx_ptr_in) /* rollback */
+ {
+ APP_Rx_length = APP_RX_DATA_SIZE - APP_Gdata_param.rx_structure.APP_Rx_ptr_out;
+ }
+ else
+ {
+ APP_Rx_length = APP_Gdata_param.rx_structure.APP_Rx_ptr_in - APP_Gdata_param.rx_structure.APP_Rx_ptr_out;
+ }
+ #endif
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ APP_Rx_length &= ~0x03;
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+
+ if (APP_Rx_length > CDC_DATA_IN_PACKET_SIZE)
+ {
+ USB_Tx_ptr = APP_Gdata_param.rx_structure.APP_Rx_ptr_out;
+ if (APP_Gdata_param.rx_structure.APP_Rx_ptr_out + CDC_DATA_IN_PACKET_SIZE >= CDC_APP_RX_DATA_SIZE)
+ {
+ USB_Tx_length = APP_RX_DATA_SIZE - APP_Gdata_param.rx_structure.APP_Rx_ptr_out;
+ APP_Gdata_param.rx_structure.APP_Rx_ptr_out = 0;
+ APP_Rx_length -= USB_Tx_length;
+ APP_Gdata_param.rx_structure.Rx_counter = APP_Rx_length;
+ }else{
+ USB_Tx_length = CDC_DATA_IN_PACKET_SIZE;
+ APP_Gdata_param.rx_structure.APP_Rx_ptr_out += CDC_DATA_IN_PACKET_SIZE;
+ APP_Rx_length -= CDC_DATA_IN_PACKET_SIZE;
+ APP_Gdata_param.rx_structure.Rx_counter = APP_Rx_length;
+ }
+ }
+ else
+ {
+ USB_Tx_ptr = APP_Gdata_param.rx_structure.APP_Rx_ptr_out;
+ if (APP_Gdata_param.rx_structure.APP_Rx_ptr_out + APP_Rx_length >= CDC_APP_RX_DATA_SIZE)
+ {
+ USB_Tx_length = APP_RX_DATA_SIZE - APP_Gdata_param.rx_structure.APP_Rx_ptr_out;
+ APP_Gdata_param.rx_structure.APP_Rx_ptr_out = 0;
+ APP_Rx_length -= USB_Tx_length;
+ APP_Gdata_param.rx_structure.Rx_counter = APP_Rx_length;
+ }else{
+ USB_Tx_length = APP_Rx_length;
+ APP_Gdata_param.rx_structure.APP_Rx_ptr_out += APP_Rx_length;
+ APP_Rx_length = 0;
+ APP_Gdata_param.rx_structure.Rx_counter = APP_Rx_length;
+ }
+ }
+ USB_Tx_State = 1;
+
+ DCD_EP_Tx (pdev,
+ CDC_IN_EP,
+ (uint8_t*)&APP_Gdata_param.rx_structure.APP_Rx_Buffer[USB_Tx_ptr],
+ USB_Tx_length);
+ }
+
+}
+
+/**
+ * @brief USBD_cdc_GetCfgDesc
+ * Return configuration descriptor
+ * @param speed : current device speed
+ * @param length : pointer data length
+ * @retval pointer to descriptor buffer
+ */
+static uint8_t *USBD_cdc_GetCfgDesc (uint8_t speed, uint16_t *length)
+{
+ *length = sizeof (usbd_cdc_CfgDesc);
+ return usbd_cdc_CfgDesc;
+}
+
+/**
+ * @brief USBD_cdc_GetCfgDesc
+ * Return configuration descriptor
+ * @param speed : current device speed
+ * @param length : pointer data length
+ * @retval pointer to descriptor buffer
+ */
+#ifdef USE_USB_OTG_HS
+static uint8_t *USBD_cdc_GetOtherCfgDesc (uint8_t speed, uint16_t *length)
+{
+ *length = sizeof (usbd_cdc_OtherCfgDesc);
+ return usbd_cdc_OtherCfgDesc;
+}
+#endif
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/class/CDC/usbd_cdc_if_template.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/CDC/usbd_cdc_if_template.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/CDC/usbd_cdc_if_template.h (working copy)
@@ -0,0 +1,46 @@
+/**
+ ******************************************************************************
+ * @file usbd_cdc_if_template.h
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief Header for dfu_mal.c file.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_CDC_IF_TEMPLATE_H
+#define __USBD_CDC_IF_TEMPLATE_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "usb_conf.h"
+#include "usbd_conf.h"
+#include "usbd_cdc_core.h"
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+extern CDC_IF_Prop_TypeDef TEMPLATE_fops;
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+#endif /* __USBD_CDC_IF_TEMPLATE_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/class/CDC/usbd_cdc_if_template.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/CDC/usbd_cdc_if_template.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/CDC/usbd_cdc_if_template.c (working copy)
@@ -0,0 +1,207 @@
+/**
+ ******************************************************************************
+ * @file usbd_cdc_if_template.c
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief Generic media access Layer.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+#pragma data_alignment = 4
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_cdc_if_template.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* These are external variables imported from CDC core to be used for IN
+ transfer management. */
+extern uint8_t APP_Rx_Buffer []; /* Write CDC received data in this buffer.
+ These data will be sent over USB IN endpoint
+ in the CDC core functions. */
+extern uint32_t APP_Rx_ptr_in; /* Increment this pointer or roll it back to
+ start address when writing received data
+ in the buffer APP_Rx_Buffer. */
+
+/* Private function prototypes -----------------------------------------------*/
+static uint16_t TEMPLATE_Init (void);
+static uint16_t TEMPLATE_DeInit (void);
+static uint16_t TEMPLATE_Ctrl (uint32_t Cmd, uint8_t* Buf, uint32_t Len);
+static uint16_t TEMPLATE_DataTx (uint8_t* Buf, uint32_t Len);
+static uint16_t TEMPLATE_DataRx (uint8_t* Buf, uint32_t Len);
+
+CDC_IF_Prop_TypeDef TEMPLATE_fops =
+{
+ TEMPLATE_Init,
+ TEMPLATE_DeInit,
+ TEMPLATE_Ctrl,
+ TEMPLATE_DataTx,
+ TEMPLATE_DataRx
+};
+
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief TEMPLATE_Init
+ * Initializes the CDC media low layer
+ * @param None
+ * @retval Result of the opeartion: USBD_OK if all operations are OK else USBD_FAIL
+ */
+static uint16_t TEMPLATE_Init(void)
+{
+ /*
+ Add your initialization code here
+ */
+ return USBD_OK;
+}
+
+/**
+ * @brief TEMPLATE_DeInit
+ * DeInitializes the CDC media low layer
+ * @param None
+ * @retval Result of the opeartion: USBD_OK if all operations are OK else USBD_FAIL
+ */
+static uint16_t TEMPLATE_DeInit(void)
+{
+ /*
+ Add your deinitialization code here
+ */
+ return USBD_OK;
+}
+
+
+/**
+ * @brief TEMPLATE_Ctrl
+ * Manage the CDC class requests
+ * @param Cmd: Command code
+ * @param Buf: Buffer containing command data (request parameters)
+ * @param Len: Number of data to be sent (in bytes)
+ * @retval Result of the opeartion: USBD_OK if all operations are OK else USBD_FAIL
+ */
+static uint16_t TEMPLATE_Ctrl (uint32_t Cmd, uint8_t* Buf, uint32_t Len)
+{
+ switch (Cmd)
+ {
+ case SEND_ENCAPSULATED_COMMAND:
+ /* Add your code here */
+ break;
+
+ case GET_ENCAPSULATED_RESPONSE:
+ /* Add your code here */
+ break;
+
+ case SET_COMM_FEATURE:
+ /* Add your code here */
+ break;
+
+ case GET_COMM_FEATURE:
+ /* Add your code here */
+ break;
+
+ case CLEAR_COMM_FEATURE:
+ /* Add your code here */
+ break;
+
+ case SET_LINE_CODING:
+ /* Add your code here */
+ break;
+
+ case GET_LINE_CODING:
+ /* Add your code here */
+ break;
+
+ case SET_CONTROL_LINE_STATE:
+ /* Add your code here */
+ break;
+
+ case SEND_BREAK:
+ /* Add your code here */
+ break;
+
+ default:
+ break;
+ }
+
+ return USBD_OK;
+}
+
+/**
+ * @brief TEMPLATE_DataTx
+ * CDC received data to be send over USB IN endpoint are managed in
+ * this function.
+ * @param Buf: Buffer of data to be sent
+ * @param Len: Number of data to be sent (in bytes)
+ * @retval Result of the opeartion: USBD_OK if all operations are OK else USBD_FAIL
+ */
+static uint16_t TEMPLATE_DataTx (uint8_t* Buf, uint32_t Len)
+{
+
+ /* Get the data to be sent */
+ for (uint32_t i = 0; i < Len; i++)
+ {
+ /* APP_Rx_Buffer[APP_Rx_ptr_in] = XXX_ReceiveData(XXX); */
+ }
+
+ /* Increment the in pointer */
+ APP_Rx_ptr_in++;
+
+ /* To avoid buffer overflow */
+ if(APP_Rx_ptr_in == APP_RX_DATA_SIZE)
+ {
+ APP_Rx_ptr_in = 0;
+ }
+
+ return USBD_OK;
+}
+
+/**
+ * @brief TEMPLATE_DataRx
+ * Data received over USB OUT endpoint are sent over CDC interface
+ * through this function.
+ *
+ * @note
+ * This function will block any OUT packet reception on USB endpoint
+ * untill exiting this function. If you exit this function before transfer
+ * is complete on CDC interface (ie. using DMA controller) it will result
+ * in receiving more data while previous ones are still not sent.
+ *
+ * @param Buf: Buffer of data to be received
+ * @param Len: Number of data received (in bytes)
+ * @retval Result of the opeartion: USBD_OK if all operations are OK else USBD_FAIL
+ */
+static uint16_t TEMPLATE_DataRx (uint8_t* Buf, uint32_t Len)
+{
+ uint32_t i;
+
+ /* Send the received buffer */
+ for (i = 0; i < Len; i++)
+ {
+ /* XXXX_SendData(XXXX, *(Buf + i) ); */
+ }
+
+ return USBD_OK;
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/class/HID/usbd_hid_core.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/HID/usbd_hid_core.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/HID/usbd_hid_core.h (working copy)
@@ -0,0 +1,123 @@
+/**
+ ******************************************************************************
+ * @file usbd_hid_core.h
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief header file for the usbd_hid_core.c file.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+
+#ifndef __USB_HID_CORE_H_
+#define __USB_HID_CORE_H_
+
+#include "usbd_ioreq.h"
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+/** @defgroup USBD_HID
+ * @brief This file is the Header file for USBD_msc.c
+ * @{
+ */
+
+
+/** @defgroup USBD_HID_Exported_Defines
+ * @{
+ */
+
+ #define HID_EPIN_SIZE HID_EP_MAX_PACKET
+#define HID_EPOUT_SIZE HID_EP_MAX_PACKET
+#define HID_EP0_BUFF_SIZ 64
+#define HID_MAX_PACKET_SIZE 64
+extern uint8_t HidOut_Data_Buff[HID_MAX_PACKET_SIZE];
+#define USB_HID_CONFIG_DESC_SIZ 41//41//34 //DT??
+#define USB_HID_DESC_SIZ 9
+#define HID_MOUSE_REPORT_DESC_SIZE 33//27//33//74 //DT??
+//#define HID_MOUSE_REPORT_DESC_SIZE 52
+
+#define HID_DESCRIPTOR_TYPE 0x21
+#define HID_REPORT_DESC 0x22
+
+
+#define HID_REQ_SET_PROTOCOL 0x0B
+#define HID_REQ_GET_PROTOCOL 0x03
+
+#define HID_REQ_SET_IDLE 0x0A
+#define HID_REQ_GET_IDLE 0x02
+
+#define HID_REQ_SET_REPORT 0x09
+#define HID_REQ_GET_REPORT 0x01
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_CORE_Exported_TypesDefinitions
+ * @{
+ */
+
+
+/**
+ * @}
+ */
+
+
+
+/** @defgroup USBD_CORE_Exported_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CORE_Exported_Variables
+ * @{
+ */
+
+extern USBD_Class_cb_TypeDef USBD_HID_cb;
+/**
+ * @}
+ */
+
+/** @defgroup USB_CORE_Exported_Functions
+ * @{
+ */
+uint8_t USBD_HID_SendReport (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t *report,
+ uint16_t len);
+/**
+ * @}
+ */
+
+#endif // __USB_HID_CORE_H_
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/class/HID/usbd_hid_core.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/HID/usbd_hid_core.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/HID/usbd_hid_core.c (working copy)
@@ -0,0 +1,714 @@
+/**
+ ******************************************************************************
+ * @file usbd_hid_core.c
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief This file provides the HID core functions.
+ *
+ * @verbatim
+ *
+ * ===================================================================
+ * HID Class Description
+ * ===================================================================
+ * This module manages the HID class V1.11 following the "Device Class Definition
+ * for Human Interface Devices (HID) Version 1.11 Jun 27, 2001".
+ * This driver implements the following aspects of the specification:
+ * - The Boot Interface Subclass
+ * - The Mouse protocol
+ * - Usage Page : Generic Desktop
+ * - Usage : Joystick)
+ * - Collection : Application
+ *
+ * @note In HS mode and when the DMA is used, all variables and data structures
+ * dealing with the DMA during the transaction process should be 32-bit aligned.
+ *
+ *
+ * @endverbatim
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_hid_core.h"
+#include "usbd_desc.h"
+#include "usbd_req.h"
+
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+
+/** @defgroup USBD_HID
+ * @brief usbd core module
+ * @{
+ */
+
+/** @defgroup USBD_HID_Private_TypesDefinitions
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_HID_Private_Defines
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_HID_Private_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+
+
+/** @defgroup USBD_HID_Private_FunctionPrototypes
+ * @{
+ */
+
+
+static uint8_t USBD_HID_Init (void *pdev,
+ uint8_t cfgidx);
+
+static uint8_t USBD_HID_DeInit (void *pdev,
+ uint8_t cfgidx);
+
+static uint8_t USBD_HID_Setup (void *pdev,
+ USB_SETUP_REQ *req);
+
+static uint8_t *USBD_HID_GetCfgDesc (uint8_t speed, uint16_t *length);
+
+static uint8_t USBD_HID_DataIn (void *pdev, uint8_t epnum);
+uint8_t USBD_HID_DataOut(void *pdev,uint8_t epnum);
+/**
+ * @}
+ */
+
+/** @defgroup USBD_HID_Private_Variables
+ * @{
+ */
+
+USBD_Class_cb_TypeDef USBD_HID_cb =
+{
+ USBD_HID_Init,
+ USBD_HID_DeInit,
+ USBD_HID_Setup,
+ NULL, /*EP0_TxSent*/
+ NULL, /*EP0_RxReady*/
+ USBD_HID_DataIn, /*DataIn*/
+ USBD_HID_DataOut, /*DataOut*/
+ NULL, /*SOF */
+ NULL,
+ NULL,
+ USBD_HID_GetCfgDesc,
+#ifdef USB_OTG_HS_CORE
+ USBD_HID_GetCfgDesc, /* use same config as per FS */
+#endif
+};
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+__ALIGN_BEGIN static uint32_t USBD_HID_AltSet __ALIGN_END = 0;
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+__ALIGN_BEGIN static uint32_t USBD_HID_Protocol __ALIGN_END = 0;
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+__ALIGN_BEGIN static uint32_t USBD_HID_IdleState __ALIGN_END = 0;
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+/* USB HID device Configuration Descriptor */
+__ALIGN_BEGIN static uint8_t USBD_HID_CfgDesc[USB_HID_CONFIG_DESC_SIZ] __ALIGN_END =
+{
+ #if 0
+ 0x09, /* bLength: Configuration Descriptor size */
+ USB_CONFIGURATION_DESCRIPTOR_TYPE, /* bDescriptorType: Configuration */
+ USB_HID_CONFIG_DESC_SIZ,
+ /* wTotalLength: Bytes returned */
+ 0x00,
+ 0x01, /*bNumInterfaces: 1 interface*/
+ 0x01, /*bConfigurationValue: Configuration value*/
+ 0x00, /*iConfiguration: Index of string descriptor describing
+ the configuration*/
+ 0xE0, /*bmAttributes: bus powered and Support Remote Wake-up */
+ 0x32, /*MaxPower 100 mA: this current is used for detecting Vbus*/
+
+ /************** Descriptor of Joystick Mouse interface ****************/
+ /* 09 */
+ 0x09, /*bLength: Interface Descriptor size*/
+ USB_INTERFACE_DESCRIPTOR_TYPE,/*bDescriptorType: Interface descriptor type*/
+ 0x00, /*bInterfaceNumber: Number of Interface*/
+ 0x00, /*bAlternateSetting: Alternate setting*/
+ 0x01, /*bNumEndpoints*/
+ 0x03, /*bInterfaceClass: HID*/
+ 0x01, /*bInterfaceSubClass : 1=BOOT, 0=no boot*/
+ 0x02, /*nInterfaceProtocol : 0=none, 1=keyboard, 2=mouse*/
+ 0, /*iInterface: Index of string descriptor*/
+ /******************** Descriptor of Joystick Mouse HID ********************/
+ /* 18 */
+ 0x09, /*bLength: HID Descriptor size*/
+ HID_DESCRIPTOR_TYPE, /*bDescriptorType: HID*/
+ 0x11, /*bcdHID: HID Class Spec release number*/
+ 0x01,
+ 0x00, /*bCountryCode: Hardware target country*/
+ 0x01, /*bNumDescriptors: Number of HID class descriptors to follow*/
+ 0x22, /*bDescriptorType*/
+ HID_MOUSE_REPORT_DESC_SIZE,/*wItemLength: Total length of Report descriptor*/
+ 0x00,
+ /******************** Descriptor of Mouse endpoint ********************/
+ /* 27 */
+ 0x07, /*bLength: Endpoint Descriptor size*/
+ USB_ENDPOINT_DESCRIPTOR_TYPE, /*bDescriptorType:*/
+
+ HID_IN_EP, /*bEndpointAddress: Endpoint Address (IN)*/
+ 0x03, /*bmAttributes: Interrupt endpoint*/
+ HID_IN_PACKET, /*wMaxPacketSize: 4 Byte max */
+ 0x00,
+ 0x0A, /*bInterval: Polling Interval (10 ms)*/
+ /* 34 */
+ #else
+ #if 0
+ 0x09, /* bLength: Configuration Descriptor size */
+ USB_CONFIGURATION_DESCRIPTOR_TYPE, /* bDescriptorType: Configuration */
+ USB_HID_CONFIG_DESC_SIZ,
+ /* wTotalLength: Bytes returned */
+ 0x00,
+ 0x01, /*bNumInterfaces: 1 interface*/
+ 0x01, /*bConfigurationValue: Configuration value*/
+ 0x00, /*iConfiguration: Index of string descriptor describing
+ the configuration*/
+ 0xE0, /*bmAttributes: bus powered and Support Remote Wake-up */
+ 0x32, /*MaxPower 100 mA: this current is used for detecting Vbus*/
+
+ /************** Descriptor of Joystick Mouse interface ****************/
+ /* 09 */
+ 0x09, /*bLength: Interface Descriptor size*/
+ USB_INTERFACE_DESCRIPTOR_TYPE,/*bDescriptorType: Interface descriptor type*/
+ 0x00, /*bInterfaceNumber: Number of Interface*/
+ 0x00, /*bAlternateSetting: Alternate setting*/
+ 0x02, /*bNumEndpoints*/ //???a¨¢??????¨²¨ºy¡ê?2?¡ã¨¹¨¤¡§0???¨²
+ 0x03, /*bInterfaceClass: HID*/
+ 0x00, /*bInterfaceSubClass : 1=BOOT, 0=no boot*/ //¨¦¨¨??3¨¦0
+ 0x00, /*nInterfaceProtocol : 0=none, 1=keyboard, 2=mouse*/ //¨¦¨¨??3¨¦0
+ 0, /*iInterface: Index of string descriptor*/
+ /******************** Descriptor of Joystick Mouse HID ********************/
+ /* 18 */
+ 0x09, /*bLength: HID Descriptor size*/
+ HID_DESCRIPTOR_TYPE, /*bDescriptorType: HID*/
+ 0x11, /*bcdHID: HID Class Spec release number*/
+ 0x01,
+ 0x00, /*bCountryCode: Hardware target country*/
+ 0x01, /*bNumDescriptors: Number of HID class descriptors to follow*/
+ 0x22, /*bDescriptorType*/
+ HID_MOUSE_REPORT_DESC_SIZE,/*wItemLength: Total length of Report descriptor*/
+ 0x00,
+ /******************** Descriptor of Mouse endpoint ********************/
+ /* 27 */
+ 0x07, /*bLength: Endpoint Descriptor size*/
+ USB_ENDPOINT_DESCRIPTOR_TYPE, /*bDescriptorType:*/
+
+ HID_IN_EP, /*bEndpointAddress: Endpoint Address (IN)*/
+ 0x03, /*bmAttributes: Interrupt endpoint*/
+ HID_IN_PACKET, /*wMaxPacketSize: 4 Byte max */
+ 0x00,
+ 0x01, /*bInterval: Polling Interval (10 ms)*/
+ /* 34 */
+
+ /*************************¨¬¨ª?¨®¨º?3???¦Ì?*******************************/
+ 0x07,
+ USB_ENDPOINT_DESCRIPTOR_TYPE,
+ HID_OUT_EP,
+ 0x03,
+ HID_OUT_PACKET,
+ 0x00,
+ 0x01,
+ #endif
+
+ /* 41 */
+ #if 1
+ 0x09, //Length = 9
+ USB_CONFIGURATION_DESCRIPTOR_TYPE, //DescriptorType = Configuration
+ USB_HID_CONFIG_DESC_SIZ, 0x00, //TotalLength
+ 0x01, //NumInterfaces = 1
+ 0x01, //ConfigurationValue = 1
+ 0x00, //iConfiguration string index(Non)
+ 0x80, //SelfPower = 0; RemoteWakeup = 0
+ 0x32, //MaxPower = 100mA
+
+ //interface desc
+ 0x09, //Length = 9
+ USB_INTERFACE_DESCRIPTOR_TYPE, //DescriptorType = Interface
+ 0x00, //InerfaceNumber = 0
+ 0x00, //AlternateSetting = 0
+ 0x02, //NumEndpoint = 2(bulk-IN, bulk-OUT)
+ 0x03, //Class = Human Interface Device
+ 0x00, //InterfaceSubClass = 0x00(No subclass)
+ 0x00, //InterfaceProtocol = 0x00(None)
+ 0x00, //iInterface string index(Non)
+
+ //HID descriptor
+ 0x09,0x21, //Length, Type
+ 0x11,0x01, //HID Class Specification compliance ?0x10 0x01
+ 0x00, //Country localization (=none)
+ 0x01, //number of descriptors to follow
+ 0x22, //And it's a Report descriptor
+ HID_MOUSE_REPORT_DESC_SIZE,0x00, //Report descriptor length
+
+ // Endpoint desc
+ 0x07, //Length = 7
+ USB_ENDPOINT_DESCRIPTOR_TYPE, //DescriptorType = Endpoint
+ HID_IN_EP, //In; Ep1
+ 0x03, //Endpoint type = interrupt
+ HID_IN_PACKET, 0x00, //MaxPacketSize = 64->16
+ 0x01, //0x0a, //Poll
+
+ 0x07, //Length = 7
+ USB_ENDPOINT_DESCRIPTOR_TYPE, //DescriptorType = Endpoint
+ HID_OUT_EP, //Out; Ep2
+ 0x03, //Endpoint type = interrupt
+ HID_OUT_PACKET, 0x00, //MaxPacketSize = 64->16
+ 0x01, //0x0a, DT??USB¦Ì¨¨¡äy¨º¡À??¡ê?¨¬¨¢¨¦yusb?????¨´?¨¨ @ 2018.08.28
+ #endif
+ #endif
+} ;
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+/* USB HID device Configuration Descriptor */
+__ALIGN_BEGIN static uint8_t USBD_HID_Desc[USB_HID_DESC_SIZ] __ALIGN_END=
+{
+ #if 0
+ /* 18 */
+ 0x09, /*bLength: HID Descriptor size*/
+ HID_DESCRIPTOR_TYPE, /*bDescriptorType: HID*/
+ 0x11, /*bcdHID: HID Class Spec release number*/
+ 0x01,
+ 0x00, /*bCountryCode: Hardware target country*/
+ 0x01, /*bNumDescriptors: Number of HID class descriptors to follow*/
+ 0x22, /*bDescriptorType*/
+ HID_MOUSE_REPORT_DESC_SIZE,/*wItemLength: Total length of Report descriptor*/
+ 0x00,
+ #endif
+ #if 1
+ 0x09,0x21, //Length, Type
+ 0x11,0x01, //HID Class Specification compliance ?0x10 0x01
+ 0x00, //Country localization (=none)
+ 0x01, //number of descriptors to follow
+ 0x22, //And it's a Report descriptor
+ HID_MOUSE_REPORT_DESC_SIZE,0x00, //Report descriptor length
+ #endif
+};
+#endif
+
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+//__ALIGN_BEGIN static uint8_t HID_MOUSE_ReportDesc[HID_MOUSE_REPORT_DESC_SIZE] __ALIGN_END =
+//{
+// 0x05, 0x01, // Usage Page,(Generic Desktop),
+// 0x09, 0x02, // Usage(Mouse),
+// 0xa1, 0x01, // Collectiton(Application),
+// 0x09, 0x01, // Usage(Pointer),
+// 0xa1, 0x00, // Collection(Physical),
+// 0x05, 0x09, // Usage Page(Buttons),
+// 0x19, 0x01, // Usage Minimum(01),
+// 0x29, 0x03, // Usage Maximum(03),
+// 0x15, 0x00, // Logical Minimum(0),
+// 0x25, 0x01, // Logical Maximum(1),
+// 0x95, 0x03, // Report Count(3),
+// 0x75, 0x01, // Report Size(1),
+// 0x81, 0x02, // Input(Data, Variable, Absolute), ;3 button bits
+// 0x95, 0x01, // Report Count(1),
+// 0x75, 0x05, // Report Size(5),
+// 0x81, 0x03, // Input(Cnst, Var, Abs),
+// 0x05, 0x01, // Usage Page(Generic Desktop),
+// 0x09, 0x30, // Usage(X),
+// 0x09, 0x31, // Usage(Y),
+// 0x09, 0x38, // Usage(Wheel),
+// 0x15, 0x81, // Logical Minimum(-127),
+// 0x25, 0x7f, // Logical Maximum(127),
+// 0x75, 0x08, // Report Size(8),
+// 0x95, 0x03, // Report Count(3),
+// 0x81, 0x06, // Input(Data, Variable, Relative), ;2 position bytes(X & Y)
+// 0xc0, // End Collection,
+// 0xc0 // End Collection
+//};
+__ALIGN_BEGIN static uint8_t HID_MOUSE_ReportDesc[HID_MOUSE_REPORT_DESC_SIZE] __ALIGN_END =
+{
+ #if 0
+ 0x05, 0x01,
+ 0x09, 0x02,
+ 0xA1, 0x01,
+ 0x09, 0x01,
+
+ 0xA1, 0x00,
+ 0x05, 0x09,
+ 0x19, 0x01,
+ 0x29, 0x03,
+
+ 0x15, 0x00,
+ 0x25, 0x01,
+ 0x95, 0x03,
+ 0x75, 0x01,
+
+ 0x81, 0x02,
+ 0x95, 0x01,
+ 0x75, 0x05,
+ 0x81, 0x01,
+
+ 0x05, 0x01,
+ 0x09, 0x30,
+ 0x09, 0x31,
+ 0x09, 0x38,
+
+ 0x15, 0x81,
+ 0x25, 0x7F,
+ 0x75, 0x08,
+ 0x95, 0x03,
+
+ 0x81, 0x06,
+ 0xC0, 0x09,
+ 0x3c, 0x05,
+ 0xff, 0x09,
+
+ 0x01, 0x15,
+ 0x00, 0x25,
+ 0x01, 0x75,
+ 0x01, 0x95,
+
+ 0x02, 0xb1,
+ 0x22, 0x75,
+ 0x06, 0x95,
+ 0x01, 0xb1,
+
+ 0x01, 0xc0
+ #else
+ #if 0
+ 0x05U, 0x01U, /* Usage Page (Vendor defined)*/
+ 0x09U, 0x00U, /* Usage (Vendor defined) */
+ 0xA1U, 0x01U, /* Collection (Application) */
+
+ 0x15U, 0x00U, /* logical Minimum (-128) */
+ 0x25U, 0xffU, /* logical Maximum (127) */
+0x19U, 0x01U,
+ 0x29U, 0x08U, /* Report Size (8U) */
+ 0x95U, 0x08U, /* Report Count (8U) */
+ 0x75U, 0x08U, /* Input(Data, Variable, Absolute) */
+
+ 0x81U, 0x02U, /* Usage (Vendor defined) */
+ 0x19U, 0x01U, /* logical Minimum (-128) */
+ 0x29U, 0x08U, /* logical Maximum (127) */
+ 0x91U, 0x02U, /* Report Size (8U) */
+
+ 0xC0U, /* end collection */
+ #endif
+ #if 0
+ 0x05, 0x01, //Usage Page: 0x06, 0x00, 0xFF->05 01
+ 0x09, 0x00, //Usage: Undefined 0x01->0x00
+ 0xa1, 0x01, //Collection 0x00->0x01
+ 0x15, 0x00, //Logical Minimum
+ 0x25, 0xFF,//Logical Maximum 0x26, 0xFF, 0x00->0x25 0xff
+ 0x19, 0x01, //Usage Minimum
+ 0x29, 0x08, //Usage Maximum 0x01->0x08
+ 0x95, 0x08, //Report Count
+ 0x75, 0x08, //Report Size
+ 0x81, 0x02, //Input (Data, Variable, Absolute,Buffered Bytes) 0x00->0x02
+ 0x19, 0x01, //Usage Minimum
+ 0x29, 0x08, //Usage Maximum 0x01->0x08
+ 0x91, 0x02, //Feature (Data, Variable, Absolute,Buffered Bytes)0xb1, 0x00->0x91, 0x02
+ 0xc0 //End Collection
+
+ #endif
+ #if 1
+ 0x05U, 0x81U, /* Usage Page (Vendor defined)*/
+ 0x09U, 0x82U, /* Usage (Vendor defined) */
+ 0xA1U, 0x01U, /* Collection (Application) */
+ 0x09U, 0x83U, /* Usage (Vendor defined) */
+
+ 0x09U, 0x84U, /* Usage (Vendor defined) */
+ 0x15U, 0x80U, /* logical Minimum (-128) */
+ 0x25U, 0x7FU, /* logical Maximum (127) */
+ 0x75U, 0x08U, /* Report Size (8U) */
+ 0x95U, HID_IN_PACKET, /* Report Count (8U) */
+ 0x81U, 0x02U, /* Input(Data, Variable, Absolute) */
+
+ 0x09U, 0x84U, /* Usage (Vendor defined) */
+ 0x15U, 0x80U, /* logical Minimum (-128) */
+ 0x25U, 0x7FU, /* logical Maximum (127) */
+ 0x75U, 0x08U, /* Report Size (8U) */
+ 0x95U, HID_OUT_PACKET, /* Report Count (8U) */
+ 0x91U, 0x02U, /* Input(Data, Variable, Absolute) */
+ 0xC0U, /* end collection */
+ #endif
+
+ #endif
+};
+/**
+ * @}
+ */
+
+/** @defgroup USBD_HID_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief USBD_HID_Init
+ * Initialize the HID interface
+ * @param pdev: device instance
+ * @param cfgidx: Configuration index
+ * @retval status
+ */
+static uint8_t USBD_HID_Init (void *pdev,
+ uint8_t cfgidx)
+{
+
+ /* Open EP IN */
+ DCD_EP_Open(pdev,
+ HID_IN_EP,
+ HID_IN_PACKET,
+ USB_OTG_EP_INT);
+
+ /* Open EP OUT */
+ DCD_EP_Open(pdev,
+ HID_OUT_EP,
+ HID_OUT_PACKET,
+ USB_OTG_EP_INT);
+
+ return USBD_OK;
+}
+
+/**
+ * @brief USBD_HID_Init
+ * DeInitialize the HID layer
+ * @param pdev: device instance
+ * @param cfgidx: Configuration index
+ * @retval status
+ */
+static uint8_t USBD_HID_DeInit (void *pdev,
+ uint8_t cfgidx)
+{
+ /* Close HID EPs */
+ DCD_EP_Close (pdev , HID_IN_EP);
+ DCD_EP_Close (pdev , HID_OUT_EP);
+
+
+ return USBD_OK;
+}
+
+/**
+ * @brief USBD_HID_Setup
+ * Handle the HID specific requests
+ * @param pdev: instance
+ * @param req: usb requests
+ * @retval status
+ */
+
+ extern USB_OTG_CORE_HANDLE USB_OTG_dev;
+static uint8_t USBD_HID_Setup (void *pdev,
+ USB_SETUP_REQ *req)
+{
+ uint16_t len = 0;
+ uint8_t *pbuf = NULL;
+
+ switch (req->bmRequest & USB_REQ_TYPE_MASK)
+ {
+ case USB_REQ_TYPE_CLASS :
+ switch (req->bRequest)
+ {
+
+
+ case HID_REQ_SET_PROTOCOL:
+ USBD_HID_Protocol = (uint8_t)(req->wValue);
+ break;
+
+ case HID_REQ_GET_PROTOCOL:
+ USBD_CtlSendData (pdev,
+ (uint8_t *)&USBD_HID_Protocol,
+ 1);
+ break;
+
+ case HID_REQ_SET_IDLE:
+ USBD_HID_IdleState = (uint8_t)(req->wValue >> 8);
+ USB_OTG_dev.dev.device_status_new = USB_OTG_END;
+ break;
+
+ case HID_REQ_GET_IDLE:
+ USBD_CtlSendData (pdev,
+ (uint8_t *)&USBD_HID_IdleState,
+ 1);
+ break;
+
+ default:
+ USBD_CtlError (pdev, req);
+ return USBD_FAIL;
+ }
+ break;
+
+ case USB_REQ_TYPE_STANDARD:
+ switch (req->bRequest)
+ {
+ case USB_REQ_GET_DESCRIPTOR:
+ if( req->wValue >> 8 == HID_REPORT_DESC)
+ {
+ len = MIN(HID_MOUSE_REPORT_DESC_SIZE , req->wLength);
+ pbuf = HID_MOUSE_ReportDesc;
+ }
+ else if( req->wValue >> 8 == HID_DESCRIPTOR_TYPE)
+ {
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ pbuf = USBD_HID_Desc;
+#else
+ pbuf = USBD_HID_CfgDesc + 0x12;
+#endif
+ len = MIN(USB_HID_DESC_SIZ , req->wLength);
+ }
+
+ USBD_CtlSendData (pdev,
+ pbuf,
+ len);
+
+ break;
+
+ case USB_REQ_GET_INTERFACE :
+ USBD_CtlSendData (pdev,
+ (uint8_t *)&USBD_HID_AltSet,
+ 1);
+ break;
+
+ case USB_REQ_SET_INTERFACE :
+ USBD_HID_AltSet = (uint8_t)(req->wValue);
+ break;
+ }
+ }
+ return USBD_OK;
+}
+
+/**
+ * @brief USBD_HID_SendReport
+ * Send HID Report
+ * @param pdev: device instance
+ * @param buff: pointer to report
+ * @retval status
+ */
+uint8_t USBD_HID_SendReport (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t *report,
+ uint16_t len)
+{
+ if (pdev->dev.device_status == USB_OTG_CONFIGURED )
+ {
+ DCD_EP_Tx (pdev, HID_IN_EP, report, len);
+ }
+ return USBD_OK;
+}
+
+/**
+ * @brief USBD_HID_GetCfgDesc
+ * return configuration descriptor
+ * @param speed : current device speed
+ * @param length : pointer data length
+ * @retval pointer to descriptor buffer
+ */
+static uint8_t *USBD_HID_GetCfgDesc (uint8_t speed, uint16_t *length)
+{
+ *length = sizeof (USBD_HID_CfgDesc);
+ return USBD_HID_CfgDesc;
+}
+
+/**
+ * @brief USBD_HID_DataIn
+ * handle data IN Stage
+ * @param pdev: device instance
+ * @param epnum: endpoint index
+ * @retval status
+ */
+static uint8_t USBD_HID_DataIn (void *pdev,
+ uint8_t epnum)
+{
+
+ /* Ensure that the FIFO is empty before a new transfer, this condition could
+ be caused by a new transfer before the end of the previous transfer */
+
+ // DCD_EP_Flush(pdev, HID_IN_EP);
+ return USBD_OK;
+}
+
+/**
+ * @}
+ */
+
+uint8_t receive_data_flag;
+uint8_t HidOut_Data_Buff[HID_MAX_PACKET_SIZE];
+
+uint8_t USBD_HID_DataOut(void *pdev,
+ uint8_t epnum)
+{
+
+ //MyPrintf("333333\n");
+
+ DCD_EP_PrepareRx(pdev,
+ HID_OUT_EP,
+ (uint8_t *)&HidOut_Data_Buff[0],
+ HID_EPOUT_SIZE);
+ receive_data_flag =1;
+ return USBD_OK;
+}
+
+
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_cmd.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_cmd.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_cmd.h (working copy)
@@ -0,0 +1,204 @@
+/**
+ ******************************************************************************
+ * @file usbd_ccid_cmd.h
+ * @author MCD Application Team
+ * @version V1.0.1
+ * @date 31-January-2014
+ * @brief CCID Commands handling prototype
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2014 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_CCID_CMD_H
+#define __USBD_CCID_CMD_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_ccid_core.h"
+#include
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+
+/******************************************************************************/
+/* ERROR CODES for USB Bulk In Messages : bError */
+/******************************************************************************/
+
+#define SLOT_NO_ERROR 0x81
+#define SLOTERROR_UNKNOWN 0x82
+
+/* Index of not supported / incorrect message parameter : 7Fh to 01h */
+/* These Values are used for Return Types between Firmware Layers */
+/*
+Failure of a command
+The CCID cannot parse one parameter or the ICC is not supporting one parameter.
+Then the Slot Error register contains the index of the first bad parameter as a
+positive number (1-127). For instance, if the CCID receives an ICC command to
+an unimplemented slot, then the Slot Error register shall be set to
+‘5’ (index of bSlot field).
+ */
+
+#define SLOTERROR_BAD_LENTGH 0x01
+#define SLOTERROR_BAD_SLOT 0x05
+#define SLOTERROR_BAD_POWERSELECT 0x07
+#define SLOTERROR_BAD_PROTOCOLNUM 0x07
+#define SLOTERROR_BAD_CLOCKCOMMAND 0x07
+#define SLOTERROR_BAD_ABRFU_3B 0x07
+#define SLOTERROR_BAD_BMCHANGES 0x07
+#define SLOTERROR_BAD_BFUNCTION_MECHANICAL 0x07
+#define SLOTERROR_BAD_ABRFU_2B 0x08
+#define SLOTERROR_BAD_LEVELPARAMETER 0x08
+#define SLOTERROR_BAD_FIDI 0x0A
+#define SLOTERROR_BAD_T01CONVCHECKSUM 0x0B
+#define SLOTERROR_BAD_GUARDTIME 0x0C
+#define SLOTERROR_BAD_WAITINGINTEGER 0x0D
+#define SLOTERROR_BAD_CLOCKSTOP 0x0E
+#define SLOTERROR_BAD_IFSC 0x0F
+#define SLOTERROR_BAD_NAD 0x10
+#define SLOTERROR_BAD_DWLENGTH 0x08 /* Used in PC_to_RDR_XfrBlock*/
+
+/*---------- Table 6.2-2 Slot error register when bmCommandStatus = 1 */
+#define SLOTERROR_CMD_ABORTED 0xFF
+#define SLOTERROR_ICC_MUTE 0xFE
+#define SLOTERROR_XFR_PARITY_ERROR 0xFD
+#define SLOTERROR_XFR_OVERRUN 0xFC
+#define SLOTERROR_HW_ERROR 0xFB
+#define SLOTERROR_BAD_ATR_TS 0xF8
+#define SLOTERROR_BAD_ATR_TCK 0xF7
+#define SLOTERROR_ICC_PROTOCOL_NOT_SUPPORTED 0xF6
+#define SLOTERROR_ICC_CLASS_NOT_SUPPORTED 0xF5
+#define SLOTERROR_PROCEDURE_BYTE_CONFLICT 0xF4
+#define SLOTERROR_DEACTIVATED_PROTOCOL 0xF3
+#define SLOTERROR_BUSY_WITH_AUTO_SEQUENCE 0xF2
+#define SLOTERROR_PIN_TIMEOUT 0xF0
+#define SLOTERROR_PIN_CANCELLED 0xEF
+#define SLOTERROR_CMD_SLOT_BUSY 0xE0
+#define SLOTERROR_CMD_NOT_SUPPORTED 0x00
+
+
+#define DEFAULT_FIDI 0x11 /* DEFAULT_FIDI_VALUE */
+#define DEFAULT_T01CONVCHECKSUM 0x00
+#define DEFAULT_EXTRA_GUARDTIME 0x00
+#define DEFAULT_WAITINGINTEGER 0x0A
+#define DEFAULT_CLOCKSTOP 0x00
+#define DEFAULT_IFSC 0x20
+#define DEFAULT_NAD 0x00
+
+#define DEFAULT_DATA_RATE 0x000025CD
+#define DEFAULT_CLOCK_FREQ 0x00000E10
+
+
+/*
+Offset=0 bmICCStatus 2 bit 0, 1, 2
+ 0 - An ICC is present and active (power is on and stable, RST is inactive)
+ 1 - An ICC is present and inactive (not activated or shut down by hardware error)
+ 2 - No ICC is present
+ 3 - RFU
+Offset=0 bmRFU 4 bits 0 RFU
+Offset=6 bmCommandStatus 2 bits 0, 1, 2
+ 0 - Processed without error
+ 1 - Failed (error code provided by the error register)
+ 2 - Time Extension is requested
+ 3 - RFU
+ */
+
+#define BM_ICC_PRESENT_ACTIVE 0x00
+#define BM_ICC_PRESENT_INACTIVE 0x01
+#define BM_ICC_NO_ICC_PRESENT 0x02
+
+#define BM_COMMAND_STATUS_OFFSET 0x06
+#define BM_COMMAND_STATUS_NO_ERROR 0x00
+#define BM_COMMAND_STATUS_FAILED (0x01 << BM_COMMAND_STATUS_OFFSET)
+#define BM_COMMAND_STATUS_TIME_EXTN (0x02 << BM_COMMAND_STATUS_OFFSET)
+
+/* defines for the CCID_CMD Layers */
+#define SIZE_OF_ATR 33
+#define LEN_RDR_TO_PC_SLOTSTATUS 10
+#define LEN_PROTOCOL_STRUCT_T0 5
+
+#define BPROTOCOL_NUM_T0 0
+#define BPROTOCOL_NUM_T1 1
+
+/************************************************************************************/
+/* ERROR CODES for RDR_TO_PC_HARDWAREERROR Message : bHardwareErrorCode */
+/************************************************************************************/
+
+#define HARDWAREERRORCODE_OVERCURRENT 0x01
+#define HARDWAREERRORCODE_VOLTAGEERROR 0x02
+#define HARDWAREERRORCODE_OVERCURRENT_IT 0x04
+#define HARDWAREERRORCODE_VOLTAGEERROR_IT 0x08
+
+typedef enum
+{
+ CHK_PARAM_SLOT = 1,
+ CHK_PARAM_DWLENGTH = (1<<1),
+ CHK_PARAM_abRFU2 = (1<<2),
+ CHK_PARAM_abRFU3 = (1<<3),
+ CHK_PARAM_CARD_PRESENT = (1<<4),
+ CHK_PARAM_ABORT = (1<<5),
+ CHK_ACTIVE_STATE = (1<<6)
+} ChkParam_t;
+
+
+/* Exported functions ------------------------------------------------------- */
+
+uint8_t PC_to_RDR_IccPowerOn(void);
+uint8_t PC_to_RDR_IccPowerOff(void);
+uint8_t PC_to_RDR_GetSlotStatus(void);
+uint8_t PC_to_RDR_XfrBlock(void);
+uint8_t PC_to_RDR_GetParameters(void);
+uint8_t PC_to_RDR_ResetParameters(void);
+uint8_t PC_to_RDR_SetParameters(void);
+uint8_t PC_to_RDR_Escape(void);
+uint8_t PC_to_RDR_IccClock(void);
+uint8_t PC_to_RDR_Abort(void);
+uint8_t PC_TO_RDR_T0Apdu(void);
+uint8_t PC_TO_RDR_Mechanical(void);
+uint8_t PC_TO_RDR_SetDataRateAndClockFrequency(void);
+uint8_t PC_TO_RDR_Secure(void);
+
+
+void RDR_to_PC_DataBlock(unsigned char );
+void RDR_to_PC_NotifySlotChange(void);
+void RDR_to_PC_SlotStatus(unsigned char );
+void RDR_to_PC_Parameters(unsigned char );
+void RDR_to_PC_Escape(unsigned char );
+void RDR_to_PC_DataRateAndClockFrequency(uint8_t errorCode);
+
+
+void CCID_UpdSlotStatus (uint8_t );
+void CCID_UpdSlotChange (uint8_t );
+uint8_t CCID_IsSlotStatusChange (void);
+uint8_t CCID_CmdAbort(uint8_t slot, uint8_t seq);
+
+uint32_t resp_CCID_CMD(USB_OTG_CORE_HANDLE *pdev);
+
+
+//Add by link 2017.3.20
+#define CCID_RECV_Q_SIZE (10)
+#define Q_NEXT(pos, size) (((pos) + 1) % (size))
+#define Q_LEN(head,tail, size) (((head) < (tail) ? (tail) - (head) : (head) - (tail)) % (size))
+#define Q_IS_FULL(head, tail, size) (((tail) + 1) % (size) == (head) % (size))
+#define Q_EMPTY(head, tail, size) ((head) % (size) == (tail) % (size))
+
+
+
+#endif /* __USBD_CCID_CMD_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_cmd.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_cmd.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_cmd.c (working copy)
@@ -0,0 +1,1076 @@
+ /**
+ ******************************************************************************
+ * @file usbd_ccid_cmd.c
+ * @author MCD Application Team
+ * @version V1.0.1
+ * @date 31-January-2014
+ * @brief CCID Commands handling
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2014 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_ccid_cmd.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+#define CCID_UpdateCommandStatus(cmd_status,icc_status)\
+ Ccid_bulkin_data.bStatus=(cmd_status|icc_status)
+/*
+The Above Macro can take any of following Values
+#define BM_ICC_PRESENT_ACTIVE 0x00
+#define BM_ICC_PRESENT_INACTIVE 0x01
+#define BM_ICC_NO_ICC_PRESENT 0x02
+
+#define BM_COMMAND_STATUS_OFFSET 0x06
+#define BM_COMMAND_STATUS_NO_ERROR 0x00
+#define BM_COMMAND_STATUS_FAILED (0x01 << BM_COMMAND_STATUS_OFFSET)
+#define BM_COMMAND_STATUS_TIME_EXTN (0x02 << BM_COMMAND_STATUS_OFFSET)
+*/
+
+/* Private variables ---------------------------------------------------------*/
+Ccid_bulkin_data_t Ccid_resp_buff;
+
+//Add by link 2017.3.20
+Ccid_bulkout_data_t Ccid_out_cmd[CCID_RECV_Q_SIZE];
+uint32_t gu32RecvHead = 0;
+uint32_t gu32RecvTail = 0;
+
+
+
+extern Protocol0_DataStructure_t Protocol0_DataStructure;
+
+/* Private function prototypes -----------------------------------------------*/
+static uint8_t CCID_CheckCommandParams(uint32_t param_type);
+
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief PC_to_RDR_IccPowerOn
+ * PC_TO_RDR_ICCPOWERON message execution, apply voltage and get ATR
+ * @param None
+ * @retval uint8_t status of the command execution
+ */
+uint8_t PC_to_RDR_IccPowerOn(void)
+{
+ /* Apply the ICC VCC
+ Fills the Response buffer with ICC ATR
+ This Command is returned with RDR_to_PC_DataBlock();
+ */
+ const uint8_t au8ATR[] = { 0x3B, 0x60, 0x00, 0x00 };
+ uint8_t index;
+ uint8_t error;
+
+ Ccid_bulkin_data.dwLength = 0; /* Reset Number of Bytes in abData */
+
+ error = CCID_CheckCommandParams(CHK_PARAM_SLOT |\
+ CHK_PARAM_DWLENGTH |\
+ CHK_PARAM_abRFU2 |\
+ CHK_PARAM_CARD_PRESENT |\
+ CHK_PARAM_ABORT);
+ if (error != 0)
+ {
+ return error;
+ }
+
+
+ /* ATR is received, No Error Condition Found */
+ Ccid_bulkin_data.dwLength = sizeof(au8ATR);
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_NO_ERROR, BM_ICC_PRESENT_ACTIVE);
+
+ for (index = 0; index < sizeof(au8ATR); index++)
+ { /* Copy the ATR to the Response Buffer */
+ Ccid_bulkin_data.abData[index] = au8ATR[index];
+ }
+
+ return SLOT_NO_ERROR;
+}
+
+/**
+ * @brief PC_to_RDR_IccPowerOff
+ * Icc VCC is switched Off
+ * @param None
+ * @retval uint8_t error: status of the command execution
+ */
+uint8_t PC_to_RDR_IccPowerOff(void)
+{
+ /* The response to this command message is the RDR_to_PC_SlotStatus
+ response message. */
+ uint8_t error;
+
+ error = CCID_CheckCommandParams(CHK_PARAM_SLOT |\
+ CHK_PARAM_abRFU3 |\
+ CHK_PARAM_DWLENGTH);
+ if (error != 0)
+ {
+ return error;
+ }
+
+ //MyPrintf("Power Off!\n");
+ /* Command is ok, Check for Card Presence */
+
+ return SLOT_NO_ERROR;
+}
+
+/**
+ * @brief PC_to_RDR_GetSlotStatus
+ * Provides the Slot status to the host
+ * @param None
+ * @retval uint8_t status of the command execution
+ */
+uint8_t PC_to_RDR_GetSlotStatus(void)
+{
+ uint8_t error;
+
+ error = CCID_CheckCommandParams(CHK_PARAM_SLOT |\
+ CHK_PARAM_DWLENGTH |\
+ CHK_PARAM_CARD_PRESENT |\
+ CHK_PARAM_abRFU3);
+ if (error != 0)
+ {
+ return error;
+ }
+
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_NO_ERROR, BM_ICC_PRESENT_ACTIVE);
+ return SLOT_NO_ERROR;
+}
+
+
+uint32_t resp_CCID_CMD(USB_OTG_CORE_HANDLE *pdev)
+{
+ uint8_t error = 0;
+ uint16_t expectedLength;
+ uint32_t u32Next;
+
+ if (NULL == pdev)
+ {
+ return -2;
+ }
+ if (Q_EMPTY(gu32RecvHead, gu32RecvTail, CCID_RECV_Q_SIZE))
+ {
+ return -1;
+ }
+ u32Next = Q_NEXT(gu32RecvHead, CCID_RECV_Q_SIZE);
+
+ expectedLength = (Ccid_out_cmd[u32Next].bSpecific_2 << 8) | Ccid_out_cmd[u32Next].bSpecific_1;
+
+ Ccid_bulkin_data.dwLength = (uint16_t)expectedLength;
+
+ error = SC_XferBlock(&Ccid_out_cmd[u32Next].abData[0], Ccid_out_cmd[u32Next].dwLength, expectedLength);
+
+ gu32RecvHead = u32Next;
+ if (error != SLOT_NO_ERROR)
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ }
+ else
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_NO_ERROR, BM_ICC_PRESENT_ACTIVE);
+ error = SLOT_NO_ERROR;
+ }
+ RDR_to_PC_DataBlock(error);
+// MyPrintf("size=%x\n\r",Ccid_bulkin_data.u16SizeToSend);
+ DCD_EP_Tx(pdev, CCID_BULK_IN_EP, (uint8_t *)&Ccid_bulkin_data, Ccid_bulkin_data.u16SizeToSend);
+ Ccid_BulkState = CCID_STATE_IDLE;
+ return 0;
+}
+
+/**
+ * @brief PC_to_RDR_XfrBlock
+ * Handles the Block transfer from Host.
+ * Response to this command message is the RDR_to_PC_DataBlock
+ * @param None
+ * @retval uint8_t status of the command execution
+ */
+uint8_t PC_to_RDR_XfrBlock(void)
+{
+ //uint16_t expectedLength;
+
+ uint8_t error = 0;
+ uint32_t u32Next;
+
+ error = CCID_CheckCommandParams(CHK_PARAM_SLOT |\
+ CHK_PARAM_CARD_PRESENT |\
+ CHK_PARAM_abRFU3 |\
+ CHK_PARAM_ABORT |\
+ CHK_ACTIVE_STATE);
+
+ if (error != 0) return error;
+
+ if (Ccid_bulkout_data.dwLength > ABDATA_SIZE)
+ { /* Check amount of Data Sent by Host is > than memory allocated ? */
+
+ return SLOTERROR_BAD_DWLENGTH;
+ }
+
+
+ /* wLevelParameter = Size of expected data to be returned by the
+ bulk-IN endpoint */
+// expectedLength = (Ccid_bulkout_data.bSpecific_2 << 8) |
+// Ccid_bulkout_data.bSpecific_1;
+//
+// Ccid_bulkin_data.dwLength = (uint16_t)expectedLength;
+
+
+ /*
+ error = SC_XferBlock(&Ccid_bulkout_data.abData[0],
+ Ccid_bulkout_data.dwLength,
+ expectedLength);
+ */
+ if (!Q_IS_FULL(gu32RecvHead, gu32RecvTail, CCID_RECV_Q_SIZE))
+ {
+ u32Next = Q_NEXT(gu32RecvTail, CCID_RECV_Q_SIZE);
+
+ memcpy((char *)(Ccid_out_cmd + u32Next), ( char *)(&Ccid_bulkout_data), (int)sizeof(Ccid_bulkout_data_t));
+ gu32RecvTail = u32Next;
+ }
+ else
+ {
+ //Queue overflow
+ error = SLOTERROR_BAD_DWLENGTH;
+ }
+
+ if (error != SLOT_NO_ERROR)
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ }
+ else
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_NO_ERROR, BM_ICC_PRESENT_ACTIVE);
+ error = SLOT_NO_ERROR;
+ }
+
+ return error;
+}
+
+
+/**
+ * @brief PC_to_RDR_GetParameters
+ * Provides the ICC parameters to the host
+ * Response to this command message is the RDR_to_PC_Parameters
+ * @param None
+ * @retval uint8_t status of the command execution
+ */
+uint8_t PC_to_RDR_GetParameters(void)
+{
+ uint8_t error;
+
+ error = CCID_CheckCommandParams(CHK_PARAM_SLOT |\
+ CHK_PARAM_DWLENGTH |\
+ CHK_PARAM_CARD_PRESENT |\
+ CHK_PARAM_abRFU3);
+ if (error != 0) return error;
+
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_NO_ERROR, BM_ICC_PRESENT_ACTIVE);
+
+ return SLOT_NO_ERROR;
+}
+
+
+/**
+ * @brief PC_to_RDR_ResetParameters
+ * Set the ICC parameters to the default
+ * Response to this command message is the RDR_to_PC_Parameters
+ * @param None
+ * @retval uint8_t status of the command execution
+ */
+uint8_t PC_to_RDR_ResetParameters(void)
+{
+ uint8_t error;
+
+ error = CCID_CheckCommandParams(CHK_PARAM_SLOT |\
+ CHK_PARAM_DWLENGTH |\
+ CHK_PARAM_CARD_PRESENT |\
+ CHK_PARAM_abRFU3 |\
+ CHK_ACTIVE_STATE);
+ if (error != 0) return error;
+
+ /* This command resets the slot parameters to their default values */
+ Ccid_bulkout_data.abData[0] = DEFAULT_FIDI;
+ Ccid_bulkout_data.abData[1] = DEFAULT_T01CONVCHECKSUM;
+ Ccid_bulkout_data.abData[2] = DEFAULT_EXTRA_GUARDTIME;
+ Ccid_bulkout_data.abData[3] = DEFAULT_WAITINGINTEGER;
+ Ccid_bulkout_data.abData[4] = DEFAULT_CLOCKSTOP;
+ Ccid_bulkout_data.abData[5] = 0x00;
+ Ccid_bulkout_data.abData[6] = 0x00;
+
+ error = SC_SetParams((Protocol0_DataStructure_t *)(&(Ccid_bulkout_data.abData[0])));
+
+ if (error != SLOT_NO_ERROR)
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ }
+ else
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_NO_ERROR, BM_ICC_PRESENT_ACTIVE);
+ error = SLOT_NO_ERROR;
+ }
+
+ return error;
+}
+
+
+/**
+ * @brief PC_to_RDR_SetParameters
+ * Set the ICC parameters to the host defined parameters
+ * Response to this command message is the RDR_to_PC_Parameters
+ * @param None
+ * @retval uint8_t status of the command execution
+ */
+uint8_t PC_to_RDR_SetParameters(void)
+{
+ uint8_t error;
+
+ error = CCID_CheckCommandParams(CHK_PARAM_SLOT |\
+ CHK_PARAM_CARD_PRESENT |\
+ CHK_PARAM_abRFU2 |\
+ CHK_ACTIVE_STATE);
+ if (error != 0) return error;
+
+ error = SLOT_NO_ERROR;
+
+ /* for Protocol T=0 (bProtocolNum=0) (dwLength=00000005h) */
+ if ((Ccid_bulkout_data.dwLength == 5) &&
+ (Ccid_bulkout_data.bSpecific_0 != 0)) error = SLOTERROR_BAD_PROTOCOLNUM;
+
+ /* for Protocol T=1 (bProtocolNum=1) (dwLength=00000007h) */
+ if ((Ccid_bulkout_data.dwLength == 7) &&
+ (Ccid_bulkout_data.bSpecific_0 != 1)) error = SLOTERROR_CMD_NOT_SUPPORTED;
+
+ /* For T0, Waiting Integer 0 supported */
+ if (Ccid_bulkout_data.abData[3] != 0) error = SLOTERROR_BAD_WAITINGINTEGER;
+
+ if (Ccid_bulkout_data.abData[4] != DEFAULT_CLOCKSTOP) error = SLOTERROR_BAD_CLOCKSTOP;
+
+ if (error != SLOT_NO_ERROR)
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ }
+
+ error = SC_SetParams((Protocol0_DataStructure_t *)(&(Ccid_bulkout_data.abData[0])));
+
+ if (error != SLOT_NO_ERROR)
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ }
+ else
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_NO_ERROR, BM_ICC_PRESENT_ACTIVE);
+ error = SLOT_NO_ERROR;
+ }
+
+ return error;
+}
+
+
+/**
+ * @brief PC_to_RDR_Escape
+ * Execute the Escape command. This is user specific Implementation
+ * Response to this command message is the RDR_to_PC_Escape
+ * @param None
+ * @retval uint8_t status of the command execution
+ */
+uint8_t PC_to_RDR_Escape(void)
+{
+ uint8_t error;
+ uint16_t size;
+
+ error = CCID_CheckCommandParams(CHK_PARAM_SLOT |\
+ CHK_PARAM_CARD_PRESENT |\
+ CHK_PARAM_abRFU3 |\
+ CHK_PARAM_ABORT |\
+ CHK_ACTIVE_STATE);
+
+ if (error != 0) return error;
+
+ /*
+ error = SC_ExecuteEscape(&Ccid_bulkout_data.abData[0],
+ Ccid_bulkout_data.dwLength,
+ &Ccid_bulkin_data.abData[0],
+ &size);
+ */
+
+ Ccid_bulkin_data.dwLength = size;
+
+ if (error != SLOT_NO_ERROR)
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ }
+ else
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_NO_ERROR, BM_ICC_PRESENT_ACTIVE);
+ }
+
+ return error;
+}
+
+
+/**
+ * @brief PC_to_RDR_IccClock
+ * Execute the Clock specific command from host
+ * Response to this command message is the RDR_to_PC_SlotStatus
+ * @param None
+ * @retval uint8_t status of the command execution
+ */
+uint8_t PC_to_RDR_IccClock(void)
+{
+ uint8_t error;
+
+ error = CCID_CheckCommandParams(CHK_PARAM_SLOT |\
+ CHK_PARAM_CARD_PRESENT |\
+ CHK_PARAM_abRFU2 |\
+ CHK_PARAM_DWLENGTH |\
+ CHK_ACTIVE_STATE);
+ if (error != 0) return error;
+
+ /* bClockCommand • 00h restarts Clock
+ • 01h Stops Clock in the state shown in the bClockStop
+ field of the PC_to_RDR_SetParameters command
+ and RDR_to_PC_Parameters message.*/
+ if (Ccid_bulkout_data.bSpecific_0 > 1)
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ return SLOTERROR_BAD_CLOCKCOMMAND;
+ }
+
+ error = SC_SetClock(Ccid_bulkout_data.bSpecific_0);
+
+ if (error != SLOT_NO_ERROR)
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ }
+ else
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_NO_ERROR, BM_ICC_PRESENT_ACTIVE);
+ }
+
+ return error;
+}
+
+
+/**
+ * @brief PC_to_RDR_Abort
+ * Execute the Abort command from host, This stops all Bulk transfers
+ * from host and ICC
+ * Response to this command message is the RDR_to_PC_SlotStatus
+ * @param None
+ * @retval uint8_t status of the command execution
+ */
+uint8_t PC_to_RDR_Abort(void)
+{
+ uint8_t error;
+
+ error = CCID_CheckCommandParams(CHK_PARAM_SLOT |\
+ CHK_PARAM_abRFU3 |\
+ CHK_PARAM_DWLENGTH);
+ if (error != 0) return error;
+
+ //CCID_CmdAbort(Ccid_bulkout_data.bSlot, Ccid_bulkout_data.bSeq);
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_NO_ERROR, BM_ICC_PRESENT_ACTIVE);
+ return SLOT_NO_ERROR;
+}
+
+/**
+ * @brief CCID_CmdAbort
+ * Execute the Abort command from Bulk EP or from Control EP,
+ * This stops all Bulk transfers from host and ICC
+ * @param uint8_t slot: slot number that host wants to abort
+ * @param uint8_t seq : Seq number for PC_to_RDR_Abort
+ * @retval uint8_t status of the command execution
+ */
+uint8_t CCID_CmdAbort(uint8_t slot, uint8_t seq)
+{
+ /* This function is called for REQUEST_ABORT & PC_to_RDR_Abort */
+
+ if (slot >= CCID_NUMBER_OF_SLOTS)
+ { /* This error condition is possible only from CLASS_REQUEST, otherwise
+ Slot is already checked in parameters from PC_to_RDR_Abort request */
+ /* Slot requested is more than supported by Firmware */
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_NO_ICC_PRESENT);
+ return SLOTERROR_BAD_SLOT;
+ }
+
+ if (usb_ccid_param.bAbortRequestFlag == 1)
+ { /* Abort Command was already received from ClassReq or PC_to_RDR */
+ if ((usb_ccid_param.bSeq == seq) && (usb_ccid_param.bSlot == slot))
+ {
+ /* CLASS Specific request is already Received, Reset the abort flag */
+ usb_ccid_param.bAbortRequestFlag = 0;
+ }
+ }
+ else
+ {
+ /* Abort Command was NOT received from ClassReq or PC_to_RDR,
+ so save them for next ABORT command to verify */
+ usb_ccid_param.bAbortRequestFlag = 1;
+ usb_ccid_param.bSeq = seq;
+ usb_ccid_param.bSlot = slot;
+ }
+
+ return 0;
+}
+
+/**
+ * @brief PC_TO_RDR_T0Apdu
+ * Execute the PC_TO_RDR_T0APDU command from host
+ * Response to this command message is the RDR_to_PC_SlotStatus
+ * @param None
+ * @retval uint8_t status of the command execution
+ */
+uint8_t PC_TO_RDR_T0Apdu(void)
+{
+ uint8_t error;
+
+ error = CCID_CheckCommandParams(CHK_PARAM_SLOT |\
+ CHK_PARAM_CARD_PRESENT |\
+ CHK_PARAM_DWLENGTH |
+ CHK_PARAM_ABORT);
+ if (error != 0) return error;
+
+ if (Ccid_bulkout_data.bSpecific_0 > 0x03)
+ { /* Bit 0 is associated with field bClassGetResponse
+ Bit 1 is associated with field bClassEnvelope
+ Other bits are RFU.*/
+
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ return SLOTERROR_BAD_BMCHANGES;
+ }
+
+ /*
+ error = SC_T0Apdu(Ccid_bulkout_data.bSpecific_0,
+ Ccid_bulkout_data.bSpecific_1,
+ Ccid_bulkout_data.bSpecific_2);
+ */
+ if (error != SLOT_NO_ERROR)
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ }
+ else
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_NO_ERROR, BM_ICC_PRESENT_ACTIVE);
+ }
+
+ return error;
+}
+
+/**
+ * @brief PC_TO_RDR_Mechanical
+ * Execute the PC_TO_RDR_MECHANICAL command from host
+ * Response to this command message is the RDR_to_PC_SlotStatus
+ * @param None
+ * @retval uint8_t status of the command execution
+ */
+uint8_t PC_TO_RDR_Mechanical(void)
+{
+ uint8_t error;
+
+ error = CCID_CheckCommandParams(CHK_PARAM_SLOT |\
+ CHK_PARAM_CARD_PRESENT |\
+ CHK_PARAM_abRFU2 |\
+ CHK_PARAM_DWLENGTH
+ );
+ if (error != 0) return error;
+
+ if (Ccid_bulkout_data.bSpecific_0 > 0x05)
+ { /* 01h – Accept Card
+ 02h – Eject Card
+ 03h – Capture Card
+ 04h – Lock Card
+ 05h – Unlock Card*/
+
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ return SLOTERROR_BAD_BFUNCTION_MECHANICAL;
+ }
+
+ //error = SC_Mechanical(Ccid_bulkout_data.bSpecific_0);
+
+ if (error != SLOT_NO_ERROR)
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ }
+ else
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_NO_ERROR, BM_ICC_PRESENT_ACTIVE);
+ }
+
+ return error;
+}
+
+/**
+ * @brief PC_TO_RDR_SetDataRateAndClockFrequency
+ * Set the required Card Frequency and Data rate from the host.
+ * Response to this command message is the
+ * RDR_to_PC_DataRateAndClockFrequency
+ * @param None
+ * @retval uint8_t status of the command execution
+ */
+uint8_t PC_TO_RDR_SetDataRateAndClockFrequency(void)
+{
+ uint8_t error;
+ uint32_t clockFrequency;
+ uint32_t dataRate;
+ uint32_t temp = 0;
+
+ error = CCID_CheckCommandParams(CHK_PARAM_SLOT |\
+ CHK_PARAM_CARD_PRESENT |\
+ CHK_PARAM_abRFU3);
+ if (error != 0) return error;
+
+ if (Ccid_bulkout_data.dwLength != 0x08)
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ return SLOTERROR_BAD_LENTGH;
+ }
+
+ /* HERE we avoiding to an unaligned memory access*/
+ temp = (Ccid_bulkout_data.abData[0]) & 0x000000FF;
+ clockFrequency = temp;
+
+ temp = (Ccid_bulkout_data.abData[1]) & 0x000000FF;
+ clockFrequency |= temp << 8;
+
+ temp = (Ccid_bulkout_data.abData[2]) & 0x000000FF;
+ clockFrequency |= temp << 16;
+
+ temp = (Ccid_bulkout_data.abData[3]) & 0x000000FF;
+ clockFrequency |= temp << 24;
+
+ temp = (Ccid_bulkout_data.abData[4]) & 0x000000FF;
+ dataRate = temp;
+
+ temp = (Ccid_bulkout_data.abData[5]) & 0x000000FF;
+ dataRate |= temp << 8;
+
+ temp = (Ccid_bulkout_data.abData[6]) & 0x000000FF;
+ dataRate |= temp << 16;
+
+ temp = (Ccid_bulkout_data.abData[7]) & 0x000000FF;
+ dataRate |= temp << 24;
+
+ //error = SC_SetDataRateAndClockFrequency(clockFrequency, dataRate);
+ Ccid_bulkin_data.bError = error;
+
+ if (error != SLOT_NO_ERROR)
+ {
+ Ccid_bulkin_data.dwLength = 0;
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ }
+ else
+ {
+ Ccid_bulkin_data.dwLength = 8;
+
+ (Ccid_bulkin_data.abData[0]) = clockFrequency & 0x000000FF;
+
+ (Ccid_bulkin_data.abData[1]) = (clockFrequency & 0x0000FF00) >> 8;
+
+ (Ccid_bulkin_data.abData[2]) = (clockFrequency & 0x00FF0000) >> 16;
+
+ (Ccid_bulkin_data.abData[3]) = (clockFrequency & 0xFF000000) >> 24;
+
+ (Ccid_bulkin_data.abData[4]) = dataRate & 0x000000FF;
+
+ (Ccid_bulkin_data.abData[5]) = (dataRate & 0x0000FF00) >> 8;
+
+ (Ccid_bulkin_data.abData[6]) = (dataRate & 0x00FF0000) >> 16;
+
+ (Ccid_bulkin_data.abData[7]) = (dataRate & 0xFF000000) >> 24;
+
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_NO_ERROR, BM_ICC_PRESENT_ACTIVE);
+ }
+
+ return error;
+}
+
+/**
+ * @brief PC_TO_RDR_Secure
+ * Execute the Secure Command from the host.
+ * Response to this command message is the RDR_to_PC_DataBlock
+ * @param None
+ * @retval uint8_t status of the command execution
+ */
+uint8_t PC_TO_RDR_Secure(void)
+{
+ uint8_t error;
+ uint8_t bBWI;
+ uint16_t wLevelParameter;
+ uint32_t responseLen;
+
+ Ccid_bulkin_data.dwLength = 0;
+
+ error = CCID_CheckCommandParams(CHK_PARAM_SLOT |\
+ CHK_PARAM_CARD_PRESENT |\
+ CHK_PARAM_ABORT);
+
+ if (error != 0) return error;
+
+ bBWI = Ccid_bulkout_data.bSpecific_0;
+ wLevelParameter = (Ccid_bulkout_data.bSpecific_1 + ((uint16_t)Ccid_bulkout_data.bSpecific_2 << 8));
+
+ if ((EXCHANGE_LEVEL_FEATURE == TPDU_EXCHANGE) ||
+ (EXCHANGE_LEVEL_FEATURE == SHORT_APDU_EXCHANGE))
+ {
+ /* TPDU level & short APDU level, wLevelParameter is RFU, = 0000h */
+ if (wLevelParameter != 0)
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ error = SLOTERROR_BAD_LEVELPARAMETER;
+ return error;
+ }
+ }
+
+ /*
+ error = SC_Secure(Ccid_bulkout_data.dwLength, bBWI, wLevelParameter,
+ &Ccid_bulkout_data.abData[0], &responseLen);
+ */
+ Ccid_bulkin_data.dwLength = responseLen;
+
+ if (error != SLOT_NO_ERROR)
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ }
+ else
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_NO_ERROR, BM_ICC_PRESENT_ACTIVE);
+ }
+
+ return error;
+}
+
+/******************************************************************************/
+/* BULK IN ROUTINES */
+/******************************************************************************/
+
+/**
+ * @brief RDR_to_PC_DataBlock
+ * Provide the data block response to the host
+ * Response for PC_to_RDR_IccPowerOn, PC_to_RDR_XfrBlock
+ * @param uint8_t errorCode: code to be returned to the host
+ * @retval None
+ */
+void RDR_to_PC_DataBlock(uint8_t errorCode)
+{
+ uint16_t length = CCID_RESPONSE_HEADER_SIZE;
+
+ Ccid_bulkin_data.bMessageType = RDR_TO_PC_DATABLOCK;
+ Ccid_bulkin_data.bError = errorCode;
+ Ccid_bulkin_data.bSpecific = 0; /* bChainParameter */
+
+ if (errorCode == SLOT_NO_ERROR)
+ {
+ length += Ccid_bulkin_data.dwLength; /* Length Specified in Command */
+ }
+
+ Transfer_Data_Request((uint8_t *)(&Ccid_bulkin_data), length);
+
+}
+
+
+/**
+ * @brief RDR_to_PC_SlotStatus
+ * Provide the Slot status response to the host
+ * Response for PC_to_RDR_IccPowerOff
+ * PC_to_RDR_GetSlotStatus
+ * PC_to_RDR_IccClock
+ * PC_to_RDR_T0APDU
+ * PC_to_RDR_Mechanical
+ * Also the device sends this response message when it has completed
+ * aborting a slot after receiving both the Class Specific ABORT request
+ * and PC_to_RDR_Abort command message.
+ * @param uint8_t errorCode: code to be returned to the host
+ * @retval None
+ */
+void RDR_to_PC_SlotStatus(uint8_t errorCode)
+{
+
+ Ccid_bulkin_data.bMessageType = RDR_TO_PC_SLOTSTATUS;
+ Ccid_bulkin_data.dwLength = 0;
+ Ccid_bulkin_data.bError = errorCode;
+ Ccid_bulkin_data.bSpecific = 0; /* bClockStatus = 00h Clock running
+ 01h Clock stopped in state L
+ 02h Clock stopped in state H
+ 03h Clock stopped in an unknown state
+ All other values are RFU. */
+
+
+ Transfer_Data_Request((uint8_t *)(&Ccid_bulkin_data),
+ LEN_RDR_TO_PC_SLOTSTATUS);
+
+}
+
+/**
+ * @brief RDR_to_PC_Parameters
+ * Provide the data block response to the host
+ * Response for PC_to_RDR_GetParameters, PC_to_RDR_ResetParameters
+ * PC_to_RDR_SetParameters
+ * @param uint8_t errorCode: code to be returned to the host
+ * @retval None
+ */
+void RDR_to_PC_Parameters(uint8_t errorCode)
+{
+ uint16_t length = CCID_RESPONSE_HEADER_SIZE;
+
+ Ccid_bulkin_data.bMessageType = RDR_TO_PC_PARAMETERS;
+ Ccid_bulkin_data.bError = errorCode;
+
+ if (errorCode == SLOT_NO_ERROR)
+ {
+ Ccid_bulkin_data.dwLength = LEN_PROTOCOL_STRUCT_T0;
+ length += LEN_PROTOCOL_STRUCT_T0;
+ }
+ else
+ {
+ Ccid_bulkin_data.dwLength = 0;
+ }
+
+ Ccid_bulkin_data.abData[0] = Protocol0_DataStructure.bmFindexDindex;
+ Ccid_bulkin_data.abData[1] = Protocol0_DataStructure.bmTCCKST0;
+ Ccid_bulkin_data.abData[2] = Protocol0_DataStructure.bGuardTimeT0;
+ Ccid_bulkin_data.abData[3] = Protocol0_DataStructure.bWaitingIntegerT0;
+ Ccid_bulkin_data.abData[4] = Protocol0_DataStructure.bClockStop;
+
+ /* bProtocolNum */
+ Ccid_bulkin_data.bSpecific = BPROTOCOL_NUM_T0;
+
+ Transfer_Data_Request((uint8_t *)(&Ccid_bulkin_data), length);
+}
+
+/**
+ * @brief RDR_to_PC_Escape
+ * Provide the Escaped data block response to the host
+ * Response for PC_to_RDR_Escape
+ * @param uint8_t errorCode: code to be returned to the host
+ * @retval None
+ */
+void RDR_to_PC_Escape(uint8_t errorCode)
+{
+ uint16_t length = CCID_RESPONSE_HEADER_SIZE;
+
+ Ccid_bulkin_data.bMessageType = RDR_TO_PC_ESCAPE;
+
+ Ccid_bulkin_data.bSpecific = 0; /* Reserved for Future Use */
+ Ccid_bulkin_data.bError = errorCode;
+
+ if (errorCode == SLOT_NO_ERROR)
+ {
+ length += Ccid_bulkin_data.dwLength; /* Length Specified in Command */
+ }
+
+ Transfer_Data_Request((uint8_t *)(&Ccid_bulkin_data), length);
+}
+
+
+
+/**
+ * @brief RDR_to_PC_DataRateAndClockFrequency
+ * Provide the Clock and Data Rate information to host
+ * Response for PC_TO_RDR_SetDataRateAndClockFrequency
+ * @param uint8_t errorCode: code to be returned to the host
+ * @retval None
+ */
+void RDR_to_PC_DataRateAndClockFrequency(uint8_t errorCode)
+{
+ uint16_t length = CCID_RESPONSE_HEADER_SIZE;
+
+ Ccid_bulkin_data.bMessageType = RDR_TO_PC_DATARATEANDCLOCKFREQUENCY;
+ Ccid_bulkin_data.bError = errorCode;
+ Ccid_bulkin_data.bSpecific = 0; /* Reserved for Future Use */
+
+ if (errorCode == SLOT_NO_ERROR)
+ {
+ length += Ccid_bulkin_data.dwLength; /* Length Specified in Command */
+ }
+
+ Transfer_Data_Request((uint8_t *)(&Ccid_bulkin_data), length);
+}
+
+/**
+ * @brief RDR_to_PC_NotifySlotChange
+ * Interrupt message to be sent to the host, Checks the card presence
+ * status and update the buffer accordingly
+ * @param None
+ * @retval None
+ */
+void RDR_to_PC_NotifySlotChange(void)
+{
+ UsbIntMessageBuffer[OFFSET_INT_BMESSAGETYPE] = RDR_TO_PC_NOTIFYSLOTCHANGE;
+
+ //IC card always in slot.
+// if (SC_Detect())
+ {
+ /*
+ SLOT_ICC_PRESENT 0x01 : LSb : (0b = no ICC present, 1b = ICC present)
+ SLOT_ICC_CHANGE 0x02 : MSb : (0b = no change, 1b = change).
+ */
+ UsbIntMessageBuffer[OFFSET_INT_BMSLOTICCSTATE] = SLOT_ICC_PRESENT |
+ SLOT_ICC_CHANGE;
+ }
+// else
+// {
+// UsbIntMessageBuffer[OFFSET_INT_BMSLOTICCSTATE] = SLOT_ICC_CHANGE;
+//
+// /* Power OFF the card */
+// SC_PowerCmd(DISABLE);
+// SC_SetState(SC_POWER_OFF);
+// }
+}
+
+
+/**
+ * @brief CCID_UpdSlotStatus
+ * Updates the variable for the slot status
+ * @param uint8_t slotStatus : slot status from the calling function
+ * @retval None
+ */
+void CCID_UpdSlotStatus(uint8_t slotStatus)
+{
+ Ccid_SlotStatus.SlotStatus = slotStatus;
+}
+
+/**
+ * @brief CCID_UpdSlotChange
+ * Updates the variable for the slot change status
+ * @param uint8_t changeStatus : slot change status from the calling function
+ * @retval None
+ */
+void CCID_UpdSlotChange(uint8_t changeStatus)
+{
+ Ccid_SlotStatus.SlotStatusChange = changeStatus;
+}
+
+/**
+ * @brief CCID_IsSlotStatusChange
+ * Provides the value of the variable for the slot change status
+ * @param None
+ * @retval uint8_t slot change status
+ */
+uint8_t CCID_IsSlotStatusChange(void)
+{
+ return Ccid_SlotStatus.SlotStatusChange;
+}
+
+/**
+ * @brief CCID_CheckCommandParams
+ * Checks the specific parameters requested by the function and update
+ * status accordingly. This function is called from all
+ * PC_to_RDR functions
+ * @param uint32_t param_type : Parameter enum to be checked by calling function
+ * @retval uint8_t status
+ */
+static uint8_t CCID_CheckCommandParams(uint32_t param_type)
+{
+ uint32_t parameter;
+
+ Ccid_bulkin_data.bStatus = BM_ICC_PRESENT_ACTIVE | BM_COMMAND_STATUS_NO_ERROR;
+
+ parameter = (uint32_t)param_type;
+
+ if (parameter & CHK_PARAM_SLOT)
+ {
+ /*
+ The slot number (bSlot) identifies which ICC slot is being addressed
+ by the message, if the CCID supports multiple slots.
+ The slot number is zero-relative, and is in the range of zero to FFh.
+ */
+
+ /* SLOT Number is 0 onwards, so always < CCID_NUMBER_OF_SLOTs */
+ /* Error Condition !!! */
+ if (Ccid_bulkout_data.bSlot >= CCID_NUMBER_OF_SLOTS)
+ { /* Slot requested is more than supported by Firmware */
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_NO_ICC_PRESENT);
+ return SLOTERROR_BAD_SLOT;
+ }
+ }
+
+ if (parameter & CHK_PARAM_CARD_PRESENT)
+ {
+ /* Commands Parameters ok, Check the Card Status */
+ //Card is always in slot, don't need detect.
+ //if (SC_Detect() == 0)
+ //{ /* Card is Not detected */
+ // CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_NO_ICC_PRESENT);
+ // return SLOTERROR_ICC_MUTE;
+ //}
+ }
+
+ /* Check that DwLength is 0 */
+ if (parameter & CHK_PARAM_DWLENGTH)
+ {
+ if (Ccid_bulkout_data.dwLength != 0)
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ return SLOTERROR_BAD_LENTGH;
+ }
+ }
+
+ /* abRFU 2 : Reserved for Future Use*/
+ if (parameter & CHK_PARAM_abRFU2)
+ {
+
+ if ((Ccid_bulkout_data.bSpecific_1 != 0) ||
+ (Ccid_bulkout_data.bSpecific_2 != 0))
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ return SLOTERROR_BAD_ABRFU_2B; /* bSpecific_1 */
+ }
+ }
+
+ if (parameter & CHK_PARAM_abRFU3)
+ {
+ /* abRFU 3 : Reserved for Future Use*/
+ if ((Ccid_bulkout_data.bSpecific_0 != 0) ||
+ (Ccid_bulkout_data.bSpecific_1 != 0) ||
+ (Ccid_bulkout_data.bSpecific_2 != 0))
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_ACTIVE);
+ return SLOTERROR_BAD_ABRFU_3B;
+ }
+ }
+
+
+ if (parameter & CHK_PARAM_ABORT)
+ {
+ if (usb_ccid_param.bAbortRequestFlag)
+ {
+ CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_INACTIVE);
+ return SLOTERROR_CMD_ABORTED;
+ }
+ }
+
+ if (parameter & CHK_ACTIVE_STATE)
+ {
+ /* Commands Parameters ok, Check the Card Status */
+ /* Card is detected */
+ //Card always active T0/T1 doesn't matter.
+// if (SC_GetState() != SC_ACTIVE_ON_T0)
+// {
+// /* Check that from Lower Layers, the SmartCard come to known state */
+// CCID_UpdateCommandStatus(BM_COMMAND_STATUS_FAILED, BM_ICC_PRESENT_INACTIVE);
+// return SLOTERROR_HW_ERROR;
+// }
+ }
+
+ return 0;
+}
+
+
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
Index: yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_core.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_core.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_core.h (working copy)
@@ -0,0 +1,68 @@
+/**
+ ******************************************************************************
+ * @file usbd_ccid_core.h
+ * @author MCD Application Team
+ * @version V1.0.1
+ * @date 31-January-2014
+ * @brief This file provides all the CCID core functions.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2014 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _USB_CCID_CORE_H_
+#define _USB_CCID_CORE_H_
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_req.h"
+#include "sc_itf.h"
+//#include "usbd_ccid_if.h"
+
+
+/* Exported defines ----------------------------------------------------------*/
+#define TPDU_EXCHANGE 0x01
+#define SHORT_APDU_EXCHANGE 0x02
+#define EXTENDED_APDU_EXCHANGE 0x04
+#define CHARACTER_EXCHANGE 0x00
+
+#define EXCHANGE_LEVEL_FEATURE TPDU_EXCHANGE
+
+#define REQUEST_ABORT 0x01
+#define REQUEST_GET_CLOCK_FREQUENCIES 0x02
+#define REQUEST_GET_DATA_RATES 0x03
+
+#define SMARTCARD_SIZ_CONFIG_DESC 93
+
+#define CCID_BULK_EPIN_SIZE CCID_BULK_EP_MAX_PACKET
+#define CCID_BULK_EPOUT_SIZE CCID_BULK_EP_MAX_PACKET
+#define CCID_INTR_EPIN_SIZE CCID_INTR_EP_MAX_PACKET
+#define CCID_EP0_BUFF_SIZ 64
+#define BULK_MAX_PACKET_SIZE 0x40
+extern uint8_t BulkOut_Data_Buff[BULK_MAX_PACKET_SIZE];
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported macros -----------------------------------------------------------*/
+/* Exported variables --------------------------------------------------------*/
+extern USBD_Class_cb_TypeDef USBD_CCID_cb;
+/* Exported functions ------------------------------------------------------- */
+uint8_t USBD_CCID_DataOut(void *pdev,
+ uint8_t epnum);
+#endif /* _USB_CCID_CORE_H_ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_core.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_core.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_core.c (working copy)
@@ -0,0 +1,469 @@
+/**
+ ******************************************************************************
+ * @file usbd_ccid_core.c
+ * @author MCD Application Team
+ * @version V1.0.1
+ * @date 31-January-2014
+ * @brief This file provides all the CCID core functions.
+ *
+ * @verbatim
+ *
+ * ===================================================================
+ * CCID Class Description
+ * ===================================================================
+ * This module manages the Specification for Integrated Circuit(s)
+ * Cards Interface Revision 1.1
+ * This driver implements the following aspects of the specification:
+ * - Bulk Transfers
+ *
+ * @endverbatim
+ *
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2014 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_ccid_core.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+static uint8_t USBD_CCID_Init(void *pdev,
+ uint8_t cfgidx);
+
+static uint8_t USBD_CCID_DeInit(void *pdev,
+ uint8_t cfgidx);
+
+static uint8_t USBD_CCID_Setup(void *pdev,
+ USB_SETUP_REQ *req);
+
+static uint8_t USBD_CCID_DataIn(void *pdev,
+ uint8_t epnum);
+
+
+uint8_t USBD_CCID_DataOut(void *pdev,
+ uint8_t epnum);
+
+static uint8_t* USBD_CCID_GetCfgDesc(uint8_t speed,
+ uint16_t *length);
+
+static uint8_t USBD_CCID_EP0_Buff[CCID_EP0_BUFF_SIZ];
+
+USBD_Class_cb_TypeDef USBD_CCID_cb =
+{
+ USBD_CCID_Init,
+ USBD_CCID_DeInit,
+ USBD_CCID_Setup,
+ NULL, /*EP0_TxSent*/
+ NULL, /*EP0_RxReady*/
+ USBD_CCID_DataIn,
+ USBD_CCID_DataOut,
+ NULL, /*SOF */
+ NULL,
+ NULL,
+ USBD_CCID_GetCfgDesc,
+};
+
+/* USB Mass storage device Configuration Descriptor */
+/* All Descriptors (Configuration, Interface, Endpoint, Class, Vendor */
+const uint8_t USBD_CCID_CfgDesc[SMARTCARD_SIZ_CONFIG_DESC] =
+{
+
+ 0x09, /* bLength: Configuration Descriptor size */
+ USB_DESC_TYPE_CONFIGURATION, /* bDescriptorType: Configuration */
+ SMARTCARD_SIZ_CONFIG_DESC,
+
+ 0x00,
+ 0x01, /* bNumInterfaces: 1 interface */
+ 0x01, /* bConfigurationValue: */
+ 0x04, /* iConfiguration: */
+ 0x80, /*bmAttributes: bus powered */
+ 0x32, /* MaxPower 100 mA */
+
+ /******************** CCID **** interface ********************/
+ 0x09, /* bLength: Interface Descriptor size */
+ 0x04, /* bDescriptorType: */
+ 0x00, /* bInterfaceNumber: Number of Interface */
+ 0x00, /* bAlternateSetting: Alternate setting */
+ 0x03, /* bNumEndpoints: 3 endpoints used */
+ 0x0B, /* bInterfaceClass: user's interface for CCID */
+ 0x00, /* bInterfaceSubClass : */
+ 0x00, /* nInterfaceProtocol : None */
+ 0x05, /* iInterface: */
+
+ /******************* CCID class descriptor ********************/
+ 0x36, /* bLength: CCID Descriptor size */
+ 0x21, /* bDescriptorType: Functional Descriptor type. */
+ 0x10, /* bcdCCID(LSB): CCID Class Spec release number (1.00) */
+ 0x01, /* bcdCCID(MSB) */
+
+ 0x00, /* bMaxSlotIndex :highest available slot on this device */
+ 0x03, /* bVoltageSupport: bit Wise OR for 01h-5.0V 02h-3.0V
+ 04h 1.8V*/
+
+ 0x01, 0x00, 0x00, 0x00, /* dwProtocols: 0001h = Protocol T=0 */
+ 0x10, 0x0E, 0x00, 0x00, /* dwDefaultClock: 3.6Mhz = 3600kHz = 0x0E10,
+ for 4 Mhz the value is (0x00000FA0) :
+ This is used in ETU and waiting time calculations*/
+ 0x10, 0x0E, 0x00, 0x00, /* dwMaximumClock: Maximum supported ICC clock frequency
+ in KHz. So, 3.6Mhz = 3600kHz = 0x0E10,
+ 4 Mhz (0x00000FA0) : */
+ 0x00, /* bNumClockSupported : no setting from PC
+ If the value is 00h, the
+ supported clock frequencies are assumed to be the
+ default clock frequency defined by dwDefaultClock
+ and the maximum clock frequency defined by
+ dwMaximumClock */
+
+ 0xCD, 0x25, 0x00, 0x00, /* dwDataRate: Default ICC I/O data rate in bps
+ 9677 bps = 0x25CD
+ for example 10752 bps (0x00002A00) */
+
+ 0xCD, 0x25, 0x00, 0x00, /* dwMaxDataRate: Maximum supported ICC I/O data
+ rate in bps */
+ 0x00, /* bNumDataRatesSupported :
+ The number of data rates that are supported by the CCID
+ If the value is 00h, all data rates between the default
+ data rate dwDataRate and the maximum data rate
+ dwMaxDataRate are supported.
+ Dont support GET_CLOCK_FREQUENCIES
+ */
+
+ 0x00, 0x00, 0x00, 0x00, /* dwMaxIFSD: 0 (T=0 only) */
+ 0x00, 0x00, 0x00, 0x00, /* dwSynchProtocols */
+ 0x00, 0x00, 0x00, 0x00, /* dwMechanical: no special characteristics */
+
+ 0x38, 0x00, EXCHANGE_LEVEL_FEATURE, 0x00,
+ /* dwFeatures: clk, baud rate, voltage : automatic */
+ /* 00000008h Automatic ICC voltage selection
+ 00000010h Automatic ICC clock frequency change
+ 00000020h Automatic baud rate change according to
+ active parameters provided by the Host or self
+ determined 00000100h CCID can set
+ ICC in clock stop mode
+
+ Only one of the following values may be present to
+ select a level of exchange:
+ 00010000h TPDU level exchanges with CCID
+ 00020000h Short APDU level exchange with CCID
+ 00040000h Short and Extended APDU level exchange
+ If none of those values : character level of exchange*/
+ 0x0F, 0x01, 0x00, 0x00, /* dwMaxCCIDMessageLength: Maximum block size + header*/
+ /* 261 + 10 */
+
+ 0x00, /* bClassGetResponse*/
+ 0x00, /* bClassEnvelope */
+ 0x00, 0x00, /* wLcdLayout : 0000h no LCD. */
+ 0x00, /* bPINSupport : no PIN verif and modif */
+ 0x01, /* bMaxCCIDBusySlots */
+
+ /******************** CCID Endpoints ********************/
+ 0x07, /*Endpoint descriptor length = 7*/
+ 0x05, /*Endpoint descriptor type */
+ CCID_BULK_IN_EP, /*Endpoint address (IN, address 1) */
+ 0x02, /*Bulk endpoint type */
+ LOBYTE(CCID_BULK_EPIN_SIZE),
+ HIBYTE(CCID_BULK_EPIN_SIZE),
+ 0x00, /*Polling interval in milliseconds */
+
+ 0x07, /*Endpoint descriptor length = 7 */
+ 0x05, /*Endpoint descriptor type */
+ CCID_BULK_OUT_EP, /*Endpoint address (OUT, address 1) */
+ 0x02, /*Bulk endpoint type */
+ LOBYTE(CCID_BULK_EPOUT_SIZE),
+ HIBYTE(CCID_BULK_EPOUT_SIZE),
+ 0x00, /*Polling interval in milliseconds*/
+
+
+ 0x07, /*bLength: Endpoint Descriptor size*/
+ 0x05, /*bDescriptorType:*/
+ CCID_INTR_IN_EP, /*bEndpointAddress: Endpoint Address (IN)*/
+ 0x03, /* bmAttributes: Interrupt endpoint */
+ LOBYTE(CCID_INTR_EPIN_SIZE),
+ HIBYTE(CCID_INTR_EPIN_SIZE),
+ 0x18 /*Polling interval in milliseconds */
+};
+
+/* Private function ----------------------------------------------------------*/
+
+/**
+ * @brief USBD_CCID_Init
+ * Initialize the USB CCID Interface
+ * @param pdev: device instance
+ * @param cfgidx: configuration index
+ * @retval status
+ */
+static uint8_t USBD_CCID_Init(void *pdev,
+ uint8_t cfgidx)
+{
+
+ // DCD_PMA_Config(pdev , CCID_BULK_IN_EP,USB_SNG_BUF,CCID_BULK_TX_ADDRESS);
+ // DCD_PMA_Config(pdev , CCID_INTR_IN_EP,USB_SNG_BUF,CCID_INT_TX_ADDRESS);
+ // DCD_PMA_Config(pdev , CCID_BULK_OUT_EP,USB_SNG_BUF,CCID_BULK_RX_ADDRESS);
+
+
+ /* Open EP IN */
+ DCD_EP_Open(pdev,
+ CCID_BULK_IN_EP,
+ CCID_BULK_EPIN_SIZE,
+ USB_OTG_EP_BULK);
+
+ /* Open EP OUT */
+ DCD_EP_Open(pdev,
+ CCID_BULK_OUT_EP,
+ CCID_BULK_EPOUT_SIZE,
+ USB_OTG_EP_BULK);
+
+ /* Open INTR EP IN */
+ DCD_EP_Open(pdev,
+ CCID_INTR_IN_EP,
+ CCID_INTR_EPIN_SIZE,
+ USB_OTG_EP_INT);
+
+ /* Init the CCID layer */
+ CCID_Init(pdev);
+
+ return USBD_OK;
+}
+
+/**
+ * @brief USBD_CCID_DeInit
+ * DeInitilaize the usb ccid configuration
+ * @param pdev: device instance
+ * @param cfgidx: configuration index
+ * @retval status
+ */
+static uint8_t USBD_CCID_DeInit(void *pdev,
+ uint8_t cfgidx)
+{
+ /* Close CCID EPs */
+ DCD_EP_Close(pdev, CCID_BULK_IN_EP);
+ DCD_EP_Close(pdev, CCID_BULK_OUT_EP);
+ DCD_EP_Close(pdev, CCID_INTR_IN_EP);
+
+ /* Un Init the CCID layer */
+ CCID_DeInit(pdev);
+ return USBD_OK;
+}
+
+/**
+ * @brief USBD_CCID_Setup
+ * Handle the CCID specific requests
+ * @param pdev: device instance
+ * @param req: USB request
+ * @retval status
+ */
+static uint8_t USBD_CCID_Setup(void *pdev, USB_SETUP_REQ *req)
+{
+ uint8_t slot_nb;
+ uint8_t seq_nb;
+ uint16_t len;
+
+ switch (req->bmRequest & USB_REQ_TYPE_MASK)
+ {
+ /* Class request */
+ case USB_REQ_TYPE_CLASS :
+ switch (req->bRequest)
+ {
+ case REQUEST_ABORT :
+
+ if ((req->wLength == 0) &&
+ ((req->bmRequest & 0x80) != 0x80))
+ { /* Check bmRequest : No Data-In stage. 0x80 is Data Direction */
+
+ /* The wValue field contains the slot number (bSlot) in the low byte
+ and the sequence number (bSeq) in the high byte.*/
+ slot_nb = (uint8_t)((req->wValue) & 0x00ff);
+ seq_nb = (uint8_t)(((req->wValue) & 0xff00) >> 8);
+
+ if (CCID_CmdAbort(slot_nb, seq_nb) != 0)
+ { /* If error is returned by lower layer :
+ Generally Slot# may not have matched */
+ USBD_CtlError(pdev, req);
+ return USBD_FAIL;
+ }
+ }
+ else
+ {
+ USBD_CtlError(pdev, req);
+ return USBD_FAIL;
+ }
+ break;
+
+ case REQUEST_GET_CLOCK_FREQUENCIES :
+ if ((req->wValue == 0) &&
+ (req->wLength != 0) &&
+ ((req->bmRequest & 0x80) == 0x80))
+ { /* Check bmRequest : Data-In stage. 0x80 is Data Direction */
+ /*
+ if (SC_Request_GetClockFrequencies(USBD_CCID_EP0_Buff, &len) != 0)
+ {
+ USBD_CtlError(pdev, req);
+ return USBD_FAIL;
+ }
+ else
+ {
+ */
+ len = 0;
+ if (len > CCID_EP0_BUFF_SIZ)
+ {
+ len = CCID_EP0_BUFF_SIZ;
+ }
+
+ USBD_CtlSendData(pdev,
+ USBD_CCID_EP0_Buff,
+ len);
+ //}
+ }
+ else
+ {
+ USBD_CtlError(pdev, req);
+ return USBD_FAIL;
+ }
+ break;
+
+ case REQUEST_GET_DATA_RATES :
+ if ((req->wValue == 0) &&
+ (req->wLength != 0) &&
+ ((req->bmRequest & 0x80) == 0x80))
+ { /* Check bmRequest : Data-In stage. 0x80 is Data Direction */
+
+ /*
+ if (SC_Request_GetDataRates(USBD_CCID_EP0_Buff, &len) != 0)
+ {
+ USBD_CtlError(pdev, req);
+ return USBD_FAIL;
+ }
+ else
+ {
+ */
+ len = 0;
+ if (len > CCID_EP0_BUFF_SIZ)
+ {
+ len = CCID_EP0_BUFF_SIZ;
+ }
+
+ USBD_CtlSendData(pdev,
+ USBD_CCID_EP0_Buff,
+ len);
+ //}
+ }
+ else
+ {
+ USBD_CtlError(pdev, req);
+ return USBD_FAIL;
+ }
+ break;
+
+ default:
+ USBD_CtlError(pdev, req);
+ return USBD_FAIL;
+ }
+ break;
+ /* Interface & Endpoint request */
+ case USB_REQ_TYPE_STANDARD:
+ switch (req->bRequest)
+ {
+ case USB_REQ_GET_INTERFACE :
+ break;
+
+ case USB_REQ_SET_INTERFACE :
+ break;
+
+ case USB_REQ_CLEAR_FEATURE:
+
+ /* Re-activate the EP */
+ DCD_EP_Close(pdev, (uint8_t)req->wIndex);
+ if ((((uint8_t)req->wIndex) & 0x80) == 0x80)
+ {
+ DCD_EP_Open(pdev,
+ ((uint8_t)req->wIndex),
+ CCID_BULK_EPIN_SIZE,
+ USB_OTG_EP_BULK);
+ }
+ else
+ {
+ DCD_EP_Open(pdev,
+ ((uint8_t)req->wIndex),
+ CCID_BULK_EPOUT_SIZE,
+ USB_OTG_EP_BULK);
+ }
+
+ break;
+
+ }
+ break;
+
+ default:
+ break;
+ }
+ return USBD_OK;
+}
+
+/**
+ * @brief USBD_CCID_DataIn
+ * handle data IN Stage
+ * @param pdev: device instance
+ * @param epnum: endpoint index
+ * @retval status
+ */
+static uint8_t USBD_CCID_DataIn(void *pdev,
+ uint8_t epnum)
+{
+ CCID_BulkMessage_In(pdev, epnum);
+ return USBD_OK;
+}
+
+/**
+ * @brief USBD_CCID_DataOut
+ * handle data OUT Stage
+ * @param pdev: device instance
+ * @param epnum: endpoint index
+ * @retval status
+ */
+uint8_t USBD_CCID_DataOut(void *pdev,
+ uint8_t epnum)
+{
+
+ MyPrintf("333333\n");
+
+ DCD_EP_PrepareRx(pdev,
+ CCID_BULK_OUT_EP,
+ (uint8_t *)&BulkOut_Data_Buff[0],
+ CCID_BULK_EPOUT_SIZE);
+ CCID_BulkMessage_Out(pdev, epnum);
+ return USBD_OK;
+}
+
+/**
+ * @brief USBD_CCID_GetCfgDesc
+ * return configuration descriptor
+ * @param speed : current device speed
+ * @param length : pointer data length
+ * @retval pointer to descriptor buffer
+ */
+static uint8_t* USBD_CCID_GetCfgDesc(uint8_t speed, uint16_t *length)
+{
+ *length = sizeof(USBD_CCID_CfgDesc);
+ return (uint8_t *)USBD_CCID_CfgDesc;
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_if.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_if.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_if.h (working copy)
@@ -0,0 +1,184 @@
+/**
+ ******************************************************************************
+ * @file usbd_ccid_if.h
+ * @author MCD Application Team
+ * @version V1.0.1
+ * @date 31-January-2014
+ * @brief This file provides all the functions prototypes for USB CCID
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2014 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_CCID_IF_H
+#define __USBD_CCID_IF_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_ccid_core.h"
+
+/* Exported defines ----------------------------------------------------------*/
+/* Bulk-only Command Block Wrapper */
+#define ABDATA_SIZE 261
+#define CCID_CMD_HEADER_SIZE 10
+#define CCID_RESPONSE_HEADER_SIZE 10
+
+
+#define CCID_INT_BUFF_SIZ 2
+
+#define CARD_SLOT_FITTED 1
+#define CARD_SLOT_REMOVED 0
+
+#define BULK_MAX_PACKET_SIZE 0x40
+#define CCID_IN_EP_SIZE 0x40
+#define INTR_MAX_PACKET_SIZE 8
+#define CCID_MESSAGE_HEADER_SIZE 10
+#define CCID_NUMBER_OF_SLOTS 1
+ /* Number of SLOTS. For single card, this value is 1 */
+
+/* Following Parameters used in PC_to_RDR_IccPowerOn */
+#define VOLTAGE_SELECTION_AUTOMATIC 0xFF
+#define VOLTAGE_SELECTION_3V 0x02
+#define VOLTAGE_SELECTION_5V 0x01
+#define VOLTAGE_SELECTION_1V8 0x03
+
+#define PC_TO_RDR_ICCPOWERON 0x62
+#define PC_TO_RDR_ICCPOWEROFF 0x63
+#define PC_TO_RDR_GETSLOTSTATUS 0x65
+#define PC_TO_RDR_XFRBLOCK 0x6F
+#define PC_TO_RDR_GETPARAMETERS 0x6C
+#define PC_TO_RDR_RESETPARAMETERS 0x6D
+#define PC_TO_RDR_SETPARAMETERS 0x61
+#define PC_TO_RDR_ESCAPE 0x6B
+#define PC_TO_RDR_ICCCLOCK 0x6E
+#define PC_TO_RDR_T0APDU 0x6A
+#define PC_TO_RDR_SECURE 0x69
+#define PC_TO_RDR_MECHANICAL 0x71
+#define PC_TO_RDR_ABORT 0x72
+#define PC_TO_RDR_SETDATARATEANDCLOCKFREQUENCY 0x73
+
+#define RDR_TO_PC_DATABLOCK 0x80
+#define RDR_TO_PC_SLOTSTATUS 0x81
+#define RDR_TO_PC_PARAMETERS 0x82
+#define RDR_TO_PC_ESCAPE 0x83
+#define RDR_TO_PC_DATARATEANDCLOCKFREQUENCY 0x84
+
+#define RDR_TO_PC_NOTIFYSLOTCHANGE 0x50
+#define RDR_TO_PC_HARDWAREERROR 0x51
+
+#define OFFSET_INT_BMESSAGETYPE 0
+#define OFFSET_INT_BMSLOTICCSTATE 1
+#define SLOT_ICC_PRESENT 0x01
+ /* LSb : (0b = no ICC present, 1b = ICC present) */
+
+#define SLOT_ICC_CHANGE 0x02 /* MSb : (0b = no change, 1b = change) */
+/*****************************************************************************/
+/*********************** CCID Bulk Transfer State machine ********************/
+/*****************************************************************************/
+#define CCID_STATE_IDLE 0 /* Idle state */
+#define CCID_STATE_DATA_OUT 1 /* Data Out state */
+#define CCID_STATE_RECEIVE_DATA 2
+#define CCID_STATE_SEND_RESP 3
+#define CCID_STATE_DATAIN 4
+#define CCID_STATE_UNCORRECT_LENGTH 5
+
+#define DIR_IN 0
+#define DIR_OUT 1
+#define BOTH_DIR 2
+
+/* Exported types ------------------------------------------------------------*/
+#pragma pack(1)
+typedef struct
+{
+ uint8_t bMessageType; /* Offset = 0*/
+ uint32_t dwLength; /* Offset = 1, The length field (dwLength) is the length
+ of the message not including the 10-byte header.*/
+ uint8_t bSlot; /* Offset = 5*/
+ uint8_t bSeq; /* Offset = 6*/
+ uint8_t bSpecific_0; /* Offset = 7*/
+ uint8_t bSpecific_1; /* Offset = 8*/
+ uint8_t bSpecific_2; /* Offset = 9*/
+ uint8_t abData [ABDATA_SIZE]; /* Offset = 10, For reference, the absolute
+ maximum block size for a TPDU T=0 block is 260 bytes
+ (5 bytes command; 255 bytes data),
+ or for a TPDU T=1 block is 259 bytes,
+ or for a short APDU T=1 block is 261 bytes,
+ or for an extended APDU T=1 block is 65544 bytes.*/
+} Ccid_bulkout_data_t;
+#pragma pack()
+
+#pragma pack(1)
+typedef struct
+{
+ uint8_t bMessageType; /* Offset = 0*/
+ uint32_t dwLength; /* Offset = 1*/
+ uint8_t bSlot; /* Offset = 5, Same as Bulk-OUT message */
+ uint8_t bSeq; /* Offset = 6, Same as Bulk-OUT message */
+ uint8_t bStatus; /* Offset = 7, Slot status as defined in § 6.2.6*/
+ uint8_t bError; /* Offset = 8, Slot error as defined in § 6.2.6*/
+ uint8_t bSpecific; /* Offset = 9*/
+ uint8_t abData[ABDATA_SIZE]; /* Offset = 10*/
+ uint16_t u16SizeToSend;
+} Ccid_bulkin_data_t;
+#pragma pack()
+
+typedef struct
+{
+ volatile uint8_t SlotStatus;
+ volatile uint8_t SlotStatusChange;
+} Ccid_SlotStatus_t;
+
+
+typedef struct
+{
+ volatile uint8_t bAbortRequestFlag;
+ volatile uint8_t bSeq;
+ volatile uint8_t bSlot;
+} usb_ccid_param_t;
+
+extern usb_ccid_param_t usb_ccid_param;
+extern Ccid_bulkout_data_t Ccid_bulkout_data; /* Buffer for the Out Data */
+extern Ccid_bulkin_data_t Ccid_bulkin_data; /* Buffer for the IN Data */
+extern Ccid_SlotStatus_t Ccid_SlotStatus;
+extern uint8_t UsbIntMessageBuffer[];
+extern uint8_t Ccid_BulkState;
+
+/* Exported macros -----------------------------------------------------------*/
+/* Exported variables --------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+void CCID_BulkMessage_In (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t epnum);
+
+void CCID_BulkMessage_Out (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t epnum);
+
+void CCID_ReceiveCmdHeader(uint8_t* pDst, uint8_t u8length);
+void CCID_CmdDecode(USB_OTG_CORE_HANDLE *pdev);
+
+void CCID_IntMessage(USB_OTG_CORE_HANDLE *pdev);
+void CCID_Init(USB_OTG_CORE_HANDLE *pdev);
+void CCID_DeInit(USB_OTG_CORE_HANDLE *pdev);
+
+uint8_t CCID_IsIntrTransferComplete(void);
+void CCID_SetIntrTransferStatus (uint8_t );
+void Transfer_Data_Request(uint8_t* dataPointer, uint16_t dataLen);
+void Set_CSW (uint8_t CSW_Status, uint8_t Send_Permission);
+
+#endif /* __USBD_CCID_IF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_if.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_if.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/class/ccid/usbd_ccid_if.c (working copy)
@@ -0,0 +1,469 @@
+/**
+ ******************************************************************************
+ * @file usbd_ccid_if.c
+ * @author MCD Application Team
+ * @version V1.0.1
+ * @date 31-January-2014
+ * @brief This file provides all the functions for USB Interface for CCID
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2014 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_ccid_if.h"
+#include "usbd_ccid_core.h"
+#include "usbd_ioreq.h"
+#include "usbd_usr.h"
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+uint8_t Ccid_BulkState;
+uint8_t UsbIntMessageBuffer[INTR_MAX_PACKET_SIZE]; /* data buffer*/
+volatile uint8_t PrevXferComplete_IntrIn;
+usb_ccid_param_t usb_ccid_param;
+
+uint8_t *pUsbMessageBuffer;
+static uint32_t UsbMessageLength;
+Ccid_bulkin_data_t pCcid_resp_buff;
+Ccid_SlotStatus_t Ccid_SlotStatus;
+
+
+uint8_t BulkOut_Data_Buff[BULK_MAX_PACKET_SIZE];
+
+Ccid_bulkin_data_t Ccid_bulkin_data;
+
+Ccid_bulkout_data_t Ccid_bulkout_data;
+
+uint8_t UsbIntMessageBuffer[INTR_MAX_PACKET_SIZE];
+
+/* Private function prototypes -----------------------------------------------*/
+static void CCID_Response_SendData(USB_OTG_CORE_HANDLE *pdev,
+ uint8_t *pbuf,
+ uint16_t len);
+
+
+
+
+/* Private function ----------------------------------------------------------*/
+/**
+ * @brief CCID_Init
+ * Initialize the CCID USB Layer
+ * @param pdev: device instance
+ * @retval None
+ */
+void CCID_Init(USB_OTG_CORE_HANDLE *pdev)
+{
+ /* CCID Related Initialization */
+ CCID_SetIntrTransferStatus(1); /* Transfer Complete Status */
+ CCID_UpdSlotChange(1);
+ //SC_InitParams();
+
+// /* Prepare EP to Receive First Cmd */
+// DCD_EP_PrepareRx(pdev,
+// CCID_BULK_OUT_EP,
+// (uint8_t *)&BulkOut_Data_Buff[0],
+// CCID_BULK_EPOUT_SIZE);
+}
+
+/**
+ * @brief CCID_DeInit
+ * Uninitialize the CCID Machine
+ * @param pdev: device instance
+ * @retval None
+ */
+void CCID_DeInit(USB_OTG_CORE_HANDLE *pdev)
+{
+ Ccid_BulkState = CCID_STATE_IDLE;
+}
+
+/**
+ * @brief CCID_Message_In
+ * Handle Bulk IN & Intr IN data stage
+ * @param pdev: device instance
+ * @param uint8_t epnum: endpoint index
+ * @retval None
+ */
+void CCID_BulkMessage_In(USB_OTG_CORE_HANDLE *pdev,
+ uint8_t epnum)
+{
+ if (epnum == (CCID_BULK_IN_EP & 0x7F))
+ { /* Filter the epnum by masking with 0x7f (mask of IN Direction) */
+
+ /*************** Handle Bulk Transfer IN data completion *****************/
+
+ // /* Toggle LED1 */
+ // STM_EVAL_LEDToggle(LED1);
+
+// switch (Ccid_BulkState)
+// {
+// case CCID_STATE_SEND_RESP:
+
+// Ccid_BulkState = CCID_STATE_IDLE;
+
+// /* Prepare EP to Receive First Cmd */
+// DCD_EP_PrepareRx(pdev,
+// CCID_BULK_OUT_EP,
+// (uint8_t *)&BulkOut_Data_Buff[0],
+// CCID_BULK_EPOUT_SIZE);
+
+// break;
+
+// default:
+// break;
+// }
+ }
+ else if (epnum == (CCID_INTR_IN_EP & 0x7F))
+ {
+ /* Filter the epnum by masking with 0x7f (mask of IN Direction) */
+ CCID_SetIntrTransferStatus(1); /* Transfer Complete Status */
+ }
+}
+
+
+
+/**
+ * @brief CCID_BulkMessage_Out
+ * Proccess CCID OUT data
+ * @param pdev: device instance
+ * @param uint8_t epnum: endpoint index
+ * @retval None
+ */
+void CCID_BulkMessage_Out(USB_OTG_CORE_HANDLE *pdev,
+ uint8_t epnum)
+{
+
+ uint16_t dataLen;
+ dataLen = USBD_GetRxCount(pdev, CCID_BULK_OUT_EP);
+ MyPrintf("Len = %d\r\n", dataLen);
+ MyPrintf("state = %d\r\n", Ccid_BulkState);
+ switch (Ccid_BulkState)
+ {
+ case CCID_STATE_IDLE:
+ case CCID_STATE_SEND_RESP:
+ if (dataLen == 0x00)
+ { /* Zero Length Packet Received */
+ Ccid_BulkState = CCID_STATE_IDLE;
+ }
+ else if (dataLen >= CCID_MESSAGE_HEADER_SIZE)
+ {
+ UsbMessageLength = dataLen; /* Store for future use */
+
+ /* Expected Data Length Packet Received */
+ pUsbMessageBuffer = (uint8_t *)&Ccid_bulkout_data;
+
+ /* Fill CCID_BulkOut Data Buffer from USB Buffer */
+ CCID_ReceiveCmdHeader(pUsbMessageBuffer, dataLen);
+
+ /*
+ Refer : 6 CCID Messages
+ The response messages always contain the exact same slot number,
+ and sequence number fields from the header that was contained in
+ the Bulk-OUT command message.
+ */
+ Ccid_bulkin_data.bSlot = Ccid_bulkout_data.bSlot;
+ Ccid_bulkin_data.bSeq = Ccid_bulkout_data.bSeq;
+
+ if (dataLen < CCID_BULK_EPOUT_SIZE)
+ { /* Short message, less than the EP Out Size, execute the command,
+ if parameter like dwLength is too big, the appropriate command will
+ give an error */
+ //MyPrintf("> Enter CCID_CmdDecode\r\n");
+ CCID_CmdDecode(pdev);
+ //MyPrintf("> Exit CCID_CmdDecode\r\n");
+ }
+ else
+ { /* Long message, receive additional data with command */
+ /* (u8dataLen == CCID_BULK_EPOUT_SIZE) */
+ if (Ccid_bulkout_data.dwLength > ABDATA_SIZE)
+ { /* Check if length of data to be sent by host is > buffer size */
+
+ /* Too long data received.... Error ! */
+ Ccid_BulkState = CCID_STATE_UNCORRECT_LENGTH;
+ }
+
+ else
+ { /* Expect more data on OUT EP */
+ Ccid_BulkState = CCID_STATE_RECEIVE_DATA;
+ pUsbMessageBuffer += dataLen; /* Point to new offset */
+
+ /* Prepare EP to Receive next Cmd */
+// DCD_EP_PrepareRx(pdev,
+// CCID_BULK_OUT_EP,
+// (uint8_t *)&BulkOut_Data_Buff[0],
+// CCID_BULK_EPOUT_SIZE);
+
+ USBD_CCID_DataOut(pdev,epnum);
+
+ } /* if (dataLen == CCID_BULK_EPOUT_SIZE) ends */
+ } /* if (dataLen >= CCID_BULK_EPOUT_SIZE) ends */
+ } /* if (dataLen >= CCID_MESSAGE_HEADER_SIZE) ends */
+ break;
+
+ case CCID_STATE_RECEIVE_DATA:
+
+ UsbMessageLength += dataLen;
+
+ if (dataLen < CCID_BULK_EPOUT_SIZE)
+ { /* Short message, less than the EP Out Size, execute the command,
+ if parameter like dwLength is too big, the appropriate command will
+ give an error */
+
+ /* Full command is received, process the Command */
+
+ CCID_ReceiveCmdHeader(pUsbMessageBuffer, dataLen);
+ CCID_CmdDecode(pdev);
+ Ccid_BulkState = CCID_STATE_IDLE;
+ }
+ else if (dataLen == CCID_BULK_EPOUT_SIZE)
+ {
+
+ if (UsbMessageLength < (Ccid_bulkout_data.dwLength + CCID_CMD_HEADER_SIZE))
+ {
+ CCID_ReceiveCmdHeader(pUsbMessageBuffer, dataLen); /* Copy data */
+ pUsbMessageBuffer += dataLen;
+ /* Increment the pointer to receive more data */
+
+ /* Prepare EP to Receive next Cmd */
+// DCD_EP_PrepareRx(pdev,
+// CCID_BULK_OUT_EP,
+// (uint8_t *)&BulkOut_Data_Buff[0],
+// CCID_BULK_EPOUT_SIZE);
+
+ USBD_CCID_DataOut(pdev,epnum);
+ }
+ else if (UsbMessageLength == (Ccid_bulkout_data.dwLength + CCID_CMD_HEADER_SIZE))
+ {
+ /* Full command is received, process the Command */
+ CCID_ReceiveCmdHeader(pUsbMessageBuffer, dataLen);
+ CCID_CmdDecode(pdev);
+ }
+ else
+ {
+ /* Too long data received.... Error ! */
+ Ccid_BulkState = CCID_STATE_UNCORRECT_LENGTH;
+ }
+ }
+
+ break;
+
+ case CCID_STATE_UNCORRECT_LENGTH:
+ Ccid_BulkState = CCID_STATE_IDLE;
+ break;
+
+ default:
+ break;
+ }
+}
+
+/**
+ * @brief CCID_CmdDecode
+ * Parse the commands and Proccess command
+ * @param pdev: device instance
+ * @retval None
+ */
+void CCID_CmdDecode(USB_OTG_CORE_HANDLE *pdev)
+{
+ uint8_t errorCode;
+// MyPrintf("type =%x\r\n",Ccid_bulkout_data.bMessageType);
+ switch (Ccid_bulkout_data.bMessageType)
+ {
+ case PC_TO_RDR_ICCPOWERON:
+ MyPrintf("On\r\n");
+ errorCode = PC_to_RDR_IccPowerOn();
+ RDR_to_PC_DataBlock(errorCode);
+ break;
+ case PC_TO_RDR_ICCPOWEROFF:
+ MyPrintf("Off\r\n");
+ errorCode = PC_to_RDR_IccPowerOff();
+ RDR_to_PC_SlotStatus(errorCode);
+ break;
+
+ case PC_TO_RDR_GETSLOTSTATUS:
+ MyPrintf("St\r\n");
+ errorCode = PC_to_RDR_GetSlotStatus();
+ RDR_to_PC_SlotStatus(errorCode);
+ break;
+ case PC_TO_RDR_XFRBLOCK:
+ MyPrintf("Sd\r\n");
+ errorCode = PC_to_RDR_XfrBlock();
+ //Need to process then send RESP APDU
+ //RDR_to_PC_DataBlock(errorCode);
+ break;
+
+ case PC_TO_RDR_GETPARAMETERS:
+ MyPrintf("GP\r\n");
+ errorCode = PC_to_RDR_GetParameters();
+ RDR_to_PC_Parameters(errorCode);
+ break;
+ case PC_TO_RDR_RESETPARAMETERS:
+ MyPrintf("RP\r\n");
+ errorCode = PC_to_RDR_ResetParameters();
+ RDR_to_PC_Parameters(errorCode);
+ break;
+
+ case PC_TO_RDR_SETPARAMETERS:
+ MyPrintf("SP\r\n");
+ errorCode = PC_to_RDR_SetParameters();
+ RDR_to_PC_Parameters(errorCode);
+ break;
+ case PC_TO_RDR_ESCAPE:
+ MyPrintf("ES\r\n");
+ errorCode = PC_to_RDR_Escape();
+ RDR_to_PC_Escape(errorCode);
+ break;
+ case PC_TO_RDR_ICCCLOCK:
+ MyPrintf("IC\r\n");
+ errorCode = PC_to_RDR_IccClock();
+ RDR_to_PC_SlotStatus(errorCode);
+ break;
+ case PC_TO_RDR_ABORT:
+ MyPrintf("> Enter PC_TO_RDR_ABORT\r\n");
+ errorCode = PC_to_RDR_Abort();
+ RDR_to_PC_SlotStatus(errorCode);
+ break;
+ case PC_TO_RDR_T0APDU:
+ MyPrintf("T0\r\n");
+ errorCode = PC_TO_RDR_T0Apdu();
+ RDR_to_PC_SlotStatus(errorCode);
+ break;
+ case PC_TO_RDR_MECHANICAL:
+ MyPrintf("ME\r\n");
+ errorCode = PC_TO_RDR_Mechanical();
+ RDR_to_PC_SlotStatus(errorCode);
+ break;
+ case PC_TO_RDR_SETDATARATEANDCLOCKFREQUENCY:
+ MyPrintf("FR\r\n");
+ errorCode = PC_TO_RDR_SetDataRateAndClockFrequency();
+ RDR_to_PC_DataRateAndClockFrequency(errorCode);
+ break;
+ case PC_TO_RDR_SECURE:
+ MyPrintf("SE\r\n");
+ errorCode = PC_TO_RDR_Secure();
+ RDR_to_PC_DataBlock(errorCode);
+ break;
+
+ default:
+ MyPrintf("> Enter default\r\n");
+ RDR_to_PC_SlotStatus(SLOTERROR_CMD_NOT_SUPPORTED);
+ break;
+ }
+
+ /********** Decide for all commands ***************/
+ if (Ccid_BulkState == CCID_STATE_SEND_RESP)
+ {
+ CCID_Response_SendData(pdev, (uint8_t *)&Ccid_bulkin_data,
+ Ccid_bulkin_data.u16SizeToSend);
+ Ccid_BulkState = CCID_STATE_IDLE;
+// MyPrintf("bulk_state1 = %d\n",Ccid_BulkState);
+ }
+}
+
+/**
+ * @brief Transfer_Data_Request
+ * Prepare the request response to be sent to the host
+ * @param uint8_t* dataPointer: Pointer to the data buffer to send
+ * @param uint16_t dataLen : number of bytes to send
+ * @retval None
+ */
+void Transfer_Data_Request(uint8_t *dataPointer, uint16_t dataLen)
+{
+ /********** Update Global Variables ***************/
+ Ccid_bulkin_data.u16SizeToSend = dataLen;
+ Ccid_BulkState = CCID_STATE_SEND_RESP;
+}
+
+
+/**
+ * @brief CCID_Response_SendData
+ * Send the data on bulk-in EP
+ * @param pdev: device instance
+ * @param uint8_t* buf: pointer to data buffer
+ * @param uint16_t len: Data Length
+ * @retval None
+ */
+static void CCID_Response_SendData(USB_OTG_CORE_HANDLE *pdev,
+ uint8_t *buf,
+ uint16_t len)
+{
+ DCD_EP_Tx(pdev, CCID_BULK_IN_EP, buf, len);
+}
+
+/**
+ * @brief CCID_IntMessage
+ * Send the Interrupt-IN data to the host
+ * @param pdev: device instance
+ * @retval None
+ */
+void CCID_IntMessage(USB_OTG_CORE_HANDLE *pdev)
+{
+ /* Check if there us change in Smartcard Slot status */
+ if (CCID_IsSlotStatusChange() && CCID_IsIntrTransferComplete() )
+ {
+ /* Check Slot Status is changed. Card is Removed/ Fitted */
+ RDR_to_PC_NotifySlotChange();
+
+ CCID_SetIntrTransferStatus(0); /* Reset the Status */
+ CCID_UpdSlotChange(0); /* Reset the Status of Slot Change */
+ my_delay_ms(10);
+ DCD_EP_Tx(pdev, CCID_INTR_IN_EP, UsbIntMessageBuffer, 2);
+ }
+}
+
+/**
+ * @brief CCID_ReceiveCmdHeader
+ * Receive the Data from USB BulkOut Buffer to Pointer
+ * @param uint8_t* pDst: destination address to copy the buffer
+ * @param uint8_t u8length: length of data to copy
+ * @retval None
+ */
+void CCID_ReceiveCmdHeader(uint8_t *pDst, uint8_t u8length)
+{
+ uint32_t Counter;
+
+ for (Counter = 0; Counter < u8length; Counter++)
+ {
+ *pDst++ = BulkOut_Data_Buff[Counter];
+ }
+
+}
+
+/**
+ * @brief CCID_IsIntrTransferComplete
+ * Provides the status of previous Interrupt transfer status
+ * @param None
+ * @retval uint8_t PrevXferComplete_IntrIn: Value of the previous transfer status
+ */
+uint8_t CCID_IsIntrTransferComplete(void)
+{
+ return PrevXferComplete_IntrIn;
+}
+
+/**
+ * @brief CCID_IsIntrTransferComplete
+ * Set the value of the Interrupt transfer status
+ * @param uint8_t xfer_Status: Value of the Interrupt transfer status to set
+ * @retval None
+ */
+void CCID_SetIntrTransferStatus(uint8_t xfer_Status)
+{
+ PrevXferComplete_IntrIn = xfer_Status;
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_conf_template.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_conf_template.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_conf_template.h (working copy)
@@ -0,0 +1,67 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usbd_conf_template.h
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : usb device configuration template file.
+ *****************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_CONF__H__
+#define __USBD_CONF__H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/* Includes ------------------------------------------------------------------*/
+#include "usb_conf.h"
+
+/** @defgroup USB_CONF_Exported_Defines
+ * @{
+ */
+#define USE_USB_OTG_HS
+
+#define USBD_CFG_MAX_NUM 1
+#define USB_MAX_STR_DESC_SIZ 64
+#define USBD_EP0_MAX_PACKET_SIZE 64
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_CONF_Exported_Types
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_CONF_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_Variables
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_FunctionsPrototype
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+#endif /* __USBD_CONF__H__ */
+
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_core.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_core.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_core.h (working copy)
@@ -0,0 +1,105 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usbd_core.h
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : Header file for usbd_core.c.
+ *****************************************************************************/
+
+
+#ifndef __USBD_CORE_H
+#define __USBD_CORE_H
+
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/* Includes ------------------------------------------------------------------*/
+#include "usb_dcd.h"
+#include "usbd_def.h"
+#include "usbd_conf.h"
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+/** @defgroup USBD_CORE
+ * @brief This file is the Header file for usbd_core.c file
+ * @{
+ */
+
+
+/** @defgroup USBD_CORE_Exported_Defines
+ * @{
+ */
+
+typedef enum {
+ USBD_OK = 0,
+ USBD_BUSY,
+ USBD_FAIL,
+}USBD_Status;
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_CORE_Exported_TypesDefinitions
+ * @{
+ */
+
+
+/**
+ * @}
+ */
+
+
+
+/** @defgroup USBD_CORE_Exported_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CORE_Exported_Variables
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_CORE_Exported_FunctionsPrototype
+ * @{
+ */
+void USBD_Init(USB_OTG_CORE_HANDLE *pdev,
+ USB_OTG_CORE_ID_TypeDef coreID,
+ USBD_DEVICE *pDevice,
+ USBD_Class_cb_TypeDef *class_cb,
+ USBD_Usr_cb_TypeDef *usr_cb);
+
+USBD_Status USBD_DeInit(USB_OTG_CORE_HANDLE *pdev);
+
+USBD_Status USBD_ClrCfg(USB_OTG_CORE_HANDLE *pdev, uint8_t cfgidx);
+
+USBD_Status USBD_SetCfg(USB_OTG_CORE_HANDLE *pdev, uint8_t cfgidx);
+
+/**
+ * @}
+ */
+
+#endif /* __USBD_CORE_H */
+
+/**
+ * @}
+ */
+
+/**
+* @}
+*/
+
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_core.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_core.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_core.c (working copy)
@@ -0,0 +1,425 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : otgd_fs_pcd.c
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : Peripheral Device Interface low layer.
+ *****************************************************************************/
+
+/* Include ------------------------------------------------------------------*/
+#include "usbd_core.h"
+#include "usbd_req.h"
+#include "usbd_ioreq.h"
+#include "usb_dcd_int.h"
+#include "usb_bsp.h"
+/* Private typedef ----------------------------------------------------------*/
+/* Private define -----------------------------------------------------------*/
+/* Private macro ------------------------------------------------------------*/
+/* Private variables --------------------------------------------------------*/
+/* Ptivate function prototypes ----------------------------------------------*/
+
+/******************************************************************************
+* Function Name :
+* Description :
+* Input :
+* Output :
+* Return :
+******************************************************************************/
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+* @{
+*/
+
+/** @defgroup USBD_CORE_Private_FunctionPrototypes
+* @{
+*/
+static uint8_t USBD_SetupStage(USB_OTG_CORE_HANDLE *pdev);
+static uint8_t USBD_DataOutStage(USB_OTG_CORE_HANDLE *pdev , uint8_t epnum);
+static uint8_t USBD_DataInStage(USB_OTG_CORE_HANDLE *pdev , uint8_t epnum);
+static uint8_t USBD_SOF(USB_OTG_CORE_HANDLE *pdev);
+static uint8_t USBD_Reset(USB_OTG_CORE_HANDLE *pdev);
+static uint8_t USBD_Suspend(USB_OTG_CORE_HANDLE *pdev);
+static uint8_t USBD_Resume(USB_OTG_CORE_HANDLE *pdev);
+#ifdef VBUS_SENSING_ENABLED
+static uint8_t USBD_DevConnected(USB_OTG_CORE_HANDLE *pdev);
+static uint8_t USBD_DevDisconnected(USB_OTG_CORE_HANDLE *pdev);
+#endif
+static uint8_t USBD_IsoINIncomplete(USB_OTG_CORE_HANDLE *pdev);
+static uint8_t USBD_IsoOUTIncomplete(USB_OTG_CORE_HANDLE *pdev);
+static uint8_t USBD_RunTestMode (USB_OTG_CORE_HANDLE *pdev) ;
+/**
+* @}
+*/
+
+
+
+USBD_DCD_INT_cb_TypeDef USBD_DCD_INT_cb =
+{
+ USBD_DataOutStage,
+ USBD_DataInStage,
+ USBD_SetupStage,
+ USBD_SOF,
+ USBD_Reset,
+ USBD_Suspend,
+ USBD_Resume,
+ USBD_IsoINIncomplete,
+ USBD_IsoOUTIncomplete,
+#ifdef VBUS_SENSING_ENABLED
+ USBD_DevConnected,
+ USBD_DevDisconnected,
+#endif
+};
+
+USBD_DCD_INT_cb_TypeDef *USBD_DCD_INT_fops = &USBD_DCD_INT_cb;
+
+
+/**
+* @brief USBD_SetupStage
+* Handle the setup stage
+* @param pdev: device instance
+* @retval status
+*/
+static uint8_t USBD_SetupStage(USB_OTG_CORE_HANDLE *pdev)
+{
+ USB_SETUP_REQ req;
+// USB_OTG_CSR0L_IN_PERIPHERAL_TypeDef csr0l;
+// csr0l.d8 = USB_OTG_READ_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L);
+ USBD_ParseSetupRequest(pdev , &req);
+
+ switch (req.bmRequest & 0x1F)
+ {
+ case USB_REQ_RECIPIENT_DEVICE:
+ USBD_StdDevReq(pdev, &req);
+ break;
+
+ case USB_REQ_RECIPIENT_INTERFACE:
+ USBD_StdItfReq(pdev, &req);
+ break;
+
+ case USB_REQ_RECIPIENT_ENDPOINT:
+ USBD_StdEPReq(pdev, &req);
+ break;
+
+ default:
+// csr0l.b.serviced_rxpktrdy = 1;
+// csr0l.b.data_end = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ DCD_EP_Stall(pdev , req.bmRequest & 0x80);
+ break;
+ }
+ return USBD_OK;
+}
+
+
+
+
+/**
+* @brief USBD_DataOutStage
+* Handle data out stage
+* @param pdev: device instance
+* @param epnum: endpoint index
+* @retval status
+*/
+static uint8_t USBD_DataOutStage(USB_OTG_CORE_HANDLE *pdev , uint8_t epnum)
+{
+ USB_OTG_EP *ep;
+
+ if(epnum == 0)
+ {
+ ep = &pdev->dev.out_ep[0];
+ if ( pdev->dev.device_state == USB_OTG_EP0_DATA_OUT)
+ {
+ if(ep->rem_data_len > ep->maxpacket)
+ {
+ ep->rem_data_len -= ep->maxpacket;
+
+ if(pdev->cfg.dma_enable == 1)
+ {
+ /* in slave mode this, is handled by the RxSTSQLvl ISR */
+ ep->xfer_buff += ep->maxpacket;
+ }
+ USBD_CtlContinueRx (pdev,
+ ep->xfer_buff,
+ MIN(ep->rem_data_len ,ep->maxpacket));
+ }
+ else
+ {
+ if((pdev->dev.class_cb->EP0_RxReady != NULL)&&
+ (pdev->dev.device_status == USB_OTG_CONFIGURED))
+ {
+ pdev->dev.class_cb->EP0_RxReady(pdev);
+ }
+ USBD_CtlSendStatus(pdev);
+ }
+ }
+ }
+ else if((pdev->dev.class_cb->DataOut != NULL)&&
+ (pdev->dev.device_status == USB_OTG_CONFIGURED))
+ {
+
+ pdev->dev.class_cb->DataOut(pdev, epnum);
+ }
+ return USBD_OK;
+}
+
+
+/**
+* @brief USBD_DataInStage
+* Handle data in stage
+* @param pdev: device instance
+* @param epnum: endpoint index
+* @retval status
+*/
+static uint8_t USBD_DataInStage(USB_OTG_CORE_HANDLE *pdev , uint8_t epnum)
+{
+ USB_OTG_EP *ep;
+
+ if (epnum == 0)
+ {
+// ep = &pdev->dev.in_ep[0];
+// if ( pdev->dev.device_state == USB_OTG_EP0_DATA_IN)
+// {
+// if (ep->rem_data_len > ep->maxpacket)
+// {
+// ep->rem_data_len -= ep->maxpacket;
+// if (pdev->cfg.dma_enable == 1)
+// {
+// /* in slave mode this, is handled by the TxFifoEmpty ISR */
+// ep->xfer_buff += ep->maxpacket;
+// }
+// USBD_CtlContinueSendData (pdev,
+// ep->xfer_buff,
+// ep->rem_data_len);
+// }
+// else
+// { /* last packet is MPS multiple, so send ZLP packet */
+// if ((ep->total_data_len % ep->maxpacket == 0) &&
+// (ep->total_data_len >= ep->maxpacket) &&
+// (ep->total_data_len < ep->ctl_data_len ))
+// {
+
+// USBD_CtlContinueSendData(pdev , NULL, 0);
+// ep->ctl_data_len = 0;
+// }
+// else
+// {
+// if ((pdev->dev.class_cb->EP0_TxSent != NULL)&&
+// (pdev->dev.device_status == USB_OTG_CONFIGURED))
+// {
+// pdev->dev.class_cb->EP0_TxSent(pdev);
+// }
+// USBD_CtlReceiveStatus(pdev);
+// }
+// }
+// }
+// if (pdev->dev.test_mode == 1)
+// {
+// USBD_RunTestMode(pdev);
+// pdev->dev.test_mode = 0;
+// }
+ }
+ else if ((pdev->dev.class_cb->DataIn != NULL)&&
+ (pdev->dev.device_status == USB_OTG_CONFIGURED))
+ {
+ pdev->dev.class_cb->DataIn(pdev, epnum);
+ }
+ return USBD_OK;
+}
+
+
+
+void USBD_Init(USB_OTG_CORE_HANDLE *pdev,
+ USB_OTG_CORE_ID_TypeDef coreID,
+ USBD_DEVICE *pDevice,
+ USBD_Class_cb_TypeDef *class_cb,
+ USBD_Usr_cb_TypeDef *usr_cb)
+{
+
+ /* Hardware Init */
+ USBD_DeInit(pdev);
+
+ /*Register class and user callbacks */
+ pdev->dev.class_cb = class_cb;
+ pdev->dev.usr_cb = usr_cb;
+ pdev->dev.usr_device = pDevice;
+
+ /* set USB OTG core params */
+ DCD_Init(pdev, coreID);
+
+ /* Upon Init call usr callback */
+// pdev->dev.usr_cb->Init();
+
+
+
+}
+
+
+
+/**
+* @brief USBD_DeInit
+* Re-Initialize th device library
+* @param pdev: device instance
+* @retval status: status
+*/
+USBD_Status USBD_DeInit(USB_OTG_CORE_HANDLE *pdev)
+{
+ /* Software Init */
+
+ return USBD_OK;
+}
+
+
+static uint8_t USBD_Reset(USB_OTG_CORE_HANDLE *pdev)
+{
+ /* Open EP0 OUT */
+ DCD_EP_Open(pdev,
+ 0x00,
+ USB_OTG_MAX_EP0_SIZE,
+ EP_TYPE_CTRL);
+
+ /* Open EP0 IN */
+ DCD_EP_Open(pdev,
+ 0x80,
+ USB_OTG_MAX_EP0_SIZE,
+ EP_TYPE_CTRL);
+
+ /* Upon Reset call usr call back */
+ pdev->dev.device_status = USB_OTG_DEFAULT;
+ pdev->dev.usr_cb->DeviceReset(pdev->cfg.speed);
+
+ return USBD_OK;
+}
+
+/**
+* @brief USBD_Resume
+* Handle Resume event
+* @param pdev: device instance
+* @retval status
+*/
+
+static uint8_t USBD_Resume(USB_OTG_CORE_HANDLE *pdev)
+{
+ /* Upon Resume call usr call back */
+ pdev->dev.usr_cb->DeviceResumed();
+ pdev->dev.device_status = pdev->dev.device_old_status;
+ pdev->dev.device_status = USB_OTG_CONFIGURED;
+ return USBD_OK;
+}
+
+
+/**
+* @brief USBD_Suspend
+* Handle Suspend event
+* @param pdev: device instance
+* @retval status
+*/
+
+static uint8_t USBD_Suspend(USB_OTG_CORE_HANDLE *pdev)
+{
+ pdev->dev.device_old_status = pdev->dev.device_status;
+ pdev->dev.device_status = USB_OTG_SUSPENDED;
+ /* Upon Resume call usr call back */
+ pdev->dev.usr_cb->DeviceSuspended();
+ return USBD_OK;
+}
+
+
+/**
+* @brief USBD_SOF
+* Handle SOF event
+* @param pdev: device instance
+* @retval status
+*/
+
+static uint8_t USBD_SOF(USB_OTG_CORE_HANDLE *pdev)
+{
+ if (pdev->dev.class_cb->SOF)
+ {
+ pdev->dev.class_cb->SOF(pdev);
+ }
+ return USBD_OK;
+}
+/**
+* @brief USBD_SetCfg
+* Configure device and start the interface
+* @param pdev: device instance
+* @param cfgidx: configuration index
+* @retval status
+*/
+
+USBD_Status USBD_SetCfg(USB_OTG_CORE_HANDLE *pdev, uint8_t cfgidx)
+{
+ pdev->dev.class_cb->Init(pdev, cfgidx);
+
+ /* Upon set config call usr call back */
+ pdev->dev.usr_cb->DeviceConfigured();
+ return USBD_OK;
+}
+
+/**
+* @brief USBD_ClrCfg
+* Clear current configuration
+* @param pdev: device instance
+* @param cfgidx: configuration index
+* @retval status: USBD_Status
+*/
+USBD_Status USBD_ClrCfg(USB_OTG_CORE_HANDLE *pdev, uint8_t cfgidx)
+{
+ pdev->dev.class_cb->DeInit(pdev, cfgidx);
+ return USBD_OK;
+}
+
+/**
+* @brief USBD_IsoINIncomplete
+* Handle iso in incomplete event
+* @param pdev: device instance
+* @retval status
+*/
+static uint8_t USBD_IsoINIncomplete(USB_OTG_CORE_HANDLE *pdev)
+{
+ pdev->dev.class_cb->IsoINIncomplete(pdev);
+ return USBD_OK;
+}
+
+/**
+* @brief USBD_IsoOUTIncomplete
+* Handle iso out incomplete event
+* @param pdev: device instance
+* @retval status
+*/
+static uint8_t USBD_IsoOUTIncomplete(USB_OTG_CORE_HANDLE *pdev)
+{
+ pdev->dev.class_cb->IsoOUTIncomplete(pdev);
+ return USBD_OK;
+}
+
+#ifdef VBUS_SENSING_ENABLED
+/**
+* @brief USBD_DevConnected
+* Handle device connection event
+* @param pdev: device instance
+* @retval status
+*/
+static uint8_t USBD_DevConnected(USB_OTG_CORE_HANDLE *pdev)
+{
+ pdev->dev.usr_cb->DeviceConnected();
+ pdev->dev.connection_status = 1;
+ return USBD_OK;
+}
+
+/**
+* @brief USBD_DevDisconnected
+* Handle device disconnection event
+* @param pdev: device instance
+* @retval status
+*/
+static uint8_t USBD_DevDisconnected(USB_OTG_CORE_HANDLE *pdev)
+{
+ pdev->dev.usr_cb->DeviceDisconnected();
+ pdev->dev.class_cb->DeInit(pdev, 0);
+ pdev->dev.connection_status = 0;
+ return USBD_OK;
+}
+
+
+#endif
+
Index: yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_def.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_def.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_def.h (working copy)
@@ -0,0 +1,143 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usbd_def.h
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : general defines for the usb device library.
+ *****************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_DEF_H
+#define __USBD_DEF_H
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_conf.h"
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+/** @defgroup USB_DEF
+ * @brief general defines for the usb device library file
+ * @{
+ */
+
+/** @defgroup USB_DEF_Exported_Defines
+ * @{
+ */
+
+#ifndef NULL
+#define NULL 0
+#endif
+
+#define USB_LEN_DEV_QUALIFIER_DESC 0x0A
+#define USB_LEN_DEV_DESC 0x12
+#define USB_LEN_CFG_DESC 0x09
+#define USB_LEN_IF_DESC 0x09
+#define USB_LEN_EP_DESC 0x07
+#define USB_LEN_OTG_DESC 0x03
+
+#define USBD_IDX_LANGID_STR 0x00
+#define USBD_IDX_MFC_STR 0x01
+#define USBD_IDX_PRODUCT_STR 0x02
+#define USBD_IDX_SERIAL_STR 0x03
+#define USBD_IDX_CONFIG_STR 0x04
+#define USBD_IDX_INTERFACE_STR 0x05
+
+#define USB_REQ_TYPE_STANDARD 0x00
+#define USB_REQ_TYPE_CLASS 0x20
+#define USB_REQ_TYPE_VENDOR 0x40
+#define USB_REQ_TYPE_MASK 0x60
+
+#define USB_REQ_RECIPIENT_DEVICE 0x00
+#define USB_REQ_RECIPIENT_INTERFACE 0x01
+#define USB_REQ_RECIPIENT_ENDPOINT 0x02
+#define USB_REQ_RECIPIENT_MASK 0x03
+
+#define USB_REQ_GET_STATUS 0x00
+#define USB_REQ_CLEAR_FEATURE 0x01
+#define USB_REQ_SET_FEATURE 0x03
+#define USB_REQ_SET_ADDRESS 0x05
+#define USB_REQ_GET_DESCRIPTOR 0x06
+#define USB_REQ_SET_DESCRIPTOR 0x07
+#define USB_REQ_GET_CONFIGURATION 0x08
+#define USB_REQ_SET_CONFIGURATION 0x09
+#define USB_REQ_GET_INTERFACE 0x0A
+#define USB_REQ_SET_INTERFACE 0x0B
+#define USB_REQ_SYNCH_FRAME 0x0C
+
+#define USB_DESC_TYPE_DEVICE 1
+#define USB_DESC_TYPE_CONFIGURATION 2
+#define USB_DESC_TYPE_STRING 3
+#define USB_DESC_TYPE_INTERFACE 4
+#define USB_DESC_TYPE_ENDPOINT 5
+#define USB_DESC_TYPE_DEVICE_QUALIFIER 6
+#define USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION 7
+#define USB_DESC_TYPE_INTERFACE_POWER 8
+#define USB_DESC_TYPE_OTGTYPE 9
+
+#define USB_CONFIG_REMOTE_WAKEUP 2
+#define USB_CONFIG_SELF_POWERED 1
+
+#define USB_FEATURE_EP_HALT 0
+#define USB_FEATURE_REMOTE_WAKEUP 1
+#define USB_FEATURE_TEST_MODE 2
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DEF_Exported_TypesDefinitions
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+
+/** @defgroup USBD_DEF_Exported_Macros
+ * @{
+ */
+#define SWAPBYTE(addr) (((uint16_t)(*((uint8_t *)(addr)))) + \
+ (((uint16_t)(*(((uint8_t *)(addr)) + 1))) << 8))
+
+#define LOBYTE(x) ((uint8_t)(x & 0x00FF))
+#define HIBYTE(x) ((uint8_t)((x & 0xFF00) >>8))
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DEF_Exported_Variables
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DEF_Exported_FunctionsPrototype
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+#endif /* __USBD_DEF_H */
+
+/**
+ * @}
+ */
+
+/**
+* @}
+*/
+
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_ioreq.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_ioreq.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_ioreq.h (working copy)
@@ -0,0 +1,109 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usbd_ioreq.h
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : header file for the usbd_ioreq.c file.
+ *****************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+
+#ifndef __USBD_IOREQ_H_
+#define __USBD_IOREQ_H_
+
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_def.h"
+#include "usbd_core.h"
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+/** @defgroup USBD_IOREQ
+ * @brief header file for the usbd_ioreq.c file
+ * @{
+ */
+
+/** @defgroup USBD_IOREQ_Exported_Defines
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_IOREQ_Exported_Types
+ * @{
+ */
+
+
+/**
+ * @}
+ */
+
+
+
+/** @defgroup USBD_IOREQ_Exported_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_IOREQ_Exported_Variables
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_IOREQ_Exported_FunctionsPrototype
+ * @{
+ */
+
+USBD_Status USBD_CtlSendData (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t *buf,
+ uint16_t len);
+
+USBD_Status USBD_CtlContinueSendData (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t *pbuf,
+ uint16_t len);
+
+USBD_Status USBD_CtlPrepareRx (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t *pbuf,
+ uint16_t len);
+
+USBD_Status USBD_CtlContinueRx (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t *pbuf,
+ uint16_t len);
+
+USBD_Status USBD_CtlSendStatus (USB_OTG_CORE_HANDLE *pdev);
+
+USBD_Status USBD_CtlReceiveStatus (USB_OTG_CORE_HANDLE *pdev);
+
+uint16_t USBD_GetRxCount (USB_OTG_CORE_HANDLE *pdev ,
+ uint8_t epnum);
+
+/**
+ * @}
+ */
+
+#endif /* __USBD_IOREQ_H_ */
+
+/**
+ * @}
+ */
+
+/**
+* @}
+*/
+
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_ioreq.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_ioreq.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_ioreq.c (working copy)
@@ -0,0 +1,236 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usbd_ioreq.c
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : This file provides the IO requests APIs for control endpoints.
+ *****************************************************************************/
+
+/* Include ------------------------------------------------------------------*/
+#include "usbd_ioreq.h"
+/* Private typedef ----------------------------------------------------------*/
+/* Private define -----------------------------------------------------------*/
+/* Private macro ------------------------------------------------------------*/
+/* Private variables --------------------------------------------------------*/
+/* Ptivate function prototypes ----------------------------------------------*/
+
+/******************************************************************************
+* Function Name :
+* Description :
+* Input :
+* Output :
+* Return :
+******************************************************************************/
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+
+/** @defgroup USBD_IOREQ
+ * @brief control I/O requests module
+ * @{
+ */
+
+/** @defgroup USBD_IOREQ_Private_TypesDefinitions
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_IOREQ_Private_Defines
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_IOREQ_Private_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_IOREQ_Private_Variables
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_IOREQ_Private_FunctionPrototypes
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_IOREQ_Private_Functions
+ * @{
+ */
+
+/**
+* @brief USBD_CtlSendData
+* send data on the ctl pipe
+* @param pdev: device instance
+* @param buff: pointer to data buffer
+* @param len: length of data to be sent
+* @retval status
+*/
+USBD_Status USBD_CtlSendData (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t *pbuf,
+ uint16_t len)
+{
+ USBD_Status ret = USBD_OK;
+
+ pdev->dev.in_ep[0].total_data_len = len;
+ pdev->dev.in_ep[0].rem_data_len = len;
+ pdev->dev.device_state = USB_OTG_EP0_DATA_IN;
+
+ DCD_EP_Tx (pdev, 0, pbuf, len);
+
+ return ret;
+ }
+
+/**
+* @brief USBD_CtlContinueSendData
+* continue sending data on the ctl pipe
+* @param pdev: device instance
+* @param buff: pointer to data buffer
+* @param len: length of data to be sent
+* @retval status
+*/
+USBD_Status USBD_CtlContinueSendData (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t *pbuf,
+ uint16_t len)
+{
+ USBD_Status ret = USBD_OK;
+
+ DCD_EP_Tx (pdev, 0, pbuf, len);
+
+
+ return ret;
+}
+
+/**
+* @brief USBD_CtlPrepareRx
+* receive data on the ctl pipe
+* @param pdev: USB OTG device instance
+* @param buff: pointer to data buffer
+* @param len: length of data to be received
+* @retval status
+*/
+USBD_Status USBD_CtlPrepareRx (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t *pbuf,
+ uint16_t len)
+{
+ USBD_Status ret = USBD_OK;
+
+ pdev->dev.out_ep[0].total_data_len = len;
+ pdev->dev.out_ep[0].rem_data_len = len;
+ pdev->dev.device_state = USB_OTG_EP0_DATA_OUT;
+
+ DCD_EP_PrepareRx (pdev,
+ 0,
+ pbuf,
+ len);
+
+
+ return ret;
+ }
+
+/**
+* @brief USBD_CtlContinueRx
+* continue receive data on the ctl pipe
+* @param pdev: USB OTG device instance
+* @param buff: pointer to data buffer
+* @param len: length of data to be received
+* @retval status
+*/
+USBD_Status USBD_CtlContinueRx (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t *pbuf,
+ uint16_t len)
+{
+ USBD_Status ret = USBD_OK;
+
+ DCD_EP_PrepareRx (pdev,
+ 0,
+ pbuf,
+ len);
+ return ret;
+}
+/**
+* @brief USBD_CtlSendStatus
+* send zero lzngth packet on the ctl pipe
+* @param pdev: USB OTG device instance
+* @retval status
+*/
+USBD_Status USBD_CtlSendStatus (USB_OTG_CORE_HANDLE *pdev)
+{
+ USBD_Status ret = USBD_OK;
+ pdev->dev.device_state = USB_OTG_EP0_STATUS_IN;
+ DCD_EP_Tx (pdev,
+ 0,
+ NULL,
+ 0);
+
+// USB_OTG_EP0_OutStart(pdev);
+
+ return ret;
+}
+
+/**
+* @brief USBD_CtlReceiveStatus
+* receive zero lzngth packet on the ctl pipe
+* @param pdev: USB OTG device instance
+* @retval status
+*/
+USBD_Status USBD_CtlReceiveStatus (USB_OTG_CORE_HANDLE *pdev)
+{
+ USBD_Status ret = USBD_OK;
+ pdev->dev.device_state = USB_OTG_EP0_STATUS_OUT;
+ DCD_EP_PrepareRx ( pdev,
+ 0,
+ NULL,
+ 0);
+
+// USB_OTG_EP0_OutStart(pdev);
+
+ return ret;
+}
+
+
+/**
+* @brief USBD_GetRxCount
+* returns the received data length
+* @param pdev: USB OTG device instance
+* epnum: endpoint index
+* @retval Rx Data blength
+*/
+uint16_t USBD_GetRxCount (USB_OTG_CORE_HANDLE *pdev , uint8_t epnum)
+{
+ return pdev->dev.out_ep[epnum].xfer_count;
+}
+
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_pwr.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_pwr.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_pwr.h (working copy)
@@ -0,0 +1,65 @@
+/**
+ ******************************************************************************
+ * @file usbd_pwr.h
+ * @author MCD Application Team
+ * @version V1.0.1
+ * @date 31-January-2014
+ * @brief Header file for usbd_pwr.c
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2014 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_PWR_H__
+#define __USBD_PWR_H__
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_core.h"
+#include "usb_bsp.h"
+
+/* Exported defines ----------------------------------------------------------*/
+/* Exported types ------------------------------------------------------------*/
+typedef enum _RESUME_STATE
+{
+ RESUME_EXTERNAL,
+ RESUME_INTERNAL,
+#ifdef LPM_ENABLED
+ L1_RESUME_INTERNAL,
+#endif
+ RESUME_LATER,
+ RESUME_WAIT,
+ RESUME_START,
+ RESUME_ON,
+ RESUME_OFF,
+ RESUME_ESOF
+} RESUME_STATE;
+
+/* Exported macros -----------------------------------------------------------*/
+/* Exported variables --------------------------------------------------------*/
+extern USB_OTG_CORE_HANDLE USB_Device_dev;
+
+/* Exported functions ------------------------------------------------------- */
+void Suspend(void);
+void Resume_Init(void);
+void Resume(RESUME_STATE eResumeSetVal);
+void Leave_LowPowerMode(void);
+
+#endif /*__USBD_PWR_H__*/
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_req.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_req.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_req.h (working copy)
@@ -0,0 +1,93 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usbd_req.h
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : header file for the usbd_req.c file.
+ *****************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+
+#ifndef __USB_REQUEST_H_
+#define __USB_REQUEST_H_
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_def.h"
+#include "usbd_core.h"
+//#include "usbd_conf.h"
+#include "usbd_ioreq.h"
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+/** @defgroup USBD_REQ
+ * @brief header file for the usbd_ioreq.c file
+ * @{
+ */
+
+/** @defgroup USBD_REQ_Exported_Defines
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_REQ_Exported_Types
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+
+/** @defgroup USBD_REQ_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USBD_REQ_Exported_Variables
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USBD_REQ_Exported_FunctionsPrototype
+ * @{
+ */
+
+USBD_Status USBD_StdDevReq (USB_OTG_CORE_HANDLE *pdev, USB_SETUP_REQ *req);
+USBD_Status USBD_StdItfReq (USB_OTG_CORE_HANDLE *pdev, USB_SETUP_REQ *req);
+USBD_Status USBD_StdEPReq (USB_OTG_CORE_HANDLE *pdev, USB_SETUP_REQ *req);
+void USBD_ParseSetupRequest( USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req);
+
+void USBD_CtlError( USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req);
+
+void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len);
+/**
+ * @}
+ */
+
+#endif /* __USB_REQUEST_H_ */
+
+/**
+ * @}
+ */
+
+/**
+* @}
+*/
+
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_req.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_req.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_req.c (working copy)
@@ -0,0 +1,924 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usbd_req.c
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : This file provides the standard USB requests following chapter 9.
+ *****************************************************************************/
+
+/* Include ------------------------------------------------------------------*/
+#include "usbd_req.h"
+#include "usbd_ioreq.h"
+#include "usbd_desc.h"
+/* Private typedef ----------------------------------------------------------*/
+/* Private define -----------------------------------------------------------*/
+/* Private macro ------------------------------------------------------------*/
+/* Private variables --------------------------------------------------------*/
+/* Ptivate function prototypes ----------------------------------------------*/
+
+/******************************************************************************
+* Function Name :
+* Description :
+* Input :
+* Output :
+* Return :
+******************************************************************************/
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+
+/** @defgroup USBD_REQ
+ * @brief USB standard requests module
+ * @{
+ */
+
+/** @defgroup USBD_REQ_Private_TypesDefinitions
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_REQ_Private_Defines
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_REQ_Private_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_REQ_Private_Variables
+ * @{
+ */
+
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+__ALIGN_BEGIN uint32_t USBD_ep_status __ALIGN_END = 0;
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+__ALIGN_BEGIN uint32_t USBD_default_cfg __ALIGN_END = 0;
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+__ALIGN_BEGIN uint32_t USBD_cfg_status __ALIGN_END = 0;
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+__ALIGN_BEGIN uint8_t USBD_StrDesc[USB_MAX_STR_DESC_SIZ] __ALIGN_END ;
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_REQ_Private_FunctionPrototypes
+ * @{
+ */
+static void USBD_GetDescriptor(USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req);
+
+static void USBD_SetAddress(USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req);
+
+static void USBD_SetConfig(USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req);
+
+static void USBD_GetConfig(USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req);
+
+static void USBD_GetStatus(USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req);
+
+static void USBD_SetFeature(USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req);
+
+static void USBD_ClrFeature(USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req);
+
+static uint8_t USBD_GetLen(uint8_t *buf);
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_REQ_Private_Functions
+ * @{
+ */
+
+
+/**
+* @brief USBD_StdDevReq
+* Handle standard usb device requests
+* @param pdev: device instance
+* @param req: usb request
+* @retval status
+*/
+extern uint8_t SetAddress_Flag;
+extern uint8_t Address_Value;
+USBD_Status USBD_StdDevReq (USB_OTG_CORE_HANDLE *pdev, USB_SETUP_REQ *req)
+{
+ USBD_Status ret = USBD_OK;
+// USB_OTG_CSR0L_IN_PERIPHERAL_TypeDef csr0l;
+// csr0l.d8 = USB_OTG_READ_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L);
+
+ switch (req->bRequest)
+ {
+ case USB_REQ_GET_DESCRIPTOR:
+// csr0l.b.serviced_rxpktrdy = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ USBD_GetDescriptor (pdev, req);
+ break;
+
+ case USB_REQ_SET_ADDRESS:
+ SetAddress_Flag = 1;
+ Address_Value = (uint8_t)(req->wValue) & 0x7F;
+// csr0l.b.serviced_rxpktrdy = 1;
+// csr0l.b.data_end = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ USBD_SetAddress(pdev, req);
+ break;
+
+ case USB_REQ_SET_CONFIGURATION:
+// csr0l.b.serviced_rxpktrdy = 1;
+// csr0l.b.data_end = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ USBD_SetConfig (pdev , req);
+ break;
+
+ case USB_REQ_GET_CONFIGURATION:
+// csr0l.b.serviced_rxpktrdy = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ USBD_GetConfig (pdev , req);
+ break;
+
+ case USB_REQ_GET_STATUS:
+// csr0l.b.serviced_rxpktrdy = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ USBD_GetStatus (pdev , req);
+ break;
+
+
+ case USB_REQ_SET_FEATURE:
+// csr0l.b.serviced_rxpktrdy = 1;
+// csr0l.b.data_end = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ USBD_SetFeature (pdev , req);
+ break;
+
+ case USB_REQ_CLEAR_FEATURE:
+// csr0l.b.serviced_rxpktrdy = 1;
+// csr0l.b.data_end = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ USBD_ClrFeature (pdev , req);
+ break;
+ case USB_REQ_SET_DESCRIPTOR:
+// csr0l.b.serviced_rxpktrdy = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ break;
+ default:
+// csr0l.b.serviced_rxpktrdy = 1;
+// csr0l.b.data_end = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ USBD_CtlError(pdev , req);
+ break;
+ }
+
+ return ret;
+}
+
+/**
+* @brief USBD_StdItfReq
+* Handle standard usb interface requests
+* @param pdev: USB OTG device instance
+* @param req: usb request
+* @retval status
+*/
+USBD_Status USBD_StdItfReq (USB_OTG_CORE_HANDLE *pdev, USB_SETUP_REQ *req)
+{
+ USBD_Status ret = USBD_OK;
+// USB_OTG_CSR0L_IN_PERIPHERAL_TypeDef csr0l;
+// csr0l.d8 = USB_OTG_READ_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L);
+ switch (pdev->dev.device_status)
+ {
+ case USB_OTG_CONFIGURED:
+
+ if (LOBYTE(req->wIndex) <= USBD_ITF_MAX_NUM)
+ {
+// csr0l.b.serviced_rxpktrdy = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ pdev->dev.class_cb->Setup(pdev, req);
+// if (pdev->dev.out_ep[0].xfer_buff != pdev->dev.setup_packet)
+// {
+//// req->wLength = 0;
+// pdev->dev.out_ep[0].xfer_buff = pdev->dev.setup_packet;
+// pdev->dev.out_ep[0].xfer_count = 0;
+// pdev->dev.out_ep[0].xfer_len = 8;
+// }
+ if((req->wLength == 0)&& (ret == USBD_OK))
+ {
+ USBD_CtlSendStatus(pdev);
+ }
+ }
+ else
+ {
+// csr0l.b.serviced_rxpktrdy = 1;
+// csr0l.b.data_end = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ USBD_CtlError(pdev , req);
+ }
+ break;
+
+ default:
+// csr0l.b.serviced_rxpktrdy = 1;
+// csr0l.b.data_end = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ USBD_CtlError(pdev , req);
+ break;
+ }
+ return ret;
+}
+
+/**
+* @brief USBD_StdEPReq
+* Handle standard usb endpoint requests
+* @param pdev: USB OTG device instance
+* @param req: usb request
+* @retval status
+*/
+USBD_Status USBD_StdEPReq (USB_OTG_CORE_HANDLE *pdev, USB_SETUP_REQ *req)
+{
+
+ uint8_t ep_addr;
+ USBD_Status ret = USBD_OK;
+// USB_OTG_CSR0L_IN_PERIPHERAL_TypeDef csr0l;
+// csr0l.d8 = USB_OTG_READ_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L);
+ ep_addr = LOBYTE(req->wIndex);
+
+ switch (req->bRequest)
+ {
+ case USB_REQ_SET_FEATURE :
+// csr0l.b.serviced_rxpktrdy = 1;
+// csr0l.b.data_end = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ switch (pdev->dev.device_status)
+ {
+ case USB_OTG_ADDRESSED:
+ if ((ep_addr != 0x00) && (ep_addr != 0x80))
+ {
+ DCD_EP_Stall(pdev , ep_addr);
+ }
+ break;
+
+ case USB_OTG_CONFIGURED:
+ if (req->wValue == USB_FEATURE_EP_HALT)
+ {
+ if ((ep_addr != 0x00) && (ep_addr != 0x80))
+ {
+ DCD_EP_Stall(pdev , ep_addr);
+
+ }
+ }
+ pdev->dev.class_cb->Setup (pdev, req);
+ USBD_CtlSendStatus(pdev);
+
+ break;
+
+ default:
+ USBD_CtlError(pdev , req);
+ break;
+ }
+ break;
+
+ case USB_REQ_CLEAR_FEATURE :
+// csr0l.b.serviced_rxpktrdy = 1;
+// csr0l.b.data_end = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ switch (pdev->dev.device_status)
+ {
+ case USB_OTG_ADDRESSED:
+ if ((ep_addr != 0x00) && (ep_addr != 0x80))
+ {
+ DCD_EP_Stall(pdev , ep_addr);
+ }
+ break;
+
+ case USB_OTG_CONFIGURED:
+ if (req->wValue == USB_FEATURE_EP_HALT)
+ {
+ if ((ep_addr != 0x00) && (ep_addr != 0x80))
+ {
+// DCD_EP_ClrStall(pdev , ep_addr);
+ pdev->dev.class_cb->Setup (pdev, req);
+ }
+ USBD_CtlSendStatus(pdev);
+ }
+ break;
+
+ default:
+ USBD_CtlError(pdev , req);
+ break;
+ }
+ break;
+
+ case USB_REQ_GET_STATUS:
+// csr0l.b.serviced_rxpktrdy = 1;
+// csr0l.b.data_end = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ switch (pdev->dev.device_status)
+ {
+ case USB_OTG_ADDRESSED:
+ if ((ep_addr != 0x00) && (ep_addr != 0x80))
+ {
+ DCD_EP_Stall(pdev , ep_addr);
+ }
+ break;
+
+ case USB_OTG_CONFIGURED:
+
+
+ if ((ep_addr & 0x80)== 0x80)
+ {
+ if(pdev->dev.in_ep[ep_addr & 0x7F].is_stall)
+ {
+ USBD_ep_status = 0x0001;
+ }
+ else
+ {
+ USBD_ep_status = 0x0000;
+ }
+ }
+ else if ((ep_addr & 0x80)== 0x00)
+ {
+ if(pdev->dev.out_ep[ep_addr].is_stall)
+ {
+ USBD_ep_status = 0x0001;
+ }
+
+ else
+ {
+ USBD_ep_status = 0x0000;
+ }
+ }
+ USBD_CtlSendData (pdev,
+ (uint8_t *)&USBD_ep_status,
+ 2);
+ break;
+
+ default:
+ USBD_CtlError(pdev , req);
+ break;
+ }
+ break;
+
+ default:
+// csr0l.b.serviced_rxpktrdy = 1;
+// csr0l.b.data_end = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ break;
+ }
+ return ret;
+}
+/**
+* @brief USBD_GetDescriptor
+* Handle Get Descriptor requests
+* @param pdev: device instance
+* @param req: usb request
+* @retval status
+*/
+static void USBD_GetDescriptor(USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req)
+{
+ uint16_t len;
+ uint8_t *pbuf;
+// USB_OTG_CSR0L_IN_PERIPHERAL_TypeDef csr0l;
+// csr0l.d8 = USB_OTG_READ_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L);
+
+ switch (req->wValue >> 8)
+ {
+ case USB_DESC_TYPE_DEVICE:
+ pbuf = pdev->dev.usr_device->GetDeviceDescriptor(pdev->cfg.speed, &len);
+// if ((req->wLength == 64) ||( pdev->dev.device_status == USB_OTG_DEFAULT))
+// {
+// len = 8;
+// };
+ break;
+
+ case USB_DESC_TYPE_CONFIGURATION:
+ pbuf = (uint8_t *)pdev->dev.class_cb->GetConfigDescriptor(pdev->cfg.speed, &len);
+ #ifdef USB_OTG_HS_CORE
+ if((pdev->cfg.speed == USB_OTG_SPEED_FULL )&&
+ (pdev->cfg.phy_itface == USB_OTG_ULPI_PHY))
+ {
+ pbuf = (uint8_t *)pdev->dev.class_cb->GetOtherConfigDescriptor(pdev->cfg.speed, &len);
+ }
+ #endif
+ pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
+ pdev->dev.pConfig_descriptor = pbuf;
+ break;
+
+ case USB_DESC_TYPE_STRING:
+ switch ((uint8_t)(req->wValue))
+ {
+ case USBD_IDX_LANGID_STR:
+ pbuf = pdev->dev.usr_device->GetLangIDStrDescriptor(pdev->cfg.speed, &len);
+ break;
+
+ case USBD_IDX_MFC_STR:
+ pbuf = pdev->dev.usr_device->GetManufacturerStrDescriptor(pdev->cfg.speed, &len);
+ break;
+
+ case USBD_IDX_PRODUCT_STR:
+ pbuf = pdev->dev.usr_device->GetProductStrDescriptor(pdev->cfg.speed, &len);
+ break;
+
+ case USBD_IDX_SERIAL_STR:
+ pbuf = pdev->dev.usr_device->GetSerialStrDescriptor(pdev->cfg.speed, &len);
+ if(pdev->dev.device_status == USB_OTG_CONFIGURED)
+ pdev->dev.device_status_new =USB_OTG_END;
+ break;
+
+ case USBD_IDX_CONFIG_STR:
+ pbuf = pdev->dev.usr_device->GetConfigurationStrDescriptor(pdev->cfg.speed, &len);
+ break;
+
+ case USBD_IDX_INTERFACE_STR:
+ pbuf = pdev->dev.usr_device->GetInterfaceStrDescriptor(pdev->cfg.speed, &len);
+ break;
+
+ default:
+ #ifdef USB_SUPPORT_USER_STRING_DESC
+ pbuf = pdev->dev.class_cb->GetUsrStrDescriptor(pdev->cfg.speed, (req->wValue) , &len);
+ break;
+ #else
+ USBD_CtlError(pdev , req);
+ return;
+ #endif /* USBD_CtlError(pdev , req); */
+ }
+ break;
+ case USB_DESC_TYPE_DEVICE_QUALIFIER:
+ #ifdef USB_OTG_HS_CORE
+ if(pdev->cfg.speed == USB_OTG_SPEED_HIGH )
+ {
+
+ pbuf = (uint8_t *)pdev->dev.class_cb->GetConfigDescriptor(pdev->cfg.speed, &len);
+
+ USBD_DeviceQualifierDesc[4]= pbuf[14];
+ USBD_DeviceQualifierDesc[5]= pbuf[15];
+ USBD_DeviceQualifierDesc[6]= pbuf[16];
+
+ pbuf = USBD_DeviceQualifierDesc;
+ len = USB_LEN_DEV_QUALIFIER_DESC;
+ break;
+ }
+ else
+ {
+ USBD_CtlError(pdev , req);
+ return;
+ }
+ #else
+ USBD_CtlError(pdev , req);
+ return;
+ #endif
+
+ case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
+ #ifdef USB_OTG_HS_CORE
+
+ if(pdev->cfg.speed == USB_OTG_SPEED_HIGH )
+ {
+ pbuf = (uint8_t *)pdev->dev.class_cb->GetOtherConfigDescriptor(pdev->cfg.speed, &len);
+ pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
+ break;
+ }
+ else
+ {
+ USBD_CtlError(pdev , req);
+ return;
+ }
+ #else
+ USBD_CtlError(pdev , req);
+ return;
+ #endif
+
+
+ default:
+ USBD_CtlError(pdev , req);
+ return;
+ }
+
+ if((len != 0)&& (req->wLength != 0))
+ {
+
+ len = MIN(len , req->wLength);
+
+ USBD_CtlSendData (pdev,
+ pbuf,
+ len);
+
+ }
+
+}
+
+/**
+* @brief USBD_SetAddress
+* Set device address
+* @param pdev: device instance
+* @param req: usb request
+* @retval status
+*/
+static void USBD_SetAddress(USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req)
+{
+ uint8_t dev_addr;
+
+ if ((req->wIndex == 0) && (req->wLength == 0))
+ {
+ dev_addr = (uint8_t)(req->wValue) & 0x7F;
+
+ if (pdev->dev.device_status == USB_OTG_CONFIGURED)
+ {
+ USBD_CtlError(pdev , req);
+ }
+ else
+ {
+ pdev->dev.device_address = dev_addr;
+// DCD_EP_SetAddress(pdev, dev_addr);
+// USBD_CtlSendStatus(pdev);
+ USB_OTG_WRITE_REG8(&pdev->regs.CTRLREGS->FADDR,Address_Value);
+ USBD_CtlSendStatus(pdev);
+
+// MyPrintf("address = %x\n",Address_Value);
+
+ if (dev_addr != 0)
+ {
+ pdev->dev.device_status = USB_OTG_ADDRESSED;
+ }
+ else
+ {
+ pdev->dev.device_status = USB_OTG_DEFAULT;
+ }
+ }
+ }
+ else
+ {
+ USBD_CtlError(pdev , req);
+ }
+}
+
+/**
+* @brief USBD_SetConfig
+* Handle Set device configuration request
+* @param pdev: device instance
+* @param req: usb request
+* @retval status
+*/
+static void USBD_SetConfig(USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req)
+{
+
+ static uint8_t cfgidx;
+
+ cfgidx = (uint8_t)(req->wValue);
+
+ if (cfgidx > USBD_CFG_MAX_NUM )
+ {
+ USBD_CtlError(pdev , req);
+ }
+ else
+ {
+ switch (pdev->dev.device_status)
+ {
+ case USB_OTG_ADDRESSED:
+ if (cfgidx)
+ {
+ pdev->dev.device_config = cfgidx;
+ pdev->dev.device_status = USB_OTG_CONFIGURED;
+ USBD_SetCfg(pdev , cfgidx);
+ USBD_CtlSendStatus(pdev);
+ }
+ else
+ {
+ USBD_CtlSendStatus(pdev);
+ }
+ break;
+
+ case USB_OTG_CONFIGURED:
+ if (cfgidx == 0)
+ {
+ pdev->dev.device_status = USB_OTG_ADDRESSED;
+ pdev->dev.device_config = cfgidx;
+ USBD_ClrCfg(pdev , cfgidx);
+ USBD_CtlSendStatus(pdev);
+
+ }
+ else if (cfgidx != pdev->dev.device_config)
+ {
+ /* Clear old configuration */
+ USBD_ClrCfg(pdev , pdev->dev.device_config);
+
+ /* set new configuration */
+ pdev->dev.device_config = cfgidx;
+ USBD_SetCfg(pdev , cfgidx);
+ USBD_CtlSendStatus(pdev);
+ }
+ else
+ {
+ USBD_CtlSendStatus(pdev);
+ }
+ break;
+
+ default:
+ USBD_CtlError(pdev , req);
+ break;
+ }
+ }
+}
+
+/**
+* @brief USBD_GetConfig
+* Handle Get device configuration request
+* @param pdev: device instance
+* @param req: usb request
+* @retval status
+*/
+static void USBD_GetConfig(USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req)
+{
+
+ if (req->wLength != 1)
+ {
+ USBD_CtlError(pdev , req);
+ }
+ else
+ {
+ switch (pdev->dev.device_status )
+ {
+ case USB_OTG_ADDRESSED:
+
+ USBD_CtlSendData (pdev,
+ (uint8_t *)&USBD_default_cfg,
+ 1);
+ break;
+
+ case USB_OTG_CONFIGURED:
+
+ USBD_CtlSendData (pdev,
+ &pdev->dev.device_config,
+ 1);
+ break;
+
+ default:
+ USBD_CtlError(pdev , req);
+ break;
+ }
+ }
+}
+
+/**
+* @brief USBD_GetStatus
+* Handle Get Status request
+* @param pdev: device instance
+* @param req: usb request
+* @retval status
+*/
+static void USBD_GetStatus(USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req)
+{
+
+
+ switch (pdev->dev.device_status)
+ {
+ case USB_OTG_ADDRESSED:
+ case USB_OTG_CONFIGURED:
+
+ #ifdef USBD_SELF_POWERED
+ USBD_cfg_status = USB_CONFIG_SELF_POWERED;
+ #else
+ USBD_cfg_status = 0x00;
+ #endif
+
+ if (pdev->dev.DevRemoteWakeup)
+ {
+ USBD_cfg_status |= USB_CONFIG_REMOTE_WAKEUP;
+ }
+
+ USBD_CtlSendData (pdev,
+ (uint8_t *)&USBD_cfg_status,
+ 2);
+ break;
+
+ default :
+ USBD_CtlError(pdev , req);
+ break;
+ }
+}
+
+
+/**
+* @brief USBD_SetFeature
+* Handle Set device feature request
+* @param pdev: device instance
+* @param req: usb request
+* @retval status
+*/
+static void USBD_SetFeature(USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req)
+{
+
+// USB_OTG_TESTMODE_TypeDef dctl;
+// uint8_t test_mode = 0;
+
+ if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
+ {
+ pdev->dev.DevRemoteWakeup = 1;
+ pdev->dev.class_cb->Setup (pdev, req);
+ USBD_CtlSendStatus(pdev);
+ USB_OTG_ActiveRemoteWakeup(pdev);
+ }
+
+// else if ((req->wValue == USB_FEATURE_TEST_MODE) &&
+// ((req->wIndex & 0xFF) == 0))
+// {
+ // dctl.d8 = USB_OTG_READ_REG8(&pdev->regs.COMMREGS->TESTMODE);
+// dctl.d8 = 0;
+// test_mode = req->wIndex >> 8;
+// switch (test_mode)
+// {
+// case 1: // TEST_SE0_NAK
+// dctl.b.test_SE0_NAK = 1;
+// break;
+//
+// case 2: // TEST_J
+// dctl.b.test_J = 1;
+// break;
+//
+// case 3: // TEST_K
+// dctl.b.test_K = 1;
+// break;
+//
+// case 4: // TEST_PACKET
+// dctl.b.test_packet = 1;
+// break;
+//
+// case 5: // TEST_FORCE_ENABLE
+// dctl.b.force_FS = 1;
+// dctl.b.force_host = 1; /* Full-speed Host */
+// break;
+// }
+// SET_TEST_MODE = dctl;
+// pdev->dev.test_mode = 1;
+// USBD_CtlSendStatus(pdev);
+// }
+
+}
+
+
+/**
+* @brief USBD_ClrFeature
+* Handle clear device feature request
+* @param pdev: device instance
+* @param req: usb request
+* @retval status
+*/
+static void USBD_ClrFeature(USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req)
+{
+ switch (pdev->dev.device_status)
+ {
+ case USB_OTG_ADDRESSED:
+ case USB_OTG_CONFIGURED:
+ if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
+ {
+ pdev->dev.DevRemoteWakeup = 0;
+ pdev->dev.class_cb->Setup (pdev, req);
+ USBD_CtlSendStatus(pdev);
+ }
+ break;
+
+ default :
+ USBD_CtlError(pdev , req);
+ break;
+ }
+}
+
+/**
+* @brief USBD_ParseSetupRequest
+* Copy buffer into setup structure
+* @param pdev: device instance
+* @param req: usb request
+* @retval None
+*/
+
+void USBD_ParseSetupRequest( USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req)
+{
+ req->bmRequest = *(uint8_t *) (pdev->dev.setup_packet);
+ req->bRequest = *(uint8_t *) (pdev->dev.setup_packet + 1);
+ req->wValue = SWAPBYTE (pdev->dev.setup_packet + 2);
+ req->wIndex = SWAPBYTE (pdev->dev.setup_packet + 4);
+ req->wLength = SWAPBYTE (pdev->dev.setup_packet + 6);
+
+ pdev->dev.in_ep[0].ctl_data_len = req->wLength ;
+ pdev->dev.device_state = USB_OTG_EP0_SETUP;
+// MyPrintf("req ->bmRequest =%x\n",*(uint8_t *) (pdev->dev.setup_packet));
+}
+
+/**
+* @brief USBD_CtlError
+* Handle USB low level Error
+* @param pdev: device instance
+* @param req: usb request
+* @retval None
+*/
+
+void USBD_CtlError( USB_OTG_CORE_HANDLE *pdev,
+ USB_SETUP_REQ *req)
+{
+
+// DCD_EP_Stall(pdev , 0x80);
+ DCD_EP_Stall(pdev , 0);
+}
+
+
+/**
+ * @brief USBD_GetString
+ * Convert Ascii string into unicode one
+ * @param desc : descriptor buffer
+ * @param unicode : Formatted string buffer (unicode)
+ * @param len : descriptor length
+ * @retval None
+ */
+void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
+{
+ uint8_t idx = 0;
+
+ if (desc != NULL)
+ {
+ *len = USBD_GetLen(desc) * 2 + 2;
+ unicode[idx++] = *len;
+ unicode[idx++] = USB_DESC_TYPE_STRING;
+
+ while (*desc != 0)
+ {
+ unicode[idx++] = *desc++;
+ unicode[idx++] = 0x00;
+ }
+ }
+}
+
+/**
+ * @brief USBD_GetLen
+ * return the string length
+ * @param buf : pointer to the ascii string buffer
+ * @retval string length
+ */
+static uint8_t USBD_GetLen(uint8_t *buf)
+{
+ uint8_t len = 0;
+
+ while (*buf != 0)
+ {
+ len++;
+ buf++;
+ }
+
+ return len;
+}
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_usr.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_usr.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/SCPU_USB_Device_Library/core/usbd_usr.h (working copy)
@@ -0,0 +1,130 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usbd_usr.h
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : Header file for usbd_usr.c.
+ *****************************************************************************/
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_USR_H__
+#define __USBD_USR_H__
+
+
+
+#include
+#include "yc3121.h"
+//#include "yc_drv_common.h"
+//#include "systick.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_core.h"
+
+
+/** @addtogroup USBD_USER
+ * @{
+ */
+
+/** @addtogroup USBD_MSC_DEMO_USER_CALLBACKS
+ * @{
+ */
+
+/** @defgroup USBD_USR
+ * @brief This file is the Header file for usbd_usr.c
+ * @{
+ */
+
+
+/** @defgroup USBD_USR_Exported_Types
+ * @{
+ */
+
+extern USBD_Usr_cb_TypeDef USRD_cb;
+extern USBD_Usr_cb_TypeDef USR_FS_cb;
+extern USBD_Usr_cb_TypeDef USR_HS_cb;
+
+
+
+/**
+ * @}
+ */
+
+
+
+/** @defgroup USBD_USR_Exported_Defines
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_USR_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USBD_USR_Exported_Variables
+ * @{
+ */
+
+void USBD_USR_Init(void);
+void USBD_USR_DeviceReset (uint8_t speed);
+void USBD_USR_DeviceConfigured (void);
+void USBD_USR_DeviceSuspended(void);
+void USBD_USR_DeviceResumed(void);
+
+void USBD_USR_DeviceConnected(void);
+void USBD_USR_DeviceDisconnected(void);
+
+void USBD_USR_FS_Init(void);
+void USBD_USR_FS_DeviceReset (uint8_t speed);
+void USBD_USR_FS_DeviceConfigured (void);
+void USBD_USR_FS_DeviceSuspended(void);
+void USBD_USR_FS_DeviceResumed(void);
+
+void USBD_USR_FS_DeviceConnected(void);
+void USBD_USR_FS_DeviceDisconnected(void);
+
+void USBD_USR_HS_Init(void);
+void USBD_USR_HS_DeviceReset (uint8_t speed);
+void USBD_USR_HS_DeviceConfigured (void);
+void USBD_USR_HS_DeviceSuspended(void);
+void USBD_USR_HS_DeviceResumed(void);
+
+void USBD_USR_HS_DeviceConnected(void);
+void USBD_USR_HS_DeviceDisconnected(void);
+void my_delay_ms(int ms);
+
+/**
+ * @}
+ */
+
+/** @defgroup USBD_USR_Exported_FunctionsPrototype
+ * @{
+ */
+/**
+ * @}
+ */
+
+#endif /*__USBD_USR_H__*/
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/libraries/harward_Der/Usb_dcd.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/Usb_dcd.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/Usb_dcd.c (working copy)
@@ -0,0 +1,258 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usb_dcd.c
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : Peripheral Device Interface layer.
+ *****************************************************************************/
+
+/* Include ------------------------------------------------------------------*/
+#include "usb_dcd.h"
+#include "usb_bsp.h"
+
+
+
+
+void DCD_Init(USB_OTG_CORE_HANDLE *pdev ,
+ USB_OTG_CORE_ID_TypeDef coreID)
+{
+ uint32_t i;
+ USB_OTG_EP *ep;
+ /* Set Register Address */
+ USB_OTG_SelectCore (pdev , coreID);
+
+// /* Force_FS */
+// pdev->regs.COMMREGS->TESTMODE |= BIT5;
+
+ pdev->dev.device_status = USB_OTG_DEFAULT;
+ pdev->dev.device_address = 0;
+
+ /* Init ep structure */
+ for (i = 0; i < pdev->cfg.dev_endpoints; i++)
+ {
+ ep = &pdev->dev.in_ep[i];
+ /* Init ep structure */
+ ep->is_in = 1;
+ ep->num = i;
+ ep->tx_fifo_num = i;
+ /* Control until ep is actvated */
+ ep->type = EP_TYPE_CTRL;
+ ep->maxpacket = USB_OTG_MAX_EP0_SIZE;
+ ep->xfer_buff = 0;
+ ep->xfer_len = 0;
+ }
+
+ for (i = 0; i < pdev->cfg.dev_endpoints; i++)
+ {
+ ep = &pdev->dev.out_ep[i];
+ /* Init ep structure */
+ ep->is_in = 0;
+ ep->num = i;
+ ep->tx_fifo_num = i;
+ /* Control until ep is activated */
+ ep->type = EP_TYPE_CTRL;
+ ep->maxpacket = USB_OTG_MAX_EP0_SIZE;
+ ep->xfer_buff = 0;
+ ep->xfer_len = 0;
+ }
+
+
+ /* Init the Core (common init.) */
+ USB_OTG_CoreInit(pdev);
+
+// /* Force Device Mode*/
+ USB_OTG_SetCurrentMode(pdev, DEVICE_MODE);
+
+
+// /* Init Device */
+// USB_OTG_CoreInitDev(pdev);
+
+}
+
+
+
+/**
+* @brief Configure an EP
+* @param pdev : Device instance
+* @param epdesc : Endpoint Descriptor
+* @retval : status
+*/
+uint32_t DCD_EP_Open(USB_OTG_CORE_HANDLE *pdev ,
+ uint8_t ep_addr,
+ uint16_t ep_mps,
+ uint8_t ep_type)
+{
+ USB_OTG_EP *ep;
+
+ if ((ep_addr & 0x80) == 0x80)
+ {
+ ep = &pdev->dev.in_ep[ep_addr & 0x7F];
+ }
+ else
+ {
+ ep = &pdev->dev.out_ep[ep_addr & 0x7F];
+ }
+ ep->num = ep_addr & 0x7F;
+
+ ep->is_in = (0x80 & ep_addr) != 0;
+ ep->maxpacket = ep_mps;
+ ep->type = ep_type;
+ if (ep->is_in)
+ {
+ /* Assign a Tx FIFO */
+ ep->tx_fifo_num = ep->num;
+ }
+ /* Set initial data PID. */
+ if (ep_type == USB_OTG_EP_BULK )
+ {
+ ep->data_pid_start = 0;
+ }
+ USB_OTG_EPActivate(pdev , ep );
+ return 0;
+}
+/**
+* @brief called when an EP is disabled
+* @param pdev: device instance
+* @param ep_addr: endpoint address
+* @retval : status
+*/
+uint32_t DCD_EP_Close(USB_OTG_CORE_HANDLE *pdev , uint8_t ep_addr)
+{
+ USB_OTG_EP *ep;
+
+ if ((ep_addr&0x80) == 0x80)
+ {
+ ep = &pdev->dev.in_ep[ep_addr & 0x7F];
+ }
+ else
+ {
+ ep = &pdev->dev.out_ep[ep_addr & 0x7F];
+ }
+ ep->num = ep_addr & 0x7F;
+ ep->is_in = (0x80 & ep_addr) ;
+ USB_OTG_EPDeactivate(pdev , ep );
+ return 0;
+}
+
+
+
+/**
+* @brief DCD_EP_PrepareRx
+* @param pdev: device instance
+* @param ep_addr: endpoint address
+* @param pbuf: pointer to Rx buffer
+* @param buf_len: data length
+* @retval : status
+*/
+uint32_t DCD_EP_PrepareRx( USB_OTG_CORE_HANDLE *pdev,
+ uint8_t ep_addr,
+ uint8_t *pbuf,
+ uint16_t buf_len)
+{
+ USB_OTG_EP *ep;
+
+ ep = &pdev->dev.out_ep[ep_addr & 0x7F];
+
+ /*setup and start the Xfer */
+ ep->xfer_buff = pbuf;
+ ep->xfer_len = buf_len;
+ ep->xfer_count = 0;
+ ep->is_in = 0;
+ ep->num = ep_addr & 0x7F;
+
+ if (pdev->cfg.dma_enable == 1)
+ {
+ ep->dma_addr = (uint32_t)pbuf;
+ }
+
+
+ if ( ep->num == 0 )
+ {
+ USB_OTG_EP0StartXfer(pdev , ep);
+ }
+ else
+ {
+
+ USB_OTG_EPStartXfer(pdev, ep );
+ }
+ return 0;
+}
+
+
+/**
+* @brief Transmit data over USB
+* @param pdev: device instance
+* @param ep_addr: endpoint address
+* @param pbuf: pointer to Tx buffer
+* @param buf_len: data length
+* @retval : status
+*/
+uint32_t DCD_EP_Tx ( USB_OTG_CORE_HANDLE *pdev,
+ uint8_t ep_addr,
+ uint8_t *pbuf,
+ uint32_t buf_len)
+{
+ USB_OTG_EP *ep;
+
+ ep = &pdev->dev.in_ep[ep_addr & 0x7F];
+
+ /* Setup and start the Transfer */
+ ep->is_in = 1;
+ ep->num = ep_addr & 0x7F;
+ ep->xfer_buff = pbuf;
+// ep->dma_addr = (uint32_t)pbuf;
+ ep->xfer_count = 0;
+ ep->xfer_len = buf_len;
+
+ if ( ep->num == 0 )
+ {
+ USB_OTG_EP0StartXfer(pdev , ep);
+ }
+ else
+ {
+ USB_OTG_EPStartXfer(pdev, ep );
+ }
+ return 0;
+}
+
+
+
+
+
+
+/**
+* @brief Stall an endpoint.
+* @param pdev: device instance
+* @param epnum: endpoint address
+* @retval : status
+*/
+
+uint32_t DCD_EP_Stall (USB_OTG_CORE_HANDLE *pdev, uint8_t epnum)
+{
+ USB_OTG_EP *ep;
+ if ((0x80 & epnum) == 0x80)
+ {
+ ep = &pdev->dev.in_ep[epnum & 0x7F];
+ }
+ else
+ {
+ ep = &pdev->dev.out_ep[epnum];
+ }
+
+ ep->is_stall = 1;
+ ep->num = epnum & 0x7F;
+ ep->is_in = ((epnum & 0x80) == 0x80);
+
+ USB_OTG_EPSetStall(pdev , ep);
+ return (0);
+}
+
+
+
+
+
+
+
+
+
+
Index: yc_usb/libraries/harward_Der/Usb_dcd_init.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/Usb_dcd_init.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/Usb_dcd_init.c (working copy)
@@ -0,0 +1,384 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usb_dcd_int.c
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : Peripheral Device interrupt subroutines.
+ *****************************************************************************/
+
+/* Include ------------------------------------------------------------------*/
+#include "usb_dcd_int.h"
+#include "usb_defines.h"
+#include "usbd_desc.h"
+#include "yc_timer.h"
+//#include "usbd_ccid_core.h"
+#include "usbd_usr.h"
+//#include "systick.h"
+//#include "usb_std.h"
+/** @addtogroup USB_OTG_DRIVER
+* @{
+*/
+
+/** @defgroup USB_DCD_INT
+* @brief This file contains the interrupt subroutines for the Device mode.
+* @{
+*/
+
+
+/** @defgroup USB_DCD_INT_Private_Defines
+* @{
+*/
+/**
+* @}
+*/
+
+/* Interrupt Handlers */
+static uint32_t DCD_HandleInEP_ISR(USB_OTG_CORE_HANDLE *pdev, uint16_t ep_intr);
+static uint32_t DCD_HandleOutEP_ISR(USB_OTG_CORE_HANDLE *pdev, uint16_t ep_intr);
+uint32_t DCD_HandleUsbReset_ISR();
+
+void _delay_(uint32_t t)
+{
+ ((void(*)())(0xc6+1))(t);
+}
+
+/**
+* @brief USBD_OTG_ISR_Handler
+* handles all USB Interrupts
+* @param pdev: device instance
+* @retval status
+*/
+
+extern USBD_DCD_INT_cb_TypeDef USBD_DCD_INT_cb;
+uint8_t setup_cnt =0;
+uint8_t SetAddress_Flag = 0;
+uint8_t Address_Value = 0;
+uint8_t out0_data_len=0;
+uint32_t USBD_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev)
+{
+ USB_OTG_IRQ1_TypeDef gintr_status;
+ USB_OTG_trig_TypeDef trig;
+ USB_OTG_IRQ2_TypeDef fifo_empty_irq;
+
+
+ uint32_t retval = 0;
+ USB_OTG_EP *ep;
+ uint8_t rx_DataLength = 0;
+ if (USB_OTG_IsDeviceMode(pdev)) /* ensure that we are in device mode */
+ {
+ gintr_status.d8 = USB_OTG_READ_REG8(&(pdev ->regs.STATUSEGS ->STATUS));
+ fifo_empty_irq.d8 = USB_OTG_READ_REG8(&pdev ->regs.STATUSEGS ->EMPTY);
+// MyPrintf("\n%x",gintr_status.d8);
+// MyPrintf("empty =%x\n",fifo_empty_irq.d8 );
+// MyPrintf(" status =%x\n",(&(pdev ->regs.STATUSEGS ->STATUS)));
+ if(! gintr_status.d8)
+ return 0;
+
+
+// if (gintr_status.b.suspend)
+// {
+// retval |= DCD_HandleUSBSuspend_ISR(pdev);
+// }
+// if(gintr_status.b.nak)
+// {
+// retval |= DCD_HandleSof_ISR(pdev);
+// }
+ if(gintr_status.b.reset)
+ {
+ retval |= DCD_HandleUsbReset_ISR(pdev);
+ }
+ USB_OTG_WRITE_REG8(&pdev->regs.STATUSEGS ->STATUS, 0xe0);
+
+ if(gintr_status.d8 &0x0E)
+ {
+ // MyPrintf("bulkout\r\n");
+ retval |= DCD_HandleOutEP_ISR(pdev, gintr_status.d8 &0x0E);
+ USB_OTG_WRITE_REG8(&pdev->regs.STATUSEGS ->STATUS, gintr_status.d8 &0x0E);
+ }
+
+ if(gintr_status.b.outep0_irq)
+ {
+ USB_OTG_WRITE_REG8(&pdev->regs.STATUSEGS ->STATUS, 0x11);
+ if (SetAddress_Flag)
+ {
+ USB_OTG_MODIFY_REG8(&pdev->regs.CTRLREGS->FADDR,0,0x80);
+ SetAddress_Flag = 0;
+// MyPrintf("set address \n");
+ }
+ if(gintr_status.b.setup)
+ {
+ delay_ms(1);
+// MyPrintf("cnt = %d\n",setup_cnt);
+// MyPrintf("YICHIP SCPU USB CCID setup packet start .\n");
+// USB_OTG_WRITE_REG8(&pdev->regs.STATUSEGS ->STATUS, 0x11);
+ rx_DataLength = USB_OTG_READ_REG8(pdev->regs.LENREGS[0]);
+// MyPrintf("len =%d\n",rx_DataLength );
+ if ((rx_DataLength < pdev->dev.out_ep[0].maxpacket) || \
+ (pdev->dev.out_ep[0].xfer_count + rx_DataLength == pdev->dev.out_ep[0].xfer_len))
+ {
+ /* Copy the setup packet received in FIFO into the setup buffer in RAM */
+ USB_OTG_ReadPacket(pdev ,
+ pdev->dev.out_ep[0].xfer_buff + pdev->dev.out_ep[0].xfer_count,
+ 0,
+ USB_SETUP_PACKET_LEN);
+ pdev->dev.out_ep[0].xfer_count =0;
+ if (pdev->dev.out_ep[0].xfer_buff != pdev->dev.setup_packet)
+ {
+// if (pdev->dev.out_ep[0].xfer_len == 7)
+// {
+// csr0l.b.serviced_rxpktrdy = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+
+ pdev->dev.out_ep[0].xfer_buff = pdev->dev.setup_packet;
+ pdev->dev.out_ep[0].xfer_count = 0;
+ pdev->dev.out_ep[0].xfer_len = 8;
+// /* RX COMPLETE */
+// USBD_DCD_INT_fops->DataOutStage(pdev , 0);
+// pdev->dev.device_state = USB_OTG_EP0_STATUS_IN;
+// DCD_EP_Tx (pdev,
+// 0,
+// NULL,
+// 0);
+// /* RX COMPLETE */
+// USBD_DCD_INT_fops->DataOutStage(pdev , 0);
+// }
+ }
+ else{
+ /* deal with receive setup packet */
+// MyPrintf("req ->bmRequest =%x\n",*(uint8_t *) (pdev->dev.setup_packet));
+ if(rx_DataLength >USB_SETUP_PACKET_LEN)
+ {
+ out0_data_len = rx_DataLength -USB_SETUP_PACKET_LEN;
+ }
+ USBD_DCD_INT_fops->SetupStage(pdev);
+// MyPrintf("setup packet receive.\n");
+ }
+ }
+ else{
+ /* Copy the setup packet received in FIFO into the setup buffer in RAM */
+ USB_OTG_ReadPacket(pdev ,
+// pdev->dev.setup_packet + pdev->dev.out_ep[0].xfer_count,
+ pdev->dev.out_ep[0].xfer_buff + pdev->dev.out_ep[0].xfer_count,
+ 0,
+ rx_DataLength);
+ pdev->dev.out_ep[0].xfer_count += rx_DataLength;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L, csr0l.d8);
+ }
+ }
+
+
+ //ep0 dispose
+
+ }
+
+// if(gintr_status.d8 &0x0E)
+// {
+// MyPrintf("bulkout\r\n");
+// retval |= DCD_HandleOutEP_ISR(pdev, gintr_status.d8 &0x0E);
+// USB_OTG_WRITE_REG8(&pdev->regs.STATUSEGS ->STATUS, gintr_status.d8 &0x0E);
+// }
+
+ // tx
+ if(fifo_empty_irq.d8 &0x0F)
+ {
+ _delay_(300);
+ retval |= DCD_HandleInEP_ISR(pdev, fifo_empty_irq.d8 &0x0F);
+ USB_OTG_WRITE_REG8(&pdev->regs.STATUSEGS ->EMPTY, fifo_empty_irq.d8 &0xFF);
+ USB_OTG_WRITE_REG8(&pdev->regs.STATUSEGS ->FULL, 0xFF);
+
+// MyPrintf("fifo empty irq.\n");
+ }
+// if(fifo_empty_irq.d8 &0xF0)
+// {
+// MyPrintf("outfifo empty irq.\n");
+// retval |= DCD_HandleOutEP_ISR(pdev,fifo_empty_irq.d8 &0x20);
+// USB_OTG_WRITE_REG8(&pdev->regs.STATUSEGS ->EMPTY, fifo_empty_irq.d8 &0xF0);
+// }
+ }
+ return retval;
+}
+
+
+/**
+* @brief DCD_HandleInEP_ISR
+* Indicates that an IN EP has a pending Interrupt
+* @param pdev: device instance
+* @retval status
+*/
+static uint32_t DCD_HandleInEP_ISR(USB_OTG_CORE_HANDLE *pdev, uint16_t ep_intr)
+{
+ USB_OTG_EP *ep;
+ uint16_t epnum = 0;
+
+ while ( ep_intr )
+ {
+ ep = &pdev->dev.in_ep[epnum];
+ /* Setup and start the Transfer */
+ ep->is_in = 1;
+ ep->num = epnum;
+ if (ep_intr & 0x01) /* In ITR */
+ {
+ if (pdev->dev.in_ep[epnum].rem_data_len == 0)
+ {
+
+ if(pdev->dev.zero_replay_flag )
+ {
+ USB_OTG_EPReply_Zerolen(pdev,ep);
+ pdev->dev.zero_replay_flag =0;
+ }
+ return 0;
+ }
+ else
+ {
+ if (pdev->dev.in_ep[epnum].xfer_len - pdev->dev.in_ep[epnum].xfer_count >= pdev->dev.in_ep[epnum].maxpacket)
+ {
+// MyPrintf("tg\n\r");
+ USB_OTG_WritePacket (pdev,
+ pdev->dev.in_ep[epnum].xfer_buff + pdev->dev.in_ep[epnum].xfer_count,
+ epnum,
+ pdev->dev.in_ep[epnum].maxpacket);
+ USB_OTG_TRIG(pdev ,ep );
+ pdev->dev.in_ep[epnum].xfer_count += pdev->dev.in_ep[epnum].maxpacket;
+ pdev->dev.in_ep[epnum].rem_data_len = pdev->dev.in_ep[epnum].xfer_len - pdev->dev.in_ep[epnum].xfer_count;
+ pdev->dev.zero_replay_flag =1;
+// txcsrl.b.tx_pkt_rdy = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L,txcsrl.d8);
+// USB_OTG_TRIG(pdev ,ep );
+// MyPrintf("tx xfer go on.\n\r");
+ }
+ else
+ {
+// MyPrintf("tc\n\r");
+ USB_OTG_WritePacket (pdev,
+ pdev->dev.in_ep[epnum].xfer_buff + pdev->dev.in_ep[epnum].xfer_count,
+ epnum,
+ pdev->dev.in_ep[epnum].xfer_len - pdev->dev.in_ep[epnum].xfer_count);
+ USB_OTG_TRIG(pdev ,ep );
+ pdev->dev.in_ep[epnum].xfer_count = pdev->dev.in_ep[epnum].xfer_len;
+ pdev->dev.in_ep[epnum].rem_data_len = 0;
+// txcsrl.b.tx_pkt_rdy = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L,txcsrl.d8);
+ /* TX COMPLETE */
+ USBD_DCD_INT_fops->DataInStage(pdev , epnum);
+ pdev->dev.zero_replay_flag =0;
+// USB_OTG_TRIG(pdev ,ep );
+// MyPrintf("tx xfer continue.\n\r");
+
+ }
+ }
+ }
+
+ epnum++;
+ ep_intr >>= 1;
+ }
+ return 1;
+}
+
+
+/**
+* @brief DCD_HandleOutEP_ISR
+* Indicates that an OUT EP has a pending Interrupt
+* @param pdev: device instance
+* @retval status
+*/
+static uint32_t DCD_HandleOutEP_ISR(USB_OTG_CORE_HANDLE *pdev, uint16_t ep_intr)
+{
+// USB_OTG_DEPXFRSIZ_TypeDef deptsiz;
+// USB_OTG_EP_LENREGS rx_count;
+ uint32_t epnum = 1;
+ uint8_t rx_count;
+ ep_intr >>= 1;
+ while ( ep_intr )
+ {
+ if (ep_intr & 0x1)
+ {
+ rx_count = USB_OTG_READ_REG8(&pdev ->regs.LENREGS[epnum]);
+ if (rx_count )
+ {
+ USBD_DCD_INT_fops->DataOutStage(pdev , epnum);
+ }
+
+// {
+// USB_OTG_ReadPacket (pdev,
+// pdev->dev.out_ep[epnum].xfer_buff + pdev->dev.out_ep[epnum].xfer_count,
+// epnum,
+// pdev->dev.out_ep[epnum].maxpacket);
+// pdev->dev.out_ep[epnum].xfer_count += pdev->dev.out_ep[epnum].maxpacket;
+ // rxcsrl.b.rx_pkt_rdy = 0;
+// USB_OTG_WRITE_REG8(&pdev->regs.CSRREGS[epnum]->RXCSRL,rxcsrl.d8);
+// if (pdev->dev.out_ep[epnum].xfer_count >= pdev->dev.out_ep[epnum].xfer_len)
+// {
+// MyPrintf(" Enter USBD_DCD_INT_fops->DataOutStage(pdev , epnum);\r\n");
+// /* RX COMPLETE */
+// USBD_DCD_INT_fops->DataOutStage(pdev , epnum);
+// }
+// }
+// else
+// {
+// USB_OTG_ReadPacket (pdev,
+// pdev->dev.out_ep[epnum].xfer_buff + pdev->dev.out_ep[epnum].xfer_count,
+// epnum,
+// rx_count);
+// pdev->dev.out_ep[epnum].xfer_count += rx_count;
+// if (pdev->dev.out_ep[epnum].xfer_len >= pdev->dev.out_ep[epnum].xfer_count)
+// {
+// pdev->dev.out_ep[epnum].xfer_len = pdev->dev.out_ep[epnum].xfer_count;
+// }
+// else
+// {
+// pdev->dev.out_ep[epnum].xfer_count = pdev->dev.out_ep[epnum].xfer_len;
+// }
+// // rxcsrl.b.rx_pkt_rdy = 0;
+// // USB_OTG_WRITE_REG8(&pdev->regs.CSRREGS[epnum]->RXCSRL, rxcsrl.d8);
+// /* RX COMPLETE */
+// USBD_DCD_INT_fops->DataOutStage(pdev , epnum);
+// }
+
+ }
+ /* Endpoint disable */
+ epnum++;
+ ep_intr >>= 1;
+ }
+ return 1;
+}
+
+
+
+/**
+* @brief DCD_HandleUsbReset_ISR
+* This interrupt occurs when a USB Reset is detected
+* @param pdev: device instance
+* @retval status
+*/
+extern USB_OTG_CORE_HANDLE USB_OTG_dev;
+static uint32_t DCD_HandleUsbReset_ISR()
+{
+
+ USB_OTG_WRITE_REG8(CORE_USB_ADDR,0x00);
+ USB_OTG_WRITE_REG8(CORE_USB_STATUS,0xFF);
+// MyPrintf("YICHIP SCPU USB CCID demo V1.0. reset \n");
+ return 1;
+}
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Index: yc_usb/libraries/harward_Der/Usb_regs.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/Usb_regs.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/Usb_regs.h (working copy)
@@ -0,0 +1,312 @@
+
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usb_regs.h
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : USB OTG IP hardware registers.
+ *****************************************************************************/
+
+
+#ifndef __USB_OTG_REGS_H__
+#define __USB_OTG_REGS_H__
+
+#include "yc3121.h"
+//#define USB_HID_DEMO_TEST 1
+//#define POWER_FROM_USB 1
+//#define USB_HID_MS_DEMO 1
+
+
+#define CORE_USB_CONFIG USB_BASEADDR
+#define CORE_USB_INT_MASK(x) (USB_BASEADDR + 1 + x)
+#define CORE_USB_ADDR (USB_BASEADDR + 4)
+#define CORE_USB_TRIG (USB_BASEADDR + 0x10)
+#define CORE_USB_STALL (USB_BASEADDR + 0x11)
+#define CORE_USB_CLEAR (USB_BASEADDR + 0x12)
+#define CORE_USB_EP(x) (USB_BASEADDR + 0x18 + x)
+#define CORE_USB_EP_LEN(x) (USB_BASEADDR + 0x20 + x)
+#define CORE_USB_STALL_STATUS (USB_BASEADDR + 0x25)
+#define CORE_USB_STATUS (USB_BASEADDR + 0x26)
+#define CORE_USB_FIFO_EMPTY (USB_BASEADDR + 0x27)
+#define CORE_USB_FIFO_FULL (USB_BASEADDR + 0x28)
+#define USB_SOFCNT (USB_BASEADDR + 0x29)
+#define USB_SOFCNTHI (USB_BASEADDR + 0x2a)
+
+
+
+
+#define USB_OTG_FS_BASE_ADDR CORE_USB_CONFIG
+#define NUM_EP_FIFO 4
+#define USB_OTG_EP_FIFO_REG_OFFSET 0x0001
+
+#define USB_OTG_MAX_TX_FIFOS 15
+
+#define USB_OTG_HS_MAX_PACKET_SIZE 512
+#define USB_OTG_FS_MAX_PACKET_SIZE 64
+#define USB_OTG_MAX_EP0_SIZE 64
+
+
+
+
+typedef struct _USB_OTG_CTRLREGS
+{
+ volatile uint8_t USB_CTL;
+ volatile uint8_t IRQ_MASK1;
+ volatile uint8_t IRQ_MASK2;
+ volatile uint8_t IRQ_MASK3;
+ volatile uint8_t FADDR;
+
+}USB_OTG_CTRLREGS;
+typedef struct _USB_OTG_XFERCTL
+{
+ volatile uint8_t TRIG;
+ volatile uint8_t STALL;
+ volatile uint8_t TOGGLE;
+}USB_OTG_XFERCTL;
+
+typedef struct _USB_OTG_EPREGS
+{
+ volatile uint8_t EP0;
+ volatile uint8_t EP1;
+ volatile uint8_t EP2;
+ volatile uint8_t EP3;
+
+}USB_OTG_EPREGS;
+
+typedef struct _USB_OTG_EP_LENREGS
+{
+ volatile uint8_t EP0_LEN;
+ volatile uint8_t EP1_LEN;
+ volatile uint8_t EP2_LEN;
+ volatile uint8_t EP3_LEN;
+
+}USB_OTG_EP_LENREGS;
+
+typedef struct _USB_OTG_STATUSREGS
+{
+ volatile uint8_t STALL_STATUS;
+ volatile uint8_t STATUS;
+ volatile uint8_t EMPTY;
+ volatile uint8_t FULL;
+}USB_OTG_STATUSREGS;
+
+
+
+
+
+
+typedef struct
+{
+ USB_OTG_CTRLREGS *CTRLREGS;
+ USB_OTG_XFERCTL *xferctl;
+ uint8_t *ep[NUM_EP_FIFO];
+ uint8_t *LENREGS[NUM_EP_FIFO];
+ USB_OTG_STATUSREGS *STATUSEGS;
+
+}USB_OTG_CORE_REGS, *PUSB_OTG_CORE_REGS;
+
+
+
+
+typedef union _USB_OTG_CTL_TypeDef
+{
+ uint8_t d8;
+ struct
+ {
+ uint8_t enable_iso_outep2 :1;
+ uint8_t enable_iso_inep2 :1;
+ uint8_t pad_bias_ctl :2;
+ uint8_t enable_usb_function :1;
+ uint8_t speed :1;
+ uint8_t resume :1;
+ uint8_t wakeup_enable :1;
+
+ }b;
+
+
+}USB_OTG_CTL_TypeDef;
+
+
+typedef union _USB_OTG_IRQ_MASK1_TypeDef
+{
+ uint8_t d8;
+ struct
+ {
+ uint8_t outep0_irq_mask :1;
+ uint8_t outep1_irq_mask :1;
+ uint8_t outep2_irq_mask :1;
+ uint8_t outep3_irq_mask :1;
+ uint8_t setup_mask :1;
+ uint8_t suspend_mask :1;
+ uint8_t nak_mask :1;
+ uint8_t stall_mask :1;
+ } b;
+
+} USB_OTG_IRQ_MASK1_TypeDef;
+
+
+typedef union _USB_OTG_IRQ_MASK2_TypeDef
+{
+ uint8_t d8;
+ struct
+ {
+ uint8_t inep0_empty_irq_mask :1;
+ uint8_t inep1_empty_irq_mask :1;
+ uint8_t inep2_empty_irq_mask :1;
+ uint8_t inep3_empty_irq_mask :1;
+ uint8_t outep0_empty_irq_mask :1;
+ uint8_t outep1_empty_irq_mask :1;
+ uint8_t outep2_empty_irq_mask :1;
+ uint8_t outep3_empty_irq_mask :1;
+ }b;
+
+}USB_OTG_IRQ_MASK2_TypeDef;
+
+
+
+typedef union _USB_OTG_IRQ_MASK3_TypeDef
+{
+ uint8_t d8;
+ struct
+ {
+ uint8_t inep0_full_irq_mask :1;
+ uint8_t inep1_full_irq_mask :1;
+ uint8_t inep2_full_irq_mask :1;
+ uint8_t inep3_full_irq_mask :1;
+ uint8_t outep0_full_irq_mask :1;
+ uint8_t outep1_full_irq_mask :1;
+ uint8_t outep2_full_irq_mask :1;
+ uint8_t outep3_full_irq_mask :1;
+ }b;
+
+}USB_OTG_IRQ_MASK3_TypeDef;
+
+
+
+
+
+typedef union _USB_OTG_trig_TypeDef
+{
+ uint8_t d8;
+ struct
+ {
+ uint8_t send_ep0_data :1;
+ uint8_t send_ep1_data :1;
+ uint8_t send_ep2_data :1;
+ uint8_t send_ep3_data :1;
+ uint8_t reply_endpiont0_zero_packet :1;
+ uint8_t reply_endpiont1_zero_packet :1;
+ uint8_t reply_endpiont2_zero_packet :1;
+ uint8_t reply_endpiont3_zero_packet :1;
+ }b;
+
+}USB_OTG_trig_TypeDef;
+
+
+typedef union _USB_OTG_stall_TypeDef
+{
+ uint8_t d8;
+ struct
+ {
+ uint8_t ep0_stall :1;
+ uint8_t inep1_stall :1;
+ uint8_t outep1_stall :1;
+ uint8_t inep2_stall :1;
+ uint8_t outep2_stall :1;
+ uint8_t inep3_stall :1;
+ uint8_t outep3_stall :1;
+ uint8_t reserved :1;
+ }b;
+
+}USB_OTG_stall_TypeDef;
+
+typedef union _USB_OTG_toggle_TypeDef
+{
+ uint8_t d8;
+ struct
+ {
+ uint8_t clear_inep1_to_data0 :1;
+ uint8_t clear_outep1_to_data0 :1;
+ uint8_t clear_inep2_to_data0 :1;
+ uint8_t clear_outep2_to_data0 :1;
+ uint8_t clear_inep3_to_data0 :1;
+ uint8_t clear_outep3_to_data0 :1;
+ uint8_t usb_reset1 :1;
+ uint8_t usb_reset2 :1;
+ }b;
+
+}USB_OTG_toggle_TypeDef;
+
+typedef union _USB_OTG_stall_status_TypeDef
+{
+ uint8_t d8;
+ struct
+ {
+ uint8_t ep0_is_stall :1;
+ uint8_t inep1_is_stall :1;
+ uint8_t outep1_is_stall :1;
+ uint8_t inep2_is_stall :1;
+ uint8_t outep2_is_stall :1;
+ uint8_t inep3_is_stall :1;
+ uint8_t outep3_is_stall :1;
+ uint8_t reserved :1;
+ }b;
+
+}USB_OTG_stall_status_TypeDef;
+
+typedef union _USB_OTG_IRQ1_TypeDef
+{
+ uint8_t d8;
+ struct
+ {
+ uint8_t outep0_irq :1;
+ uint8_t outep1_irq :1;
+ uint8_t outep2_irq :1;
+ uint8_t outep3_irq :1;
+ uint8_t setup :1;
+ uint8_t suspend :1;
+ uint8_t nak :1;
+ uint8_t reset :1;
+ }b;
+
+}USB_OTG_IRQ1_TypeDef;
+
+typedef union _USB_OTG_IRQ2_TypeDef
+{
+ uint8_t d8;
+ struct
+ {
+ uint8_t inep0_empty_irq :1;
+ uint8_t inep1_empty_irq :1;
+ uint8_t inep2_empty_irq :1;
+ uint8_t inep3_empty_irq :1;
+ uint8_t outep0_empty_irq :1;
+ uint8_t outep1_empty_irq :1;
+ uint8_t outep2_empty_irq :1;
+ uint8_t outep3_empty_irq :1;
+ }b;
+
+}USB_OTG_IRQ2_TypeDef;
+
+
+
+typedef union _USB_OTG_IRQ3_TypeDef
+{
+ uint8_t d8;
+ struct
+ {
+ uint8_t inep0_full_irq :1;
+ uint8_t inep1_full_irq :1;
+ uint8_t inep2_full_irq :1;
+ uint8_t inep3_full_irq :1;
+ uint8_t outep0_full_irq :1;
+ uint8_t outep1_full_irq :1;
+ uint8_t outep2_full_irq :1;
+ uint8_t outep3_full_irq :1;
+ }b;
+
+}USB_OTG_IRQ3_TypeDef;
+
+
+#endif /* __USB_OTG_REGS_H__ */
+
Index: yc_usb/libraries/harward_Der/usb_bsp.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_bsp.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_bsp.h (working copy)
@@ -0,0 +1,89 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usb_bsp.h
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : Specific api's relative to the used hardware platform.
+ *****************************************************************************/
+
+
+#ifndef __USB_BSP_H__
+#define __USB_BSP_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Include ------------------------------------------------------------------*/
+#include "usb_core.h"
+#include "usb_conf.h"
+/* Exported types -----------------------------------------------------------*/
+/* Exported constants -------------------------------------------------------*/
+/* Exported macro -----------------------------------------------------------*/
+/* Exported functions -------------------------------------------------------*/
+/* Exported variables -------------------------------------------------------*/
+/** @addtogroup USB_OTG_DRIVER
+ * @{
+ */
+
+/** @defgroup USB_BSP
+ * @brief This file is the
+ * @{
+ */
+
+
+/** @defgroup USB_BSP_Exported_Defines
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_BSP_Exported_Types
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_BSP_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_BSP_Exported_Variables
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_BSP_Exported_FunctionsPrototype
+ * @{
+ */
+void BSP_Init(void);
+
+void USB_OTG_BSP_Init (USB_OTG_CORE_HANDLE *pdev);
+void USB_OTG_BSP_uDelay (const uint32_t usec);
+void USB_OTG_BSP_mDelay (const uint32_t msec);
+void USB_OTG_BSP_EnableInterrupt (USB_OTG_CORE_HANDLE *pdev);
+#ifdef USE_HOST_MODE
+void USB_OTG_BSP_ConfigVBUS(USB_OTG_CORE_HANDLE *pdev);
+void USB_OTG_BSP_DriveVBUS(USB_OTG_CORE_HANDLE *pdev,uint8_t state);
+#endif
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_BSP_H__ */
+
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/libraries/harward_Der/usb_conf_template.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_conf_template.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_conf_template.h (working copy)
@@ -0,0 +1,289 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usb_conf.h
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : General low level driver configuration.
+ *****************************************************************************/
+
+
+#ifndef __USB_CONF_H__
+#define __USB_CONF_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Include ------------------------------------------------------------------*/
+#include "usb_conf.h"
+/* Exported types -----------------------------------------------------------*/
+/* Exported constants -------------------------------------------------------*/
+/* Exported macro -----------------------------------------------------------*/
+/* Exported functions -------------------------------------------------------*/
+/* Exported variables -------------------------------------------------------*/
+/** @addtogroup USB_OTG_DRIVER
+ * @{
+ */
+
+/** @defgroup USB_CONF
+ * @brief USB low level driver configuration file
+ * @{
+ */
+
+/** @defgroup USB_CONF_Exported_Defines
+ * @{
+ */
+
+/* USB Core and PHY interface configuration.
+ Tip: To avoid modifying these defines each time you need to change the USB
+ configuration, you can declare the needed define in your toolchain
+ compiler preprocessor.
+ */
+/****************** USB OTG FS PHY CONFIGURATION *******************************
+* The USB OTG FS Core supports one on-chip Full Speed PHY.
+*
+* The USE_EMBEDDED_PHY symbol is defined in the project compiler preprocessor
+* when FS core is used.
+*******************************************************************************/
+#ifndef USE_USB_OTG_FS
+ //#define USE_USB_OTG_FS
+#endif /* USE_USB_OTG_FS */
+
+#ifdef USE_USB_OTG_FS
+ #define USB_OTG_FS_CORE
+#endif
+
+/****************** USB OTG HS PHY CONFIGURATION *******************************
+* The USB OTG HS Core supports two PHY interfaces:
+* (i) An ULPI interface for the external High Speed PHY: the USB HS Core will
+* operate in High speed mode
+* (ii) An on-chip Full Speed PHY: the USB HS Core will operate in Full speed mode
+*
+* You can select the PHY to be used using one of these two defines:
+* (i) USE_ULPI_PHY: if the USB OTG HS Core is to be used in High speed mode
+* (ii) USE_EMBEDDED_PHY: if the USB OTG HS Core is to be used in Full speed mode
+*
+* Notes:
+* - The USE_ULPI_PHY symbol is defined in the project compiler preprocessor as
+* default PHY when HS core is used.
+* - On STM322xG-EVAL and STM324xG-EVAL boards, only configuration(i) is available.
+* Configuration (ii) need a different hardware, for more details refer to your
+* STM32 device datasheet.
+*******************************************************************************/
+#ifndef USE_USB_OTG_HS
+ //#define USE_USB_OTG_HS
+#endif /* USE_USB_OTG_HS */
+
+#ifndef USE_ULPI_PHY
+ //#define USE_ULPI_PHY
+#endif /* USE_ULPI_PHY */
+
+#ifndef USE_EMBEDDED_PHY
+ //#define USE_EMBEDDED_PHY
+#endif /* USE_EMBEDDED_PHY */
+
+#ifdef USE_USB_OTG_HS
+ #define USB_OTG_HS_CORE
+#endif
+
+/*******************************************************************************
+* FIFO Size Configuration in Device mode
+*
+* (i) Receive data FIFO size = RAM for setup packets +
+* OUT endpoint control information +
+* data OUT packets + miscellaneous
+* Space = ONE 32-bits words
+* --> RAM for setup packets = 10 spaces
+* (n is the nbr of CTRL EPs the device core supports)
+* --> OUT EP CTRL info = 1 space
+* (one space for status information written to the FIFO along with each
+* received packet)
+* --> data OUT packets = (Largest Packet Size / 4) + 1 spaces
+* (MINIMUM to receive packets)
+* --> OR data OUT packets = at least 2*(Largest Packet Size / 4) + 1 spaces
+* (if high-bandwidth EP is enabled or multiple isochronous EPs)
+* --> miscellaneous = 1 space per OUT EP
+* (one space for transfer complete status information also pushed to the
+* FIFO with each endpoint's last packet)
+*
+* (ii)MINIMUM RAM space required for each IN EP Tx FIFO = MAX packet size for
+* that particular IN EP. More space allocated in the IN EP Tx FIFO results
+* in a better performance on the USB and can hide latencies on the AHB.
+*
+* (iii) TXn min size = 16 words. (n : Transmit FIFO index)
+* (iv) When a TxFIFO is not used, the Configuration should be as follows:
+* case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes)
+* --> Txm can use the space allocated for Txn.
+* case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes)
+* --> Txn should be configured with the minimum space of 16 words
+* (v) The FIFO is used optimally when used TxFIFOs are allocated in the top
+* of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
+*******************************************************************************/
+
+/*******************************************************************************
+* FIFO Size Configuration in Host mode
+*
+* (i) Receive data FIFO size = (Largest Packet Size / 4) + 1 or
+* 2x (Largest Packet Size / 4) + 1, If a
+* high-bandwidth channel or multiple isochronous
+* channels are enabled
+*
+* (ii) For the host nonperiodic Transmit FIFO is the largest maximum packet size
+* for all supported nonperiodic OUT channels. Typically, a space
+* corresponding to two Largest Packet Size is recommended.
+*
+* (iii) The minimum amount of RAM required for Host periodic Transmit FIFO is
+* the largest maximum packet size for all supported periodic OUT channels.
+* If there is at least one High Bandwidth Isochronous OUT endpoint,
+* then the space must be at least two times the maximum packet size for
+* that channel.
+*******************************************************************************/
+
+/****************** USB OTG HS CONFIGURATION **********************************/
+#ifdef USB_OTG_HS_CORE
+ #define RX_FIFO_HS_SIZE 512
+ #define TX0_FIFO_HS_SIZE 512
+ #define TX1_FIFO_HS_SIZE 512
+ #define TX2_FIFO_HS_SIZE 0
+ #define TX3_FIFO_HS_SIZE 0
+ #define TX4_FIFO_HS_SIZE 0
+ #define TX5_FIFO_HS_SIZE 0
+ #define TXH_NP_HS_FIFOSIZ 96
+ #define TXH_P_HS_FIFOSIZ 96
+
+// #define USB_OTG_HS_LOW_PWR_MGMT_SUPPORT
+// #define USB_OTG_HS_SOF_OUTPUT_ENABLED
+
+// #define USB_OTG_INTERNAL_VBUS_ENABLED
+ #define USB_OTG_EXTERNAL_VBUS_ENABLED
+
+ #ifdef USE_ULPI_PHY
+ #define USB_OTG_ULPI_PHY_ENABLED
+ #endif
+ #ifdef USE_EMBEDDED_PHY
+ #define USB_OTG_EMBEDDED_PHY_ENABLED
+ #endif
+// #define USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #define USB_OTG_HS_DEDICATED_EP1_ENABLED
+#endif
+
+/****************** USB OTG FS CONFIGURATION **********************************/
+#ifdef USB_OTG_FS_CORE
+ #define RX_FIFO_FS_SIZE 128
+ #define TX0_FIFO_FS_SIZE 64
+ #define TX1_FIFO_FS_SIZE 128
+ #define TX2_FIFO_FS_SIZE 0
+ #define TX3_FIFO_FS_SIZE 0
+ #define TXH_NP_HS_FIFOSIZ 96
+ #define TXH_P_HS_FIFOSIZ 96
+
+// #define USB_OTG_FS_LOW_PWR_MGMT_SUPPORT
+// #define USB_OTG_FS_SOF_OUTPUT_ENABLED
+#endif
+
+/****************** USB OTG MISC CONFIGURATION ********************************/
+//#define VBUS_SENSING_ENABLED
+
+/****************** USB OTG MODE CONFIGURATION ********************************/
+//#define USE_HOST_MODE
+#define USE_DEVICE_MODE
+//#define USE_OTG_MODE
+
+#ifndef USB_OTG_FS_CORE
+ #ifndef USB_OTG_HS_CORE
+ #error "USB_OTG_HS_CORE or USB_OTG_FS_CORE should be defined"
+ #endif
+#endif
+
+#ifndef USE_DEVICE_MODE
+ #ifndef USE_HOST_MODE
+ #error "USE_DEVICE_MODE or USE_HOST_MODE should be defined"
+ #endif
+#endif
+
+#ifndef USE_USB_OTG_HS
+ #ifndef USE_USB_OTG_FS
+ #error "USE_USB_OTG_HS or USE_USB_OTG_FS should be defined"
+ #endif
+#else //USE_USB_OTG_HS
+ #ifndef USE_ULPI_PHY
+ #ifndef USE_EMBEDDED_PHY
+ #error "USE_ULPI_PHY or USE_EMBEDDED_PHY should be defined"
+ #endif
+ #endif
+#endif
+
+/****************** C Compilers dependant keywords ****************************/
+/* In HS mode and when the DMA is used, all variables and data structures dealing
+ with the DMA during the transaction process should be 4-bytes aligned */
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined (__GNUC__) /* GNU Compiler */
+ #define __ALIGN_END __attribute__ ((aligned (4)))
+ #define __ALIGN_BEGIN
+ #else
+ #define __ALIGN_END
+ #if defined (__CC_ARM) /* ARM Compiler */
+ #define __ALIGN_BEGIN __align(4)
+ #elif defined (__ICCARM__) /* IAR Compiler */
+ #define __ALIGN_BEGIN
+ #elif defined (__TASKING__) /* TASKING Compiler */
+ #define __ALIGN_BEGIN __align(4)
+ #endif /* __CC_ARM */
+ #endif /* __GNUC__ */
+#else
+ #define __ALIGN_BEGIN
+ #define __ALIGN_END
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+
+/* __packed keyword used to decrease the data type alignment to 1-byte */
+#if defined (__CC_ARM) /* ARM Compiler */
+ #define __packed __packed
+#elif defined (__ICCARM__) /* IAR Compiler */
+ #define __packed __packed
+#elif defined ( __GNUC__ ) /* GNU Compiler */
+ #define __packed __attribute__ ((__packed__))
+#elif defined (__TASKING__) /* TASKING Compiler */
+ #define __packed __unaligned
+#endif /* __CC_ARM */
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_CONF_Exported_Types
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_CONF_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_Variables
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_FunctionsPrototype
+ * @{
+ */
+/**
+ * @}
+ */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_CONF_H__ */
+
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/libraries/harward_Der/usb_core.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_core.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_core.h (working copy)
@@ -0,0 +1,412 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usbd_core.h
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : Specific api's relative to the used hardware platform.
+ *****************************************************************************/
+
+
+#ifndef __USB_CORE_H__
+#define __USB_CORE_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Include ------------------------------------------------------------------*/
+#include "usb_regs.h"
+#include "usb_conf.h"
+#include "usb_defines.h"
+/* Exported types -----------------------------------------------------------*/
+/* Exported constants -------------------------------------------------------*/
+/* Exported macro -----------------------------------------------------------*/
+/* Exported functions -------------------------------------------------------*/
+/* Exported variables -------------------------------------------------------*/
+/** @addtogroup USB_OTG_DRIVER
+ * @{
+ */
+
+/** @defgroup USB_CORE
+ * @brief usb otg driver core layer
+ * @{
+ */
+
+
+/** @defgroup USB_CORE_Exported_Defines
+ * @{
+ */
+
+#define USB_OTG_EP0_IDLE 0
+#define USB_OTG_EP0_SETUP 1
+#define USB_OTG_EP0_DATA_IN 2
+#define USB_OTG_EP0_DATA_OUT 3
+#define USB_OTG_EP0_STATUS_IN 4
+#define USB_OTG_EP0_STATUS_OUT 5
+#define USB_OTG_EP0_STALL 6
+
+#define USB_OTG_EP_TX_DIS 0x0000
+#define USB_OTG_EP_TX_STALL 0x0010
+#define USB_OTG_EP_TX_NAK 0x0020
+#define USB_OTG_EP_TX_VALID 0x0030
+
+#define USB_OTG_EP_RX_DIS 0x0000
+#define USB_OTG_EP_RX_STALL 0x1000
+#define USB_OTG_EP_RX_NAK 0x2000
+#define USB_OTG_EP_RX_VALID 0x3000
+/**
+ * @}
+ */
+#define MAX_DATA_LENGTH 0x200
+
+
+/** @defgroup USB_CORE_Exported_Types
+ * @{
+ */
+
+
+typedef enum {
+ USB_OTG_OK = 0,
+ USB_OTG_FAIL
+}USB_OTG_STS;
+
+typedef enum {
+ HC_IDLE = 0,
+ HC_XFRC,
+ HC_HALTED,
+ HC_NAK,
+ HC_NYET,
+ HC_STALL,
+ HC_XACTERR,
+ HC_BBLERR,
+ HC_DATATGLERR,
+}HC_STATUS;
+
+typedef enum {
+ URB_IDLE = 0,
+ URB_DONE,
+ URB_NOTREADY,
+ URB_ERROR,
+ URB_STALL
+}URB_STATE;
+
+typedef enum {
+ CTRL_START = 0,
+ CTRL_XFRC,
+ CTRL_HALTED,
+ CTRL_NAK,
+ CTRL_STALL,
+ CTRL_XACTERR,
+ CTRL_BBLERR,
+ CTRL_DATATGLERR,
+ CTRL_FAIL
+}CTRL_STATUS;
+
+
+typedef struct USB_OTG_hc
+{
+ uint8_t dev_addr ;
+ uint8_t ep_num;
+ uint8_t ep_is_in;
+ uint8_t speed;
+ uint8_t do_ping;
+ uint8_t ep_type;
+ uint16_t max_packet;
+ uint8_t data_pid;
+ uint8_t *xfer_buff;
+ uint32_t xfer_len;
+ uint32_t xfer_count;
+ uint8_t toggle_in;
+ uint8_t toggle_out;
+ uint32_t dma_addr;
+}
+USB_OTG_HC , *PUSB_OTG_HC;
+
+typedef struct USB_OTG_ep
+{
+ uint8_t num;
+ uint8_t is_in;
+ uint8_t is_stall;
+ uint8_t type;
+ uint8_t data_pid_start;
+ uint8_t even_odd_frame;
+ uint8_t tx_fifo_num;
+ uint8_t maxpacket;
+ /* transaction level variables*/
+ uint8_t *xfer_buff;
+ uint32_t dma_addr;
+ uint8_t xfer_len;
+ uint8_t xfer_count;
+ /* Transfer level variables*/
+ uint8_t rem_data_len;
+ uint8_t total_data_len;
+ uint8_t ctl_data_len;
+
+}
+USB_OTG_EP , *PUSB_OTG_EP;
+
+typedef struct USB_OTG_core_cfg
+{
+ uint8_t host_channels;
+ uint8_t dev_endpoints;
+ uint8_t speed;
+ uint8_t dma_enable;
+ uint16_t mps;
+ uint16_t TotalFifoSize;
+ uint8_t phy_itface;
+ uint8_t Sof_output;
+ uint8_t low_power;
+ uint8_t coreID;
+
+}
+USB_OTG_CORE_CFGS, *PUSB_OTG_CORE_CFGS;
+
+
+
+typedef struct usb_setup_req {
+
+ uint8_t bmRequest;
+ uint8_t bRequest;
+ uint16_t wValue;
+ uint16_t wIndex;
+ uint16_t wLength;
+} USB_SETUP_REQ;
+
+typedef struct _Device_TypeDef
+{
+ uint8_t *(*GetDeviceDescriptor)( uint8_t speed , uint16_t *length);
+ uint8_t *(*GetLangIDStrDescriptor)( uint8_t speed , uint16_t *length);
+ uint8_t *(*GetManufacturerStrDescriptor)( uint8_t speed , uint16_t *length);
+ uint8_t *(*GetProductStrDescriptor)( uint8_t speed , uint16_t *length);
+ uint8_t *(*GetSerialStrDescriptor)( uint8_t speed , uint16_t *length);
+ uint8_t *(*GetConfigurationStrDescriptor)( uint8_t speed , uint16_t *length);
+ uint8_t *(*GetInterfaceStrDescriptor)( uint8_t speed , uint16_t *length);
+
+} USBD_DEVICE, *pUSBD_DEVICE;
+
+//typedef struct USB_OTG_hPort
+//{
+// void (*Disconnect) (void *phost);
+// void (*Connect) (void *phost);
+// uint8_t ConnStatus;
+// uint8_t DisconnStatus;
+// uint8_t ConnHandled;
+// uint8_t DisconnHandled;
+//} USB_OTG_hPort_TypeDef;
+
+typedef struct _Device_cb
+{
+ uint8_t (*Init) (void *pdev , uint8_t cfgidx);
+ uint8_t (*DeInit) (void *pdev , uint8_t cfgidx);
+ /* Control Endpoints*/
+ uint8_t (*Setup) (void *pdev , USB_SETUP_REQ *req);
+ uint8_t (*EP0_TxSent) (void *pdev );
+ uint8_t (*EP0_RxReady) (void *pdev );
+ /* Class Specific Endpoints*/
+ uint8_t (*DataIn) (void *pdev , uint8_t epnum);
+ uint8_t (*DataOut) (void *pdev , uint8_t epnum);
+ uint8_t (*SOF) (void *pdev);
+ uint8_t (*IsoINIncomplete) (void *pdev);
+ uint8_t (*IsoOUTIncomplete) (void *pdev);
+
+ uint8_t *(*GetConfigDescriptor)( uint8_t speed , uint16_t *length);
+#ifdef USB_OTG_HS_CORE
+ uint8_t *(*GetOtherConfigDescriptor)( uint8_t speed , uint16_t *length);
+#endif
+
+#ifdef USB_SUPPORT_USER_STRING_DESC
+ uint8_t *(*GetUsrStrDescriptor)( uint8_t speed ,uint8_t index, uint16_t *length);
+#endif
+
+} USBD_Class_cb_TypeDef;
+
+
+
+typedef struct _USBD_USR_PROP
+{
+ void (*Init)(void);
+ void (*DeviceReset)(uint8_t speed);
+ void (*DeviceConfigured)(void);
+ void (*DeviceSuspended)(void);
+ void (*DeviceResumed)(void);
+
+ void (*DeviceConnected)(void);
+ void (*DeviceDisconnected)(void);
+
+}
+USBD_Usr_cb_TypeDef;
+
+typedef struct _DCD
+{
+ uint8_t device_config; /* Hold the current USB device configuration */
+ uint8_t device_state; /* EP0 State */
+ uint8_t device_status; /* Define the connection,configuration and power status */
+ uint8_t device_status_new;
+ uint8_t device_old_status;
+ uint8_t device_address;
+ uint8_t connection_status;
+ uint8_t test_mode;
+ uint32_t DevRemoteWakeup;
+ USB_OTG_EP in_ep [USB_OTG_MAX_TX_FIFOS];
+ USB_OTG_EP out_ep [USB_OTG_MAX_TX_FIFOS];
+ uint8_t setup_packet [8*3];
+ USBD_Class_cb_TypeDef *class_cb;
+ USBD_Usr_cb_TypeDef *usr_cb;
+ USBD_DEVICE *usr_device;
+ uint8_t *pConfig_descriptor;
+ uint8_t zero_replay_flag;
+ }
+DCD_DEV , *DCD_PDEV;
+
+
+typedef struct _HCD
+{
+ uint8_t Rx_Buffer [MAX_DATA_LENGTH];
+ volatile uint32_t ConnSts;
+ volatile uint32_t ErrCnt[USB_OTG_MAX_TX_FIFOS];
+ volatile uint32_t XferCnt[USB_OTG_MAX_TX_FIFOS];
+ volatile HC_STATUS HC_Status[USB_OTG_MAX_TX_FIFOS];
+ volatile URB_STATE URB_State[USB_OTG_MAX_TX_FIFOS];
+ USB_OTG_HC hc [USB_OTG_MAX_TX_FIFOS];
+ uint16_t channel [USB_OTG_MAX_TX_FIFOS];
+// USB_OTG_hPort_TypeDef *port_cb;
+}
+HCD_DEV , *USB_OTG_USBH_PDEV;
+
+
+typedef struct _OTG
+{
+ uint8_t OTG_State;
+ uint8_t OTG_PrevState;
+ uint8_t OTG_Mode;
+}
+OTG_DEV , *USB_OTG_USBO_PDEV;
+
+typedef struct USB_OTG_handle
+{
+ USB_OTG_CORE_CFGS cfg;
+ USB_OTG_CORE_REGS regs;
+#ifdef USE_DEVICE_MODE
+ DCD_DEV dev;
+#endif
+#ifdef USE_HOST_MODE
+ HCD_DEV host;
+#endif
+#ifdef USE_OTG_MODE
+ OTG_DEV otg;
+#endif
+}
+USB_OTG_CORE_HANDLE , *PUSB_OTG_CORE_HANDLE;
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_CORE_Exported_Macros
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/** @defgroup USB_CORE_Exported_Variables
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CORE_Exported_FunctionsPrototype
+ * @{
+ */
+USB_OTG_STS USB_OTG_TRIG(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep);
+USB_OTG_STS USB_OTG_EPReply_Zerolen(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep);
+
+USB_OTG_STS USB_OTG_CoreInit (USB_OTG_CORE_HANDLE *pdev);
+USB_OTG_STS USB_OTG_SelectCore (USB_OTG_CORE_HANDLE *pdev,
+ USB_OTG_CORE_ID_TypeDef coreID);
+USB_OTG_STS USB_OTG_EnableGlobalInt (USB_OTG_CORE_HANDLE *pdev);
+USB_OTG_STS USB_OTG_DisableGlobalInt(USB_OTG_CORE_HANDLE *pdev);
+void USB_OTG_ReadPacket(USB_OTG_CORE_HANDLE *pdev,
+ uint8_t *dest,
+ uint8_t ch_ep_num,
+ uint8_t len);
+
+
+USB_OTG_STS USB_OTG_WritePacket (USB_OTG_CORE_HANDLE *pdev ,
+ uint8_t *src,
+ uint8_t ch_ep_num,
+ uint8_t len);
+USB_OTG_STS USB_OTG_FlushTxFifo (USB_OTG_CORE_HANDLE *pdev , uint32_t num);
+USB_OTG_STS USB_OTG_FlushRxFifo (USB_OTG_CORE_HANDLE *pdev);
+
+uint8_t USB_OTG_ReadCoreItr (USB_OTG_CORE_HANDLE *pdev);
+uint8_t USB_OTG_ReadOtgItr (USB_OTG_CORE_HANDLE *pdev);
+uint8_t USB_OTG_IsHostMode (USB_OTG_CORE_HANDLE *pdev);
+uint8_t USB_OTG_IsDeviceMode (USB_OTG_CORE_HANDLE *pdev);
+uint8_t USB_OTG_GetMode (USB_OTG_CORE_HANDLE *pdev);
+USB_OTG_STS USB_OTG_PhyInit (USB_OTG_CORE_HANDLE *pdev);
+USB_OTG_STS USB_OTG_SetCurrentMode (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t mode);
+
+/*********************** HOST APIs ********************************************/
+#ifdef USE_HOST_MODE
+USB_OTG_STS USB_OTG_CoreInitHost (USB_OTG_CORE_HANDLE *pdev);
+USB_OTG_STS USB_OTG_EnableHostInt (USB_OTG_CORE_HANDLE *pdev);
+USB_OTG_STS USB_OTG_HC_Init (USB_OTG_CORE_HANDLE *pdev, uint8_t hc_num);
+USB_OTG_STS USB_OTG_HC_Halt (USB_OTG_CORE_HANDLE *pdev, uint8_t hc_num);
+USB_OTG_STS USB_OTG_HC_StartXfer (USB_OTG_CORE_HANDLE *pdev, uint8_t hc_num);
+USB_OTG_STS USB_OTG_HC_DoPing (USB_OTG_CORE_HANDLE *pdev , uint8_t hc_num);
+uint8_t USB_OTG_ReadHostAllChannels_intr (USB_OTG_CORE_HANDLE *pdev);
+uint32_t USB_OTG_ResetPort (USB_OTG_CORE_HANDLE *pdev);
+uint32_t USB_OTG_ReadHPRT0 (USB_OTG_CORE_HANDLE *pdev);
+void USB_OTG_DriveVbus (USB_OTG_CORE_HANDLE *pdev, uint8_t state);
+void USB_OTG_InitFSLSPClkSel (USB_OTG_CORE_HANDLE *pdev ,uint8_t freq);
+uint8_t USB_OTG_IsEvenFrame (USB_OTG_CORE_HANDLE *pdev) ;
+void USB_OTG_StopHost (USB_OTG_CORE_HANDLE *pdev);
+#endif
+/********************* DEVICE APIs ********************************************/
+#ifdef USE_DEVICE_MODE
+USB_OTG_STS USB_OTG_CoreInitDev (USB_OTG_CORE_HANDLE *pdev);
+USB_OTG_STS USB_OTG_EnableDevInt (USB_OTG_CORE_HANDLE *pdev);
+enum USB_OTG_SPEED USB_OTG_GetDeviceSpeed (USB_OTG_CORE_HANDLE *pdev);
+USB_OTG_STS USB_OTG_EP0Activate (USB_OTG_CORE_HANDLE *pdev);
+USB_OTG_STS USB_OTG_EPActivate (USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep);
+USB_OTG_STS USB_OTG_EPDeactivate(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep);
+USB_OTG_STS USB_OTG_EPStartXfer (USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep);
+USB_OTG_STS USB_OTG_EP0StartXfer(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep);
+USB_OTG_STS USB_OTG_EPSetStall (USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep);
+USB_OTG_STS USB_OTG_EPClearStall (USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep);
+uint16_t USB_OTG_ReadDevAllOutEp_itr (USB_OTG_CORE_HANDLE *pdev);
+uint16_t USB_OTG_ReadDevOutEP_itr (USB_OTG_CORE_HANDLE *pdev , uint8_t epnum);
+uint16_t USB_OTG_ReadDevAllInEPItr (USB_OTG_CORE_HANDLE *pdev);
+void USB_OTG_InitDevSpeed (USB_OTG_CORE_HANDLE *pdev , uint8_t speed);
+uint8_t USBH_IsEvenFrame (USB_OTG_CORE_HANDLE *pdev);
+void USB_OTG_EP0_OutStart(USB_OTG_CORE_HANDLE *pdev);
+void USB_OTG_ActiveRemoteWakeup(USB_OTG_CORE_HANDLE *pdev);
+void USB_OTG_UngateClock(USB_OTG_CORE_HANDLE *pdev);
+void USB_OTG_StopDevice(USB_OTG_CORE_HANDLE *pdev);
+void USB_OTG_SetEPStatus (USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep , uint32_t Status);
+uint32_t USB_OTG_GetEPStatus(USB_OTG_CORE_HANDLE *pdev ,USB_OTG_EP *ep);
+#endif
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_CORE_H__ */
+
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/libraries/harward_Der/usb_core.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_core.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_core.c (working copy)
@@ -0,0 +1,716 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usb_core.c
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : USB-OTG Core layer.
+ *****************************************************************************/
+
+/* Include ------------------------------------------------------------------*/
+#include "usb_core.h"
+#include "usb_bsp.h"
+#include "usb_regs.h"
+#include "usbd_usr.h"
+#include "yc_timer.h"
+/* Private typedef ----------------------------------------------------------*/
+/* Private define -----------------------------------------------------------*/
+/* Private macro ------------------------------------------------------------*/
+/* Private variables --------------------------------------------------------*/
+/* Ptivate function prototypes ----------------------------------------------*/
+
+/******************************************************************************
+* Function Name :
+* Description :
+* Input :
+* Output :
+* Return :
+*******************************************************************/
+
+
+
+/*******************************************************************************
+* @brief USB_OTG_WritePacket : Writes a packet into the Tx FIFO associated
+* with the EP
+* @param pdev : Selected device
+* @param src : source pointer
+* @param ch_ep_num : end point number
+* @param bytes : No. of bytes
+* @retval USB_OTG_STS : status
+*/
+
+USB_OTG_STS USB_OTG_WritePacket(USB_OTG_CORE_HANDLE *pdev,
+ uint8_t *src,
+ uint8_t ch_ep_num,
+ uint8_t len)
+{
+ USB_OTG_STS status = USB_OTG_OK;
+ uint8_t i= 0;
+ // MyPrintf("write_len%x\n\r",len);
+// my_delay_ms(1);
+
+ #ifdef USB_HID_DEMO_TEST
+ if(ch_ep_num == 1)
+ {
+ for(uint32_t j=0;j<100000;j++)
+ {
+ if(USB_OTG_READ_REG8(CORE_USB_FIFO_EMPTY)&0x02)
+ break ;
+
+ }
+ }
+ #endif
+ if (pdev->cfg.dma_enable == 0)
+ {
+ for (i = 0; i < len; i++)
+ {
+ // * ( pdev->regs.ep[ch_ep_num]) = *src++;
+// MyPrintf("src = %x\n",*src);
+ USB_OTG_WRITE_REG8(pdev->regs.ep[ch_ep_num],*src++);
+
+ }
+// USB_OTG_WRITE_REG8(&pdev->regs.STATUSEGS ->EMPTY, 1<regs.ep[ch_ep_num];
+ for (i = 0; i < count8b; i++, data_buff++)
+ {
+ // *data_buff = USB_OTG_READ_REG8(pdev->regs.ep[ch_ep_num]);
+// delay_ms(1);
+ *data_buff = USB_OTG_READ_REG8(CORE_USB_EP(ch_ep_num));
+ }
+
+
+ /* Return the buffer pointer because if the transfer is composed of several
+ packets, the data of the next packet must be stored following the
+ previous packet's data */
+// return ;
+}
+
+
+
+/**
+* @brief USB_OTG_SelectCore
+* Initialize core registers address.
+* @param pdev : Selected device
+* @param coreID : USB OTG Core ID
+* @retval USB_OTG_STS : status
+*/
+USB_OTG_STS USB_OTG_SelectCore(USB_OTG_CORE_HANDLE *pdev,
+ USB_OTG_CORE_ID_TypeDef coreID)
+{
+ uint32_t i , baseAddress = 0;
+ USB_OTG_STS status = USB_OTG_OK;
+ #ifdef USB_OTG_DMA_ENABLE
+ pdev->cfg.dma_enable = 1;
+ #else
+ pdev->cfg.dma_enable = 0;
+ #endif
+
+ /* at startup the core is in FS mode */
+ pdev->cfg.speed = USB_OTG_SPEED_FULL;
+ pdev->cfg.mps = USB_OTG_FS_MAX_PACKET_SIZE ;
+
+
+ /* initialize device cfg following its address */
+ if (coreID == USB_OTG_FS_CORE_ID)
+ {
+ baseAddress = USB_OTG_FS_BASE_ADDR;
+ pdev->cfg.coreID = USB_OTG_FS_CORE_ID;
+// pdev->cfg.host_channels = 8 ;
+ pdev->cfg.dev_endpoints = 4 ;
+ pdev->cfg.TotalFifoSize = 64; /* in 8-bits */
+ pdev->cfg.phy_itface = USB_OTG_EMBEDDED_PHY;
+
+ #ifdef USB_OTG_FS_SOF_OUTPUT_ENABLED
+ pdev->cfg.Sof_output = 1;
+ #endif
+
+ #ifdef USB_OTG_FS_LOW_PWR_MGMT_SUPPORT
+ pdev->cfg.low_power = 1;
+ #endif
+ }
+ else if (coreID == USB_OTG_HS_CORE_ID)
+ {
+ baseAddress = USB_OTG_FS_BASE_ADDR;
+ pdev->cfg.coreID = USB_OTG_HS_CORE_ID;
+ pdev->cfg.host_channels = 8 ;
+ pdev->cfg.dev_endpoints = 4 ;
+ pdev->cfg.TotalFifoSize = 512;/* in 8-bits */
+
+ #ifdef USB_OTG_ULPI_PHY_ENABLED
+ pdev->cfg.phy_itface = USB_OTG_ULPI_PHY;
+ #else
+ #ifdef USB_OTG_EMBEDDED_PHY_ENABLED
+ pdev->cfg.phy_itface = USB_OTG_EMBEDDED_PHY;
+ #endif
+ #endif
+
+ #ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ pdev->cfg.dma_enable = 1;
+ #endif
+
+ #ifdef USB_OTG_HS_SOF_OUTPUT_ENABLED
+ pdev->cfg.Sof_output = 1;
+ #endif
+
+ #ifdef USB_OTG_HS_LOW_PWR_MGMT_SUPPORT
+ pdev->cfg.low_power = 1;
+ #endif
+ }
+
+ /* Common USB Registers */
+ pdev ->regs.CTRLREGS = (USB_OTG_CTRLREGS *)CORE_USB_CONFIG;
+ pdev ->regs.xferctl =(USB_OTG_XFERCTL*)CORE_USB_TRIG;
+ /* FIFOS */
+ for (i = 0; i < NUM_EP_FIFO; i++)
+ {
+ pdev->regs.ep[i] = (uint8_t *)(CORE_USB_EP(i));
+ }
+ /* fifo len*/
+ for (i = 0; i < NUM_EP_FIFO; i++)
+ {
+ pdev->regs.LENREGS[i] = (uint8_t *)(CORE_USB_EP_LEN(i));
+ }
+ pdev ->regs.STATUSEGS= (USB_OTG_STATUSREGS *)CORE_USB_STALL_STATUS;
+// MyPrintf(" %x\n",&(pdev ->regs.CTRLREGS ->STALL) );
+// MyPrintf(" %x\n",USB_OTG_READ_REG8(pdev ->regs.CTRLREGS));
+// MyPrintf(" %x\n",pdev ->regs.ep[0] );
+// MyPrintf(" %x\n",pdev ->regs.LENREGS[0]);
+ return status;
+}
+
+
+/**
+* @brief USB_OTG_CoreInit
+* Initializes the USB_OTG controller registers and prepares the core
+* device mode or host mode operation.
+* @param pdev : Selected device
+* @retval USB_OTG_STS : status
+*/
+USB_OTG_STS USB_OTG_CoreInit(USB_OTG_CORE_HANDLE *pdev)
+{
+ USB_OTG_STS status = USB_OTG_OK;
+// USB_OTG_GUSBCFG_TypeDef usbcfg;
+// USB_OTG_GCCFG_TypeDef gccfg;
+// USB_OTG_GAHBCFG_TypeDef ahbcfg;
+
+// usbcfg.d32 = 0;
+// gccfg.d32 = 0;
+// ahbcfg.d32 = 0;
+//
+// /* FS interface*/
+// /* Reset after a PHY select and set Host mode */
+// USB_OTG_CoreReset(pdev);
+// /* Deactivate the power down*/
+// gccfg.d32 = 0;
+// gccfg.b.pwdn = 1;
+//
+// gccfg.b.vbussensingA = 1 ;
+// gccfg.b.vbussensingB = 1 ;
+//#ifndef VBUS_SENSING_ENABLED
+// gccfg.b.disablevbussensing = 1;
+//#endif
+//
+// if(pdev->cfg.Sof_output)
+// {
+// gccfg.b.sofouten = 1;
+// }
+//
+// USB_OTG_WRITE_REG32 (&pdev->regs.GREGS->GCCFG, gccfg.d32);
+// USB_OTG_BSP_mDelay(20);
+// /* case the HS core is working in FS mode */
+// if(pdev->cfg.dma_enable == 1)
+// {
+// ahbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GAHBCFG);
+// ahbcfg.b.hburstlen = 5; /* 64 x 32-bits*/
+// ahbcfg.b.dmaenable = 1;
+// USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GAHBCFG, ahbcfg.d32);
+// }
+// /* initialize OTG features */
+//#ifdef USE_OTG_MODE
+// usbcfg.d32 = USB_OTG_READ_REG32(&pdev->regs.GREGS->GUSBCFG);
+// usbcfg.b.hnpcap = 1;
+// usbcfg.b.srpcap = 1;
+// USB_OTG_WRITE_REG32(&pdev->regs.GREGS->GUSBCFG, usbcfg.d32);
+// USB_OTG_EnableCommonInt(pdev);
+//#endif
+ return status;
+}
+
+
+
+/**
+* @brief USB_OTG_SetCurrentMode : Set ID line
+* @param pdev : Selected device
+* @param mode : (Host/device)only device
+* @retval USB_OTG_STS : status
+*/
+USB_OTG_STS USB_OTG_SetCurrentMode(USB_OTG_CORE_HANDLE *pdev , uint8_t mode)
+{
+ USB_OTG_STS status = USB_OTG_OK;
+// USB_OTG_POWER_TypeDef power;
+// USB_OTG_DEVCTL_TypeDef devctl;
+
+// power.d8 = 0;
+// devctl.d8 = USB_OTG_READ_REG8(&pdev->regs.DYNFIFOREGS->DEVCTL);
+//
+ if ( mode == HOST_MODE)
+ {
+// power.b.en_suspendM = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.COMMREGS->POWER, power.d8);
+// devctl.b.host_mode = 1;
+// devctl.b.session = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.DYNFIFOREGS->DEVCTL, devctl.d8);
+ }
+ else if ( mode == DEVICE_MODE)
+ {
+// devctl.b.host_mode = 0;
+// power.b.en_suspendM = 1;
+// devctl.b.session = 0;
+// power.b.soft_conn = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.DYNFIFOREGS->DEVCTL, devctl.d8);
+// USB_OTG_WRITE_REG8(&pdev->regs.COMMREGS->POWER, power.d8);
+ #ifdef USE_DEVICE_MODE
+ pdev->dev.out_ep[0].xfer_buff = pdev->dev.setup_packet;
+ pdev->dev.out_ep[0].xfer_len = 8;
+ #endif
+ }
+
+ delay_us(50);
+ // USB_OTG_BSP_mDelay(50);
+
+ return status;
+}
+
+/**
+* @brief USB_OTG_EPActivate : Activates an EP
+* @param pdev : Selected device
+* @retval USB_OTG_STS : status
+*/
+USB_OTG_STS USB_OTG_EPActivate(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep)
+{
+ USB_OTG_STS status = USB_OTG_OK;
+ USB_OTG_IRQ_MASK1_TypeDef intr_rxtxe;
+// volatile uint16_t *addr;
+ /* Read DEPCTLn register */
+ if (ep->is_in == 1)
+ {
+// addr = &pdev->regs.COMMREGS->INTRTXE;
+ intr_rxtxe.d8 = 1 << ep->num;
+ USB_OTG_MODIFY_REG8(&pdev->regs.CTRLREGS->IRQ_MASK1, intr_rxtxe.d8, 0);
+ }
+ else
+ {
+// addr = &pdev->regs.COMMREGS->INTRRXE;
+ intr_rxtxe.d8 = 1 << ep->num;
+ USB_OTG_MODIFY_REG8(&pdev->regs.CTRLREGS ->IRQ_MASK1, intr_rxtxe.d8, 0);
+ }
+ return status;
+}
+
+
+/**
+* @brief USB_OTG_EPDeactivate : Deactivates an EP
+* @param pdev : Selected device
+* @retval USB_OTG_STS : status
+*/
+USB_OTG_STS USB_OTG_EPDeactivate(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep)
+{
+ USB_OTG_STS status = USB_OTG_OK;
+ USB_OTG_IRQ_MASK1_TypeDef intr_rxtxe;
+ USB_OTG_IRQ_MASK2_TypeDef empty_rxtxe;
+// volatile uint16_t *addr;
+ /* Read DEPCTLn register */
+ if (ep->is_in == 1)
+ {
+// addr = &pdev->regs.COMMREGS->INTRTXE;
+ empty_rxtxe.d8 = 1 << ep->num;
+ USB_OTG_MODIFY_REG8(&pdev->regs.CTRLREGS ->IRQ_MASK1, 0, empty_rxtxe.d8);
+
+ }
+ else
+ {
+// addr = &pdev->regs.COMMREGS->INTRRXE;
+ intr_rxtxe.d8 = 1 << ep->num;
+ USB_OTG_MODIFY_REG8(&pdev->regs.CTRLREGS ->IRQ_MASK1, 0, intr_rxtxe.d8);
+ }
+ return status;
+}
+
+
+
+/**
+* @brief USB_OTG_GetMode : Get current mode
+* @param pdev : Selected device
+* @retval current mode
+*/
+uint8_t USB_OTG_GetMode(USB_OTG_CORE_HANDLE *pdev)
+{
+ return DEVICE_MODE;
+}
+
+
+/**
+* @brief USB_OTG_IsDeviceMode : Check if it is device mode
+* @param pdev : Selected device
+* @retval num_in_ep
+*/
+uint8_t USB_OTG_IsDeviceMode(USB_OTG_CORE_HANDLE *pdev)
+{
+ return (USB_OTG_GetMode(pdev) != HOST_MODE);
+}
+
+/**
+* @brief USB_OTG_EPStartXfer : Handle the setup for data xfer for an EP and
+* starts the xfer
+* @param pdev : Selected device
+* @retval USB_OTG_STS : status
+*/
+
+uint8_t data_len;
+USB_OTG_STS USB_OTG_EPStartXfer(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep)
+{
+ USB_OTG_STS status = USB_OTG_OK;
+ uint8_t rx_count;
+ /* IN endpoint */
+
+ if (ep->is_in == 1)
+ {
+ if ((pdev->cfg.dma_enable == 0) || ((USB_OTG_DEV_DMA_EP_NUM & 0x07) != ep->num))
+ {
+ ep->rem_data_len = ep->xfer_len - ep->xfer_count;
+ if(ep->rem_data_len == ep->maxpacket)
+ {
+// MyPrintf("max\r\n");
+ USB_OTG_WritePacket(pdev,
+ ep->xfer_buff + ep->xfer_count,
+ ep->num,
+ ep->maxpacket);
+ ep->xfer_count += ep->maxpacket;
+// USB_OTG_WRITE_REG8(CORE_USB_FIFO_EMPTY,1 << ep ->num);
+// USB_OTG_WRITE_REG8(CORE_USB_TRIG,1 << ep ->num);
+ USB_OTG_TRIG(pdev,ep);
+ ep->xfer_count = ep->xfer_len;
+ ep->rem_data_len = 0;
+ pdev->dev.zero_replay_flag =1;
+
+ }
+ /* Zero Length Packet? */
+ else if (ep->rem_data_len == 0)
+ {
+// MyPrintf("rem_zero\r\n");
+ USB_OTG_WritePacket(pdev,
+ ep->xfer_buff + ep->xfer_count,
+ ep->num,
+ 0);
+ ep->xfer_count = ep->xfer_len;
+ ep->rem_data_len = 0;
+ // tx_csrl.b.tx_pkt_rdy = 1;
+ // USB_OTG_WRITE_REG8(&pdev->regs.CSRREGS[ep->num]->TXCSRL,tx_csrl.d8);
+ }
+ else
+ {
+ if (ep->rem_data_len >ep->maxpacket)
+ {
+// GPIO_CONFIG(3) = GPCFG_OUTPUT_LOW;
+ USB_OTG_WritePacket(pdev,
+ ep->xfer_buff + ep->xfer_count,
+ ep->num,
+ ep->maxpacket);
+ USB_OTG_TRIG(pdev,ep);
+// GPIO_CONFIG(3) = GPCFG_OUTPUT_HIGH;
+ ep->xfer_count += ep->maxpacket;
+// MyPrintf("x\r\n");
+ if (ep->xfer_len >= ep->xfer_count)
+ {
+ ep->rem_data_len = ep->xfer_len - ep->xfer_count;
+ }
+ else
+ {
+ ep->rem_data_len = 0;
+ ep->xfer_count = ep->xfer_len;
+ }
+ // tx_csrl.b.tx_pkt_rdy = 1;
+ // USB_OTG_WRITE_REG8(&pdev->regs.CSRREGS[ep->num]->TXCSRL,tx_csrl.d8);
+ }
+ else
+ {
+// MyPrintf("tx_len %x\n",ep->rem_data_len);
+ USB_OTG_WritePacket(pdev,
+ ep->xfer_buff + ep->xfer_count,
+ ep->num,
+ ep->rem_data_len);
+ USB_OTG_TRIG(pdev,ep);
+ ep->xfer_count = ep->xfer_len;
+ ep->rem_data_len = 0;
+ // tx_csrl.b.tx_pkt_rdy = 1;
+ // USB_OTG_WRITE_REG8(&pdev->regs.CSRREGS[ep->num]->TXCSRL,tx_csrl.d8);
+ }
+ }
+ }
+ }
+ else
+ {
+ /* OUT endpoint */
+ rx_count = USB_OTG_READ_REG8(pdev->regs.LENREGS[ep ->num]);
+ data_len = rx_count;
+// MyPrintf("out_packetlen %d\n",rx_count);
+ USB_OTG_ReadPacket(pdev, ep->xfer_buff + ep->xfer_count,ep->num, rx_count);
+ ep->xfer_count += rx_count;
+ if (ep->xfer_len <= ep->xfer_count)
+ {
+ ep->rem_data_len = ep->xfer_count - ep->xfer_len;
+ }
+ else
+ {
+ ep->rem_data_len = 0;
+ // ep->xfer_count = ep->xfer_len;
+ ep->xfer_len = ep->xfer_count;
+ }
+// rx_csrl.b.rx_pkt_rdy = 0;
+// USB_OTG_WRITE_REG8(&pdev->regs.CSRREGS[ep->num]->RXCSRL,rx_csrl.d8);
+// }
+// }
+ }
+ return status;
+}
+
+
+/**
+* @brief USB_OTG_EP0StartXfer : Handle the setup for a data xfer for EP0 and
+* starts the xfer
+* @param pdev : Selected device
+* @retval USB_OTG_STS : status
+*/
+extern uint8_t out0_data_len;
+USB_OTG_STS USB_OTG_EP0StartXfer(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep)
+{
+ USB_OTG_STS status = USB_OTG_OK;
+ uint8_t rx_count;
+// USB_OTG_CSR0L_IN_PERIPHERAL_TypeDef csr0l;
+ uint32_t fifoemptymsk = 0;
+// csr0l.d8 = USB_OTG_READ_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L);
+ /* IN endpoint */
+ if (ep->is_in == 1)
+ {
+ ep->rem_data_len = ep->xfer_len - ep->xfer_count;
+ /* Zero Length Packet? */
+ if (ep->rem_data_len == 0)
+ {
+// // send zero packet
+ USB_OTG_EPReply_Zerolen(pdev,ep);
+ ep->xfer_count = ep->xfer_len;
+ ep->rem_data_len = 0;
+// csr0l.b.tx_pkt_rdy = 1;
+// csr0l.b.data_end = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L,csr0l.d8);
+ }
+ else
+ {
+ if (ep->rem_data_len > ep->maxpacket)
+ {
+ USB_OTG_WritePacket(pdev,
+ ep->xfer_buff + ep->xfer_count,
+ 0,
+ ep->maxpacket);
+ ep->xfer_count += ep->maxpacket;
+ ep->rem_data_len = ep->xfer_len - ep->xfer_count;
+ USB_OTG_TRIG(pdev , ep);
+// csr0l.b.tx_pkt_rdy = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L,csr0l.d8);
+ }
+ else
+ {
+ // MyPrintf("txbuf = %x\n", ep->xfer_buff);
+ USB_OTG_WritePacket(pdev,
+ ep->xfer_buff + ep->xfer_count,
+ 0,
+ ep->rem_data_len);
+ ep->xfer_count = ep->xfer_len;
+ ep->rem_data_len = 0;
+ USB_OTG_TRIG(pdev , ep);
+// MyPrintf("usb0 tx\n");
+// csr0l.b.tx_pkt_rdy = 1;
+// csr0l.b.data_end = 1;
+// USB_OTG_WRITE_REG8(&pdev->regs.INDEXREGS->CSRL.CSR0L,csr0l.d8);
+ }
+ }
+// if (pdev->cfg.dma_enable == 1)
+// {
+
+// }
+
+ if (pdev->cfg.dma_enable == 0)
+ {
+ /* Enable the Tx FIFO Empty Interrupt for this EP */
+ if (ep->xfer_len > 0)
+ {
+ }
+ }
+ }
+ else
+ {
+// /* Program the transfer size and packet count as follows:
+// * xfersize = N * (maxpacket + 4 - (maxpacket % 4))
+ if (ep->xfer_len == 0)
+ {
+
+ }
+ else
+ {
+ // rx_count = USB_OTG_READ_REG8(pdev->regs.LENREGS[0]);
+ if(out0_data_len)
+ {
+ rx_count = out0_data_len;
+ }
+ else
+ {
+ rx_count = USB_OTG_READ_REG8(pdev->regs.LENREGS[0]);
+ }
+// MyPrintf("out_packetlen %d\n",rx_count);
+ USB_OTG_ReadPacket(pdev, ep->xfer_buff + ep->xfer_count,ep->num, ep->xfer_len);
+ ep->xfer_count =0;
+ ep->xfer_buff = pdev->dev.setup_packet;
+
+
+ }
+
+ }
+ return status;
+}
+
+/**
+* @brief USB_OTG_TRIG : Handle start xfer and set tx trig
+* @param pdev : Selected device
+* @retval USB_OTG_STS : status
+*/
+USB_OTG_STS USB_OTG_TRIG(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep)
+{
+ int i;
+ USB_OTG_STS status = USB_OTG_OK;
+ // USB_OTG_trig_TypeDef trig;
+ // trig.d8 = 1 << ep ->num;
+ // USB_OTG_MODIFY_REG8(&pdev->regs.xferctl ->TRIG, 0,trig.d8);
+
+USB_OTG_WRITE_REG8(CORE_USB_STATUS,USB_STATUS_NAK);
+// MyPrintf("status = %x\n",USB_OTG_READ_REG8(CORE_USB_STATUS));
+ for(i = 0;i < 10000;i++)
+ {
+// MyPrintf("status1 = %x\n",USB_OTG_READ_REG8(CORE_USB_STATUS));
+ if(USB_OTG_READ_REG8(CORE_USB_STATUS) & USB_STATUS_NAK) break;
+ }
+// USB_FIFO_EMPTY = 1 << ep;
+// MyPrintf("status2 = %x\n",USB_OTG_READ_REG8(CORE_USB_STATUS));
+ USB_OTG_WRITE_REG8(CORE_USB_FIFO_EMPTY,1 << ep ->num);
+// for(i = 0;i < 10000;i++) {
+// USB_TRG = 1 << ep;
+ USB_OTG_WRITE_REG8(CORE_USB_TRIG,1 << ep ->num);
+ return status;
+}
+/**
+* @brief USB_OTG_EPSetStall : Set the EP STALL
+* @param pdev : Selected device
+* @retval USB_OTG_STS : status
+*/
+USB_OTG_STS USB_OTG_EPSetStall(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep)
+{
+ USB_OTG_STS status = USB_OTG_OK;
+ USB_OTG_stall_TypeDef stcsrl;
+ if(ep->num ==0)
+ {
+ USB_OTG_WRITE_REG8(&pdev->regs.xferctl ->STALL, 0x01);
+ USB_OTG_EPReply_Zerolen(pdev,ep);
+ }
+// if (ep->is_in == 1)
+// {
+// if (ep->num)
+// {
+// stcsrl.d8 = 1 << 2 * (ep ->num) -1;
+// /* set the stall bit */
+// USB_OTG_MODIFY_REG8(&pdev->regs.xferctl ->STALL, 0,stcsrl.d8);
+// }
+// else
+// {
+//
+// USB_OTG_WRITE_REG8(&pdev->regs.xferctl ->STALL, 0x01);
+// }
+// }
+// else /* OUT Endpoint */
+// {
+// if (ep->num)
+// {
+// stcsrl.d8 =1 << 2 * (ep ->num) ;
+// USB_OTG_MODIFY_REG8(&pdev->regs.xferctl ->STALL, 0,stcsrl.d8);
+// }
+// else
+// {
+// USB_OTG_WRITE_REG8(&pdev->regs.xferctl ->STALL, 0x01);
+// }
+// }
+
+ return status;
+}
+
+/**
+* @brief USB_OTG_EPSetStall : ack zero length packet
+* @param pdev : Selected device
+* @retval USB_OTG_STS : status
+*/
+
+USB_OTG_STS USB_OTG_EPReply_Zerolen(USB_OTG_CORE_HANDLE *pdev , USB_OTG_EP *ep)
+{
+ USB_OTG_STS status = USB_OTG_OK;
+ USB_OTG_WRITE_REG8(&pdev->regs.xferctl ->TRIG, 0x10 <<(ep ->num) );
+ return status;
+}
+
+
+
+/**
+* @brief USB_OTG_RemoteWakeup : active remote wakeup signalling
+* @param None
+* @retval : None
+*/
+void USB_OTG_ActiveRemoteWakeup(USB_OTG_CORE_HANDLE *pdev)
+{
+ USB_OTG_CTL_TypeDef power;
+ /* Note: If CLK has been stopped,it will need be restarted before
+ * this write can occur.
+ */
+ power.d8 = USB_OTG_READ_REG8(&pdev->regs.CTRLREGS ->USB_CTL);
+ power.b.resume = 1;
+ power.b.wakeup_enable = 1;
+ USB_OTG_WRITE_REG8(&pdev->regs.CTRLREGS ->USB_CTL, power.d8);
+ /* The software should leave then this bit set for approximately 10ms
+ * (minimum of 2ms, a maximum of 15ms) before resetting it to 0.
+ */
+ delay_ms(2);
+ delay_us(500);
+ power.b.resume = 0;
+ power.b.wakeup_enable = 0;
+ USB_OTG_WRITE_REG8(&pdev->regs.CTRLREGS ->USB_CTL, power.d8);
+}
+
+
+
+
Index: yc_usb/libraries/harward_Der/usb_dcd.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_dcd.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_dcd.h (working copy)
@@ -0,0 +1,148 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usb_dcd.h
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : Peripheral Driver Header file.
+ *****************************************************************************/
+
+
+#ifndef __DCD_H__
+#define __DCD_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Include ------------------------------------------------------------------*/
+#include "usb_core.h"
+/* Exported types -----------------------------------------------------------*/
+/* Exported constants -------------------------------------------------------*/
+/* Exported macro -----------------------------------------------------------*/
+/* Exported functions -------------------------------------------------------*/
+/* Exported variables -------------------------------------------------------*/
+/** @addtogroup USB_OTG_DRIVER
+* @{
+*/
+
+/** @defgroup USB_DCD
+* @brief This file is the
+* @{
+*/
+
+
+/** @defgroup USB_DCD_Exported_Defines
+* @{
+*/
+#define USB_OTG_EP_CONTROL 0
+#define USB_OTG_EP_ISOC 1
+#define USB_OTG_EP_BULK 2
+#define USB_OTG_EP_INT 3
+#define USB_OTG_EP_MASK 3
+
+/* Device Status */
+#define USB_OTG_DEFAULT 1
+#define USB_OTG_ADDRESSED 2
+#define USB_OTG_CONFIGURED 3
+#define USB_OTG_SUSPENDED 4
+#define USB_OTG_END 5
+/**
+* @}
+*/
+
+
+/** @defgroup USB_DCD_Exported_Types
+* @{
+*/
+/********************************************************************************
+Data structure type
+********************************************************************************/
+typedef struct
+{
+ uint8_t bLength;
+ uint8_t bDescriptorType;
+ uint8_t bEndpointAddress;
+ uint8_t bmAttributes;
+ uint16_t wMaxPacketSize;
+ uint8_t bInterval;
+}
+EP_DESCRIPTOR , *PEP_DESCRIPTOR;
+
+/**
+* @}
+*/
+
+
+/** @defgroup USB_DCD_Exported_Macros
+* @{
+*/
+/**
+* @}
+*/
+
+/** @defgroup USB_DCD_Exported_Variables
+* @{
+*/
+/**
+* @}
+*/
+
+/** @defgroup USB_DCD_Exported_FunctionsPrototype
+* @{
+*/
+/********************************************************************************
+EXPORTED FUNCTION FROM THE USB-OTG LAYER
+********************************************************************************/
+void DCD_Init(USB_OTG_CORE_HANDLE *pdev ,
+ USB_OTG_CORE_ID_TypeDef coreID);
+
+void DCD_DevConnect (USB_OTG_CORE_HANDLE *pdev);
+void DCD_DevDisconnect (USB_OTG_CORE_HANDLE *pdev);
+void DCD_EP_SetAddress (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t address);
+uint32_t DCD_EP_Open(USB_OTG_CORE_HANDLE *pdev ,
+ uint8_t ep_addr,
+ uint16_t ep_mps,
+ uint8_t ep_type);
+
+uint32_t DCD_EP_Close (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t ep_addr);
+
+
+uint32_t DCD_EP_PrepareRx ( USB_OTG_CORE_HANDLE *pdev,
+ uint8_t ep_addr,
+ uint8_t *pbuf,
+ uint16_t buf_len);
+
+uint32_t DCD_EP_Tx (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t ep_addr,
+ uint8_t *pbuf,
+ uint32_t buf_len);
+uint32_t DCD_EP_Stall (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t epnum);
+uint32_t DCD_EP_ClrStall (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t epnum);
+uint32_t DCD_EP_Flush (USB_OTG_CORE_HANDLE *pdev,
+ uint8_t epnum);
+uint32_t DCD_Handle_ISR(USB_OTG_CORE_HANDLE *pdev);
+
+uint32_t DCD_GetEPStatus(USB_OTG_CORE_HANDLE *pdev ,
+ uint8_t epnum);
+
+void DCD_SetEPStatus (USB_OTG_CORE_HANDLE *pdev ,
+ uint8_t epnum ,
+ uint32_t Status);
+
+/**
+* @}
+*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __DCD_H__ */
+
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/libraries/harward_Der/usb_dcd_int.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_dcd_int.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_dcd_int.h (working copy)
@@ -0,0 +1,113 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usb_dcd_int.h
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : Peripheral Device Interface Layer.
+ *****************************************************************************/
+
+
+#ifndef __USB_DCD_INT_H__
+#define __USB_DCD_INT_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Include ------------------------------------------------------------------*/
+#include "usb_dcd.h"
+/* Exported types -----------------------------------------------------------*/
+/* Exported constants -------------------------------------------------------*/
+/* Exported macro -----------------------------------------------------------*/
+/* Exported functions -------------------------------------------------------*/
+/* Exported variables -------------------------------------------------------*/
+/** @addtogroup USB_OTG_DRIVER
+ * @{
+ */
+
+/** @defgroup USB_DCD_INT
+ * @brief This file is the
+ * @{
+ */
+
+
+/** @defgroup USB_DCD_INT_Exported_Defines
+ * @{
+ */
+
+typedef struct _USBD_DCD_INT
+{
+ uint8_t (* DataOutStage) (USB_OTG_CORE_HANDLE *pdev , uint8_t epnum);
+ uint8_t (* DataInStage) (USB_OTG_CORE_HANDLE *pdev , uint8_t epnum);
+ uint8_t (* SetupStage) (USB_OTG_CORE_HANDLE *pdev);
+ uint8_t (* SOF) (USB_OTG_CORE_HANDLE *pdev);
+ uint8_t (* Reset) (USB_OTG_CORE_HANDLE *pdev);
+ uint8_t (* Suspend) (USB_OTG_CORE_HANDLE *pdev);
+ uint8_t (* Resume) (USB_OTG_CORE_HANDLE *pdev);
+ uint8_t (* IsoINIncomplete) (USB_OTG_CORE_HANDLE *pdev);
+ uint8_t (* IsoOUTIncomplete) (USB_OTG_CORE_HANDLE *pdev);
+
+ uint8_t (* DevConnected) (USB_OTG_CORE_HANDLE *pdev);
+ uint8_t (* DevDisconnected) (USB_OTG_CORE_HANDLE *pdev);
+
+}USBD_DCD_INT_cb_TypeDef;
+
+extern USBD_DCD_INT_cb_TypeDef *USBD_DCD_INT_fops;
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_DCD_INT_Exported_Types
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_DCD_INT_Exported_Macros
+ * @{
+ */
+//#define CLEAR_IN_EP_INTR(epnum,intr)
+#define CLEAR_IN_EP_INTR(epnum,intr) \
+ txcsrl.d8=0; \
+ txcsrl.b.intr = 0; \
+ USB_OTG_WRITE_REG8(&pdev->regs.CSRREGS[epnum]->TXCSRL,txcsrl.d8);
+
+#define CLEAR_OUT_EP_INTR(epnum,intr) \
+ rxcsrl.d8=0; \
+ rxcsrl.b.intr = 0; \
+ USB_OTG_WRITE_REG8(&pdev->regs.CSRREGS[epnum]->RXCSRL,rxcsrl.d8);
+
+/**
+ * @}
+ */
+
+/** @defgroup USB_DCD_INT_Exported_Variables
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_DCD_INT_Exported_FunctionsPrototype
+ * @{
+ */
+uint32_t USBD_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev);
+
+//uint32_t USBD_OTG_DMA_ISR_Handler (USB_OTG_CORE_HANDLE *pdev);
+uint32_t USBD_OTG_DMA_ISR_Handler (USB_OTG_CORE_HANDLE *pdev, uint8_t dma_intr_value);
+
+void _delay_(uint32_t t);
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_DCD_INT_H__ */
+
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/libraries/harward_Der/usb_defines.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_defines.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_defines.h (working copy)
@@ -0,0 +1,262 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usb_defines.h
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : Header of the Core Layer.
+ *****************************************************************************/
+
+
+#ifndef __USB_DEF_H__
+#define __USB_DEF_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Include ------------------------------------------------------------------*/
+#include "usb_conf.h"
+#include "yc3121.h"
+/* Exported types -----------------------------------------------------------*/
+/* Exported constants -------------------------------------------------------*/
+/* Exported macro -----------------------------------------------------------*/
+/* Exported functions -------------------------------------------------------*/
+/* Exported variables -------------------------------------------------------*/
+/** @addtogroup USB_OTG_DRIVER
+ * @{
+ */
+
+/** @defgroup USB_DEFINES
+ * @brief This file is the
+ * @{
+ */
+
+
+/** @defgroup USB_DEFINES_Exported_Defines
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup _CORE_DEFINES_
+ * @{
+ */
+
+#if (HARDWAER==M0_FPGA)
+#define CPU_MHZ (24*1000000)
+#elif (HARDWAER==POS_CHIP)
+#define CRYSTAL_CLK (192*1000000)
+#define CPU_MHZ ((CRYSTAL_CLK)/((SYSCTRL_HCLK_CON&0x0f)+2))
+#endif
+
+#define USB_STATUS_SETUP 0x10
+#define USB_STATUS_SUSPEND 0x20
+#define USB_STATUS_NAK 0x40
+#define USB_STATUS_STALL 0x80
+
+
+#define USB_OTG_SPEED_PARAM_HIGH 0
+#define USB_OTG_SPEED_PARAM_HIGH_IN_FULL 1
+#define USB_OTG_SPEED_PARAM_FULL 3
+
+#define USB_OTG_SPEED_HIGH 0
+#define USB_OTG_SPEED_FULL 1
+
+#define USB_OTG_ULPI_PHY 1
+#define USB_OTG_EMBEDDED_PHY 2
+#define USB_SETUP_PACKET_LEN 8
+
+/**
+ * @}
+ */
+
+
+/** @defgroup _GLOBAL_DEFINES_
+ * @{
+ */
+#define GAHBCFG_TXFEMPTYLVL_EMPTY 1
+#define GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0
+#define GAHBCFG_GLBINT_ENABLE 1
+#define GAHBCFG_INT_DMA_BURST_SINGLE 0
+#define GAHBCFG_INT_DMA_BURST_INCR 1
+#define GAHBCFG_INT_DMA_BURST_INCR4 3
+#define GAHBCFG_INT_DMA_BURST_INCR8 5
+#define GAHBCFG_INT_DMA_BURST_INCR16 7
+#define GAHBCFG_DMAENABLE 1
+#define GAHBCFG_TXFEMPTYLVL_EMPTY 1
+#define GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0
+#define GRXSTS_PKTSTS_IN 2
+#define GRXSTS_PKTSTS_IN_XFER_COMP 3
+#define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5
+#define GRXSTS_PKTSTS_CH_HALTED 7
+/**
+ * @}
+ */
+
+
+/** @defgroup _OnTheGo_DEFINES_
+ * @{
+ */
+#define MODE_HNP_SRP_CAPABLE 0
+#define MODE_SRP_ONLY_CAPABLE 1
+#define MODE_NO_HNP_SRP_CAPABLE 2
+#define MODE_SRP_CAPABLE_DEVICE 3
+#define MODE_NO_SRP_CAPABLE_DEVICE 4
+#define MODE_SRP_CAPABLE_HOST 5
+#define MODE_NO_SRP_CAPABLE_HOST 6
+#define A_HOST 1
+#define A_SUSPEND 2
+#define A_PERIPHERAL 3
+#define B_PERIPHERAL 4
+#define B_HOST 5
+
+#define DEVICE_MODE 0
+#define HOST_MODE 1
+#define OTG_MODE 2
+/**
+ * @}
+ */
+
+
+/** @defgroup __DEVICE_DEFINES_
+ * @{
+ */
+#define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ 0
+#define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ 1
+#define DSTS_ENUMSPD_LS_PHY_6MHZ 2
+#define DSTS_ENUMSPD_FS_PHY_48MHZ 3
+
+#define DCFG_FRAME_INTERVAL_80 0
+#define DCFG_FRAME_INTERVAL_85 1
+#define DCFG_FRAME_INTERVAL_90 2
+#define DCFG_FRAME_INTERVAL_95 3
+
+#define DEP0CTL_MPS_64 0
+#define DEP0CTL_MPS_32 1
+#define DEP0CTL_MPS_16 2
+#define DEP0CTL_MPS_8 3
+
+#define EP_SPEED_LOW 0
+#define EP_SPEED_FULL 1
+#define EP_SPEED_HIGH 2
+
+#define EP_TYPE_CTRL 0
+#define EP_TYPE_ISOC 1
+#define EP_TYPE_BULK 2
+#define EP_TYPE_INTR 3
+#define EP_TYPE_MSK 3
+
+#define STS_GOUT_NAK 1
+#define STS_DATA_UPDT 2
+#define STS_XFER_COMP 3
+#define STS_SETUP_COMP 4
+#define STS_SETUP_UPDT 6
+/**
+ * @}
+ */
+
+
+/** @defgroup __HOST_DEFINES_
+ * @{
+ */
+#define HC_PID_DATA0 0
+#define HC_PID_DATA2 1
+#define HC_PID_DATA1 2
+#define HC_PID_SETUP 3
+
+#define HPRT0_PRTSPD_HIGH_SPEED 1
+#define HPRT0_PRTSPD_FULL_SPEED 2
+#define HPRT0_PRTSPD_LOW_SPEED 3
+//#define HPRT0_PRTSPD_HIGH_SPEED 0
+//#define HPRT0_PRTSPD_FULL_SPEED 1
+//#define HPRT0_PRTSPD_LOW_SPEED 2
+
+#define HCFG_30_60_MHZ 0
+#define HCFG_48_MHZ 1
+#define HCFG_6_MHZ 2
+
+#define HCCHAR_CTRL 0
+#define HCCHAR_ISOC 1
+#define HCCHAR_BULK 2
+#define HCCHAR_INTR 3
+
+#define MIN(a, b) (((a) < (b)) ? (a) : (b))
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_DEFINES_Exported_Types
+ * @{
+ */
+
+typedef enum
+{
+ USB_OTG_HS_CORE_ID = 0,
+ USB_OTG_FS_CORE_ID = 1
+}USB_OTG_CORE_ID_TypeDef;
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_DEFINES_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_DEFINES_Exported_Variables
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_DEFINES_Exported_FunctionsPrototype
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup Internal_Macro's
+ * @{
+ */
+#define USB_OTG_READ_REG8(reg) ( *(volatile uint8_t *) reg)
+#define USB_OTG_READ_REG16(reg) (*(volatile uint16_t *) reg)
+#define USB_OTG_READ_REG32(reg) (*(volatile uint32_t *) reg)
+#define USB_OTG_WRITE_REG8(reg,value) (*(volatile uint8_t *)reg = value)
+#define USB_OTG_WRITE_REG16(reg,value) (*(volatile uint16_t *) reg = value)
+#define USB_OTG_WRITE_REG32(reg,value) (*(volatile uint32_t *) reg = value)
+
+#define USB_OTG_MODIFY_REG8(reg, clear_mask, set_mask) \
+ USB_OTG_WRITE_REG8(reg, (((USB_OTG_READ_REG8(reg)) & ~clear_mask) | set_mask))
+
+#define USB_OTG_MODIFY_REG16(reg, clear_mask, set_mask) \
+ USB_OTG_WRITE_REG16(reg, (((USB_OTG_READ_REG16(reg)) & ~clear_mask) | set_mask))
+
+#define USB_OTG_MODIFY_REG32(reg, clear_mask, set_mask) \
+ USB_OTG_WRITE_REG32(reg, (((USB_OTG_READ_REG32(reg)) & ~clear_mask) | set_mask))
+/********************************************************************************
+ ENUMERATION TYPE
+********************************************************************************/
+enum USB_OTG_SPEED {
+ USB_SPEED_UNKNOWN = 0,
+ USB_SPEED_LOW,
+ USB_SPEED_FULL,
+ USB_SPEED_HIGH
+};
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_DEF_H__ */
+
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/libraries/harward_Der/usb_hcd.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_hcd.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_hcd.h (working copy)
@@ -0,0 +1,91 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usb_hcd.h
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : Host layer Header file.
+ *****************************************************************************/
+
+
+#ifndef __USB_HCD_H__
+#define __USB_HCD_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Include ------------------------------------------------------------------*/
+#include "usb_core.h"
+#include "usb_regs.h"
+/* Exported types -----------------------------------------------------------*/
+/* Exported constants -------------------------------------------------------*/
+/* Exported macro -----------------------------------------------------------*/
+/* Exported functions -------------------------------------------------------*/
+/* Exported variables -------------------------------------------------------*/
+/** @addtogroup USB_OTG_DRIVER
+ * @{
+ */
+
+/** @defgroup USB_HCD
+ * @brief This file is the
+ * @{
+ */
+
+
+/** @defgroup USB_HCD_Exported_Defines
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_HCD_Exported_Types
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_HCD_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_HCD_Exported_Variables
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_HCD_Exported_FunctionsPrototype
+ * @{
+ */
+uint32_t HCD_Init (USB_OTG_CORE_HANDLE *pdev ,
+ USB_OTG_CORE_ID_TypeDef coreID);
+uint32_t HCD_HC_Init (USB_OTG_CORE_HANDLE *pdev ,
+ uint8_t hc_num);
+uint32_t HCD_SubmitRequest (USB_OTG_CORE_HANDLE *pdev ,
+ uint8_t hc_num) ;
+uint32_t HCD_GetCurrentSpeed (USB_OTG_CORE_HANDLE *pdev);
+uint32_t HCD_ResetPort (USB_OTG_CORE_HANDLE *pdev);
+uint32_t HCD_IsDeviceConnected (USB_OTG_CORE_HANDLE *pdev);
+uint16_t HCD_GetCurrentFrame (USB_OTG_CORE_HANDLE *pdev) ;
+URB_STATE HCD_GetURB_State (USB_OTG_CORE_HANDLE *pdev, uint8_t ch_num);
+uint32_t HCD_GetXferCnt (USB_OTG_CORE_HANDLE *pdev, uint8_t ch_num);
+HC_STATUS HCD_GetHCState (USB_OTG_CORE_HANDLE *pdev, uint8_t ch_num) ;
+/**
+ * @}
+ */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_HCD_H__ */
+
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/libraries/harward_Der/usb_hcd_int.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_hcd_int.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_hcd_int.h (working copy)
@@ -0,0 +1,126 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usb_hcd_int.h
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : Host Interrupt subroutines.
+ *****************************************************************************/
+
+
+#ifndef __HCD_INT_H__
+#define __HCD_INT_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Include ------------------------------------------------------------------*/
+#include "usb_hcd.h"
+#include "usbh_core.h"
+/* Exported types -----------------------------------------------------------*/
+/* Exported constants -------------------------------------------------------*/
+/* Exported macro -----------------------------------------------------------*/
+/* Exported functions -------------------------------------------------------*/
+/* Exported variables -------------------------------------------------------*/
+/** @addtogroup USB_OTG_DRIVER
+ * @{
+ */
+
+/** @defgroup USB_HCD_INT
+ * @brief This file is the
+ * @{
+ */
+
+
+/** @defgroup USB_HCD_INT_Exported_Defines
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_HCD_INT_Exported_Types
+ * @{
+ */
+
+typedef struct _USBH_HCD_INT
+{
+ uint8_t (* USBH_Resume) (USB_OTG_CORE_HANDLE *pdev);
+ uint8_t (* USBH_Babble) (USB_OTG_CORE_HANDLE *pdev);
+ uint8_t (* USBH_SessReq) (USB_OTG_CORE_HANDLE *pdev);
+ uint8_t (* USBH_VbusError) (USB_OTG_CORE_HANDLE *pdev);
+ uint8_t (* SOF) (USB_OTG_CORE_HANDLE *pdev);
+ uint8_t (* DevConnected) (USB_OTG_CORE_HANDLE *pdev);
+ uint8_t (* DevDisconnected) (USB_OTG_CORE_HANDLE *pdev);
+
+}USBH_HCD_INT_cb_TypeDef;
+
+extern USBH_HCD_INT_cb_TypeDef *USBH_HCD_INT_fops;
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_HCD_INT_Exported_Macros
+ * @{
+ */
+
+#define CLEAR_HC_INT(HC_REGS, intr) \
+ {\
+ USB_OTG_HCINTn_TypeDef hcint_clear; \
+ hcint_clear.d32 = 0; \
+ hcint_clear.b.intr = 1; \
+ USB_OTG_WRITE_REG32(&((HC_REGS)->HCINT), hcint_clear.d32);\
+ }\
+
+#define MASK_HOST_INT_CHH(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
+ INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
+ INTMSK.b.chhltd = 0; \
+ USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
+
+#define UNMASK_HOST_INT_CHH(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
+ INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
+ INTMSK.b.chhltd = 1; \
+ USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
+
+#define MASK_HOST_INT_ACK(hc_num) { USB_OTG_HCINTMSK_TypeDef INTMSK; \
+ INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
+ INTMSK.b.ack = 0; \
+ USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, GINTMSK.d32);}
+
+#define UNMASK_HOST_INT_ACK(hc_num) { USB_OTG_HCGINTMSK_TypeDef INTMSK; \
+ INTMSK.d32 = USB_OTG_READ_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK); \
+ INTMSK.b.ack = 1; \
+ USB_OTG_WRITE_REG32(&pdev->regs.HC_REGS[hc_num]->HCINTMSK, INTMSK.d32);}
+
+/**
+ * @}
+ */
+
+/** @defgroup USB_HCD_INT_Exported_Variables
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_HCD_INT_Exported_FunctionsPrototype
+ * @{
+ */
+/* Callbacks handler */
+void ConnectCallback_Handler(USB_OTG_CORE_HANDLE *pdev);
+void Disconnect_Callback_Handler(USB_OTG_CORE_HANDLE *pdev);
+void Overcurrent_Callback_Handler(USB_OTG_CORE_HANDLE *pdev);
+uint32_t USBH_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev, USBH_HOST *phost);
+/**
+ * @}
+ */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __HCD_INT_H__ */
+
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/libraries/harward_Der/usb_otg.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_otg.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/libraries/harward_Der/usb_otg.h (working copy)
@@ -0,0 +1,85 @@
+/************************ (C) COPYRIGHT YICHIP *************************
+ * File Name : usb_otg.h
+ * Author : YICHIP
+ * Version : V1.0.0
+ * Date : 21-May-2019
+ * Description : OTG Core Header.
+ *****************************************************************************/
+
+
+#ifndef __USB_OTG_H__
+#define __USB_OTG_H__
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Include ------------------------------------------------------------------*/
+#include "usb_regs.h"
+#include "usb_core.h"
+/* Exported types -----------------------------------------------------------*/
+/* Exported constants -------------------------------------------------------*/
+/* Exported macro -----------------------------------------------------------*/
+/* Exported functions -------------------------------------------------------*/
+/* Exported variables -------------------------------------------------------*/
+/** @addtogroup USB_OTG_DRIVER
+ * @{
+ */
+
+/** @defgroup USB_OTG
+ * @brief This file is the
+ * @{
+ */
+
+
+/** @defgroup USB_OTG_Exported_Defines
+ * @{
+ */
+
+
+void USB_OTG_InitiateSRP(USB_OTG_CORE_HANDLE *pdev);
+void USB_OTG_InitiateHNP(USB_OTG_CORE_HANDLE *pdev, uint8_t state , uint8_t mode);
+void USB_OTG_Switchback (USB_OTG_CORE_HANDLE *pdev);
+uint32_t USB_OTG_GetCurrentState (USB_OTG_CORE_HANDLE *pdev);
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_OTG_Exported_Types
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_OTG_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_OTG_Exported_Variables
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_OTG_Exported_FunctionsPrototype
+ * @{
+ */
+/**
+ * @}
+ */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __USB_OTG_H__ */
+
+/************************ (C) COPYRIGHT 2014 YICHIP ****END OF FILE****/
Index: yc_usb/scpu_usb_CDC_Device_Demo/usb_bsp.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usb_bsp.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usb_bsp.c (working copy)
@@ -0,0 +1,563 @@
+/**
+ ******************************************************************************
+ * @file usb_bsp.c
+ * @author MCD Application Team
+ * @version V2.1.0
+ * @date 19-March-2012
+ * @brief This file implements the board support package for the USB host library
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usb_bsp.h"
+#include "usb_conf.h"
+
+/** @addtogroup USBH_USER
+* @{
+*/
+
+/** @defgroup USB_BSP
+ * @brief This file is responsible to offer board support package
+ * @{
+ */
+
+/** @defgroup USB_BSP_Private_Defines
+ * @{
+ */
+//#define USE_ACCURATE_TIME
+#define TIM_MSEC_DELAY 0x01
+#define TIM_USEC_DELAY 0x02
+#define HOST_OVRCURR_PORT GPIOE
+#define HOST_OVRCURR_LINE GPIO_Pin_1
+#define HOST_OVRCURR_PORT_SOURCE GPIO_PortSourceGPIOE
+#define HOST_OVRCURR_PIN_SOURCE GPIO_PinSource1
+#define HOST_OVRCURR_PORT_RCC RCC_APB2Periph_GPIOE
+#define HOST_OVRCURR_EXTI_LINE EXTI_Line1
+#define HOST_OVRCURR_IRQn EXTI1_IRQn
+
+#ifdef USE_STM3210C_EVAL
+ #define HOST_POWERSW_PORT_RCC RCC_APB2Periph_GPIOC
+ #define HOST_POWERSW_PORT GPIOC
+ #define HOST_POWERSW_VBUS GPIO_Pin_9
+#else
+ #ifdef USE_USB_OTG_FS
+ #define HOST_POWERSW_PORT_RCC RCC_AHB1Periph_GPIOH
+ #define HOST_POWERSW_PORT GPIOH
+ #define HOST_POWERSW_VBUS GPIO_Pin_5
+ #endif
+#endif
+
+#define HOST_SOF_OUTPUT_RCC RCC_APB2Periph_GPIOA
+#define HOST_SOF_PORT GPIOA
+#define HOST_SOF_SIGNAL GPIO_Pin_8
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_BSP_Private_TypesDefinitions
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+
+/** @defgroup USB_BSP_Private_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USBH_BSP_Private_Variables
+ * @{
+ */
+ErrorStatus HSEStartUpStatus;
+#ifdef USE_ACCURATE_TIME
+volatile uint32_t BSP_delay = 0;
+#endif
+/**
+ * @}
+ */
+
+/** @defgroup USBH_BSP_Private_FunctionPrototypes
+ * @{
+ */
+
+#ifdef USE_ACCURATE_TIME
+static void BSP_SetTime(uint8_t Unit);
+static void BSP_Delay(uint32_t nTime,uint8_t Unit);
+static void USB_OTG_BSP_TimeInit ( void );
+#endif
+/**
+ * @}
+ */
+
+/** @defgroup USB_BSP_Private_Functions
+ * @{
+ */
+
+/**
+ * @brief USB_OTG_BSP_Init
+ * Initilizes BSP configurations
+ * @param None
+ * @retval None
+ */
+
+void USB_OTG_BSP_Init(USB_OTG_CORE_HANDLE *pdev)
+{
+
+//// EXTI_InitTypeDef EXTI_InitStructure;
+// #ifdef USE_STM3210C_EVAL
+
+// RCC_OTGFSCLKConfig(RCC_OTGFSCLKSource_PLLVCO_Div3);
+// RCC_AHBPeriphClockCmd(RCC_AHBPeriph_OTG_FS, ENABLE) ;
+
+//#else // USE_STM322xG_EVAL
+// GPIO_InitTypeDef GPIO_InitStructure;
+// #ifdef USE_USB_OTG_FS
+//
+// RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOA , ENABLE);
+//
+// /* Configure SOF VBUS ID DM DP Pins */
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 |
+// GPIO_Pin_9 |
+// GPIO_Pin_11 |
+// GPIO_Pin_12;
+//
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+// GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+// GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
+// GPIO_Init(GPIOA, &GPIO_InitStructure);
+//
+// GPIO_PinAFConfig(GPIOA,GPIO_PinSource8,GPIO_AF_OTG1_FS) ;
+// GPIO_PinAFConfig(GPIOA,GPIO_PinSource9,GPIO_AF_OTG1_FS) ;
+// GPIO_PinAFConfig(GPIOA,GPIO_PinSource11,GPIO_AF_OTG1_FS) ;
+// GPIO_PinAFConfig(GPIOA,GPIO_PinSource12,GPIO_AF_OTG1_FS) ;
+//
+// /* this for ID line debug */
+//
+//
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
+// GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
+// GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP ;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_Init(GPIOA, &GPIO_InitStructure);
+// GPIO_PinAFConfig(GPIOA,GPIO_PinSource10,GPIO_AF_OTG1_FS) ;
+
+
+// RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
+// RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_OTG_FS, ENABLE) ;
+// #else // USE_USB_OTG_HS
+
+// #ifdef USE_ULPI_PHY // ULPI
+// RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB |
+// RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOH |
+// RCC_AHB1Periph_GPIOI, ENABLE);
+//
+//
+// GPIO_PinAFConfig(GPIOA,GPIO_PinSource3, GPIO_AF_OTG2_HS) ; // D0
+// GPIO_PinAFConfig(GPIOA,GPIO_PinSource5, GPIO_AF_OTG2_HS) ; // CLK
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource0, GPIO_AF_OTG2_HS) ; // D1
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource1, GPIO_AF_OTG2_HS) ; // D2
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource5, GPIO_AF_OTG2_HS) ; // D7
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource10,GPIO_AF_OTG2_HS) ; // D3
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource11,GPIO_AF_OTG2_HS) ; // D4
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource12,GPIO_AF_OTG2_HS) ; // D5
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource13,GPIO_AF_OTG2_HS) ; // D6
+// GPIO_PinAFConfig(GPIOH,GPIO_PinSource4, GPIO_AF_OTG2_HS) ; // NXT
+// GPIO_PinAFConfig(GPIOI,GPIO_PinSource11,GPIO_AF_OTG2_HS) ; // DIR
+// GPIO_PinAFConfig(GPIOC,GPIO_PinSource0, GPIO_AF_OTG2_HS) ; // STP
+//
+// // CLK
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 ;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+// GPIO_Init(GPIOA, &GPIO_InitStructure);
+//
+// // D0
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 ;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+// GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+// GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
+// GPIO_Init(GPIOA, &GPIO_InitStructure);
+//
+//
+//
+// // D1 D2 D3 D4 D5 D6 D7
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 |
+// GPIO_Pin_5 | GPIO_Pin_10 |
+// GPIO_Pin_11| GPIO_Pin_12 |
+// GPIO_Pin_13 ;
+//
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+// GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+// GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
+// GPIO_Init(GPIOB, &GPIO_InitStructure);
+//
+//
+// // STP
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 ;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+// GPIO_Init(GPIOC, &GPIO_InitStructure);
+//
+// //NXT
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+// GPIO_Init(GPIOH, &GPIO_InitStructure);
+//
+//
+// //DIR
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 ;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+// GPIO_Init(GPIOI, &GPIO_InitStructure);
+//
+//
+// RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_OTG_HS |
+// RCC_AHB1Periph_OTG_HS_ULPI, ENABLE) ;
+//
+// #else
+
+// RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB , ENABLE);
+//
+// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 |
+// GPIO_Pin_13 |
+// GPIO_Pin_14 |
+// GPIO_Pin_15;
+//
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+// GPIO_Init(GPIOB, &GPIO_InitStructure);
+//
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource12, GPIO_AF_OTG2_FS) ;
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource13,GPIO_AF_OTG2_FS) ;
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource14,GPIO_AF_OTG2_FS) ;
+// GPIO_PinAFConfig(GPIOB,GPIO_PinSource15,GPIO_AF_OTG2_FS) ;
+// RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_OTG_HS, ENABLE) ;
+// #endif
+// #endif //USB_OTG_HS
+//#endif //USE_STM322xG_EVAL
+
+//
+// /* Configure pin for overcurrent detection */
+// RCC_APB2PeriphClockCmd(HOST_OVRCURR_PORT_RCC, ENABLE);
+//
+// /* Configure SOF Pin */
+// GPIO_InitStructure.GPIO_Pin = HOST_OVRCURR_LINE;
+// GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
+// GPIO_Init(HOST_OVRCURR_PORT, &GPIO_InitStructure);
+//
+// /* Connect Button EXTI Line to Button GPIO Pin */
+// GPIO_EXTILineConfig(HOST_OVRCURR_PORT_SOURCE, HOST_OVRCURR_PIN_SOURCE);
+//
+// /* Configure Button EXTI line */
+// EXTI_InitStructure.EXTI_Line = HOST_OVRCURR_EXTI_LINE;
+// EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
+// EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
+// EXTI_InitStructure.EXTI_LineCmd = ENABLE;
+// EXTI_Init(&EXTI_InitStructure);
+// USB_OTG_BSP_TimeInit();
+}
+/**
+ * @brief USB_OTG_BSP_EnableInterrupt
+ * Configures USB Global interrupt
+ * @param None
+ * @retval None
+ */
+void USB_OTG_BSP_EnableInterrupt(USB_OTG_CORE_HANDLE *pdev)
+{
+// NVIC_InitTypeDef NVIC_InitStructure;
+//
+// NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
+//#ifdef USE_USB_OTG_HS
+// NVIC_InitStructure.NVIC_IRQChannel = OTG_HS_IRQn;
+//#else
+// NVIC_InitStructure.NVIC_IRQChannel = OTG_FS_IRQn;
+//#endif
+// NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
+// NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3;
+// NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+// NVIC_Init(&NVIC_InitStructure);
+
+//
+// /* Enable the Overcurrent Interrupt */
+// NVIC_InitStructure.NVIC_IRQChannel = HOST_OVRCURR_IRQn;
+// NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
+// NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2;
+// NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+//
+// NVIC_Init(&NVIC_InitStructure);
+}
+
+/**
+ * @brief BSP_Drive_VBUS
+ * Drives the Vbus signal through IO
+ * @param state : VBUS states
+ * @retval None
+ */
+
+void USB_OTG_BSP_DriveVBUS(USB_OTG_CORE_HANDLE *pdev, uint8_t state)
+{
+ /*
+ On-chip 5 V VBUS generation is not supported. For this reason, a charge pump
+ or, if 5 V are available on the application board, a basic power switch, must
+ be added externally to drive the 5 V VBUS line. The external charge pump can
+ be driven by any GPIO output. When the application decides to power on VBUS
+ using the chosen GPIO, it must also set the port power bit in the host port
+ control and status register (PPWR bit in OTG_FS_HPRT).
+
+ Bit 12 PPWR: Port power
+ The application uses this field to control power to this port, and the core
+ clears this bit on an overcurrent condition.
+ */
+//#ifndef USE_USB_OTG_HS
+// if (0 == state)
+// {
+// /* DISABLE is needed on output of the Power Switch */
+// GPIO_SetBits(HOST_POWERSW_PORT, HOST_POWERSW_VBUS);
+// }
+// else
+// {
+// /*ENABLE the Power Switch by driving the Enable LOW */
+// GPIO_ResetBits(HOST_POWERSW_PORT, HOST_POWERSW_VBUS);
+// }
+//#endif
+}
+
+/**
+ * @brief USB_OTG_BSP_ConfigVBUS
+ * Configures the IO for the Vbus and OverCurrent
+ * @param None
+ * @retval None
+ */
+
+void USB_OTG_BSP_ConfigVBUS(USB_OTG_CORE_HANDLE *pdev)
+{
+#ifdef USE_USB_OTG_FS
+ GPIO_InitTypeDef GPIO_InitStructure;
+
+#ifdef USE_STM3210C_EVAL
+ RCC_APB2PeriphClockCmd(HOST_POWERSW_PORT_RCC, ENABLE);
+
+
+ /* Configure Power Switch Vbus Pin */
+ GPIO_InitStructure.GPIO_Pin = HOST_POWERSW_VBUS;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_Init(HOST_POWERSW_PORT, &GPIO_InitStructure);
+#else
+ #ifdef USE_USB_OTG_FS
+ RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_GPIOH , ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = HOST_POWERSW_VBUS;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
+ GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+ GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
+ GPIO_Init(HOST_POWERSW_PORT,&GPIO_InitStructure);
+ #endif
+#endif
+
+ /* By Default, DISABLE is needed on output of the Power Switch */
+ GPIO_SetBits(HOST_POWERSW_PORT, HOST_POWERSW_VBUS);
+
+ USB_OTG_BSP_mDelay(200); /* Delay is need for stabilising the Vbus Low
+ in Reset Condition, when Vbus=1 and Reset-button is pressed by user */
+#endif
+}
+
+/**
+ * @brief USB_OTG_BSP_TimeInit
+ * Initializes delay unit using Timer2
+ * @param None
+ * @retval None
+ */
+static void USB_OTG_BSP_TimeInit ( void )
+{
+//#ifdef USE_ACCURATE_TIME
+// NVIC_InitTypeDef NVIC_InitStructure;
+//
+// /* Set the Vector Table base address at 0x08000000 */
+// NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x00);
+//
+// /* Configure the Priority Group to 2 bits */
+// NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
+//
+// /* Enable the TIM2 gloabal Interrupt */
+// NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
+// NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
+// NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
+// NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+//
+// NVIC_Init(&NVIC_InitStructure);
+//
+// RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
+//#endif
+}
+
+/**
+ * @brief USB_OTG_BSP_uDelay
+ * This function provides delay time in micro sec
+ * @param usec : Value of delay required in micro sec
+ * @retval None
+ */
+void USB_OTG_BSP_uDelay (const uint32_t usec)
+{
+
+#ifdef USE_ACCURATE_TIME
+ BSP_Delay(usec,TIM_USEC_DELAY);
+#else
+ volatile uint32_t count = 0;
+ const uint32_t utime = (120 * usec / 7);
+ do
+ {
+ if ( ++count > utime )
+ {
+ return ;
+ }
+ }
+ while (1);
+#endif
+
+}
+
+
+/**
+ * @brief USB_OTG_BSP_mDelay
+ * This function provides delay time in milli sec
+ * @param msec : Value of delay required in milli sec
+ * @retval None
+ */
+void USB_OTG_BSP_mDelay (const uint32_t msec)
+{
+#ifdef USE_ACCURATE_TIME
+ BSP_Delay(msec,TIM_MSEC_DELAY);
+#else
+ USB_OTG_BSP_uDelay(msec * 1000);
+#endif
+
+}
+
+
+/**
+ * @brief USB_OTG_BSP_TimerIRQ
+ * Time base IRQ
+ * @param None
+ * @retval None
+ */
+
+void USB_OTG_BSP_TimerIRQ (void)
+{
+#ifdef USE_ACCURATE_TIME
+// if (TIM_GetITStatus(TIM2, TIM_IT_Update) != RESET)
+// {
+// TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
+// if (BSP_delay > 0x00)
+// {
+// BSP_delay--;
+// }
+// else
+// {
+// TIM_Cmd(TIM2,DISABLE);
+// }
+// }
+#endif
+}
+
+#ifdef USE_ACCURATE_TIME
+/**
+ * @brief BSP_Delay
+ * Delay routine based on TIM2
+ * @param nTime : Delay Time
+ * @param unit : Delay Time unit : mili sec / micro sec
+ * @retval None
+ */
+static void BSP_Delay(uint32_t nTime, uint8_t unit)
+{
+
+// BSP_delay = nTime;
+// BSP_SetTime(unit);
+// while(BSP_delay != 0);
+// TIM_Cmd(TIM2,DISABLE);
+}
+
+/**
+ * @brief BSP_SetTime
+ * Configures TIM2 for delay routine based on TIM2
+ * @param unit : msec /usec
+ * @retval None
+ */
+static void BSP_SetTime(uint8_t unit)
+{
+// TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
+//
+// TIM_Cmd(TIM2,DISABLE);
+// TIM_ITConfig(TIM2, TIM_IT_Update, DISABLE);
+//
+//
+// if(unit == TIM_USEC_DELAY)
+// {
+// TIM_TimeBaseStructure.TIM_Period = 11;
+// }
+// else if(unit == TIM_MSEC_DELAY)
+// {
+// TIM_TimeBaseStructure.TIM_Period = 11999;
+// }
+// TIM_TimeBaseStructure.TIM_Prescaler = 5;
+// TIM_TimeBaseStructure.TIM_ClockDivision = 0;
+// TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
+//
+// TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);
+// TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
+//
+// TIM_ARRPreloadConfig(TIM2, ENABLE);
+//
+// /* TIM IT enable */
+// TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE);
+//
+// /* TIM2 enable counter */
+// TIM_Cmd(TIM2, ENABLE);
+}
+
+#endif
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/scpu_usb_CDC_Device_Demo/usb_conf.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usb_conf.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usb_conf.h (working copy)
@@ -0,0 +1,291 @@
+/**
+ ******************************************************************************
+ * @file usb_conf.h
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief General low level driver configuration
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USB_CONF__H__
+#define __USB_CONF__H__
+
+/* Includes ------------------------------------------------------------------*/
+#include "yc3121.h"
+//#include "mhscpu_eval.h"
+
+
+
+/** @addtogroup USB_OTG_DRIVER
+ * @{
+ */
+
+/** @defgroup USB_CONF
+ * @brief USB low level driver configuration file
+ * @{
+ */
+
+/** @defgroup USB_CONF_Exported_Defines
+ * @{
+ */
+
+/* USB Core and PHY interface configuration.
+ Tip: To avoid modifying these defines each time you need to change the USB
+ configuration, you can declare the needed define in your toolchain
+ compiler preprocessor.
+ */
+/****************** USB OTG FS PHY CONFIGURATION *******************************
+* The USB OTG FS Core supports one on-chip Full Speed PHY.
+*
+* The USE_EMBEDDED_PHY symbol is defined in the project compiler preprocessor
+* when FS core is used.
+*******************************************************************************/
+#ifndef USE_USB_OTG_FS
+ //#define USE_USB_OTG_FS
+#endif /* USE_USB_OTG_FS */
+
+#ifdef USE_USB_OTG_FS
+ #define USB_OTG_FS_CORE
+#endif
+
+/****************** USB OTG HS PHY CONFIGURATION *******************************
+* The USB OTG HS Core supports two PHY interfaces:
+* (i) An ULPI interface for the external High Speed PHY: the USB HS Core will
+* operate in High speed mode
+* (ii) An on-chip Full Speed PHY: the USB HS Core will operate in Full speed mode
+*
+* You can select the PHY to be used using one of these two defines:
+* (i) USE_ULPI_PHY: if the USB OTG HS Core is to be used in High speed mode
+* (ii) USE_EMBEDDED_PHY: if the USB OTG HS Core is to be used in Full speed mode
+*
+* Notes:
+* - The USE_ULPI_PHY symbol is defined in the project compiler preprocessor as
+* default PHY when HS core is used.
+* - On STM322xG-EVAL and STM324xG-EVAL boards, only configuration(i) is available.
+* Configuration (ii) need a different hardware, for more details refer to your
+* STM32 device datasheet.
+*******************************************************************************/
+#ifndef USE_USB_OTG_HS
+ //#define USE_USB_OTG_HS
+#endif /* USE_USB_OTG_HS */
+
+#ifndef USE_ULPI_PHY
+ //#define USE_ULPI_PHY
+#endif /* USE_ULPI_PHY */
+
+#ifndef USE_EMBEDDED_PHY
+ //#define USE_EMBEDDED_PHY
+#endif /* USE_EMBEDDED_PHY */
+
+#ifdef USE_USB_OTG_HS
+ #define USB_OTG_HS_CORE
+#endif
+
+/*******************************************************************************
+* FIFO Size Configuration in Device mode
+*
+* (i) Receive data FIFO size = RAM for setup packets +
+* OUT endpoint control information +
+* data OUT packets + miscellaneous
+* Space = ONE 32-bits words
+* --> RAM for setup packets = 10 spaces
+* (n is the nbr of CTRL EPs the device core supports)
+* --> OUT EP CTRL info = 1 space
+* (one space for status information written to the FIFO along with each
+* received packet)
+* --> data OUT packets = (Largest Packet Size / 4) + 1 spaces
+* (MINIMUM to receive packets)
+* --> OR data OUT packets = at least 2*(Largest Packet Size / 4) + 1 spaces
+* (if high-bandwidth EP is enabled or multiple isochronous EPs)
+* --> miscellaneous = 1 space per OUT EP
+* (one space for transfer complete status information also pushed to the
+* FIFO with each endpoint's last packet)
+*
+* (ii)MINIMUM RAM space required for each IN EP Tx FIFO = MAX packet size for
+* that particular IN EP. More space allocated in the IN EP Tx FIFO results
+* in a better performance on the USB and can hide latencies on the AHB.
+*
+* (iii) TXn min size = 16 words. (n : Transmit FIFO index)
+* (iv) When a TxFIFO is not used, the Configuration should be as follows:
+* case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes)
+* --> Txm can use the space allocated for Txn.
+* case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes)
+* --> Txn should be configured with the minimum space of 16 words
+* (v) The FIFO is used optimally when used TxFIFOs are allocated in the top
+* of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
+* (vi) In HS case12 FIFO locations should be reserved for internal DMA registers
+* so total FIFO size should be 1012 Only instead of 1024
+*******************************************************************************/
+
+/****************** USB OTG HS CONFIGURATION **********************************/
+#ifdef USB_OTG_HS_CORE
+ #define RX_FIFO_HS_SIZE 512
+ #define TX0_FIFO_HS_SIZE 128
+ #define TX1_FIFO_HS_SIZE 372
+ #define TX2_FIFO_HS_SIZE 0
+ #define TX3_FIFO_HS_SIZE 0
+ #define TX4_FIFO_HS_SIZE 0
+ #define TX5_FIFO_HS_SIZE 0
+
+// #define USB_OTG_HS_SOF_OUTPUT_ENABLED
+
+ #ifdef USE_ULPI_PHY
+ #define USB_OTG_ULPI_PHY_ENABLED
+ #endif
+ #ifdef USE_EMBEDDED_PHY
+ #define USB_OTG_EMBEDDED_PHY_ENABLED
+ #endif
+ #define USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #define USB_OTG_HS_DEDICATED_EP1_ENABLED
+ #define USB_OTG_HS_LOW_PWR_MGMT_SUPPORT
+#endif
+
+/****************** USB OTG FS CONFIGURATION **********************************/
+// total fifo size <= 448 (512 - 64)
+#define RX1_FIFO_FS_SIZE 64
+#define RX2_FIFO_FS_SIZE 64
+#define RX3_FIFO_FS_SIZE 64
+#define RX4_FIFO_FS_SIZE 0
+#define RX5_FIFO_FS_SIZE 0
+#define RX6_FIFO_FS_SIZE 0
+#define RX7_FIFO_FS_SIZE 0
+
+#define TX1_FIFO_FS_SIZE 64
+#define TX2_FIFO_FS_SIZE 64
+#define TX3_FIFO_FS_SIZE 64
+#define TX4_FIFO_FS_SIZE 0
+#define TX5_FIFO_FS_SIZE 0
+#define TX6_FIFO_FS_SIZE 0
+#define TX7_FIFO_FS_SIZE 0
+
+/* EP0 IN/OUT share the same section FIFO*/
+#define TX0_FIFO_FS_SIZE 64
+#define RX0_FIFO_FS_SIZE 64
+
+#define IS_FIFO_SIZE(size) (((size) == 0) || \
+ ((size) == 8) || \
+ ((size) == 16) || \
+ ((size) == 32) || \
+ ((size) == 64) || \
+ ((size) == 128) || \
+ ((size) == 256) || \
+ ((size) == 512))
+//#define USB_OTG_FS_LOW_PWR_MGMT_SUPPORT
+// #define USB_OTG_FS_SOF_OUTPUT_ENABLED
+
+/****************** USB OTG MISC CONFIGURATION ********************************/
+#define VBUS_SENSING_ENABLED
+
+/****************** USB OTG MODE CONFIGURATION ********************************/
+//#define USE_HOST_MODE
+#define USE_DEVICE_MODE
+//#define USE_OTG_MODE
+/****************** USB OTG DMA MODE CONFIGURATION ***************************/
+//#define USB_OTG_DMA_ENABLE /* Enable DMA mode */
+
+/* BULK Transfer */
+//#define USE_USB_DMA_MODE1
+
+/* Only one endpoind can be enable */
+#define USB_OTG_DEV_DMA_EP_NUM 0x81
+
+/****************** C Compilers dependant keywords ****************************/
+/* In HS mode and when the DMA is used, all variables and data structures dealing
+ with the DMA during the transaction process should be 4-bytes aligned */
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined (__GNUC__) /* GNU Compiler */
+ #define __ALIGN_END __attribute__ ((aligned (4)))
+ #define __ALIGN_BEGIN
+ #else
+ #define __ALIGN_END
+ #if defined (__CC_ARM) /* ARM Compiler */
+ #define __ALIGN_BEGIN __align(4)
+ #elif defined (__ICCARM__) /* IAR Compiler */
+ #define __ALIGN_BEGIN
+ #elif defined (__TASKING__) /* TASKING Compiler */
+ #define __ALIGN_BEGIN __align(4)
+ #endif /* __CC_ARM */
+ #endif /* __GNUC__ */
+#else
+ #define __ALIGN_BEGIN __align(4)
+ #define __ALIGN_END
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+
+/* __packed keyword used to decrease the data type alignment to 1-byte */
+#if defined (__CC_ARM) /* ARM Compiler */
+ #define __packed __packed
+#elif defined (__ICCARM__) /* IAR Compiler */
+ #define __packed __packed
+#elif defined ( __GNUC__ ) /* GNU Compiler */
+ #define __packed __attribute__ ((__packed__))
+#elif defined (__TASKING__) /* TASKING Compiler */
+ #define __packed __unaligned
+#endif /* __CC_ARM */
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_CONF_Exported_Types
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_CONF_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_Variables
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_FunctionsPrototype
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+#endif //__USB_CONF__H__
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
Index: yc_usb/scpu_usb_CDC_Device_Demo/usb_main.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usb_main.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usb_main.h (working copy)
@@ -0,0 +1,18 @@
+#include "usbd_cdc_core.h"
+#include "usbd_usr.h"
+#include "usbd_desc.h"
+#include
+#include
+#include "usb_dcd_int.h"
+
+
+
+
+
+
+
+
+void usb_main(void);
+
+
+
Index: yc_usb/scpu_usb_CDC_Device_Demo/usb_main.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usb_main.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usb_main.c (working copy)
@@ -0,0 +1,152 @@
+/**
+ ******************************************************************************
+ * @file main.c
+ * @author yichip
+ * @version V1.0.0
+ * @date 7-9-2018
+ * @brief This file provides all the Application firmware functions.
+ ******************************************************************************
+ * @attention
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+
+
+
+
+#include
+#include
+#include "usb_dcd_int.h"
+#include "usbd_cdc_core.h"
+#include "usbd_usr.h"
+#include "usbd_desc.h"
+#include "misc.h"
+#include "usbd_cdc_vcp.h"
+
+USB_OTG_CORE_HANDLE USB_OTG_dev;
+extern struct APP_DATA_STRUCT_DEF APP_Gdata_param;
+extern CDC_IF_Prop_TypeDef APP_FOPS;
+
+
+void usb_init()
+{
+ USB_OTG_WRITE_REG8(CORE_USB_CONFIG,0x00);
+ // my_delay_ms(1);
+ USB_OTG_WRITE_REG8(CORE_USB_TRIG,0xc0);
+ USB_OTG_WRITE_REG8(CORE_USB_CONFIG,0x3c);
+ USB_OTG_WRITE_REG8(CORE_USB_STATUS,0xFF);
+ USB_OTG_WRITE_REG8(CORE_USB_FIFO_EMPTY,0xFF);
+ USB_OTG_WRITE_REG8(CORE_USB_ADDR,0x00);
+ USB_OTG_WRITE_REG8(CORE_USB_INT_MASK(0),0x70);
+ #ifdef USB_HID_DEMO_TEST
+ USB_OTG_WRITE_REG8(CORE_USB_INT_MASK(1),0xf2);
+ #else
+ USB_OTG_WRITE_REG8(CORE_USB_INT_MASK(1),0xf0);
+ #endif
+ USB_OTG_WRITE_REG8(CORE_USB_INT_MASK(2),0xff);
+
+
+}
+
+uint8_t TestBuf[100];
+void usb_main(void)
+{
+
+ enable_clock(CLKCLS_BT);
+ BT_CLKPLL_EN = 0xff;
+ enable_clock(CLKCLS_USB);
+ SYSCTRL_HCLK_CON |= 1 << 11;
+ usb_init();
+
+ enable_intr(INTR_USB);
+ memset(&USB_OTG_dev, 0, sizeof(USB_OTG_dev));
+
+ USBD_Init(&USB_OTG_dev,
+ #ifdef USE_USB_OTG_HS
+ USB_OTG_HS_CORE_ID,
+ #else
+ USB_OTG_FS_CORE_ID,
+ #endif
+ &USR_desc,
+ &USBD_CDC_cb,
+ &USRD_cb);
+ for (uint8_t i = 0; i < 10; i++)
+ {
+ TestBuf[i] = i;
+ }
+
+ MyPrintf("YICHIP SCPU USB VCP Demo V1.0.\n");
+
+ while(1)
+ {
+ uint16_t temp1,temp2,cnt;
+ temp2 = temp1;
+ temp1 = USB_OTG_READ_REG8(USB_SOFCNT)|( USB_OTG_READ_REG8(USB_SOFCNTHI)<<8);
+ if((temp2 == temp1) && (temp1 !=0))
+ cnt++;
+ else
+ cnt = 0;
+
+ if(cnt ==10000)
+ {
+ MyPrintf("reset ");
+ USB_OTG_dev.dev.zero_replay_flag =0;
+ memset(&USB_OTG_dev, 0, sizeof(USB_OTG_dev));
+ USB_OTG_dev.dev.device_status = USB_OTG_DEFAULT;
+
+ USBD_Init(&USB_OTG_dev,
+ #ifdef USE_USB_OTG_HS
+ USB_OTG_HS_CORE_ID,
+ #else
+ USB_OTG_FS_CORE_ID,
+ #endif
+ &USR_desc,
+ &USBD_CDC_cb,
+ &USRD_cb);
+ temp1=temp2=cnt=0;
+ USB_OTG_WRITE_REG8(CORE_USB_CLEAR,0x40);
+ USB_OTG_WRITE_REG8(USB_SOFCNT,0);
+ usb_init();
+ }
+ if (APP_Gdata_param.COM_config_cmp)
+ {
+ if (VCP_GetRxChar() != -1)
+ {
+ MyPrintf("> Rx s.\n");
+ DCD_EP_Tx(&USB_OTG_dev,CDC_IN_EP,(uint8_t*)&TestBuf,4);
+ // VCP_DataTx(TestBuf,4);
+ // USB_Tx_State = 1;
+ // USB_OTG_dev.dev.class_cb->DataIn(&USB_OTG_dev,1);
+ // usbd_cdc_DataIn(&USB_OTG_dev,1);
+ }
+ }
+ }
+
+ }
+
+
+
+
+
+
+
+void USB_IRQHandler(void)
+{
+ USBD_OTG_ISR_Handler (&USB_OTG_dev);
+ // NVIC_ClearPendingIRQ(USB_IRQn);
+ // MyPrintf("YICHIP SCPU USB CCID handler startV1.0.\n");
+}
+
+
+
+
+
+
+
+
+
+
+
+
Index: yc_usb/scpu_usb_CDC_Device_Demo/usbd_cdc_vcp.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usbd_cdc_vcp.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usbd_cdc_vcp.h (working copy)
@@ -0,0 +1,76 @@
+/**
+ ******************************************************************************
+ * @file usbd_cdc_vcp.h
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief Header for usbd_cdc_vcp.c file.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_CDC_VCP_H
+#define __USBD_CDC_VCP_H
+
+/* Includes ------------------------------------------------------------------*/
+#ifdef STM32F2XX
+ #include "stm32f2xx.h"
+#elif defined(STM32F10X_CL)
+ #include "stm32f10x.h"
+#endif /* STM32F2XX */
+
+#include "usbd_cdc_core.h"
+#include "usbd_conf.h"
+
+
+/* Exported typef ------------------------------------------------------------*/
+/* The following structures groups all needed parameters to be configured for the
+ ComPort. These parameters can modified on the fly by the host through CDC class
+ command class requests. */
+typedef struct
+{
+ uint32_t bitrate;
+ uint8_t format;
+ uint8_t paritytype;
+ uint8_t datatype;
+}LINE_CODING;
+
+
+
+/* Exported constants --------------------------------------------------------*/
+/* The following define is used to route the USART IRQ handler to be used.
+ The IRQ handler function is implemented in the usbd_cdc_vcp.c file. */
+
+//#define EVAL_COM_IRQHandler UART1_IRQHandler
+
+#define DEFAULT_CONFIG 0
+#define OTHER_CONFIG 1
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+uint16_t VCP_DataTx (uint8_t* Buf, uint32_t Len);
+uint32_t VCP_GetTxBuflen(void);
+uint32_t VCP_GetTxBufrsaddr(void);
+int32_t VCP_GetRxChar(void);
+uint32_t VCP_GetRxBuflen(void);
+int8_t * VCP_GetRxBufrsaddr(void);
+#endif /* __USBD_CDC_VCP_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/scpu_usb_CDC_Device_Demo/usbd_cdc_vcp.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usbd_cdc_vcp.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usbd_cdc_vcp.c (working copy)
@@ -0,0 +1,561 @@
+/**
+ ******************************************************************************
+ * @file usbd_cdc_vcp.c
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief Generic media access Layer.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+#pragma data_alignment = 4
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_cdc_vcp.h"
+#include "usb_conf.h"
+#include "usbd_cdc_core.h"
+#include "Misc.h"
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+LINE_CODING linecoding =
+ {
+ 115200, /* baud rate*/
+ 0x00, /* stop bits-1*/
+ 0x00, /* parity - none*/
+ 0x08 /* nb. of bits 8*/
+ };
+
+
+UART_InitTypeDef USART_InitStructure;
+
+/* These are external variables imported from CDC core to be used for IN
+ transfer management. */
+
+#ifdef USER_SPECIFIED_DATA_SOURCE
+extern uint8_t *APP_Rx_Buffer;
+uint8_t COM_Rx_data_buf[2048];
+#else
+//extern uint8_t APP_Rx_Buffer [];
+extern struct APP_DATA_STRUCT_DEF APP_Gdata_param;
+#endif /* Write CDC received data in this buffer.
+ These data will be sent over USB IN endpoint
+ in the CDC core functions. */
+//extern volatile uint32_t APP_Rx_ptr_in;
+ /* Increment this pointer or roll it back to
+ start address when writing received data
+ in the buffer APP_Rx_Buffer. */
+
+/* Private function prototypes -----------------------------------------------*/
+static uint16_t VCP_Init (void);
+static uint16_t VCP_DeInit (void);
+static uint16_t VCP_Ctrl (uint32_t Cmd, uint8_t* Buf, uint32_t Len);
+//static uint16_t VCP_DataTx (uint8_t* Buf, uint32_t Len);
+static uint16_t VCP_DataRx (uint8_t* Buf, uint32_t Len);
+
+static uint16_t VCP_COMConfig(uint8_t Conf);
+
+CDC_IF_Prop_TypeDef VCP_fops =
+{
+ VCP_Init,
+ VCP_DeInit,
+ VCP_Ctrl,
+ VCP_DataTx,
+ VCP_DataRx
+};
+
+/* Private functions ---------------------------------------------------------*/
+/**
+ * @brief VCP_Init
+ * Initializes the Media on the STM32
+ * @param None
+ * @retval Result of the opeartion (USBD_OK in all cases)
+ */
+static uint16_t VCP_Init(void)
+{
+// NVIC_InitTypeDef NVIC_InitStructure;
+
+ /**/
+ #ifdef USER_SPECIFIED_DATA_SOURCE
+ APP_Rx_Buffer = COM_Rx_data_buf;
+ #else
+ APP_Gdata_param.COM_config_cmp = 0;
+ #endif
+ memset(&APP_Gdata_param, 0, sizeof(APP_Gdata_param));
+ /* EVAL_COM1 default configuration */
+ /* EVAL_COM1 configured as follow:
+ - BaudRate = 115200 baud
+ - Word Length = 8 Bits
+ - One Stop Bit
+ - Parity Odd
+ - Hardware flow control disabled
+ - Receive and transmit enabled
+ */
+// USART_InitStructure.UART_BaudRate = 115200;
+// USART_InitStructure.UART_WordLength = UART_WordLength_8b;
+// USART_InitStructure.UART_StopBits = UART_StopBits_1;
+// USART_InitStructure.UART_Parity = UART_Parity_Odd;
+// UART_Init(UART1, &USART_InitStructure);
+
+// /* Enable the USART Receive interrupt */
+// UART_ITConfig(UART1, UART_IT_RX_RECVD, ENABLE);
+
+// /* Enable USART Interrupt */
+// NVIC_InitStructure.NVIC_IRQChannel = UART1_IRQn;
+// NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+// NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+// NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+// NVIC_Init(&NVIC_InitStructure);
+
+ return USBD_OK;
+}
+
+/**
+ * @brief VCP_DeInit
+ * DeInitializes the Media on the STM32
+ * @param None
+ * @retval Result of the opeartion (USBD_OK in all cases)
+ */
+static uint16_t VCP_DeInit(void)
+{
+
+ return USBD_OK;
+}
+
+
+/**
+ * @brief VCP_Ctrl
+ * Manage the CDC class requests
+ * @param Cmd: Command code
+ * @param Buf: Buffer containing command data (request parameters)
+ * @param Len: Number of data to be sent (in bytes)
+ * @retval Result of the opeartion (USBD_OK in all cases)
+ */
+static uint16_t VCP_Ctrl (uint32_t Cmd, uint8_t* Buf, uint32_t Len)
+{
+ switch (Cmd)
+ {
+ case SEND_ENCAPSULATED_COMMAND:
+ /* Not needed for this driver */
+ break;
+
+ case GET_ENCAPSULATED_RESPONSE:
+ /* Not needed for this driver */
+ break;
+
+ case SET_COMM_FEATURE:
+ /* Not needed for this driver */
+ break;
+
+ case GET_COMM_FEATURE:
+ /* Not needed for this driver */
+ break;
+
+ case CLEAR_COMM_FEATURE:
+ /* Not needed for this driver */
+ break;
+
+ case SET_LINE_CODING:
+ linecoding.bitrate = (uint32_t)(Buf[0] | (Buf[1] << 8) | (Buf[2] << 16) | (Buf[3] << 24));
+ linecoding.format = Buf[4];
+ linecoding.paritytype = Buf[5];
+ linecoding.datatype = Buf[6];
+ APP_Gdata_param.COM_config_cmp = 1;
+ MyPrintf("cmp=%X\n",APP_Gdata_param.COM_config_cmp);
+ MyPrintf("SET_LINE_CODING \n\r");
+ /* Set the new configuration */
+ VCP_COMConfig(OTHER_CONFIG);
+ break;
+
+ case GET_LINE_CODING:
+ Buf[0] = (uint8_t)(linecoding.bitrate);
+ Buf[1] = (uint8_t)(linecoding.bitrate >> 8);
+ Buf[2] = (uint8_t)(linecoding.bitrate >> 16);
+ Buf[3] = (uint8_t)(linecoding.bitrate >> 24);
+ Buf[4] = linecoding.format;
+ Buf[5] = linecoding.paritytype;
+ Buf[6] = linecoding.datatype;
+ break;
+
+ case SET_CONTROL_LINE_STATE:
+ /* Not needed for this driver */
+ break;
+
+ case SEND_BREAK:
+ /* Not needed for this driver */
+ break;
+
+ default:
+ break;
+ }
+
+ return USBD_OK;
+}
+
+int isUsbBufFull()
+{
+ int ret = 0;
+// NVIC_DisableIRQ(USB_IRQn);
+ ret = APP_Gdata_param.rx_structure.Rx_counter >= CDC_APP_RX_DATA_SIZE;
+// NVIC_EnableIRQ(USB_IRQn);
+ return ret;
+}
+/**
+ * @brief VCP_DataTx
+ * CDC received data to be send over USB IN endpoint are managed in
+ * this function.
+ * @param Buf: Buffer of data to be sent
+ * @param Len: Number of data to be sent (in bytes)
+ * @retval Result of the opeartion: USBD_OK if all operations are OK else USBD_FAIL
+ */
+uint16_t VCP_DataTx (uint8_t* Buf, uint32_t Len)
+{
+ #ifdef USER_SPECIFIED_DATA_SOURCE
+ uint32_t i = 0;
+ for (i = 0; i < Len; i++)
+ {
+ *(APP_Rx_Buffer + APP_Rx_ptr_in) = *Buf++;
+ APP_Rx_ptr_in++;
+ }
+ #else
+ uint32_t i = 0;
+ if (linecoding.datatype == 7)
+ {
+ for (i = 0; i < Len; i++)
+ {
+// do
+// {
+// if (isUsbBufFull())
+// {
+// int i;
+// for (i = 0; i < 1000; i++);
+// }else
+// {
+// break;
+// }
+// } while (1);
+ APP_Gdata_param.rx_structure.APP_Rx_Buffer[APP_Gdata_param.rx_structure.APP_Rx_ptr_in++] = (*Buf++) & 0x7F;
+ // NVIC_DisableIRQ(USB_IRQn);
+ APP_Gdata_param.rx_structure.Rx_counter++;
+ // NVIC_EnableIRQ(USB_IRQn);
+ /* To avoid buffer overflow */
+ if(APP_Gdata_param.rx_structure.APP_Rx_ptr_in == CDC_APP_RX_DATA_SIZE)
+ {
+ APP_Gdata_param.rx_structure.APP_Rx_ptr_in = 0;
+ }
+ }
+ }
+ else if (linecoding.datatype == 8)
+ {
+ for (i = 0; i < Len; i++)
+ {
+ /* Detect whether the buffer overflow */
+// do
+// {
+// if (isUsbBufFull())
+// {
+// int i;
+// /* Wait Buf Idle */
+// for (i = 0; i < 1000; i++);
+// }else
+// {
+// break;
+// }
+// } while (1);
+ APP_Gdata_param.rx_structure.APP_Rx_Buffer[APP_Gdata_param.rx_structure.APP_Rx_ptr_in++] = *Buf++;
+ // NVIC_DisableIRQ(USB_IRQn);
+ APP_Gdata_param.rx_structure.Rx_counter++;
+ // NVIC_EnableIRQ(USB_IRQn);
+ /* To avoid buffer overflow */
+ if(APP_Gdata_param.rx_structure.APP_Rx_ptr_in == CDC_APP_RX_DATA_SIZE)
+ {
+ APP_Gdata_param.rx_structure.APP_Rx_ptr_in = 0;
+ }
+ }
+ }
+ #endif
+ return USBD_OK;
+}
+
+/**
+ * @brief Get_TxBuf_length
+ * Get the length of the remaining data to be transmitted
+ * @param NONE
+ * @retval Result receive data length
+ */
+uint32_t VCP_GetTxBuflen(void)
+{
+ uint32_t ret = 0x00;
+ if (APP_Gdata_param.rx_structure.APP_Rx_ptr_out < APP_Gdata_param.rx_structure.APP_Rx_ptr_in)
+ ret = APP_Gdata_param.rx_structure.APP_Rx_ptr_in - APP_Gdata_param.rx_structure.APP_Rx_ptr_out;
+ else
+ ret = CDC_APP_RX_DATA_SIZE + APP_Gdata_param.rx_structure.APP_Rx_ptr_in \
+ - APP_Gdata_param.rx_structure.APP_Rx_ptr_out;
+ return ret;
+}
+
+/**
+ * @brief Get_RxBuf_rsaddr
+ * Get reading receive data starting position.
+ * @param NONE
+ * @retval Result received data is read starting position
+ */
+uint32_t VCP_GetTxBufrsaddr(void)
+{
+ return(APP_Gdata_param.rx_structure.APP_Rx_ptr_out);
+}
+
+/**
+ * @brief Get_RxData
+ * Get receive data by byte
+ * @param NONE
+ * @retval Result receive data
+ */
+int32_t VCP_GetRxChar(void)
+{
+ /* ûÓнÓÊÕµ½ÐÂÊý¾Ý */
+ int ret = -1;
+ if (!APP_Gdata_param.tx_structure.Tx_counter)
+ {
+ return -1;
+ }else{
+ // NVIC_DisableIRQ(USB_IRQn);
+ if (APP_Gdata_param.tx_structure.APP_Tx_ptr_out >= CDC_APP_TX_DATA_SIZE)
+ {
+ APP_Gdata_param.tx_structure.APP_Tx_ptr_out = 0;
+ }
+ APP_Gdata_param.tx_structure.Tx_counter--;
+ ret = (APP_Gdata_param.tx_structure.APP_Tx_Buffer[APP_Gdata_param.tx_structure.APP_Tx_ptr_out++]);
+ // NVIC_EnableIRQ(USB_IRQn);
+ MyPrintf("ret =%x\n",ret);
+ return ret;
+ }
+}
+
+/**
+ * @brief Get_RxBuf_length
+ * Get receive data length
+ * @param NONE
+ * @retval Result receive data length
+ */
+uint32_t VCP_GetRxBuflen(void)
+{
+ return (APP_Gdata_param.tx_structure.Tx_counter);
+}
+
+/**
+ * @brief Get_RxBuf_rsaddr
+ * Get reading receive data starting position.
+ * @param NONE
+ * @retval Result received data is read starting position
+ */
+int8_t * VCP_GetRxBufrsaddr(void)
+{
+ return(&(APP_Gdata_param.tx_structure.APP_Tx_Buffer[APP_Gdata_param.tx_structure.APP_Tx_ptr_out]));
+}
+
+/**
+ * @brief VCP_DataRx
+ * Data received over USB OUT endpoint are sent over CDC interface
+ * through this function.
+ *
+ * @note
+ * This function will block any OUT packet reception on USB endpoint
+ * untill exiting this function. If you exit this function before transfer
+ * is complete on CDC interface (ie. using DMA controller) it will result
+ * in receiving more data while previous ones are still not sent.
+ *
+ * @param Buf: Buffer of data to be received
+ * @param Len: Number of data received (in bytes)
+ * @retval Result of the opeartion: USBD_OK if all operations are OK else VCP_FAIL
+ */
+static uint16_t VCP_DataRx (uint8_t* Buf, uint32_t Len)
+{
+ uint32_t i;
+ MyPrintf("vcp_len =%X\n\r",Len);
+ for (i = 0; i < Len; i++)
+ {
+ APP_Gdata_param.tx_structure.APP_Tx_Buffer[APP_Gdata_param.tx_structure.APP_Tx_ptr_in] = *(Buf + i);
+ APP_Gdata_param.tx_structure.APP_Tx_ptr_in++;
+ APP_Gdata_param.tx_structure.Tx_counter++;
+ if (APP_Gdata_param.tx_structure.Tx_counter > CDC_APP_TX_DATA_SIZE)
+ {
+ APP_Gdata_param.tx_structure.Tx_counter = CDC_APP_TX_DATA_SIZE;
+ APP_Gdata_param.tx_structure.APP_Tx_ptr_out++;
+ APP_Gdata_param.tx_structure.APP_Tx_ptr_out %= CDC_APP_TX_DATA_SIZE;
+ }
+
+ if (APP_Gdata_param.tx_structure.APP_Tx_ptr_in >= CDC_APP_TX_DATA_SIZE)
+ {
+ APP_Gdata_param.tx_structure.APP_Tx_ptr_in = 0;
+ }
+ }
+ return USBD_OK;
+}
+
+
+
+/**
+ * @brief VCP_COMConfig
+ * Configure the COM Port with default values or values received from host.
+ * @param Conf: can be DEFAULT_CONFIG to set the default configuration or OTHER_CONFIG
+ * to set a configuration received from the host.
+ * @retval None.
+ */
+static uint16_t VCP_COMConfig(uint8_t Conf)
+{
+ /*
+ if (Conf == DEFAULT_CONFIG)
+ {
+// /* EVAL_COM1 default configuration */
+// /* EVAL_COM1 configured as follow:
+// - BaudRate = 115200 baud
+// - Word Length = 8 Bits
+// - One Stop Bit
+// - Parity Odd
+// - Hardware flow control disabled
+// - Receive and transmit enabled
+// */
+// USART_InitStructure.UART_BaudRate = 115200;
+// USART_InitStructure.UART_WordLength = UART_WordLength_8b;
+// USART_InitStructure.UART_StopBits = UART_StopBits_1;
+// USART_InitStructure.UART_Parity = UART_Parity_No;
+
+// UART_Init(UART1, &USART_InitStructure);
+// /* Enable the USART Receive interrupt */
+// UART_ITConfig(UART1, UART_IT_RX_RECVD, ENABLE);
+// }
+
+// else
+// {
+// /* set the Stop bit*/
+// switch (linecoding.format)
+// {
+// case 0:
+// USART_InitStructure.UART_StopBits = UART_StopBits_1;
+// break;
+// case 1:
+// USART_InitStructure.UART_StopBits = UART_StopBits_1_5;
+// break;
+// case 2:
+// USART_InitStructure.UART_StopBits = UART_StopBits_2;
+// break;
+// default :
+// VCP_COMConfig(DEFAULT_CONFIG);
+// return (USBD_FAIL);
+// }
+
+// /* set the parity bit*/
+// switch (linecoding.paritytype)
+// {
+// case 0:
+// USART_InitStructure.UART_Parity = UART_Parity_No;
+// break;
+// case 1:
+// USART_InitStructure.UART_Parity = UART_Parity_Even;
+// break;
+// case 2:
+// USART_InitStructure.UART_Parity = UART_Parity_Odd;
+// break;
+// default :
+// VCP_COMConfig(DEFAULT_CONFIG);
+// return (USBD_FAIL);
+// }
+
+// /*set the data type : only 8bits and 9bits is supported */
+// switch (linecoding.datatype)
+// {
+// case 0x07:
+// /* With this configuration a parity (Even or Odd) should be set */
+// USART_InitStructure.UART_WordLength = UART_WordLength_8b;
+// break;
+// case 0x08:
+// if (USART_InitStructure.UART_Parity == UART_Parity_No)
+// {
+// USART_InitStructure.UART_WordLength = UART_WordLength_8b;
+// }
+// else
+// {
+// // USART_InitStructure.UART_WordLength = UART_WordLength_9b;
+// }
+//
+// break;
+// default :
+//// VCP_COMConfig(DEFAULT_CONFIG);
+// return (USBD_FAIL);
+// }
+
+// USART_InitStructure.UART_BaudRate = linecoding.bitrate;
+
+//// UART_Init(UART1, &USART_InitStructure);
+// }
+ return USBD_OK;
+}
+
+/**
+ * @brief EVAL_COM_IRQHandler
+ *
+ * @param None.
+ * @retval None.
+ */
+#ifdef 0
+void EVAL_COM_IRQHandler(void)
+{
+ UART_TypeDef * UARTx = UART1;
+ uint8_t ra_data_re = 0x00;
+ switch(UARTx->OFFSET_8.IIR & 0x0f)
+ {
+ case UART_IT_ID_TX_EMPTY:
+// /* Send the received data to the PC Host*/
+// VCP_DataTx (0,0);
+
+ break;
+ case UART_IT_ID_RX_RECVD:
+ #ifdef USER_SPECIFIED_DATA_SOURCE
+ if (linecoding.datatype == 7)
+ {
+ ra_data_re = UART_ReceiveData(UART1) & 0x7F;
+ }
+ else if (linecoding.datatype == 8)
+ {
+ ra_data_re = UART_ReceiveData(UART1);
+ }
+ VCP_DataTx (&ra_data_re, 1);
+ #else
+// UART_ITConfig(UART1, UART_IT_RX_RECVD, DISABLE);
+
+ ra_data_re = UART_ReceiveData(UART1);
+ VCP_DataTx (&ra_data_re, 1);
+
+// UART_ITConfig(UART1, UART_IT_RX_RECVD, ENABLE);
+ #endif
+
+ /* If overrun condition occurs, clear the ORE flag and recover communication */
+// (void)UART_ReceiveData(UART1);
+ break;
+ default :
+ break;
+ }
+}
+#endif
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/scpu_usb_CDC_Device_Demo/usbd_conf.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usbd_conf.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usbd_conf.h (working copy)
@@ -0,0 +1,108 @@
+/**
+ ******************************************************************************
+ * @file usbd_conf.h
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief USB Device configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_CONF__H__
+#define __USBD_CONF__H__
+
+/* Includes ------------------------------------------------------------------*/
+#include "usb_conf.h"
+
+/** @defgroup USB_CONF_Exported_Defines
+ * @{
+ */
+#define USBD_CFG_MAX_NUM 1
+#define USBD_ITF_MAX_NUM 1
+
+#define USBD_SELF_POWERED
+
+#define USB_MAX_STR_DESC_SIZ 255
+
+/** @defgroup USB_VCP_Class_Layer_Parameter
+ * @{
+ */
+#define CDC_IN_EP 0x81 /* EP1 for data IN */
+#define CDC_OUT_EP 0x01 /* EP1 for data OUT */
+#define CDC_CMD_EP 0x82 /* EP2 for CDC commands */
+
+/* CDC Endpoints parameters: you can fine tune these values depending on the needed baudrates and performance. */
+#ifdef USE_USB_OTG_HS
+ #define CDC_DATA_MAX_PACKET_SIZE 512 /* Endpoint IN & OUT Packet size */
+ #define CDC_CMD_PACKET_SZE 8 /* Control Endpoint Packet size */
+
+ #define CDC_IN_FRAME_INTERVAL 40 /* Number of micro-frames between IN transfers */
+ #define APP_RX_DATA_SIZE 2048 /* Total size of IN buffer:
+ APP_RX_DATA_SIZE*8/MAX_BAUDARATE*1000 should be > CDC_IN_FRAME_INTERVAL*8 */
+#else
+ #define CDC_DATA_MAX_PACKET_SIZE 64 /* Endpoint IN & OUT Packet size */
+ #define CDC_CMD_PACKET_SZE 8 /* Control Endpoint Packet size */
+
+ #define CDC_IN_FRAME_INTERVAL 5 /* Number of frames between IN transfers */
+ #define APP_TX_DATA_SIZE (1024*6)
+ #define APP_RX_DATA_SIZE 2048 /* Total size of IN buffer:
+ APP_RX_DATA_SIZE*8/MAX_BAUDARATE*1000 should be > CDC_IN_FRAME_INTERVAL */
+#endif /* USE_USB_OTG_HS */
+
+#define APP_FOPS VCP_fops
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_Types
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_CONF_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_Variables
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_FunctionsPrototype
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+#endif //__USBD_CONF__H__
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
Index: yc_usb/scpu_usb_CDC_Device_Demo/usbd_desc.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usbd_desc.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usbd_desc.h (working copy)
@@ -0,0 +1,120 @@
+/**
+ ******************************************************************************
+ * @file usbd_desc.h
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief header file for the usbd_desc.c file
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+
+#ifndef __USB_DESC_H
+#define __USB_DESC_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_def.h"
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+/** @defgroup USB_DESC
+ * @brief general defines for the usb device library file
+ * @{
+ */
+
+/** @defgroup USB_DESC_Exported_Defines
+ * @{
+ */
+#define USB_DEVICE_DESCRIPTOR_TYPE 0x01
+#define USB_CONFIGURATION_DESCRIPTOR_TYPE 0x02
+#define USB_STRING_DESCRIPTOR_TYPE 0x03
+#define USB_INTERFACE_DESCRIPTOR_TYPE 0x04
+#define USB_ENDPOINT_DESCRIPTOR_TYPE 0x05
+#define USB_SIZ_DEVICE_DESC 18
+#define USB_SIZ_STRING_LANGID 4
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Exported_TypesDefinitions
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+
+/** @defgroup USBD_DESC_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_Variables
+ * @{
+ */
+extern uint8_t USBD_DeviceDesc [USB_SIZ_DEVICE_DESC];
+extern uint8_t USBD_StrDesc[USB_MAX_STR_DESC_SIZ];
+extern uint8_t USBD_OtherSpeedCfgDesc[USB_LEN_CFG_DESC];
+extern uint8_t USBD_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC];
+extern uint8_t USBD_LangIDDesc[USB_SIZ_STRING_LANGID];
+extern USBD_DEVICE USR_desc;
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_FunctionsPrototype
+ * @{
+ */
+
+
+uint8_t * USBD_USR_DeviceDescriptor( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_LangIDStrDescriptor( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_ManufacturerStrDescriptor ( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_ProductStrDescriptor ( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_SerialStrDescriptor( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_ConfigStrDescriptor( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_InterfaceStrDescriptor( uint8_t speed , uint16_t *length);
+
+#ifdef USB_SUPPORT_USER_STRING_DESC
+uint8_t * USBD_USR_USRStringDesc (uint8_t speed, uint8_t idx , uint16_t *length);
+#endif /* USB_SUPPORT_USER_STRING_DESC */
+
+/**
+ * @}
+ */
+
+#endif /* __USBD_DESC_H */
+
+/**
+ * @}
+ */
+
+/**
+* @}
+*/
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/scpu_usb_CDC_Device_Demo/usbd_desc.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usbd_desc.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usbd_desc.c (working copy)
@@ -0,0 +1,330 @@
+/**
+ ******************************************************************************
+ * @file usbd_desc.c
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief This file provides the USBD descriptors and string formating method.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_req.h"
+#include "usbd_conf.h"
+#include "usb_regs.h"
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+
+/** @defgroup USBD_DESC
+ * @brief USBD descriptors module
+ * @{
+ */
+
+/** @defgroup USBD_DESC_Private_TypesDefinitions
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Private_Defines
+ * @{
+ */
+#define USBD_VID 0x0103
+
+#define USBD_PID 0x6061
+//#define USBD_VID 0x0483
+
+//#define USBD_PID 0x5740
+
+/** @defgroup USB_String_Descriptors
+ * @{
+ */
+#define USBD_LANGID_STRING 0x409
+#define USBD_MANUFACTURER_STRING "MEGAHUNT1901"
+
+#define USBD_PRODUCT_HS_STRING "MEGAHUNT1901 Virtual ComPort in HS mode"
+#define USBD_SERIALNUMBER_HS_STRING "00000000050B"
+
+#define USBD_PRODUCT_FS_STRING "YICHIP3121 Virtual ComPort in FS Mode"
+#define USBD_SERIALNUMBER_FS_STRING "00000000050C"
+
+#define USBD_CONFIGURATION_HS_STRING "VCP Config"
+#define USBD_INTERFACE_HS_STRING "VCP Interface"
+
+#define USBD_CONFIGURATION_FS_STRING "VCP Config"
+#define USBD_INTERFACE_FS_STRING "VCP Interface"
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Private_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Private_Variables
+ * @{
+ */
+
+USBD_DEVICE USR_desc =
+{
+ USBD_USR_DeviceDescriptor,
+ USBD_USR_LangIDStrDescriptor,
+ USBD_USR_ManufacturerStrDescriptor,
+ USBD_USR_ProductStrDescriptor,
+ USBD_USR_SerialStrDescriptor,
+ USBD_USR_ConfigStrDescriptor,
+ USBD_USR_InterfaceStrDescriptor,
+
+};
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+/* USB Standard Device Descriptor */
+__ALIGN_BEGIN uint8_t USBD_DeviceDesc[USB_SIZ_DEVICE_DESC] __ALIGN_END =
+ {
+ 0x12, /*bLength */
+ USB_DEVICE_DESCRIPTOR_TYPE, /*bDescriptorType*/
+// 0x00, /*bcdUSB */
+// 0x02,
+ 0x10, /*bcdUSB */
+ 0x01,
+// 0x00, /*bDeviceClass*/
+ 0x02, /*bDeviceClass*/
+ 0x00, /*bDeviceSubClass*/
+ 0x00, /*bDeviceProtocol*/
+ USB_OTG_MAX_EP0_SIZE, /*bMaxPacketSize*/
+ LOBYTE(USBD_VID), /*idVendor*/
+ HIBYTE(USBD_VID), /*idVendor*/
+ LOBYTE(USBD_PID), /*idVendor*/
+ HIBYTE(USBD_PID), /*idVendor*/
+// 0x00, /*bcdDevice rel. 2.00*/
+// 0x02,
+ 0x00, /*bcdDevice rel. 1.00*/
+ 0x01,
+ USBD_IDX_MFC_STR, /*Index of manufacturer string*/
+ USBD_IDX_PRODUCT_STR, /*Index of product string*/
+ USBD_IDX_SERIAL_STR, /*Index of serial number string*/
+ USBD_CFG_MAX_NUM /*bNumConfigurations*/
+ } ; /* USB_DeviceDescriptor */
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+/* USB Standard Device Descriptor */
+__ALIGN_BEGIN uint8_t USBD_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC] __ALIGN_END =
+{
+ USB_LEN_DEV_QUALIFIER_DESC,
+ USB_DESC_TYPE_DEVICE_QUALIFIER,
+ 0x00,
+ 0x02,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x40,
+ 0x01,
+ 0x00,
+};
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+/* USB Standard Device Descriptor */
+__ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_SIZ_STRING_LANGID] __ALIGN_END =
+{
+ USB_SIZ_STRING_LANGID,
+ USB_DESC_TYPE_STRING,
+ LOBYTE(USBD_LANGID_STRING),
+ HIBYTE(USBD_LANGID_STRING),
+};
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Private_FunctionPrototypes
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Private_Functions
+ * @{
+ */
+
+/**
+* @brief USBD_USR_DeviceDescriptor
+* return the device descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_DeviceDescriptor( uint8_t speed , uint16_t *length)
+{
+ *length = sizeof(USBD_DeviceDesc);
+ return USBD_DeviceDesc;
+}
+
+/**
+* @brief USBD_USR_LangIDStrDescriptor
+* return the LangID string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_LangIDStrDescriptor( uint8_t speed , uint16_t *length)
+{
+ *length = sizeof(USBD_LangIDDesc);
+ return USBD_LangIDDesc;
+}
+
+
+/**
+* @brief USBD_USR_ProductStrDescriptor
+* return the product string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_ProductStrDescriptor( uint8_t speed , uint16_t *length)
+{
+
+
+ if(speed == 0)
+ {
+// USBD_GetString (USBD_PRODUCT_HS_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString (USBD_PRODUCT_FS_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+* @brief USBD_USR_ManufacturerStrDescriptor
+* return the manufacturer string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_ManufacturerStrDescriptor( uint8_t speed , uint16_t *length)
+{
+ USBD_GetString (USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
+ return USBD_StrDesc;
+}
+
+/**
+* @brief USBD_USR_SerialStrDescriptor
+* return the serial number string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_SerialStrDescriptor( uint8_t speed , uint16_t *length)
+{
+ if(speed == USB_OTG_SPEED_HIGH)
+ {
+// USBD_GetString (USBD_SERIALNUMBER_HS_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString (USBD_SERIALNUMBER_FS_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+* @brief USBD_USR_ConfigStrDescriptor
+* return the configuration string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_ConfigStrDescriptor( uint8_t speed , uint16_t *length)
+{
+ if(speed == USB_OTG_SPEED_HIGH)
+ {
+// USBD_GetString (USBD_CONFIGURATION_HS_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString (USBD_CONFIGURATION_FS_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+
+/**
+* @brief USBD_USR_InterfaceStrDescriptor
+* return the interface string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_InterfaceStrDescriptor( uint8_t speed , uint16_t *length)
+{
+ if(speed == 0)
+ {
+// USBD_GetString (USBD_INTERFACE_HS_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString (USBD_INTERFACE_FS_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
Index: yc_usb/scpu_usb_CDC_Device_Demo/usbd_usr.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usbd_usr.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_CDC_Device_Demo/usbd_usr.c (working copy)
@@ -0,0 +1,300 @@
+/**
+ ******************************************************************************
+ * @file usbd_usr.c
+ * @author Megahuntmicro
+ * @version V1.0.0
+ * @date 21-October-2014
+ * @brief This file includes the user application layer
+ ******************************************************************************
+ * @attention
+ *
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "yc3121.h"
+#include "usbd_usr.h"
+#include "usbd_ioreq.h"
+#if !defined(USE_MHSCPU_EVAL) && !defined(USE_GOLDDRAGON_107)
+#include "yc3121.h"
+#endif
+#include "usb_conf.h"
+#include "stdio.h"
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+* @{
+*/
+
+/** @defgroup USBD_USR
+* @brief This file includes the user application layer
+* @{
+*/
+
+/** @defgroup USBD_USR_Private_TypesDefinitions
+* @{
+*/
+/**
+* @}
+*/
+
+
+/** @defgroup USBD_USR_Private_Defines
+* @{
+*/
+/**
+* @}
+*/
+
+
+/** @defgroup USBD_USR_Private_Macros
+* @{
+*/
+/**
+* @}
+*/
+
+
+/** @defgroup USBD_USR_Private_Variables
+* @{
+*/
+
+USBD_Usr_cb_TypeDef USRD_cb =
+{
+ USBD_USR_Init,
+ USBD_USR_DeviceReset,
+ USBD_USR_DeviceConfigured,
+ USBD_USR_DeviceSuspended,
+ USBD_USR_DeviceResumed,
+
+ USBD_USR_DeviceConnected,
+ USBD_USR_DeviceDisconnected,
+
+
+};
+
+
+
+/**
+* @}
+*/
+
+/** @defgroup USBD_USR_Private_Constants
+* @{
+*/
+
+/**
+* @}
+*/
+
+
+
+/** @defgroup USBD_USR_Private_FunctionPrototypes
+* @{
+*/
+/**
+* @}
+*/
+
+
+/** @defgroup USBD_USR_Private_Functions
+* @{
+*/
+
+#define USER_INFORMATION1 "[Key]:RemoteWakeup"
+#define USER_INFORMATION2 "[Joystick]:Mouse emulation"
+
+
+/**
+* @brief USBD_USR_Init
+* Displays the message on LCD for host lib initialization
+* @param None
+* @retval None
+*/
+void USBD_USR_Init(void)
+{
+// /* Initialize LEDs */
+// STM_EVAL_LEDInit(LED1);
+//#ifndef USE_MHSCPU_EVAL
+// STM_EVAL_LEDInit(LED2);
+// STM_EVAL_LEDInit(LED3);
+// STM_EVAL_LEDInit(LED4);
+//#endif
+//
+// /* Configure the IOE on which the JoyStick is connected */
+//#if defined(USE_MHSCPU_EVAL) || defined(USE_GOLDDRAGON_107)
+// JoyStick_GPIO_Config();
+//#else
+// IOE_Config();
+//#endif
+//
+// /* Setup SysTick Timer for 20 msec interrupts
+// This interrupt is used to probe the joystick */
+// if (SysTick_Config(SystemCoreClock / 48))
+// {
+// /* Capture error */
+// while (1);
+// }
+// /* Initialize the LCD */
+//#if defined (USE_STM322xG_EVAL)
+// STM322xG_LCD_Init();
+//#elif defined(USE_STM324xG_EVAL)
+// STM324xG_LCD_Init();
+//#elif defined (USE_STM3210C_EVAL)
+// STM3210C_LCD_Init();
+//#else
+// #error "Missing define: Evaluation board (ie. USE_STM322xG_EVAL)"
+//#endif
+
+// LCD_LOG_Init();
+
+//#ifdef USE_USB_OTG_HS
+// LCD_LOG_SetHeader(" USB OTG HS HID Device");
+//#else
+// LCD_LOG_SetHeader(" USB OTG FS HID Device");
+//#endif
+// LCD_UsrLog("> USB device library started.\n");
+// LCD_LOG_SetFooter (" USB Device Library v1.1.0" );
+//
+// /* Information panel */
+// LCD_SetTextColor(Green);
+// LCD_DisplayStringLine( LCD_PIXEL_HEIGHT - 42, USER_INFORMATION1);
+// LCD_DisplayStringLine( LCD_PIXEL_HEIGHT - 30, USER_INFORMATION2);
+// LCD_SetTextColor(LCD_LOG_DEFAULT_COLOR);
+
+}
+
+/**
+* @brief USBD_USR_DeviceReset
+* Displays the message on LCD on device Reset Event
+* @param speed : device speed
+* @retval None
+*/
+void USBD_USR_DeviceReset(uint8_t speed )
+{
+// switch (speed)
+// {
+// case USB_OTG_SPEED_HIGH:
+// LCD_LOG_SetFooter (" USB Device Library v1.1.0 [HS]" );
+// break;
+
+// case USB_OTG_SPEED_FULL:
+// LCD_LOG_SetFooter (" USB Device Library v1.1.0 [FS]" );
+// break;
+// default:
+// LCD_LOG_SetFooter (" USB Device Library v1.1.0 [??]" );
+//
+// }
+}
+
+
+/**
+* @brief USBD_USR_DeviceConfigured
+* Displays the message on LCD on device configuration Event
+* @param None
+* @retval Staus
+*/
+void USBD_USR_DeviceConfigured (void)
+{
+// printf("> HID Interface started.\n");
+}
+
+
+/**
+* @brief USBD_USR_DeviceConnected
+* Displays the message on LCD on device connection Event
+* @param None
+* @retval Staus
+*/
+void USBD_USR_DeviceConnected (void)
+{
+ printf("> USB Device Connected.\n");
+}
+
+
+/**
+* @brief USBD_USR_DeviceDisonnected
+* Displays the message on LCD on device disconnection Event
+* @param None
+* @retval Staus
+*/
+void USBD_USR_DeviceDisconnected (void)
+{
+ printf("> USB Device Disconnected.\n");
+}
+
+/**
+* @brief USBD_USR_DeviceSuspended
+* Displays the message on LCD on device suspend Event
+* @param None
+* @retval None
+*/
+void USBD_USR_DeviceSuspended(void)
+{
+ printf("\n> USB Device in Suspend Mode.\n");
+ /* Users can do their application actions here for the USB-Reset */
+}
+
+
+/**
+* @brief USBD_USR_DeviceResumed
+* Displays the message on LCD on device resume Event
+* @param None
+* @retval None
+*/
+void USBD_USR_DeviceResumed(void)
+{
+ printf("\n> USB Device in Idle Mode.\n");
+ /* Users can do their application actions here for the USB-Reset */
+}
+
+/**
+* @}
+*/
+void my_delay_ms(int ms)
+{
+ int delay_num;
+ while(ms-->0)
+ {
+ delay_num=(CPU_MHZ/1000)/8+400;
+ while(delay_num-->0)
+ {
+ __asm__("nop");
+ }
+ }
+}
+/**
+* @}
+*/
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Index: yc_usb/scpu_usb_ccid_Device_Demo/sc_itf.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/sc_itf.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/sc_itf.h (working copy)
@@ -0,0 +1,97 @@
+/**
+ ******************************************************************************
+ * @file sc_itf.h
+ * @author MCD Application Team
+ * @version V1.0.0
+ * @date 31-January-2014
+ * @brief Evaluation board specific configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2014 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __SC_ITF_H
+#define __SC_ITF_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "smartcard.h"
+#include "usbd_ccid_if.h"
+#include "usbd_ccid_cmd.h"
+
+/* Exported constants --------------------------------------------------------*/
+/* Exported types ------------------------------------------------------------*/
+typedef struct
+{
+ uint8_t voltage; /* Voltage for the Card Already Selected */
+ uint8_t USART_GuardTime;
+ uint8_t SC_A2R_FiDi;
+ uint8_t SC_hostFiDi;
+ uint8_t USART_DefaultGuardTime;
+ uint32_t USART_BaudRate;
+} SC_Param_t;
+
+#pragma pack(1)
+typedef struct _Protocol0_DataStructure_t
+{
+ uint8_t bmFindexDindex;
+ uint8_t bmTCCKST0;
+ uint8_t bGuardTimeT0;
+ uint8_t bWaitingIntegerT0;
+ uint8_t bClockStop;
+} Protocol0_DataStructure_t;
+#pragma pack()
+
+extern SC_Param_t SC_Param;
+extern Protocol0_DataStructure_t Protocol0_DataStructure;
+/* Exported macro ------------------------------------------------------------*/
+#define MAX_EXTRA_GUARD_TIME (0xFF - DEFAULT_EXTRA_GUARDTIME)
+
+ /* Following macros are used for SC_XferBlock command */
+#define XFER_BLK_SEND_DATA 1 /* Command is for issuing the data */
+#define XFER_BLK_RECEIVE_DATA 2 /* Command is for receiving the data */
+#define XFER_BLK_NO_DATA 3 /* Command type is No data exchange */
+
+/* Exported functions ------------------------------------------------------- */
+/* APPLICATION LAYER ---------------------------------------------------------*/
+void SC_AnswerToReset (uint8_t );
+uint8_t SC_GetState (void);
+void SC_SetState (uint8_t scState);
+void SC_ConfigDetection (void);
+void SC_SaveVoltage (uint8_t );
+void SC_UpdateParams (void);
+void SC_InitParams (void);
+uint8_t SC_SetParams (Protocol0_DataStructure_t* );
+uint8_t SC_ExecuteEscape (uint8_t* escapePtr, uint32_t escapeLen,
+ uint8_t* responseBuff,
+ uint16_t* responseLen);
+uint8_t SC_SetClock (uint8_t bClockCommand);
+uint8_t SC_XferBlock (uint8_t* ptrBlock, uint32_t blockLen, uint16_t expectedLen);
+uint8_t SC_Request_GetClockFrequencies(uint8_t* pbuf, uint16_t* len);
+uint8_t SC_Request_GetDataRates(uint8_t* pbuf, uint16_t* len);
+uint8_t SC_T0Apdu(uint8_t bmChanges, uint8_t bClassGetResponse,
+ uint8_t bClassEnvelope);
+uint8_t SC_Mechanical(uint8_t bFunction);
+uint8_t SC_SetDataRateAndClockFrequency(uint32_t dwClockFrequency,
+ uint32_t dwDataRate);
+uint8_t SC_Secure(uint32_t dwLength, uint8_t bBWI, uint16_t wLevelParameter,
+ uint8_t* pbuf, uint32_t* returnLen );
+
+#endif /* __SC_ITF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/scpu_usb_ccid_Device_Demo/sc_itf.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/sc_itf.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/sc_itf.c (working copy)
@@ -0,0 +1,875 @@
+/**
+ ******************************************************************************
+ * @file sc_itf.c
+ * @author MCD Application Team
+ * @version V1.0.0
+ * @date 31-January-2014
+ * @brief SmartCard Interface file
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2014 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "sc_itf.h"
+#include "usb_bsp.h"
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+SC_Param_t SC_Param;
+Protocol0_DataStructure_t Protocol0_DataStructure;
+
+SC_ADPU_Commands SC_ADPU;
+SC_ADPU_Response SC_Response;
+
+/* F Table */
+static uint32_t F_Table[16] = {372, 372, 558, 744, 1116, 1488, 1860, 0, 0, 512, 768,
+ 1024, 1536, 2048, 0, 0};
+/* D Table */
+static uint32_t D_Table[16] = {0, 1, 2, 4, 8, 16, 32, 64, 12, 20, 0, 0, 0, 0, 0,
+ 0};
+
+uint32_t SC_GetDTableValue(uint8_t idx)
+{
+ return D_Table[idx];
+}
+
+void SC_InitParams (void)
+{
+ /*
+ FI, the reference to a clock rate conversion factor
+ over the bits b8 to b5
+- DI, the reference to a baud rate adjustment factor
+ over the bits b4 to bl
+ */
+
+ SC_Param.SC_A2R_FiDi = DEFAULT_FIDI;
+ SC_Param.SC_hostFiDi = DEFAULT_FIDI;
+
+ Protocol0_DataStructure.bmFindexDindex=DEFAULT_FIDI;
+
+ /* Placeholder, Ignored */
+ /* 0 = Direct, first byte of the ICC’s ATR data. */
+ Protocol0_DataStructure.bmTCCKST0 = DEFAULT_T01CONVCHECKSUM;
+
+ /* Extra GuardTime = 0 etu */
+ Protocol0_DataStructure.bGuardTimeT0 = DEFAULT_EXTRA_GUARDTIME;
+ Protocol0_DataStructure.bWaitingIntegerT0=DEFAULT_WAITINGINTEGER;
+ Protocol0_DataStructure.bClockStop =0; /* Stopping the Clock is not allowed */
+}
+
+/**
+ * @brief SC_SetClock function to define Clock Status request from the host.
+ * This is user implementable
+ * @param uint8_t bClockCommand: Clock status from the host
+ * @retval uint8_t status value
+ */
+uint8_t SC_SetClock (uint8_t bClockCommand)
+{
+ /* bClockCommand • 00h restarts Clock
+ • 01h Stops Clock in the state shown in the bClockStop
+ field of the PC_to_RDR_SetParameters command
+ and RDR_to_PC_Parameters message.*/
+
+ if (bClockCommand == 0)
+ {
+ /* 00h restarts Clock : Since Clock is always running, PASS this command */
+ return SLOT_NO_ERROR;
+ }
+ else if (bClockCommand == 1)
+ {
+ return SLOTERROR_BAD_CLOCKCOMMAND;
+ }
+
+ return SLOTERROR_CMD_NOT_SUPPORTED;
+}
+
+
+/**
+ * @brief SC_SetParams
+ * Set the parameters for CCID/USART interface
+ * @param Protocol0_DataStructure_t* pPtr: pointer to buffer containing the
+ * parameters to be set in USART
+ * @retval uint8_t status value
+ */
+uint8_t SC_SetParams (Protocol0_DataStructure_t* pPtr)
+{
+ uint16_t guardTime; /* Keep it 16b for handling 8b additions */
+ uint32_t fi_new;
+ uint32_t di_new;
+
+ guardTime = pPtr->bGuardTimeT0;
+ if (guardTime > MAX_EXTRA_GUARD_TIME )
+ {
+ return SLOTERROR_BAD_GUARDTIME;
+ }
+
+ fi_new = pPtr->bmFindexDindex;
+ di_new = pPtr->bmFindexDindex;
+
+ /* Check for the FIDI Value set by Host */
+ di_new &= (uint8_t)0x0F;
+ if (SC_GetDTableValue(di_new) == 0)
+ {
+ return SLOTERROR_BAD_FIDI;
+ }
+
+ fi_new >>= 4;
+ fi_new &= (uint8_t)0x0F;
+
+ if ( SC_GetDTableValue(fi_new) == 0)
+ {
+ return SLOTERROR_BAD_FIDI;
+ }
+
+// /* Put Total GuardTime in USART Settings */
+// USART_SetGuardTime(SC_USART, (uint8_t)(guardTime + DEFAULT_EXTRA_GUARDTIME) );
+
+ /* Save Extra GuardTime Value */
+ Protocol0_DataStructure.bGuardTimeT0 = guardTime;
+
+ Protocol0_DataStructure.bmTCCKST0 = pPtr->bmTCCKST0;
+ Protocol0_DataStructure.bClockStop = pPtr->bClockStop;
+
+ /* Save New bmFindexDindex */
+ SC_Param.SC_hostFiDi = pPtr->bmFindexDindex;
+
+ //No PTS procedure
+ //SC_PTSConfig();
+
+ Protocol0_DataStructure.bmFindexDindex = pPtr->bmFindexDindex;
+
+ return SLOT_NO_ERROR;
+}
+
+uint8_t SC_XferBlock (uint8_t* ptrBlock, uint32_t blockLen, uint16_t expectedLen)
+{
+
+ uint32_t index, i = 0;
+ uint32_t cmdType = 1;
+ if((ptrBlock[0] == 0x00) && (ptrBlock[1] == 0x80))
+ {
+ memcpy(Ccid_bulkin_data.abData,ptrBlock+5,blockLen-5);
+ Ccid_bulkin_data.dwLength = blockLen-5;
+ //memcpy(Ccid_bulkin_data.abData,COMMDATA,Ccid_bulkin_data.dwLength);
+ Ccid_bulkin_data.abData[Ccid_bulkin_data.dwLength++] = 0x90;
+ Ccid_bulkin_data.abData[Ccid_bulkin_data.dwLength++] = 0x00;
+ }
+ else
+ {
+ SC_ADPU.Header.CLA = ptrBlock[i++];
+ SC_ADPU.Header.INS = ptrBlock[i++];
+ SC_ADPU.Header.P1 = ptrBlock[i++];
+ SC_ADPU.Header.P2 = ptrBlock[i++];
+
+ //CLA + INS + P1 + P2
+ if (blockLen == 0x04)
+ {
+ /* Case: no data to exchange with ICC, only header sent by Host= 4Bytes
+ Command TPDU = CLA INS P1 P2, the CCID is responsible to add P3 =00h */
+ SC_ADPU.Body.LC = 0;
+ SC_ADPU.Body.LE = 0;
+ cmdType = 0x01;
+ }
+ //CLA + INS + P1 + P2 + LE
+ else if (0x05 == blockLen)
+ {
+ SC_ADPU.Body.LC = 0;
+ if (0 != ptrBlock[i])
+ {
+ SC_ADPU.Body.LE = ptrBlock[i];
+ }
+ else
+ {
+ SC_ADPU.Body.LE = 0x100;
+ }
+ i++;
+ cmdType = 0x02;
+ }
+ //CLA + INS + P1 + P2 + LC + DATA[LC]
+ //CLA + INS + P1 + P2 + LC + DATA[LC] + LE
+ else if (0x05 < blockLen)
+ {
+ SC_ADPU.Body.LC = ptrBlock[i++];
+ memcpy(SC_ADPU.Body.Data, ptrBlock + i, SC_ADPU.Body.LC);
+ i += SC_ADPU.Body.LC;
+ //CLA + INS + P1 + P2 + LC + DATA[LC]
+ if (i == blockLen)
+ {
+ cmdType = 0x03;
+ SC_ADPU.Body.LE = 0;
+ }
+ //CLA + INS + P1 + P2 + LC + DATA[LC] + LE
+ else if ((i + 1)== blockLen)
+ {
+ cmdType = 0x04;
+ if (0 != ptrBlock[i])
+ {
+ SC_ADPU.Body.LE = ptrBlock[i];
+ }
+ else
+ {
+ SC_ADPU.Body.LE = 0x100;
+ }
+ }
+ else
+ {
+ return SLOTERROR_BAD_DWLENGTH;
+ }
+ }
+ else
+ {
+ return SLOTERROR_BAD_DWLENGTH;
+ }
+
+ MyPrintf("case %d\r\n", cmdType);
+ MyPrintf("lc %d\r\n", SC_ADPU.Body.LC);
+ MyPrintf("le %d\r\n", SC_ADPU.Body.LE);
+
+ if (3 == cmdType || 4 == cmdType)
+ {
+ MyPrintf("Recv:\n");
+ for(index = 5; index < SC_ADPU.Body.LC + 5; index++)
+ {
+ SC_ADPU.Body.Data[index] = ptrBlock[index];
+ MyPrintf("%02x ", SC_ADPU.Body.Data[index]);
+ }
+ MyPrintf("End:\n");
+ }
+
+ /************ Process the commands based on their Types from the Host ********/
+ if (2 == cmdType || 4 == cmdType)
+ {
+ SC_Response.SW1 = 0x90;
+ SC_Response.SW2 = 0x00;
+ SC_ADPU.Body.LE = 10;
+ //SC_Response.Data recv buffer.
+ for (index = 0; index < SC_ADPU.Body.LE; index++)
+ {
+ SC_Response.Data[index] = index;
+ }
+
+
+ if (0x84 == SC_ADPU.Header.INS)
+ {
+ for (index = 0; index < SC_ADPU.Body.LE; index++)
+ {/* Copy the ATR to the Response Buffer */
+ Ccid_bulkin_data.abData[index] = SC_Response.Data[index];
+ }
+ }
+ else
+ {
+ SC_ADPU.Body.LE = 0;
+ }
+
+ Ccid_bulkin_data.abData[index++] = SC_Response.SW1;
+ Ccid_bulkin_data.abData[index] = SC_Response.SW2;
+
+
+ /* Response Len = Expected Len + SW1, SW2*/
+ Ccid_bulkin_data.dwLength= (SC_ADPU.Body.LE) + 2;
+
+ }
+ else if (1 == cmdType || 3 == cmdType)
+ {
+ SC_Response.SW1 = 0x90;
+ SC_Response.SW2 = 0x00;
+ Ccid_bulkin_data.dwLength = 2;
+ }
+ }
+ return SLOT_NO_ERROR;
+
+
+
+}
+
+#if 0
+/* Directories & Files ID */
+const uint8_t MasterRoot[2] = {0x3F, 0x00};
+const uint8_t GSMDir[2] = {0x7F, 0x20};
+const uint8_t ICCID[2] = {0x2F, 0xE2};
+const uint8_t IMSI[2] = {0x6F, 0x07};
+const uint8_t CHV1[8] = {'0', '0', '0', '0', '0', '0', '0', '0'};
+
+/* State Machine for the SmartCard Interface */
+SC_State SCState = SC_POWER_OFF;
+
+/* APDU Transport Structures */
+SC_ADPU_Commands SC_ADPU;
+SC_ADPU_Response SC_Response;
+SC_Param_t SC_Param;
+Protocol0_DataStructure_t Protocol0_DataStructure;
+
+volatile uint32_t CardInserted = 0;
+uint32_t CHV1Status = 0, i = 0;
+volatile uint8_t ICCID_Content[10] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+volatile uint8_t IMSI_Content[9] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+/* Extern variables ----------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+static void Delay (uint32_t msec);
+
+/* Private functions ---------------------------------------------------------*/
+
+/**
+ * @brief Manages the Warm and Cold Reset and get the Answer to Reset from ICC
+ * @param uint8_t voltage required by host
+ * @retval None
+ */
+//void SC_AnswerToReset (uint8_t voltage)
+//{
+// SCState = SC_POWER_ON;
+//
+// SC_ADPU.Header.CLA = 0x00;
+// SC_ADPU.Header.INS = SC_GET_A2R;
+// SC_ADPU.Header.P1 = 0x00;
+// SC_ADPU.Header.P2 = 0x00;
+// SC_ADPU.Body.LC = 0x00;
+//
+// /* Power ON the card */
+// SC_PowerCmd(ENABLE);
+//
+// /* Configure the Voltage, Even if IO is still not configured */
+// SC_VoltageConfig(voltage);
+//
+// while ((SCState != SC_ACTIVE_ON_T0) && (SCState != SC_NO_INIT))
+// { /* If Either The Card has become Active or Become De-Active */
+// SC_Handler(&SCState, &SC_ADPU, &SC_Response);
+// }
+//
+// if (SCState == SC_ACTIVE_ON_T0)
+// {
+// SC_UpdateParams();
+// /* Apply the Procedure Type Selection (PTS) */
+// SC_PTSConfig();
+// SC_SaveVoltage(voltage); /* Save Voltage for Future use */
+// }
+//
+// /* Inserts delay(400ms) for Smartcard clock resynchronization */
+// Delay(400);
+//}
+
+
+/**
+ * @brief Provides the value of SCState variable
+ * @param None
+ * @retval uint8_t SCState
+ */
+uint8_t SC_GetState (void)
+{
+ return SCState;
+}
+
+/**
+ * @brief Set the value of SCState variable to Off
+ * @param uint8_t scState : value of SCState to be updated
+ * @retval None
+ */
+void SC_SetState (uint8_t scState)
+{
+ SCState = (SC_State)scState;
+}
+
+/**
+ * @brief Configure the CMDVCC state for right detection of Card Insertion
+ * @param None
+ * @retval None
+ */
+void SC_ConfigDetection (void)
+{
+// GPIO_InitTypeDef GPIO_InitStructure;
+// NVIC_InitTypeDef NVIC_InitStructure;
+
+// /* Enable GPIO clock */
+// SYSCTRL_APBPeriphClockCmd(SC_OFF_GPIO_CLK | SC_CMDVCC_GPIO_CLK |
+// SC_3_5V_GPIO_CLK | SC_RESET_GPIO_CLK, ENABLE);
+
+// /* Configure Smartcard CMDVCC pin */
+// GPIO_InitStructure.GPIO_Pin = SC_CMDVCC_PIN;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+// GPIO_InitStructure.GPIO_Remap = GPIO_Remap_1;
+// GPIO_Init(SC_CMDVCC_GPIO_PORT, &GPIO_InitStructure);
+//
+// /* Configure Smartcard Reset pin */
+// GPIO_InitStructure.GPIO_Pin = SC_RESET_PIN;
+// GPIO_Init(SC_RESET_GPIO_PORT, &GPIO_InitStructure);
+
+// /* Configure Smartcard 3/5V pin */
+// GPIO_InitStructure.GPIO_Pin = SC_3_5V_PIN;
+// GPIO_Init(SC_3_5V_GPIO_PORT, &GPIO_InitStructure);
+
+// /* Select 5V */
+// SC_VoltageConfig(SC_VOLTAGE_5V);
+
+// /* Disable CMDVCC */
+// SC_PowerCmd(DISABLE);
+
+// /* Set RSTIN HIGH */
+// SC_Reset(Bit_SET);
+//
+// /* Configure Smartcard OFF pin */
+// GPIO_InitStructure.GPIO_Pin = SC_OFF_PIN;
+// GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+// GPIO_Init(SC_OFF_GPIO_PORT, &GPIO_InitStructure);
+//
+//// /* Configure EXTI line connected to Smartcard OFF Pin */
+//// SYSCFG_EXTILineConfig(SC_OFF_EXTI_PORT_SOURCE, SC_OFF_EXTI_PIN_SOURCE);
+
+//// EXTI_ClearITPendingBit(SC_OFF_EXTI_LINE);
+////
+//// EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
+//// EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
+//// EXTI_InitStructure.EXTI_Line = SC_OFF_EXTI_LINE;
+//// EXTI_InitStructure.EXTI_LineCmd = ENABLE;
+//// EXTI_Init(&EXTI_InitStructure);
+// /* Enable EXTI Interrupt */
+// EXTI_LineConfig(SC_OFF_EXTI_LINE, SC_OFF_EXTI_PIN_SOURCE, EXTI_Trigger_Rising);
+//
+// /* Clear the SC_OFF_EXTI_IRQn Pending Bit */
+// NVIC_ClearPendingIRQ(SC_OFF_EXTI_IRQn);
+// NVIC_InitStructure.NVIC_IRQChannel = SC_OFF_EXTI_IRQn;
+// NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+// NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3;
+// NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+// NVIC_Init(&NVIC_InitStructure);
+
+}
+
+/**
+ * @brief Saves the voltage value to be saved for further usage
+ * @param uint8_t voltage : voltage value to be saved for further usage
+ * @retval None
+ */
+void SC_SaveVoltage (uint8_t voltage)
+{
+ SC_Param.voltage = voltage;
+}
+
+/**
+ * @brief Save the A2R Parameters for further usage
+ * @param None
+ * @retval None
+ */
+void SC_UpdateParams (void)
+{
+ /*
+ FI, the reference to a clock rate conversion factor
+ over the bits b8 to b5
+ DI, the reference to a baud rate adjustment factor
+ over the bits b4 to bl
+ */
+ SC_Param.SC_A2R_FiDi = SC_A2R.T[0].InterfaceByte[0].Value;
+ SC_Param.SC_hostFiDi = SC_A2R.T[0].InterfaceByte[0].Value;
+
+ Protocol0_DataStructure.bmFindexDindex= SC_A2R.T[0].InterfaceByte[0].Value ;
+}
+
+/**
+ * @brief Initialize the parameters structures
+ * @param None
+ * @retval None
+ */
+void SC_InitParams (void)
+{
+ /*
+ FI, the reference to a clock rate conversion factor
+ over the bits b8 to b5
+- DI, the reference to a baud rate adjustment factor
+ over the bits b4 to bl
+ */
+
+ SC_Param.SC_A2R_FiDi = DEFAULT_FIDI;
+ SC_Param.SC_hostFiDi = DEFAULT_FIDI;
+
+ Protocol0_DataStructure.bmFindexDindex=DEFAULT_FIDI;
+
+ /* Placeholder, Ignored */
+ /* 0 = Direct, first byte of the ICC’s ATR data. */
+ Protocol0_DataStructure.bmTCCKST0 = DEFAULT_T01CONVCHECKSUM;
+
+ /* Extra GuardTime = 0 etu */
+ Protocol0_DataStructure.bGuardTimeT0 = DEFAULT_EXTRA_GUARDTIME;
+ Protocol0_DataStructure.bWaitingIntegerT0=DEFAULT_WAITINGINTEGER;
+ Protocol0_DataStructure.bClockStop =0; /* Stopping the Clock is not allowed */
+}
+
+/**
+ * @brief SC_SetParams
+ * Set the parameters for CCID/USART interface
+ * @param Protocol0_DataStructure_t* pPtr: pointer to buffer containing the
+ * parameters to be set in USART
+ * @retval uint8_t status value
+ */
+uint8_t SC_SetParams (Protocol0_DataStructure_t* pPtr)
+{
+ uint16_t guardTime; /* Keep it 16b for handling 8b additions */
+ uint32_t fi_new;
+ uint32_t di_new;
+
+ guardTime = pPtr->bGuardTimeT0;
+ if (guardTime > MAX_EXTRA_GUARD_TIME )
+ {
+ return SLOTERROR_BAD_GUARDTIME;
+ }
+
+ fi_new = pPtr->bmFindexDindex;
+ di_new = pPtr->bmFindexDindex;
+
+ /* Check for the FIDI Value set by Host */
+ di_new &= (uint8_t)0x0F;
+ if (SC_GetDTableValue(di_new) == 0)
+ {
+ return SLOTERROR_BAD_FIDI;
+ }
+
+ fi_new >>= 4;
+ fi_new &= (uint8_t)0x0F;
+
+ if ( SC_GetDTableValue(fi_new) == 0)
+ {
+ return SLOTERROR_BAD_FIDI;
+ }
+
+// /* Put Total GuardTime in USART Settings */
+// USART_SetGuardTime(SC_USART, (uint8_t)(guardTime + DEFAULT_EXTRA_GUARDTIME) );
+
+ /* Save Extra GuardTime Value */
+ Protocol0_DataStructure.bGuardTimeT0 = guardTime;
+
+ Protocol0_DataStructure.bmTCCKST0 = pPtr->bmTCCKST0;
+ Protocol0_DataStructure.bClockStop = pPtr->bClockStop;
+
+ /* Save New bmFindexDindex */
+ SC_Param.SC_hostFiDi = pPtr->bmFindexDindex;
+ SC_PTSConfig();
+
+ Protocol0_DataStructure.bmFindexDindex = pPtr->bmFindexDindex;
+
+ return SLOT_NO_ERROR;
+}
+
+/**
+ * @brief SC_ExecuteEscape
+ * SC_ExecuteEscape function from the host. This is user implementable
+ * @param uint8_t* ptrEscape: pointer to buffer containing the Escape data
+ * @param uint32_t escapeLen: length of escaped data
+ * @param uint8_t* responseBuff: pointer containing escape buffer response
+ * @param uint16_t* responseLen: length of escape response buffer
+ * @retval uint8_t status value
+ */
+uint8_t SC_ExecuteEscape (uint8_t* ptrEscape, uint32_t escapeLen,
+ uint8_t* responseBuff,
+ uint16_t* responseLen)
+{
+ uint32_t idx;
+
+ /* Manufacturer specific implementation ... */
+
+ /* Do a loopback for example..*/
+ /* To be Modified for end application */
+ for (idx =0; idx© COPYRIGHT 2014 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __SMARTCARD_H
+#define __SMARTCARD_H
+
+/* Includes ------------------------------------------------------------------*/
+//#include "platform_config.h"
+//#include "sc_itf.h"
+#include "yc3121.h"
+/* Exported constants --------------------------------------------------------*/
+#define T0_PROTOCOL 0x00 /* T0 protocol */
+#define T1_PROTOCOL 0x01 /* T1 protocol */
+#define DIRECT 0x3B /* Direct bit convention */
+#define INDIRECT 0x3F /* Indirect bit convention */
+#define SETUP_LENGTH 20
+#define HIST_LENGTH 20
+#define MAX_PROTOCOLLEVEL 7 /* Maximum levels of protocol */
+#define MAX_INTERFACEBYTE 4 /* Maximum number of interface bytes per protocol */
+#define LC_MAX 24
+#define SC_RECEIVE_TIMEOUT 0x8000 /* Direction to reader */
+
+/* T=1 protocol constants */
+#define T1_I_BLOCK 0x00 /* PCB (I-block: b8 = 0) */
+#define T1_R_BLOCK 0x80 /* PCB (R-block: b8 b7 = 10) */
+#define T1_S_BLOCK 0xC0 /* PCB (S-block: b8 b7 = 11) */
+
+/* I block */
+#define T1_I_SEQ_SHIFT 6 /* N(S) position (bit 7) */
+
+/* R block */
+#define T1_IS_ERROR(pcb) ((pcb) & 0x0F)
+#define T1_EDC_ERROR 0x01 /* [b6..b1] = 0-N(R)-0001 */
+#define T1_OTHER_ERROR 0x02 /* [b6..b1] = 0-N(R)-0010 */
+#define T1_R_SEQ_SHIFT 4 /* N(R) position (b5) */
+
+/* S block */
+#define T1_S_RESPONSE 0x20 /* If response: set bit b6, if request reset b6 in PCB S-Block */
+#define T1_S_RESYNC 0x00 /* RESYNCH: b6->b1: 000000 of PCB S-Block */
+#define T1_S_IFS 0x01 /* IFS: b6->b1: 000001 of PCB S-Block */
+#define T1_S_ABORT 0x02 /* ABORT: b6->b1: 000010 of PCB S-Block */
+#define T1_S_WTX 0x03 /* WTX: b6->b1: 000011 of PCB S-Block */
+
+#define NAD 0 /* NAD byte position in the block */
+#define PCB 1 /* PCB byte position in the block */
+#define LEN 2 /* LEN byte position in the block */
+#define DATA 3 /* The position of the first byte of INF field in the block */
+
+/* Modifiable parameters */
+#define SAD 0x0 /* Source address: reader (allowed values 0 -> 7) */
+#define DAD 0x0 /* Destination address: card (allowed values 0 -> 7) */
+#define IFSD_VALUE 254 /* Max length of INF field Supported by the reader */
+#define SC_FILE_SIZE 0x100 /* File size */
+#define SC_FILE_ID 0x0001 /* File identifier */
+#define SC_CLASS 0x00
+
+/* Constant parameters */
+#define INS_SELECT_FILE 0xA4 /* Select file instruction */
+#define INS_READ_FILE 0xB0 /* Read file instruction */
+#define INS_WRITE_FILE 0xD6 /* Write file instruction */
+#define TRAILER_LENGTH 2 /* Trailer length (SW1 and SW2: 2 bytes) */
+
+#define SC_T1_RECEIVE_SUCCESS 0
+#define SC_T1_BWT_TIMEOUT 1
+#define SC_T1_CWT_TIMEOUT 2
+
+#define DEFAULT_FIDI_VALUE 0x11
+#define PPS_REQUEST 0xFF
+
+/* SC Tree Structure -----------------------------------------------------------
+ MasterFile
+ ________|___________
+ | | |
+ System UserData Note
+------------------------------------------------------------------------------*/
+
+/* SC ADPU Command: Operation Code -------------------------------------------*/
+#define SC_CLA_GSM11 0xA0
+
+/*------------------------ Data Area Management Commands ---------------------*/
+#define SC_SELECT_FILE 0xA4
+#define SC_GET_RESPONCE 0xC0
+#define SC_STATUS 0xF2
+#define SC_UPDATE_BINARY 0xD6
+#define SC_READ_BINARY 0xB0
+#define SC_WRITE_BINARY 0xD0
+#define SC_UPDATE_RECORD 0xDC
+#define SC_READ_RECORD 0xB2
+
+/*-------------------------- Administrative Commands -------------------------*/
+#define SC_CREATE_FILE 0xE0
+
+/*-------------------------- Safety Management Commands ----------------------*/
+#define SC_VERIFY 0x20
+#define SC_CHANGE 0x24
+#define SC_DISABLE 0x26
+#define SC_ENABLE 0x28
+#define SC_UNBLOCK 0x2C
+#define SC_EXTERNAL_AUTH 0x82
+#define SC_GET_CHALLENGE 0x84
+
+/*-------------------------- Smartcard Interface Byte-------------------------*/
+#define SC_INTERFACEBYTE_TA 0 /* Interface byte TA(i) */
+#define SC_INTERFACEBYTE_TB 1 /* Interface byte TB(i) */
+#define SC_INTERFACEBYTE_TC 2 /* Interface byte TC(i) */
+#define SC_INTERFACEBYTE_TD 3 /* Interface byte TD(i) */
+
+/*-------------------------- Answer to reset Commands ------------------------*/
+#define SC_GET_A2R 0x00
+
+/* SC STATUS: Status Code ----------------------------------------------------*/
+#define SC_EF_SELECTED 0x9F
+#define SC_DF_SELECTED 0x9F
+#define SC_OP_TERMINATED 0x9000
+
+/* Smartcard Voltage */
+#define SC_VOLTAGE_5V 0
+#define SC_VOLTAGE_3V 1
+#define SC_VOLTAGE_NOINIT 0xFF
+
+/* Exported types ------------------------------------------------------------*/
+typedef enum
+{
+ SC_POWER_ON = 0x00,
+ SC_RESET_LOW = 0x01,
+ SC_RESET_HIGH = 0x02,
+ SC_ACTIVE = 0x03,
+ SC_ACTIVE_ON_T0 = 0x04,
+ SC_POWER_OFF = 0x05,
+ SC_NO_INIT = 0x06
+
+} SC_State;
+
+/* Interface Byte structure - TA(i), TB(i), TC(i) and TD(i) ------------------*/
+typedef struct
+{
+ uint8_t Status; /* The Presence of the Interface byte */
+ uint8_t Value; /* The Value of the Interface byte */
+} SC_InterfaceByte;
+
+/* Protocol Level structure - ------------------------------------------------*/
+typedef struct
+{
+ SC_InterfaceByte InterfaceByte[MAX_INTERFACEBYTE]; /* The Values of the Interface byte TA(i), TB(i), TC(i)and TD(i) */
+} SC_ProtocolLevel;
+
+/* ATR structure - Answer To Reset -------------------------------------------*/
+typedef struct
+{
+ uint8_t TS; /* Bit Convention Direct/Indirect */
+ uint8_t T0; /* Each bit in the high nibble = Presence of the further interface byte;
+ Low nibble = Number of historical byte */
+ SC_ProtocolLevel T[MAX_PROTOCOLLEVEL]; /* Setup array */
+ uint8_t H[HIST_LENGTH]; /* Historical array */
+ uint8_t Tlength; /* Setup array dimension */
+ uint8_t Hlength; /* Historical array dimension */
+ uint8_t TCK; /* Check character */
+} SC_ATR;
+
+/* ADPU-Header command structure ---------------------------------------------*/
+typedef struct
+{
+ uint8_t CLA; /* Command class */
+ uint8_t INS; /* Operation code */
+ uint8_t P1; /* Selection Mode */
+ uint8_t P2; /* Selection Option */
+} SC_Header;
+
+/* ADPU-Body command structure -----------------------------------------------*/
+typedef struct
+{
+ uint8_t LC; /* Data field length */
+ uint8_t Data[LC_MAX]; /* Command parameters */
+ uint16_t LE; /* Expected length of data to be returned */
+} SC_Body;
+
+/* ADPU Command structure ----------------------------------------------------*/
+typedef struct
+{
+ SC_Header Header;
+ SC_Body Body;
+} SC_ADPU_Commands;
+
+/* SC response structure -----------------------------------------------------*/
+typedef struct
+{
+ uint8_t Data[LC_MAX]; /* Data returned from the card */
+ uint8_t SW1; /* Command Processing status */
+ uint8_t SW2; /* Command Processing qualification */
+} SC_ADPU_Response;
+
+extern SC_ADPU_Commands SC_ADPU;
+extern uint8_t SC_ATR_Table[40];
+extern SC_ATR SC_A2R;
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+/* APPLICATION LAYER ---------------------------------------------------------*/
+void SC_Handler(SC_State *SCState, SC_ADPU_Commands *SC_ADPU, SC_ADPU_Response *SC_Response);
+//void SC_PowerCmd(FunctionalState NewState);
+//void SC_Reset(BitAction ResetState);
+void SC_ParityErrorHandler(void);
+void SC_PTSConfig(void);
+uint8_t SC_Detect(void);
+void SC_VoltageConfig(uint32_t SC_Voltage);
+
+uint32_t SC_GetDTableValue(uint8_t );
+
+#endif /* __SMARTCARD_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/scpu_usb_ccid_Device_Demo/usb_conf.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/usb_conf.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/usb_conf.h (working copy)
@@ -0,0 +1,289 @@
+/**
+ ******************************************************************************
+ * @file usb_conf.h
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief General low level driver configuration
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USB_CONF__H__
+#define __USB_CONF__H__
+
+/* Includes ------------------------------------------------------------------*/
+
+
+/** @addtogroup USB_OTG_DRIVER
+ * @{
+ */
+
+/** @defgroup USB_CONF
+ * @brief USB low level driver configuration file
+ * @{
+ */
+
+/** @defgroup USB_CONF_Exported_Defines
+ * @{
+ */
+
+/* USB Core and PHY interface configuration.
+ Tip: To avoid modifying these defines each time you need to change the USB
+ configuration, you can declare the needed define in your toolchain
+ compiler preprocessor.
+ */
+/****************** USB OTG FS PHY CONFIGURATION *******************************
+* The USB OTG FS Core supports one on-chip Full Speed PHY.
+*
+* The USE_EMBEDDED_PHY symbol is defined in the project compiler preprocessor
+* when FS core is used.
+*******************************************************************************/
+#ifndef USE_USB_OTG_FS
+ //#define USE_USB_OTG_FS
+#endif /* USE_USB_OTG_FS */
+
+#ifdef USE_USB_OTG_FS
+ #define USB_OTG_FS_CORE
+#endif
+
+/****************** USB OTG HS PHY CONFIGURATION *******************************
+* The USB OTG HS Core supports two PHY interfaces:
+* (i) An ULPI interface for the external High Speed PHY: the USB HS Core will
+* operate in High speed mode
+* (ii) An on-chip Full Speed PHY: the USB HS Core will operate in Full speed mode
+*
+* You can select the PHY to be used using one of these two defines:
+* (i) USE_ULPI_PHY: if the USB OTG HS Core is to be used in High speed mode
+* (ii) USE_EMBEDDED_PHY: if the USB OTG HS Core is to be used in Full speed mode
+*
+* Notes:
+* - The USE_ULPI_PHY symbol is defined in the project compiler preprocessor as
+* default PHY when HS core is used.
+* - On STM322xG-EVAL and STM324xG-EVAL boards, only configuration(i) is available.
+* Configuration (ii) need a different hardware, for more details refer to your
+* STM32 device datasheet.
+*******************************************************************************/
+#ifndef USE_USB_OTG_HS
+ //#define USE_USB_OTG_HS
+#endif /* USE_USB_OTG_HS */
+
+#ifndef USE_ULPI_PHY
+ //#define USE_ULPI_PHY
+#endif /* USE_ULPI_PHY */
+
+#ifndef USE_EMBEDDED_PHY
+ //#define USE_EMBEDDED_PHY
+#endif /* USE_EMBEDDED_PHY */
+
+#ifdef USE_USB_OTG_HS
+ #define USB_OTG_HS_CORE
+#endif
+
+/*******************************************************************************
+* FIFO Size Configuration in Device mode
+*
+* (i) Receive data FIFO size = RAM for setup packets +
+* OUT endpoint control information +
+* data OUT packets + miscellaneous
+* Space = ONE 32-bits words
+* --> RAM for setup packets = 10 spaces
+* (n is the nbr of CTRL EPs the device core supports)
+* --> OUT EP CTRL info = 1 space
+* (one space for status information written to the FIFO along with each
+* received packet)
+* --> data OUT packets = (Largest Packet Size / 4) + 1 spaces
+* (MINIMUM to receive packets)
+* --> OR data OUT packets = at least 2*(Largest Packet Size / 4) + 1 spaces
+* (if high-bandwidth EP is enabled or multiple isochronous EPs)
+* --> miscellaneous = 1 space per OUT EP
+* (one space for transfer complete status information also pushed to the
+* FIFO with each endpoint's last packet)
+*
+* (ii)MINIMUM RAM space required for each IN EP Tx FIFO = MAX packet size for
+* that particular IN EP. More space allocated in the IN EP Tx FIFO results
+* in a better performance on the USB and can hide latencies on the AHB.
+*
+* (iii) TXn min size = 16 words. (n : Transmit FIFO index)
+* (iv) When a TxFIFO is not used, the Configuration should be as follows:
+* case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes)
+* --> Txm can use the space allocated for Txn.
+* case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes)
+* --> Txn should be configured with the minimum space of 16 words
+* (v) The FIFO is used optimally when used TxFIFOs are allocated in the top
+* of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
+* (vi) In HS case12 FIFO locations should be reserved for internal DMA registers
+* so total FIFO size should be 1012 Only instead of 1024
+*******************************************************************************/
+
+/****************** USB OTG HS CONFIGURATION **********************************/
+#ifdef USB_OTG_HS_CORE
+ #define RX_FIFO_HS_SIZE 512
+ #define TX0_FIFO_HS_SIZE 128
+ #define TX1_FIFO_HS_SIZE 372
+ #define TX2_FIFO_HS_SIZE 0
+ #define TX3_FIFO_HS_SIZE 0
+ #define TX4_FIFO_HS_SIZE 0
+ #define TX5_FIFO_HS_SIZE 0
+
+// #define USB_OTG_HS_SOF_OUTPUT_ENABLED
+
+ #ifdef USE_ULPI_PHY
+ #define USB_OTG_ULPI_PHY_ENABLED
+ #endif
+ #ifdef USE_EMBEDDED_PHY
+ #define USB_OTG_EMBEDDED_PHY_ENABLED
+ #endif
+ #define USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #define USB_OTG_HS_DEDICATED_EP1_ENABLED
+ #define USB_OTG_HS_LOW_PWR_MGMT_SUPPORT
+#endif
+
+/****************** USB OTG FS CONFIGURATION **********************************/
+// total fifo size <= 448 (512 - 64)
+#define RX1_FIFO_FS_SIZE 64
+#define RX2_FIFO_FS_SIZE 64
+#define RX3_FIFO_FS_SIZE 64
+#define RX4_FIFO_FS_SIZE 0
+#define RX5_FIFO_FS_SIZE 0
+#define RX6_FIFO_FS_SIZE 0
+#define RX7_FIFO_FS_SIZE 0
+
+#define TX1_FIFO_FS_SIZE 64
+#define TX2_FIFO_FS_SIZE 64
+#define TX3_FIFO_FS_SIZE 64
+#define TX4_FIFO_FS_SIZE 0
+#define TX5_FIFO_FS_SIZE 0
+#define TX6_FIFO_FS_SIZE 0
+#define TX7_FIFO_FS_SIZE 0
+
+/* EP0 IN/OUT share the same section FIFO*/
+#define TX0_FIFO_FS_SIZE 64
+#define RX0_FIFO_FS_SIZE 64
+
+#define IS_FIFO_SIZE(size) (((size) == 0) || \
+ ((size) == 8) || \
+ ((size) == 16) || \
+ ((size) == 32) || \
+ ((size) == 64) || \
+ ((size) == 128) || \
+ ((size) == 256) || \
+ ((size) == 512))
+//#define USB_OTG_FS_LOW_PWR_MGMT_SUPPORT
+// #define USB_OTG_FS_SOF_OUTPUT_ENABLED
+
+/****************** USB OTG MISC CONFIGURATION ********************************/
+#define VBUS_SENSING_ENABLED
+
+/****************** USB OTG MODE CONFIGURATION ********************************/
+//#define USE_HOST_MODE
+#define USE_DEVICE_MODE
+//#define USE_OTG_MODE
+/****************** USB OTG DMA MODE CONFIGURATION ***************************/
+//#define USB_OTG_DMA_ENABLE /* Enable DMA mode */
+
+/* BULK Transfer */
+//#define USE_USB_DMA_MODE1
+
+/* Only one endpoind can be enable */
+#define USB_OTG_DEV_DMA_EP_NUM 0x81
+
+/****************** C Compilers dependant keywords ****************************/
+/* In HS mode and when the DMA is used, all variables and data structures dealing
+ with the DMA during the transaction process should be 4-bytes aligned */
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+
+ #if defined (__GNUC__) /* GNU Compiler */
+ #define __ALIGN_END __attribute__ ((aligned (4)))
+ #define __ALIGN_BEGIN
+ #else
+ #define __ALIGN_END
+ #if defined (__CC_ARM) /* ARM Compiler */
+ #define __ALIGN_BEGIN __align(4)
+ #elif defined (__ICCARM__) /* IAR Compiler */
+ #define __ALIGN_BEGIN
+ #elif defined (__TASKING__) /* TASKING Compiler */
+ #define __ALIGN_BEGIN __align(4)
+ #endif /* __CC_ARM */
+ #endif /* __GNUC__ */
+#else
+ #define __ALIGN_BEGIN __attribute__ ((aligned (4)))//__align(4)
+ #define __ALIGN_END
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+
+/* __packed keyword used to decrease the data type alignment to 1-byte */
+//#if defined (__CC_ARM) /* ARM Compiler */
+// #define __packed __packed
+//#elif defined (__ICCARM__) /* IAR Compiler */
+// #define __packed __packed
+//#elif defined ( __GNUC__ ) /* GNU Compiler */
+// #define __packed __attribute__ ((__packed__))
+//#elif defined (__TASKING__) /* TASKING Compiler */
+// #define __packed __unaligned
+//#endif /* __CC_ARM */
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_CONF_Exported_Types
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_CONF_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_Variables
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_FunctionsPrototype
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+#endif //__USB_CONF__H__
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
Index: yc_usb/scpu_usb_ccid_Device_Demo/usb_main.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/usb_main.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/usb_main.h (working copy)
@@ -0,0 +1,8 @@
+#include "usbd_ccid_core.h"
+#include "usbd_usr.h"
+#include "usbd_desc.h"
+#include
+#include
+#include "usb_dcd_int.h"
+
+void usb_main(void);
Index: yc_usb/scpu_usb_ccid_Device_Demo/usb_main.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/usb_main.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/usb_main.c (working copy)
@@ -0,0 +1,139 @@
+/**
+ ******************************************************************************
+ * @file main.c
+ * @author yichip
+ * @version V1.0.0
+ * @date 7-9-2018
+ * @brief This file provides all the Application firmware functions.
+ ******************************************************************************
+ * @attention
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+
+
+#include "usbd_ccid_core.h"
+#include "usbd_usr.h"
+#include "usbd_desc.h"
+#include
+#include
+#include "usb_dcd_int.h"
+
+#define USB_CCID_DEMO
+
+#ifdef USB_CCID_DEMO
+
+USB_OTG_CORE_HANDLE USB_OTG_dev;
+
+void usb_init()
+{
+ USB_OTG_WRITE_REG8(CORE_USB_CONFIG,0x00);
+ my_delay_ms(1);
+ USB_OTG_WRITE_REG8(CORE_USB_TRIG,0xc0);
+ USB_OTG_WRITE_REG8(CORE_USB_CONFIG,0x3c);
+ USB_OTG_WRITE_REG8(CORE_USB_STATUS,0xFF);
+ USB_OTG_WRITE_REG8(CORE_USB_FIFO_EMPTY,0xFF);
+ USB_OTG_WRITE_REG8(CORE_USB_ADDR,0x00);
+ USB_OTG_WRITE_REG8(CORE_USB_INT_MASK(0),0x70);
+ USB_OTG_WRITE_REG8(CORE_USB_INT_MASK(1),0xf0);
+ USB_OTG_WRITE_REG8(CORE_USB_INT_MASK(2),0xff);
+
+
+}
+
+void usb_main(void)
+{
+ enable_clock(CLKCLS_BT);
+ BT_CLKPLL_EN = 0xff;
+ enable_clock(CLKCLS_USB);
+ SYSCTRL_HCLK_CON |= 1 << 11;
+ usb_init();
+
+ enable_intr(INTR_USB);
+ MyPrintf("YICHIP SCPU USB CCID Demo V1.0.\n");
+ memset(&USB_OTG_dev, 0, sizeof(USB_OTG_dev));
+
+ USBD_Init(&USB_OTG_dev,
+ #ifdef USE_USB_OTG_HS
+ USB_OTG_HS_CORE_ID,
+ #else
+ USB_OTG_FS_CORE_ID,
+ #endif
+ &USR_desc,
+ &USBD_CCID_cb,
+ &USRD_cb);
+
+
+ while (1)
+ {
+ uint16_t temp1,temp2,cnt;
+ temp2 = temp1;
+ temp1 = USB_OTG_READ_REG8(USB_SOFCNT)|( USB_OTG_READ_REG8(USB_SOFCNTHI)<<8);
+ if((temp2 == temp1) && (temp1 !=0))
+ cnt++;
+ else
+ cnt = 0;
+
+ if(cnt ==10000)
+ {
+ MyPrintf("reset ");
+ USB_OTG_dev.dev.zero_replay_flag =0;
+ memset(&USB_OTG_dev, 0, sizeof(USB_OTG_dev));
+ USB_OTG_dev.dev.device_status = USB_OTG_DEFAULT;
+
+ USBD_Init(&USB_OTG_dev,
+ #ifdef USE_USB_OTG_HS
+ USB_OTG_HS_CORE_ID,
+ #else
+ USB_OTG_FS_CORE_ID,
+ #endif
+ &USR_desc,
+ &USBD_CCID_cb,
+ &USRD_cb);
+ temp1=temp2=cnt=0;
+ USB_OTG_WRITE_REG8(CORE_USB_CLEAR,0x40);
+ USB_OTG_WRITE_REG8(USB_SOFCNT,0);
+ usb_init();
+
+ }
+ if (USB_OTG_dev.dev.device_status_new == USB_OTG_END)
+ {
+// MyPrintf("> Cmp USB_OTG_CONFIGURED.\n");
+ /* send CCID notification message on interrupt pipe */
+// if(Getslotstatus_flag ==0)
+// {
+// my_delay_ms(5);
+//
+// }
+ CCID_IntMessage(&USB_OTG_dev);
+ }
+ resp_CCID_CMD(&USB_OTG_dev);
+ }
+
+
+}
+
+
+
+
+
+void USB_IRQHandler(void)
+{
+ USBD_OTG_ISR_Handler (&USB_OTG_dev);
+ // NVIC_ClearPendingIRQ(USB_IRQn);
+ // MyPrintf("YICHIP SCPU USB CCID handler startV1.0.\n");
+}
+
+
+#endif
+
+
+
+
+
+
+
+
+
Index: yc_usb/scpu_usb_ccid_Device_Demo/usbd_conf.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/usbd_conf.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/usbd_conf.h (working copy)
@@ -0,0 +1,93 @@
+/**
+ ******************************************************************************
+ * @file usbd_conf.h
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief USB Device configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_CONF__H__
+#define __USBD_CONF__H__
+
+/* Includes ------------------------------------------------------------------*/
+#include "usb_conf.h"
+
+/** @defgroup USB_CONF_Exported_Defines
+ * @{
+ */
+#define USBD_CFG_MAX_NUM 1
+#define USBD_ITF_MAX_NUM 1
+
+#define USBD_SELF_POWERED
+
+#define USB_MAX_STR_DESC_SIZ 64
+#define USB_SUPPORT_USER_STRING_DESC
+
+
+/** @defgroup USB_CCID_Class_Layer_Parameter
+ * @{
+ */
+#define CCID_BULK_IN_EP 0x81
+#define CCID_BULK_OUT_EP 0x01
+#define CCID_INTR_IN_EP 0x82
+
+#define CCID_BULK_EP_MAX_PACKET 64
+#define CCID_INTR_EP_MAX_PACKET 8
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_Types
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_CONF_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_Variables
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_FunctionsPrototype
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+#endif //__USBD_CONF__H__
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
Index: yc_usb/scpu_usb_ccid_Device_Demo/usbd_desc.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/usbd_desc.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/usbd_desc.h (working copy)
@@ -0,0 +1,120 @@
+/**
+ ******************************************************************************
+ * @file usbd_desc.h
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief header file for the usbd_desc.c file
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+
+#ifndef __USB_DESC_H
+#define __USB_DESC_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_def.h"
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+/** @defgroup USB_DESC
+ * @brief general defines for the usb device library file
+ * @{
+ */
+
+/** @defgroup USB_DESC_Exported_Defines
+ * @{
+ */
+#define USB_DEVICE_DESCRIPTOR_TYPE 0x01
+#define USB_CONFIGURATION_DESCRIPTOR_TYPE 0x02
+#define USB_STRING_DESCRIPTOR_TYPE 0x03
+#define USB_INTERFACE_DESCRIPTOR_TYPE 0x04
+#define USB_ENDPOINT_DESCRIPTOR_TYPE 0x05
+#define USB_SIZ_DEVICE_DESC 18
+#define USB_SIZ_STRING_LANGID 4
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Exported_TypesDefinitions
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+
+/** @defgroup USBD_DESC_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_Variables
+ * @{
+ */
+extern uint8_t USBD_DeviceDesc [USB_SIZ_DEVICE_DESC];
+extern uint8_t USBD_StrDesc[USB_MAX_STR_DESC_SIZ];
+extern uint8_t USBD_OtherSpeedCfgDesc[USB_LEN_CFG_DESC];
+extern uint8_t USBD_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC];
+extern uint8_t USBD_LangIDDesc[USB_SIZ_STRING_LANGID];
+extern USBD_DEVICE USR_desc;
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_FunctionsPrototype
+ * @{
+ */
+
+
+uint8_t * USBD_USR_DeviceDescriptor( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_LangIDStrDescriptor( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_ManufacturerStrDescriptor ( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_ProductStrDescriptor ( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_SerialStrDescriptor( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_ConfigStrDescriptor( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_InterfaceStrDescriptor( uint8_t speed , uint16_t *length);
+
+#ifdef USB_SUPPORT_USER_STRING_DESC
+uint8_t * USBD_USR_USRStringDesc (uint8_t speed, uint8_t idx , uint16_t *length);
+#endif /* USB_SUPPORT_USER_STRING_DESC */
+
+/**
+ * @}
+ */
+
+#endif /* __USBD_DESC_H */
+
+/**
+ * @}
+ */
+
+/**
+* @}
+*/
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/scpu_usb_ccid_Device_Demo/usbd_desc.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/usbd_desc.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/usbd_desc.c (working copy)
@@ -0,0 +1,319 @@
+/**
+ ******************************************************************************
+ * @file usbd_desc.c
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief This file provides the USBD descriptors and string formating method.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_req.h"
+#include "usbd_conf.h"
+#include "usb_regs.h"
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+
+/** @defgroup USBD_DESC
+ * @brief USBD descriptors module
+ * @{
+ */
+
+/** @defgroup USBD_DESC_Private_TypesDefinitions
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Private_Defines
+ * @{
+ */
+#define USBD_VID 0x0483
+#define USBD_PID 0x3258
+
+
+#define USBD_BCD_DEVICE_VER 0x0111
+#define BCD_USB_VER 0x0111
+/** @defgroup USB_String_Descriptors
+ * @{
+ */
+#define USBD_LANGID_STRING 0x409
+#define USBD_MANUFACTURER_STRING "YICHIP"
+
+#define USBD_PRODUCT_FS_STRING "YC3121 CCID Demo"
+#define USBD_SERIALNUMBER_FS_STRING "00000000050C"
+#define USBD_CONFIGURATION_FS_STRING "String Config"
+#define USBD_INTERFACE_FS_STRING "SCR Interface"
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Private_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Private_Variables
+ * @{
+ */
+
+USBD_DEVICE USR_desc =
+{
+ USBD_USR_DeviceDescriptor,
+ USBD_USR_LangIDStrDescriptor,
+ USBD_USR_ManufacturerStrDescriptor,
+ USBD_USR_ProductStrDescriptor,
+ USBD_USR_SerialStrDescriptor,
+ USBD_USR_ConfigStrDescriptor,
+ USBD_USR_InterfaceStrDescriptor,
+
+};
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+/* USB Standard Device Descriptor */
+__ALIGN_BEGIN uint8_t USBD_DeviceDesc[USB_SIZ_DEVICE_DESC] __ALIGN_END =
+ {
+ 0x12, /*bLength */
+ USB_DEVICE_DESCRIPTOR_TYPE, /*bDescriptorType*/
+// 0x00, /*bcdUSB */
+// 0x02,
+ 0x10, /*bcdUSB */
+ 0x01,
+ 0x00, /*bDeviceClass*/
+ 0x00, /*bDeviceSubClass*/
+ 0x00, /*bDeviceProtocol*/
+ USB_OTG_MAX_EP0_SIZE, /*bMaxPacketSize*/
+ LOBYTE(USBD_VID), /*idVendor*/
+ HIBYTE(USBD_VID), /*idVendor*/
+ LOBYTE(USBD_PID), /*idVendor*/
+ HIBYTE(USBD_PID), /*idVendor*/
+ LOBYTE(USBD_BCD_DEVICE_VER),/*bcdDevice rel. 1.11*/
+ HIBYTE(USBD_BCD_DEVICE_VER),
+ USBD_IDX_MFC_STR, /*Index of manufacturer string*/
+ USBD_IDX_PRODUCT_STR, /*Index of product string*/
+ USBD_IDX_SERIAL_STR, /*Index of serial number string*/
+ USBD_CFG_MAX_NUM /*bNumConfigurations*/
+ } ; /* USB_DeviceDescriptor */
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+/* USB Standard Device Descriptor */
+__ALIGN_BEGIN uint8_t USBD_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC] __ALIGN_END =
+{
+ USB_LEN_DEV_QUALIFIER_DESC,
+ USB_DESC_TYPE_DEVICE_QUALIFIER,
+ 0x00,
+ 0x02,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x40,
+ 0x01,
+ 0x00,
+};
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+/* USB Standard Device Descriptor */
+__ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_SIZ_STRING_LANGID] __ALIGN_END =
+{
+ USB_SIZ_STRING_LANGID,
+ USB_DESC_TYPE_STRING,
+ LOBYTE(USBD_LANGID_STRING),
+ HIBYTE(USBD_LANGID_STRING),
+};
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Private_FunctionPrototypes
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Private_Functions
+ * @{
+ */
+
+/**
+* @brief USBD_USR_DeviceDescriptor
+* return the device descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_DeviceDescriptor( uint8_t speed , uint16_t *length)
+{
+ *length = sizeof(USBD_DeviceDesc);
+ return USBD_DeviceDesc;
+}
+
+/**
+* @brief USBD_USR_LangIDStrDescriptor
+* return the LangID string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_LangIDStrDescriptor( uint8_t speed , uint16_t *length)
+{
+ *length = sizeof(USBD_LangIDDesc);
+ return USBD_LangIDDesc;
+}
+
+
+/**
+* @brief USBD_USR_ProductStrDescriptor
+* return the product string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_ProductStrDescriptor( uint8_t speed , uint16_t *length)
+{
+
+
+ if(speed == 0)
+ {
+// USBD_GetString (USBD_PRODUCT_HS_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString (USBD_PRODUCT_FS_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+* @brief USBD_USR_ManufacturerStrDescriptor
+* return the manufacturer string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_ManufacturerStrDescriptor( uint8_t speed , uint16_t *length)
+{
+ USBD_GetString (USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
+ return USBD_StrDesc;
+}
+
+/**
+* @brief USBD_USR_SerialStrDescriptor
+* return the serial number string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_SerialStrDescriptor( uint8_t speed , uint16_t *length)
+{
+ if(speed == USB_OTG_SPEED_HIGH)
+ {
+// USBD_GetString (USBD_SERIALNUMBER_HS_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString (USBD_SERIALNUMBER_FS_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+* @brief USBD_USR_ConfigStrDescriptor
+* return the configuration string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_ConfigStrDescriptor( uint8_t speed , uint16_t *length)
+{
+ if(speed == USB_OTG_SPEED_HIGH)
+ {
+// USBD_GetString (USBD_CONFIGURATION_HS_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString (USBD_CONFIGURATION_FS_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+
+/**
+* @brief USBD_USR_InterfaceStrDescriptor
+* return the interface string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_InterfaceStrDescriptor( uint8_t speed , uint16_t *length)
+{
+ if(speed == 0)
+ {
+// USBD_GetString (USBD_INTERFACE_HS_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString (USBD_INTERFACE_FS_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
Index: yc_usb/scpu_usb_ccid_Device_Demo/usbd_usr.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/usbd_usr.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_ccid_Device_Demo/usbd_usr.c (working copy)
@@ -0,0 +1,252 @@
+/**
+ ******************************************************************************
+ * @file usbd_usr.c
+ * @author YICHIP
+ * @version V1.0.0
+ * @date 21-October-2014
+ * @brief This file includes the user application layer
+ ******************************************************************************
+ * @attention
+ *
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_usr.h"
+#include "usbd_ioreq.h"
+
+#include "usb_conf.h"
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+* @{
+*/
+
+/** @defgroup USBD_USR
+* @brief This file includes the user application layer
+* @{
+*/
+
+/** @defgroup USBD_USR_Private_TypesDefinitions
+* @{
+*/
+/**
+* @}
+*/
+
+
+/** @defgroup USBD_USR_Private_Defines
+* @{
+*/
+/**
+* @}
+*/
+
+
+/** @defgroup USBD_USR_Private_Macros
+* @{
+*/
+/**
+* @}
+*/
+
+
+/** @defgroup USBD_USR_Private_Variables
+* @{
+*/
+
+USBD_Usr_cb_TypeDef USRD_cb =
+{
+ USBD_USR_Init,
+ USBD_USR_DeviceReset,
+ USBD_USR_DeviceConfigured,
+ USBD_USR_DeviceSuspended,
+ USBD_USR_DeviceResumed,
+
+ USBD_USR_DeviceConnected,
+ USBD_USR_DeviceDisconnected,
+
+
+};
+
+
+
+/**
+* @}
+*/
+
+/** @defgroup USBD_USR_Private_Constants
+* @{
+*/
+
+/**
+* @}
+*/
+
+
+
+/** @defgroup USBD_USR_Private_FunctionPrototypes
+* @{
+*/
+/**
+* @}
+*/
+
+
+/** @defgroup USBD_USR_Private_Functions
+* @{
+*/
+
+#define USER_INFORMATION1 "[Key]:RemoteWakeup"
+#define USER_INFORMATION2 "[Joystick]:Mouse emulation"
+
+
+/**
+* @brief USBD_USR_Init
+* Displays the message on LCD for host lib initialization
+* @param None
+* @retval None
+*/
+void USBD_USR_Init(void)
+{
+
+}
+
+/**
+* @brief USBD_USR_DeviceReset
+* Displays the message on LCD on device Reset Event
+* @param speed : device speed
+* @retval None
+*/
+void USBD_USR_DeviceReset(uint8_t speed )
+{
+// switch (speed)
+// {
+// case USB_OTG_SPEED_HIGH:
+// LCD_LOG_SetFooter (" USB Device Library v1.1.0 [HS]" );
+// break;
+
+// case USB_OTG_SPEED_FULL:
+// LCD_LOG_SetFooter (" USB Device Library v1.1.0 [FS]" );
+// break;
+// default:
+// LCD_LOG_SetFooter (" USB Device Library v1.1.0 [??]" );
+//
+// }
+}
+
+
+/**
+* @brief USBD_USR_DeviceConfigured
+* Displays the message on LCD on device configuration Event
+* @param None
+* @retval Staus
+*/
+void USBD_USR_DeviceConfigured (void)
+{
+// MyPrintf("> HID Interface started.\n");
+}
+
+
+/**
+* @brief USBD_USR_DeviceConnected
+* Displays the message on LCD on device connection Event
+* @param None
+* @retval Staus
+*/
+void USBD_USR_DeviceConnected (void)
+{
+// MyPrintf("> USB Device Connected.\n");
+}
+
+
+/**
+* @brief USBD_USR_DeviceDisonnected
+* Displays the message on LCD on device disconnection Event
+* @param None
+* @retval Staus
+*/
+void USBD_USR_DeviceDisconnected (void)
+{
+// MyPrintf("> USB Device Disconnected.\n");
+}
+
+/**
+* @brief USBD_USR_DeviceSuspended
+* Displays the message on LCD on device suspend Event
+* @param None
+* @retval None
+*/
+void USBD_USR_DeviceSuspended(void)
+{
+ MyPrintf("\n> USB Device in Suspend Mode.\n");
+ /* Users can do their application actions here for the USB-Reset */
+}
+
+
+/**
+* @brief USBD_USR_DeviceResumed
+* Displays the message on LCD on device resume Event
+* @param None
+* @retval None
+*/
+void USBD_USR_DeviceResumed(void)
+{
+ MyPrintf("\n> USB Device in Idle Mode.\n");
+ /* Users can do their application actions here for the USB-Reset */
+}
+
+
+void my_delay_ms(int ms)
+{
+ int delay_num;
+ while(ms-->0)
+ {
+ delay_num=(CPU_MHZ/1000)/8+400;
+ while(delay_num-->0)
+ {
+ __asm__("nop");
+ }
+ }
+}
+
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
Index: yc_usb/scpu_usb_hid_Device_Demo/usb_conf.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_hid_Device_Demo/usb_conf.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_hid_Device_Demo/usb_conf.h (working copy)
@@ -0,0 +1,290 @@
+/**
+ ******************************************************************************
+ * @file usb_conf.h
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief General low level driver configuration
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USB_CONF__H__
+#define __USB_CONF__H__
+
+/* Includes ------------------------------------------------------------------*/
+#include "Yc3121.h"
+//#include "mhscpu_eval.h"
+
+
+
+/** @addtogroup USB_OTG_DRIVER
+ * @{
+ */
+
+/** @defgroup USB_CONF
+ * @brief USB low level driver configuration file
+ * @{
+ */
+
+/** @defgroup USB_CONF_Exported_Defines
+ * @{
+ */
+
+/* USB Core and PHY interface configuration.
+ Tip: To avoid modifying these defines each time you need to change the USB
+ configuration, you can declare the needed define in your toolchain
+ compiler preprocessor.
+ */
+/****************** USB OTG FS PHY CONFIGURATION *******************************
+* The USB OTG FS Core supports one on-chip Full Speed PHY.
+*
+* The USE_EMBEDDED_PHY symbol is defined in the project compiler preprocessor
+* when FS core is used.
+*******************************************************************************/
+#ifndef USE_USB_OTG_FS
+ //#define USE_USB_OTG_FS
+#endif /* USE_USB_OTG_FS */
+
+#ifdef USE_USB_OTG_FS
+ #define USB_OTG_FS_CORE
+#endif
+
+/****************** USB OTG HS PHY CONFIGURATION *******************************
+* The USB OTG HS Core supports two PHY interfaces:
+* (i) An ULPI interface for the external High Speed PHY: the USB HS Core will
+* operate in High speed mode
+* (ii) An on-chip Full Speed PHY: the USB HS Core will operate in Full speed mode
+*
+* You can select the PHY to be used using one of these two defines:
+* (i) USE_ULPI_PHY: if the USB OTG HS Core is to be used in High speed mode
+* (ii) USE_EMBEDDED_PHY: if the USB OTG HS Core is to be used in Full speed mode
+*
+* Notes:
+* - The USE_ULPI_PHY symbol is defined in the project compiler preprocessor as
+* default PHY when HS core is used.
+* - On STM322xG-EVAL and STM324xG-EVAL boards, only configuration(i) is available.
+* Configuration (ii) need a different hardware, for more details refer to your
+* STM32 device datasheet.
+*******************************************************************************/
+#ifndef USE_USB_OTG_HS
+ //#define USE_USB_OTG_HS
+#endif /* USE_USB_OTG_HS */
+
+#ifndef USE_ULPI_PHY
+ //#define USE_ULPI_PHY
+#endif /* USE_ULPI_PHY */
+
+#ifndef USE_EMBEDDED_PHY
+ //#define USE_EMBEDDED_PHY
+#endif /* USE_EMBEDDED_PHY */
+
+#ifdef USE_USB_OTG_HS
+ #define USB_OTG_HS_CORE
+#endif
+
+/*******************************************************************************
+* FIFO Size Configuration in Device mode
+*
+* (i) Receive data FIFO size = RAM for setup packets +
+* OUT endpoint control information +
+* data OUT packets + miscellaneous
+* Space = ONE 32-bits words
+* --> RAM for setup packets = 10 spaces
+* (n is the nbr of CTRL EPs the device core supports)
+* --> OUT EP CTRL info = 1 space
+* (one space for status information written to the FIFO along with each
+* received packet)
+* --> data OUT packets = (Largest Packet Size / 4) + 1 spaces
+* (MINIMUM to receive packets)
+* --> OR data OUT packets = at least 2*(Largest Packet Size / 4) + 1 spaces
+* (if high-bandwidth EP is enabled or multiple isochronous EPs)
+* --> miscellaneous = 1 space per OUT EP
+* (one space for transfer complete status information also pushed to the
+* FIFO with each endpoint's last packet)
+*
+* (ii)MINIMUM RAM space required for each IN EP Tx FIFO = MAX packet size for
+* that particular IN EP. More space allocated in the IN EP Tx FIFO results
+* in a better performance on the USB and can hide latencies on the AHB.
+*
+* (iii) TXn min size = 16 words. (n : Transmit FIFO index)
+* (iv) When a TxFIFO is not used, the Configuration should be as follows:
+* case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes)
+* --> Txm can use the space allocated for Txn.
+* case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes)
+* --> Txn should be configured with the minimum space of 16 words
+* (v) The FIFO is used optimally when used TxFIFOs are allocated in the top
+* of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
+* (vi) In HS case12 FIFO locations should be reserved for internal DMA registers
+* so total FIFO size should be 1012 Only instead of 1024
+*******************************************************************************/
+
+/****************** USB OTG HS CONFIGURATION **********************************/
+#ifdef USB_OTG_HS_CORE
+ #define RX_FIFO_HS_SIZE 512
+ #define TX0_FIFO_HS_SIZE 128
+ #define TX1_FIFO_HS_SIZE 372
+ #define TX2_FIFO_HS_SIZE 0
+ #define TX3_FIFO_HS_SIZE 0
+ #define TX4_FIFO_HS_SIZE 0
+ #define TX5_FIFO_HS_SIZE 0
+
+// #define USB_OTG_HS_SOF_OUTPUT_ENABLED
+
+ #ifdef USE_ULPI_PHY
+ #define USB_OTG_ULPI_PHY_ENABLED
+ #endif
+ #ifdef USE_EMBEDDED_PHY
+ #define USB_OTG_EMBEDDED_PHY_ENABLED
+ #endif
+ #define USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #define USB_OTG_HS_DEDICATED_EP1_ENABLED
+ #define USB_OTG_HS_LOW_PWR_MGMT_SUPPORT
+#endif
+
+/****************** USB OTG FS CONFIGURATION **********************************/
+// total fifo size <= 448 (512 - 64)
+#define RX1_FIFO_FS_SIZE 0
+#define RX2_FIFO_FS_SIZE 0
+#define RX3_FIFO_FS_SIZE 0
+#define RX4_FIFO_FS_SIZE 0
+#define RX5_FIFO_FS_SIZE 0
+#define RX6_FIFO_FS_SIZE 0
+#define RX7_FIFO_FS_SIZE 0
+
+#define TX1_FIFO_FS_SIZE 64
+#define TX2_FIFO_FS_SIZE 0
+#define TX3_FIFO_FS_SIZE 0
+#define TX4_FIFO_FS_SIZE 0
+#define TX5_FIFO_FS_SIZE 0
+#define TX6_FIFO_FS_SIZE 0
+#define TX7_FIFO_FS_SIZE 0
+
+#define TX0_FIFO_FS_SIZE 64
+#define RX0_FIFO_FS_SIZE 64
+
+#define IS_FIFO_SIZE(size) (((size) == 0) || \
+ ((size) == 8) || \
+ ((size) == 16) || \
+ ((size) == 32) || \
+ ((size) == 64) || \
+ ((size) == 128) || \
+ ((size) == 256) || \
+ ((size) == 512))
+//#define USB_OTG_FS_LOW_PWR_MGMT_SUPPORT
+// #define USB_OTG_FS_SOF_OUTPUT_ENABLED
+
+/****************** USB OTG MISC CONFIGURATION ********************************/
+#define VBUS_SENSING_ENABLED
+
+/****************** USB OTG MODE CONFIGURATION ********************************/
+//#define USE_HOST_MODE
+#define USE_DEVICE_MODE
+//#define USE_OTG_MODE
+
+/****************** USB OTG DMA MODE CONFIGURATION ***************************/
+//#define USB_OTG_DMA_ENABLE /* Enable DMA mode */
+
+/* BULK Transfer */
+//#define USE_USB_DMA_MODE1
+
+/* Only one endpoind can be enable */
+#define USB_OTG_DEV_DMA_EP_NUM 0x81
+/****************** C Compilers dependant keywords ****************************/
+/* In HS mode and when the DMA is used, all variables and data structures dealing
+ with the DMA during the transaction process should be 4-bytes aligned */
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined (__GNUC__) /* GNU Compiler */
+ #define __ALIGN_END __attribute__ ((aligned (4)))
+ #define __ALIGN_BEGIN
+ #else
+ #define __ALIGN_END
+ #if defined (__CC_ARM) /* ARM Compiler */
+ #define __ALIGN_BEGIN __align(4)
+ #elif defined (__ICCARM__) /* IAR Compiler */
+ #define __ALIGN_BEGIN
+ #elif defined (__TASKING__) /* TASKING Compiler */
+ #define __ALIGN_BEGIN __align(4)
+ #endif /* __CC_ARM */
+ #endif /* __GNUC__ */
+#else
+ #define __ALIGN_BEGIN
+ #define __ALIGN_END
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+
+/* __packed keyword used to decrease the data type alignment to 1-byte */
+#if defined (__CC_ARM) /* ARM Compiler */
+ #define __packed __packed
+#elif defined (__ICCARM__) /* IAR Compiler */
+ #define __packed __packed
+#elif defined ( __GNUC__ ) /* GNU Compiler */
+ #define __packed __attribute__ ((__packed__))
+#elif defined (__TASKING__) /* TASKING Compiler */
+ #define __packed __unaligned
+#endif /* __CC_ARM */
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_CONF_Exported_Types
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_CONF_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_Variables
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_FunctionsPrototype
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+#endif //__USB_CONF__H__
+
+
+/**
+ * @}
+ */
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
Index: yc_usb/scpu_usb_hid_Device_Demo/usb_main.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_hid_Device_Demo/usb_main.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_hid_Device_Demo/usb_main.h (working copy)
@@ -0,0 +1,9 @@
+#include "usbd_hid_core.h"
+#include "usbd_usr.h"
+#include "usbd_desc.h"
+#include
+#include
+#include "usb_dcd_int.h"
+
+void usb_main(void);
+void usb_init(void);
Index: yc_usb/scpu_usb_hid_Device_Demo/usb_main.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_hid_Device_Demo/usb_main.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_hid_Device_Demo/usb_main.c (working copy)
@@ -0,0 +1,195 @@
+/**
+ ******************************************************************************
+ * @file main.c
+ * @author yichip
+ * @version V1.0.0
+ * @date 7-9-2018
+ * @brief This file provides all the Application firmware functions.
+ ******************************************************************************
+ * @attention
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+
+
+
+#include "usbd_usr.h"
+#include "usbd_desc.h"
+#include
+#include
+#include "usb_dcd_int.h"
+#include "usbd_hid_core.h"
+
+
+uint8_t Buf[4] = {0, 0, 0, 0};
+
+USB_OTG_CORE_HANDLE USB_OTG_dev;
+
+void usb_init()
+{
+ USB_OTG_WRITE_REG8(CORE_USB_CONFIG,0x00);
+ // my_delay_ms(1);
+ USB_OTG_WRITE_REG8(CORE_USB_TRIG,0xc0);
+ USB_OTG_WRITE_REG8(CORE_USB_CONFIG,0x3c);
+ USB_OTG_WRITE_REG8(CORE_USB_STATUS,0xFF);
+ USB_OTG_WRITE_REG8(CORE_USB_FIFO_EMPTY,0xFF);
+ USB_OTG_WRITE_REG8(CORE_USB_ADDR,0x00);
+ USB_OTG_WRITE_REG8(CORE_USB_INT_MASK(0),0x70);
+ #ifdef USB_HID_DEMO_TEST
+ USB_OTG_WRITE_REG8(CORE_USB_INT_MASK(1),0xf2);
+ #else
+ USB_OTG_WRITE_REG8(CORE_USB_INT_MASK(1),0xf0);
+ #endif
+ USB_OTG_WRITE_REG8(CORE_USB_INT_MASK(2),0xff);
+
+
+}
+
+void usb_main(void)
+{
+ uint8_t ReceiveCode = 0x41;
+ int8_t x = 0, y = 0;
+
+ enable_clock(CLKCLS_BT);
+ BT_CLKPLL_EN = 0xff;
+ enable_clock(CLKCLS_USB);
+ SYSCTRL_HCLK_CON |= 1 << 11;
+ usb_init();
+
+ enable_intr(INTR_USB);
+ memset(&USB_OTG_dev, 0, sizeof(USB_OTG_dev));
+
+ USBD_Init(&USB_OTG_dev,
+ #ifdef USE_USB_OTG_HS
+ USB_OTG_HS_CORE_ID,
+ #else
+ USB_OTG_FS_CORE_ID,
+ #endif
+ &USR_desc,
+ &USBD_HID_cb,
+ &USRD_cb);
+ MyPrintf("YICHIP SCPU HID Device Demo V1.0.\n");
+
+ #ifdef USB_HID_MS_DEMO
+ while (1)
+ {
+ #ifndef POWER_FROM_USB
+ uint16_t temp1,temp2,cnt;
+ temp2 = temp1;
+ temp1 = USB_OTG_READ_REG8(USB_SOFCNT)|( USB_OTG_READ_REG8(USB_SOFCNTHI)<<8);
+ if((temp2 == temp1) && (temp1 !=0))
+ cnt++;
+ else
+ cnt = 0;
+
+ if(cnt ==10000)
+ {
+ MyPrintf("reset ");
+ USB_OTG_dev.dev.zero_replay_flag =0;
+ memset(&USB_OTG_dev, 0, sizeof(USB_OTG_dev));
+ USB_OTG_dev.dev.device_status = USB_OTG_DEFAULT;
+
+ USBD_Init(&USB_OTG_dev,
+ #ifdef USE_USB_OTG_HS
+ USB_OTG_HS_CORE_ID,
+ #else
+ USB_OTG_FS_CORE_ID,
+ #endif
+ &USR_desc,
+ &USBD_HID_cb,
+ &USRD_cb);
+ temp1=temp2=cnt=0;
+ USB_OTG_WRITE_REG8(CORE_USB_CLEAR,0x40);
+ USB_OTG_WRITE_REG8(USB_SOFCNT,0);
+ usb_init();
+
+ }
+ #endif
+ #ifdef USB_HID_DEMO_TEST
+ if (USB_OTG_dev.dev.device_status_new== USB_OTG_END)
+ {
+ x = 0;
+ y = 0;
+ if(ReceiveCode == 0x45 )
+ {
+ ReceiveCode = 0x41;
+ }
+ else
+ {
+ ReceiveCode++;
+ }
+
+ switch (ReceiveCode)
+ {
+ case 0x41: /* ÉÏ */
+ y -= 10;
+ Buf[1] = 0;
+ Buf[2] = y;
+ DCD_EP_Tx ( &USB_OTG_dev,
+ HID_IN_EP,
+ Buf,
+ 4);
+
+ break;
+ case 0x42: /* ÏÂ */
+ y += 10;
+ Buf[1] = 0;
+ Buf[2] = y;
+ DCD_EP_Tx ( &USB_OTG_dev,
+ HID_IN_EP,
+ Buf,
+ 4);
+ break;
+ case 0x43: /* ÓÒ */
+ x += 10;
+ Buf[1] = x;
+ Buf[2] = 0;
+ DCD_EP_Tx ( &USB_OTG_dev,
+ HID_IN_EP,
+ Buf,
+ 4);
+ break;
+ case 0x44: /* ×ó */
+ x -= 10;
+ Buf[1] = x;
+ Buf[2] = 0;
+ DCD_EP_Tx ( &USB_OTG_dev,
+ HID_IN_EP,
+ Buf,
+ 4);
+ break;
+ default:
+ break;
+ }
+ }
+ #endif
+ }
+
+#endif
+}
+
+
+
+
+
+
+void USB_IRQHandler(void)
+{
+ USBD_OTG_ISR_Handler (&USB_OTG_dev);
+ // NVIC_ClearPendingIRQ(USB_IRQn);
+ // MyPrintf("YICHIP SCPU USB CCID handler startV1.0.\n");
+}
+
+
+
+
+
+
+
+
+
+
+
+
Index: yc_usb/scpu_usb_hid_Device_Demo/usbd_conf.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_hid_Device_Demo/usbd_conf.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_hid_Device_Demo/usbd_conf.h (working copy)
@@ -0,0 +1,102 @@
+/**
+ ******************************************************************************
+ * @file usbd_conf.h
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief USB Device configuration file
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __USBD_CONF__H__
+#define __USBD_CONF__H__
+
+/* Includes ------------------------------------------------------------------*/
+#include "usb_conf.h"
+
+/** @defgroup USB_CONF_Exported_Defines
+ * @{
+ */
+
+
+#define USBD_CFG_MAX_NUM 1
+#define USBD_ITF_MAX_NUM 1
+
+#define USB_MAX_STR_DESC_SIZ 64
+
+#define USBD_SELF_POWERED
+
+
+
+#define USBD_DYNAMIC_DESCRIPTOR_CHANGE_ENABLED
+
+/** @defgroup USB_String_Descriptors
+ * @{
+ */
+
+
+/** @defgroup USB_HID_Class_Layer_Parameter
+ * @{
+ */
+#define HID_IN_EP 0x81
+#define HID_OUT_EP 0x01
+#define HID_EP_MAX_PACKET 64
+
+#define HID_IN_PACKET 64
+#define HID_OUT_PACKET 64
+
+/**
+ * @}
+ */
+/** @defgroup USB_CONF_Exported_Types
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USB_CONF_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_Variables
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USB_CONF_Exported_FunctionsPrototype
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+#endif //__USBD_CONF__H__
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
Index: yc_usb/scpu_usb_hid_Device_Demo/usbd_desc.h
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_hid_Device_Demo/usbd_desc.h (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_hid_Device_Demo/usbd_desc.h (working copy)
@@ -0,0 +1,120 @@
+/**
+ ******************************************************************************
+ * @file usbd_desc.h
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief header file for the usbd_desc.c file
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+
+#ifndef __USB_DESC_H
+#define __USB_DESC_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_def.h"
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+/** @defgroup USB_DESC
+ * @brief general defines for the usb device library file
+ * @{
+ */
+
+/** @defgroup USB_DESC_Exported_Defines
+ * @{
+ */
+#define USB_DEVICE_DESCRIPTOR_TYPE 0x01
+#define USB_CONFIGURATION_DESCRIPTOR_TYPE 0x02
+#define USB_STRING_DESCRIPTOR_TYPE 0x03
+#define USB_INTERFACE_DESCRIPTOR_TYPE 0x04
+#define USB_ENDPOINT_DESCRIPTOR_TYPE 0x05
+#define USB_SIZ_DEVICE_DESC 18
+#define USB_SIZ_STRING_LANGID 4
+
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Exported_TypesDefinitions
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+
+/** @defgroup USBD_DESC_Exported_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_Variables
+ * @{
+ */
+extern uint8_t USBD_DeviceDesc [USB_SIZ_DEVICE_DESC];
+extern uint8_t USBD_StrDesc[USB_MAX_STR_DESC_SIZ];
+extern uint8_t USBD_OtherSpeedCfgDesc[USB_LEN_CFG_DESC];
+extern uint8_t USBD_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC];
+extern uint8_t USBD_LangIDDesc[USB_SIZ_STRING_LANGID];
+extern USBD_DEVICE USR_desc;
+/**
+ * @}
+ */
+
+/** @defgroup USBD_DESC_Exported_FunctionsPrototype
+ * @{
+ */
+
+
+uint8_t * USBD_USR_DeviceDescriptor( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_LangIDStrDescriptor( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_ManufacturerStrDescriptor ( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_ProductStrDescriptor ( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_SerialStrDescriptor( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_ConfigStrDescriptor( uint8_t speed , uint16_t *length);
+uint8_t * USBD_USR_InterfaceStrDescriptor( uint8_t speed , uint16_t *length);
+
+#ifdef USB_SUPPORT_USER_STRING_DESC
+uint8_t * USBD_USR_USRStringDesc (uint8_t speed, uint8_t idx , uint16_t *length);
+#endif /* USB_SUPPORT_USER_STRING_DESC */
+
+/**
+ * @}
+ */
+
+#endif /* __USBD_DESC_H */
+
+/**
+ * @}
+ */
+
+/**
+* @}
+*/
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
Index: yc_usb/scpu_usb_hid_Device_Demo/usbd_desc.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_hid_Device_Demo/usbd_desc.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_hid_Device_Demo/usbd_desc.c (working copy)
@@ -0,0 +1,325 @@
+/**
+ ******************************************************************************
+ * @file usbd_desc.c
+ * @author MCD Application Team
+ * @version V1.1.0
+ * @date 19-March-2012
+ * @brief This file provides the USBD descriptors and string formating method.
+ ******************************************************************************
+ * @attention
+ *
+ * © COPYRIGHT 2012 STMicroelectronics
+ *
+ * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "usbd_core.h"
+#include "usbd_desc.h"
+#include "usbd_req.h"
+#include "usbd_conf.h"
+#include "usb_regs.h"
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+ * @{
+ */
+
+
+/** @defgroup USBD_DESC
+ * @brief USBD descriptors module
+ * @{
+ */
+
+/** @defgroup USBD_DESC_Private_TypesDefinitions
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Private_Defines
+ * @{
+ */
+
+//#define USBD_VID 0x0483
+//#define USBD_PID 0x5710
+#define USBD_VID 0x0461
+#define USBD_PID 0x4D81
+
+#define USBD_LANGID_STRING 0x0409
+#define USBD_MANUFACTURER_STRING "YICHIP"
+
+#define USBD_PRODUCT_HS_STRING "Joystick in HS mode"
+#define USBD_SERIALNUMBER_HS_STRING "00000000011B"
+
+#define USBD_PRODUCT_FS_STRING "YCHIPS FS USB"
+#define USBD_SERIALNUMBER_FS_STRING "00000000011C"
+
+#define USBD_CONFIGURATION_HS_STRING "HID Config"
+#define USBD_INTERFACE_HS_STRING "HID Interface"
+
+#define USBD_CONFIGURATION_FS_STRING "HID Config"
+#define USBD_INTERFACE_FS_STRING "HID Interface"
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Private_Macros
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Private_Variables
+ * @{
+ */
+
+USBD_DEVICE USR_desc =
+{
+ USBD_USR_DeviceDescriptor,
+ USBD_USR_LangIDStrDescriptor,
+ USBD_USR_ManufacturerStrDescriptor,
+ USBD_USR_ProductStrDescriptor,
+ USBD_USR_SerialStrDescriptor,
+ USBD_USR_ConfigStrDescriptor,
+ USBD_USR_InterfaceStrDescriptor,
+
+};
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+/* USB Standard Device Descriptor */
+__ALIGN_BEGIN uint8_t USBD_DeviceDesc[USB_SIZ_DEVICE_DESC] __ALIGN_END =
+ {
+ 0x12, /*bLength */
+ USB_DEVICE_DESCRIPTOR_TYPE, /*bDescriptorType*/
+ 0x00, /*bcdUSB */
+ 0x02,
+ 0x00, /*bDeviceClass*/
+ 0x00, /*bDeviceSubClass*/
+ 0x00, /*bDeviceProtocol*/
+ USB_OTG_MAX_EP0_SIZE, /*bMaxPacketSize*/
+ LOBYTE(USBD_VID), /*idVendor*/
+ HIBYTE(USBD_VID), /*idVendor*/
+ LOBYTE(USBD_PID), /*idVendor*/
+ HIBYTE(USBD_PID), /*idVendor*/
+ 0x00, /*bcdDevice rel. 2.00*/
+ 0x02,
+// 0, // uint8_t iManufacturer;
+// 2, // uint8_t iProduct;
+// 0, // uint8_t iSerialNumber;
+// 1 // uint8_t bNumConfigurations;
+ USBD_IDX_MFC_STR, /*Index of manufacturer string*/
+ USBD_IDX_PRODUCT_STR, /*Index of product string*/
+ USBD_IDX_SERIAL_STR, /*Index of serial number string*/
+ USBD_CFG_MAX_NUM /*bNumConfigurations*/
+ } ; /* USB_DeviceDescriptor */
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+/* USB Standard Device Descriptor */
+__ALIGN_BEGIN uint8_t USBD_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC] __ALIGN_END =
+{
+ USB_LEN_DEV_QUALIFIER_DESC,
+ USB_DESC_TYPE_DEVICE_QUALIFIER,
+ 0x00,
+ 0x02,
+ 0x00,
+ 0x00,
+ 0x00,
+ 0x40,
+ 0x01,
+ 0x00,
+};
+
+#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
+ #if defined ( __ICCARM__ ) /*!< IAR Compiler */
+ #pragma data_alignment=4
+ #endif
+#endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
+/* USB Standard Device Descriptor */
+__ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_SIZ_STRING_LANGID] __ALIGN_END =
+{
+ USB_SIZ_STRING_LANGID,
+ USB_DESC_TYPE_STRING,
+ LOBYTE(USBD_LANGID_STRING),
+ HIBYTE(USBD_LANGID_STRING),
+};
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Private_FunctionPrototypes
+ * @{
+ */
+/**
+ * @}
+ */
+
+
+/** @defgroup USBD_DESC_Private_Functions
+ * @{
+ */
+
+/**
+* @brief USBD_USR_DeviceDescriptor
+* return the device descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_DeviceDescriptor( uint8_t speed , uint16_t *length)
+{
+ *length = sizeof(USBD_DeviceDesc);
+ return USBD_DeviceDesc;
+}
+
+/**
+* @brief USBD_USR_LangIDStrDescriptor
+* return the LangID string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_LangIDStrDescriptor( uint8_t speed , uint16_t *length)
+{
+ *length = sizeof(USBD_LangIDDesc);
+ return USBD_LangIDDesc;
+}
+
+
+/**
+* @brief USBD_USR_ProductStrDescriptor
+* return the product string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_ProductStrDescriptor( uint8_t speed , uint16_t *length)
+{
+
+
+ if(speed == 0)
+ {
+ USBD_GetString (USBD_PRODUCT_HS_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString (USBD_PRODUCT_FS_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+* @brief USBD_USR_ManufacturerStrDescriptor
+* return the manufacturer string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_ManufacturerStrDescriptor( uint8_t speed , uint16_t *length)
+{
+ USBD_GetString (USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
+ return USBD_StrDesc;
+}
+
+/**
+* @brief USBD_USR_SerialStrDescriptor
+* return the serial number string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_SerialStrDescriptor( uint8_t speed , uint16_t *length)
+{
+ if(speed == USB_OTG_SPEED_HIGH)
+ {
+ USBD_GetString (USBD_SERIALNUMBER_HS_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString (USBD_SERIALNUMBER_FS_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+* @brief USBD_USR_ConfigStrDescriptor
+* return the configuration string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_ConfigStrDescriptor( uint8_t speed , uint16_t *length)
+{
+ if(speed == USB_OTG_SPEED_HIGH)
+ {
+ USBD_GetString (USBD_CONFIGURATION_HS_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString (USBD_CONFIGURATION_FS_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+
+/**
+* @brief USBD_USR_InterfaceStrDescriptor
+* return the interface string descriptor
+* @param speed : current device speed
+* @param length : pointer to data length variable
+* @retval pointer to descriptor buffer
+*/
+uint8_t * USBD_USR_InterfaceStrDescriptor( uint8_t speed , uint16_t *length)
+{
+ if(speed == 0)
+ {
+ USBD_GetString (USBD_INTERFACE_HS_STRING, USBD_StrDesc, length);
+ }
+ else
+ {
+ USBD_GetString (USBD_INTERFACE_FS_STRING, USBD_StrDesc, length);
+ }
+ return USBD_StrDesc;
+}
+
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+
+
+/**
+ * @}
+ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
Index: yc_usb/scpu_usb_hid_Device_Demo/usbd_usr.c
===================================================================
--- /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_hid_Device_Demo/usbd_usr.c (nonexistent)
+++ /YC3121_SDK/fw/sdk/yc_usb/scpu_usb_hid_Device_Demo/usbd_usr.c (working copy)
@@ -0,0 +1,288 @@
+/**
+ ******************************************************************************
+ * @file usbd_usr.c
+ * @author Megahuntmicro
+ * @version V1.0.0
+ * @date 21-October-2014
+ * @brief This file includes the user application layer
+ ******************************************************************************
+ * @attention
+ *
+ *
+ ******************************************************************************
+ */
+
+/* Includes ------------------------------------------------------------------*/
+#include "Yc3121.h"
+#include "usbd_usr.h"
+#include "usbd_ioreq.h"
+#if !defined(USE_MHSCPU_EVAL) && !defined(USE_GOLDDRAGON_107)
+#include "Yc3121.h"
+#endif
+#include "usb_conf.h"
+
+/** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY
+* @{
+*/
+
+/** @defgroup USBD_USR
+* @brief This file includes the user application layer
+* @{
+*/
+
+/** @defgroup USBD_USR_Private_TypesDefinitions
+* @{
+*/
+/**
+* @}
+*/
+
+
+/** @defgroup USBD_USR_Private_Defines
+* @{
+*/
+/**
+* @}
+*/
+
+
+/** @defgroup USBD_USR_Private_Macros
+* @{
+*/
+/**
+* @}
+*/
+
+
+/** @defgroup USBD_USR_Private_Variables
+* @{
+*/
+
+USBD_Usr_cb_TypeDef USRD_cb =
+{
+ USBD_USR_Init,
+ USBD_USR_DeviceReset,
+ USBD_USR_DeviceConfigured,
+ USBD_USR_DeviceSuspended,
+ USBD_USR_DeviceResumed,
+
+ USBD_USR_DeviceConnected,
+ USBD_USR_DeviceDisconnected,
+
+
+};
+
+
+
+/**
+* @}
+*/
+
+/** @defgroup USBD_USR_Private_Constants
+* @{
+*/
+
+/**
+* @}
+*/
+
+
+
+/** @defgroup USBD_USR_Private_FunctionPrototypes
+* @{
+*/
+/**
+* @}
+*/
+
+
+/** @defgroup USBD_USR_Private_Functions
+* @{
+*/
+
+#define USER_INFORMATION1 "[Key]:RemoteWakeup"
+#define USER_INFORMATION2 "[Joystick]:Mouse emulation"
+
+
+/**
+* @brief USBD_USR_Init
+* Displays the message on LCD for host lib initialization
+* @param None
+* @retval None
+*/
+void USBD_USR_Init(void)
+{
+// /* Initialize LEDs */
+// STM_EVAL_LEDInit(LED1);
+//#ifndef USE_MHSCPU_EVAL
+// STM_EVAL_LEDInit(LED2);
+// STM_EVAL_LEDInit(LED3);
+// STM_EVAL_LEDInit(LED4);
+//#endif
+//
+// /* Configure the IOE on which the JoyStick is connected */
+//#if defined(USE_MHSCPU_EVAL) || defined(USE_GOLDDRAGON_107)
+// JoyStick_GPIO_Config();
+//#else
+// IOE_Config();
+//#endif
+//
+// /* Setup SysTick Timer for 20 msec interrupts
+// This interrupt is used to probe the joystick */
+// if (SysTick_Config(SystemCoreClock / 48))
+// {
+// /* Capture error */
+// while (1);
+// }
+// /* Initialize the LCD */
+//#if defined (USE_STM322xG_EVAL)
+// STM322xG_LCD_Init();
+//#elif defined(USE_STM324xG_EVAL)
+// STM324xG_LCD_Init();
+//#elif defined (USE_STM3210C_EVAL)
+// STM3210C_LCD_Init();
+//#else
+// #error "Missing define: Evaluation board (ie. USE_STM322xG_EVAL)"
+//#endif
+
+// LCD_LOG_Init();
+
+//#ifdef USE_USB_OTG_HS
+// LCD_LOG_SetHeader(" USB OTG HS HID Device");
+//#else
+// LCD_LOG_SetHeader(" USB OTG FS HID Device");
+//#endif
+// LCD_UsrLog("> USB device library started.\n");
+// LCD_LOG_SetFooter (" USB Device Library v1.1.0" );
+//
+// /* Information panel */
+// LCD_SetTextColor(Green);
+// LCD_DisplayStringLine( LCD_PIXEL_HEIGHT - 42, USER_INFORMATION1);
+// LCD_DisplayStringLine( LCD_PIXEL_HEIGHT - 30, USER_INFORMATION2);
+// LCD_SetTextColor(LCD_LOG_DEFAULT_COLOR);
+
+}
+
+/**
+* @brief USBD_USR_DeviceReset
+* Displays the message on LCD on device Reset Event
+* @param speed : device speed
+* @retval None
+*/
+void USBD_USR_DeviceReset(uint8_t speed )
+{
+// switch (speed)
+// {
+// case USB_OTG_SPEED_HIGH:
+// LCD_LOG_SetFooter (" USB Device Library v1.1.0 [HS]" );
+// break;
+
+// case USB_OTG_SPEED_FULL:
+// LCD_LOG_SetFooter (" USB Device Library v1.1.0 [FS]" );
+// break;
+// default:
+// LCD_LOG_SetFooter (" USB Device Library v1.1.0 [??]" );
+//
+// }
+}
+
+
+/**
+* @brief USBD_USR_DeviceConfigured
+* Displays the message on LCD on device configuration Event
+* @param None
+* @retval Staus
+*/
+void USBD_USR_DeviceConfigured (void)
+{
+// printf("> HID Interface started.\n");
+}
+
+
+/**
+* @brief USBD_USR_DeviceConnected
+* Displays the message on LCD on device connection Event
+* @param None
+* @retval Staus
+*/
+void USBD_USR_DeviceConnected (void)
+{
+// printf("> USB Device Connected.\n");
+}
+
+
+/**
+* @brief USBD_USR_DeviceDisonnected
+* Displays the message on LCD on device disconnection Event
+* @param None
+* @retval Staus
+*/
+void USBD_USR_DeviceDisconnected (void)
+{
+// printf("> USB Device Disconnected.\n");
+}
+
+/**
+* @brief USBD_USR_DeviceSuspended
+* Displays the message on LCD on device suspend Event
+* @param None
+* @retval None
+*/
+void USBD_USR_DeviceSuspended(void)
+{
+// printf("> USB Device in Suspend Mode.\n");
+ /* Users can do their application actions here for the USB-Reset */
+}
+
+
+/**
+* @brief USBD_USR_DeviceResumed
+* Displays the message on LCD on device resume Event
+* @param None
+* @retval None
+*/
+void USBD_USR_DeviceResumed(void)
+{
+// printf("> USB Device in Idle Mode.\n");
+ /* Users can do their application actions here for the USB-Reset */
+}
+
+/**
+* @}
+*/
+
+/**
+* @}
+*/
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+