Index: Librarier/bt_rom/format/headset.format
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/Librarier/bt_rom/format/headset.format	(revision 4516)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/Librarier/bt_rom/format/headset.format	(working copy)
@@ -262,10 +262,12 @@
 	8 mem_remote_ext_features1
 	2 mem_le_scan_window_temp
 
-256 mem_zcode_buff_user
+	256 mem_zcode_buff_user
 
 	1 mem_queue_init_flag
 	64 mem_efuse_64_bytes
+	3 mem_app_flash_address
+	1 mem_app_loadcode_flag
 0 mem_headset_end
 )
 (
@@ -527,3 +529,7 @@
 0x60 RSSI_ADJUST_PHO_8DB
 )
 
+
+
+
+
Index: Librarier/bt_rom/format/ui.format
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/Librarier/bt_rom/format/ui.format	(revision 4516)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/Librarier/bt_rom/format/ui.format	(working copy)
@@ -330,6 +330,7 @@
 0xb5 BT_CMD_PAUSE
 0xbd BT_CMD_ENTER_OTA
 0xbe BT_CMD_EXIT_OTA
+0xbf BT_CMD_LOADCODE
 
 )
 
Index: Librarier/bt_rom/program/peripherals.prog
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/Librarier/bt_rom/program/peripherals.prog	(revision 4516)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/Librarier/bt_rom/program/peripherals.prog	(working copy)
@@ -207,6 +207,7 @@
 	nop 100
 	arg qspi_read_for_loadcode,regc
 	call read_first_flash_block
+loadcode_spi_spec:	
 	call load_storage
  	ncall qspi_gpio_clear,match
  	call update_start_addr,match
Index: ModuleDemo/25_OTA/bt_demo/BT/a-l.bat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/BT/a-l.bat	(revision 4532)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/BT/a-l.bat	(working copy)
@@ -13,16 +13,16 @@
 e fa
 :: make sure flash ok
 e fr 0 30
-e fe 0
+e fc 
 :: clear store info
-e fe 7f000
+::e fe 7f000
 :: close wdt
 e 8043 00
 ::e fw 3 a5
-e fp output/flash.dat 1000
-::e fp output/flash.dat 20000 
-e fw 4 a5
+e fp output/flash_boot.dat 0
+e fp output/flash.dat 6000 
+::e fw 4 a5
 :: make sure flash offset write after the file download, becouse in rom code, will check crc, if download failed in middle time, it will occur error.
-e fw 0 031000
+::e fw 0 031000
 ::e fw 0 030002
 e k
Index: ModuleDemo/25_OTA/bt_demo/BT/a.bat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/BT/a.bat	(revision 4532)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/BT/a.bat	(working copy)
@@ -13,16 +13,16 @@
 e fa
 :: make sure flash ok
 e fr 0 30
-e fe 0
+e fc
 :: clear store info
-e fe 7f000
+::e fe 7f000
 :: close wdt
 e 8043 00
 ::e fw 3 a5
-e fp output/flash.dat 1000
-::e fp output/flash.dat 20000 
-e fw 4 a5
+e fp output/flash_boot.dat 0
+e fp output/flash.dat 6000 
+::e fw 4 a5
 :: make sure flash offset write after the file download, becouse in rom code, will check crc, if download failed in middle time, it will occur error.
 ::e fw 0 030002
-e fw 0 031000
+::e fw 0 031000
 e k
Index: ModuleDemo/25_OTA/bt_demo/BT/output/flash_boot.dat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/BT/output/flash_boot.dat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/BT/output/flash_boot.dat	(working copy)
@@ -0,0 +1,14965 @@
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Index: ModuleDemo/25_OTA/bt_demo/BT/patch/patch.prog
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/BT/patch/patch.prog	(revision 4532)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/BT/patch/patch.prog	(working copy)
@@ -38,6 +38,7 @@
 	beq patch13_6,p_initialize_radio_cont_by_init_param
 
 	beq patch14_0,p_lpm_hibernate
+	beq patch14_4,p_lpm_dispatch
 	beq patch17_1,p_app_init
 	beq patch17_2,p_app_process_bb_event
 	beq patch1c_0,p_vp_check_get_data
@@ -400,7 +401,7 @@
 	rtn
 p_app_init:
 p_hci_init:
-	//jam 0,mem_ota_enable_xip_flag
+	jam 0,mem_ota_enable_xip_flag
 	// RAM reset.
 	//jam 0,mem_ota_wdt_en_flag
 	//jam 0,mem_ota_wdt_m0_en
@@ -425,6 +426,7 @@
 	store 2,mem_cb_idle_process
 	//call headset_check_reconnet
 	//call p_ipc_notify_m0_wakeup_flag_init
+	jam 2 ,core_reset 
 	call enable_xip
 	nbranch wake_from_power,wake
 wake_for_lpm:
@@ -3343,3 +3345,11 @@
 	disable master
 	rtn	
 
+p_lpm_dispatch:
+	fetch 1,mem_ota_enable_xip_flag
+	beq OTA_NEED_ENABLE_XIP_FLAG, p_loadcode_normal
+	branch lpm_dispatch+1
+
+p_loadcode_normal:	
+	branch soft_reset
+	
\ No newline at end of file
Index: ModuleDemo/25_OTA/bt_demo/BT/sched/patch.dat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/BT/sched/patch.dat	(revision 4532)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/BT/sched/patch.dat	(working copy)
@@ -20,7 +20,7 @@
 00   #mem_patch11
 00   #mem_patch12
 40   #mem_patch13
-01   #mem_patch14
+11   #mem_patch14
 00   #mem_patch15
 00   #mem_patch16
 06   #mem_patch17
Index: ModuleDemo/25_OTA/bt_demo/CM0/Prj/MDK/kill.bat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/CM0/Prj/MDK/kill.bat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/CM0/Prj/MDK/kill.bat	(working copy)
@@ -0,0 +1,16 @@
+del yc11xx_asm.txt
+del yc11xx.uvguix.qinsu
+del *.lst	/s
+del *.map	/s
+cd Objects
+
+del *.hex	/s
+
+del *.lnp	/s
+del *.dep	/s
+del *.crf	/s
+del *.d	/s
+del *.o	/s
+del *.axf	/s
+
+del *.htm	/s
Index: ModuleDemo/25_OTA/bt_demo/CM0/Prj/MDK/yc11xx.uvguix.admin
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/CM0/Prj/MDK/yc11xx.uvguix.admin	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/CM0/Prj/MDK/yc11xx.uvguix.admin	(working copy)
@@ -0,0 +1,1878 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectGui xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_guix.xsd">
+
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+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
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+    <LastAddFilePath></LastAddFilePath>
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+
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+
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+      <TableColWidths>1010 160</TableColWidths>
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+      <WinId>204</WinId>
+      <ViewName>Performance Analyzer</ViewName>
+      <TableColWidths>1170</TableColWidths>
+    </View>
+  </SECTreeCtrl>
+
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+    <View>
+      <WinId>35141</WinId>
+      <ViewName>Event Statistics</ViewName>
+      <UserString></UserString>
+      <TableColWidths>200 50 700</TableColWidths>
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+      <WinId>1506</WinId>
+      <ViewName>Symbols</ViewName>
+      <UserString></UserString>
+      <TableColWidths>80 80 80</TableColWidths>
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+    <View>
+      <WinId>1936</WinId>
+      <ViewName>Watch 1</ViewName>
+      <UserString></UserString>
+      <TableColWidths>200 133 133</TableColWidths>
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+    <View>
+      <WinId>1937</WinId>
+      <ViewName>Watch 2</ViewName>
+      <UserString></UserString>
+      <TableColWidths>200 133 133</TableColWidths>
+    </View>
+    <View>
+      <WinId>1935</WinId>
+      <ViewName>Call Stack + Locals</ViewName>
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+      <TableColWidths>200 133 133</TableColWidths>
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+    <Orientation>1</Orientation>
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+        <ContractedFolders></ContractedFolders>
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Index: ModuleDemo/25_OTA/bt_demo/CM0/Prj/MDK/yc11xx.uvoptx
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/CM0/Prj/MDK/yc11xx.uvoptx	(revision 4532)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/CM0/Prj/MDK/yc11xx.uvoptx	(working copy)
@@ -103,7 +103,7 @@
         <bEvRecOn>1</bEvRecOn>
         <bSchkAxf>0</bSchkAxf>
         <bTchkAxf>0</bTchkAxf>
-        <nTsel>7</nTsel>
+        <nTsel>4</nTsel>
         <sDll></sDll>
         <sDllPa></sDllPa>
         <sDlgDll></sDlgDll>
@@ -266,7 +266,7 @@
 
   <Group>
     <GroupName>main</GroupName>
-    <tvExp>0</tvExp>
+    <tvExp>1</tvExp>
     <tvExpOptDlg>0</tvExpOptDlg>
     <cbSel>0</cbSel>
     <RteFlg>0</RteFlg>
Index: ModuleDemo/25_OTA/bt_demo/CM0/Prj/MDK/yc11xx.uvprojx
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/CM0/Prj/MDK/yc11xx.uvprojx	(revision 4532)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/CM0/Prj/MDK/yc11xx.uvprojx	(working copy)
@@ -16,7 +16,7 @@
         <TargetCommonOption>
           <Device>ARMCM0</Device>
           <Vendor>ARM</Vendor>
-          <PackID>ARM.CMSIS.5.4.0</PackID>
+          <PackID>ARM.CMSIS.5.5.1</PackID>
           <PackURL>http://www.keil.com/pack/</PackURL>
           <Cpu>IROM(0x00000000,0x00040000) IRAM(0x20000000,0x00020000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
Index: ModuleDemo/25_OTA/bt_demo/CM0/User/btreg.h
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/CM0/User/btreg.h	(revision 4532)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/25_OTA/bt_demo/CM0/User/btreg.h	(working copy)
@@ -1674,7 +1674,9 @@
 #define	mem_zcode_buff_user                     	0x4e3a
 #define	mem_queue_init_flag                     	0x4f3a
 #define	mem_efuse_64_bytes                      	0x4f3b
-#define	mem_headset_end                         	0x4f7b
+#define	mem_app_flash_address                   	0x4f7b
+#define	mem_app_loadcode_flag                   	0x4f7e
+#define	mem_headset_end                         	0x4f7f
 #define	mem_usb_mouse_data                      	0x4ace
 #define	mem_usb_kb_data                         	0x4ade
 #define	mem_usb_kb_multikey                     	0x4aee
@@ -1921,6 +1923,7 @@
 #define	BT_CMD_PAUSE                            	0xb5
 #define	BT_CMD_ENTER_OTA                        	0xbd
 #define	BT_CMD_EXIT_OTA                         	0xbe
+#define	BT_CMD_LOADCODE                         	0xbf
 #define	BT_EVT_NULL                             	0x00
 #define	BT_EVT_BB_CONNECTED                     	0x01
 #define	BT_EVT_BB_DISCONNECTED                  	0x02
Index: ModuleDemo/26_BOOT/bt_demo/BT/a-l.bat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/a-l.bat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/a-l.bat	(working copy)
@@ -0,0 +1,26 @@
+
+e pu
+::e 8097   040307020506  
+:: enable flash vcc
+e 809a 3f
+:: set flash io port
+e 8090 060502
+e 8094 070304
+:: clear flash first
+e fe 0
+:: sometimes in lpm will power off qspi
+e pu
+e fa
+:: make sure flash ok
+e fr 0 30
+e fe 0
+
+e 8043 00
+
+::e fp output/flash_boot.dat 
+e fp output/flash.dat 6000 
+::e fw 4 a5
+:: make sure flash offset write after the file download, becouse in rom code, will check crc, if download failed in middle time, it will occur error.
+::e fw 0 031000
+::e fw 0 030002
+e k
Index: ModuleDemo/26_BOOT/bt_demo/BT/a.bat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/a.bat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/a.bat	(working copy)
@@ -0,0 +1,28 @@
+
+e pu
+::e 8097   040307020506  
+:: enable flash vcc
+e 809a 3f
+:: set flash io port
+e 8090 060502
+e 8094 070304
+:: clear flash first
+e fe 0
+:: sometimes in lpm will power off qspi
+e pu
+e fa
+:: make sure flash ok
+e fr 0 30
+e fe 0
+:: clear store info
+e fe 7f000
+:: close wdt
+e 8043 00
+::e fw 3 a5
+e fp output/flash.dat 1000
+::e fp output/flash.dat 20000 
+e fw 4 a5
+:: make sure flash offset write after the file download, becouse in rom code, will check crc, if download failed in middle time, it will occur error.
+::e fw 0 030002
+e fw 0 031000
+e k
Index: ModuleDemo/26_BOOT/bt_demo/BT/do.bat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/do.bat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/do.bat	(working copy)
@@ -0,0 +1,260 @@
+
+@set FPGA_PATH=fpgajic\fpga
+@set YC_PATCH_FILE=yc_patch_yc1121.h
+@set enc=1
+@set enckey=0000000000000000
+@echo off
+
+::get Rom path
+set now_path=%~dp0
+call:getstrlocation %now_path% ModuleDemo location
+call:get_fix_len_str  %now_path% location soft_path
+set lib_path=%soft_path%Librarier
+set rom_path=%lib_path%\bt_rom
+set program=%rom_path%\program
+set format=%rom_path%\format
+set util=%rom_path%\util
+set patch_path=%now_path%patch
+set sched=%now_path%sched
+set output=%now_path%output
+set voice_prompt=%now_path%voice_prompt
+
+rem @echo rom_path=%rom_path%
+rem @echo program_path=%program%
+rem @echo format_path=%format%
+rem @echo util_path=%util%
+rem @echo patch_path=%patch_path%
+
+
+set progs=  %program%\a2dp.prog +  %program%\app.prog +  %program%\avctp.prog +  %program%\c51.prog +  %program%\cvsd.prog +  %program%\hci_main.prog +  %program%\audio.prog +  %program%\hid.prog +  %program%\hsphfp.prog +  %program%\ipc.prog +  %program%\l2cap.prog +  %program%\le_att.prog +  %program%\le.prog +  %program%\le_smp.prog +  %program%\lmp.prog +  %program%\peripherals.prog +  %program%\rfcomm.prog +  %program%\scheduler.prog +  %program%\sdp.prog +  %program%\security.prog +  %program%\simple_pairing.prog +  %program%\ui.prog +  %program%\upper_sm.prog +  %program%\usb.prog +  %program%\utility.prog +  %program%\tws_m.prog +  %program%\tws_s.prog +  %program%\headset.prog +  %program%\debug.prog  +  %program%\ota.prog 
+copy %program%\bt.prog + %progs% + %patch_path%\z.prog output\bt_program23.meta > nul
+set fmts= %format%\a2dp.format +  %format%\app.format +  %format%\avctp.format +  %format%\cvsd.format +  %format%\hci.format +  %format%\headset.format +  %format%\hid.format +  %format%\hsphfp.format +  %format%\ipc.format +  %format%\l2cap.format +  %format%\le.format +  %format%\lmp.format +  %format%\memblocks.format +  %format%\patch.format +  %format%\prcp.format +  %format%\regs.format +  %format%\rfcomm.format +  %format%\sdp.format +  %format%\security.format +  %format%\simple_pairing.format +  %format%\ui.format +  %format%\upper_sm.format +  %format%\usb.format +  %format%\utility.format +  %format%\var.format +  %format%\xip.format +  %format%\tws.format +  %format%\remote.format +  %format%\mSBC.format +  %format%\debug.format +  %format%\tishi.format + %format%\ota.format + %format%\audio_dac_adc.format
+copy %format%\bt.format + %fmts% + %format%\command.format  output\bt_format.meta > nul
+
+perl %util%/mergepatch.pl 				output/bt_program23.meta %patch_path%
+perl %util%/memalloc.pl 				output/bt_format.meta
+perl %util%/transform_memmap2btreg.pl 	output/memmap.format %format%/memblocks.format %format%/ipc.format %format%/ui.format %format%/hsphfp.format %format%/a2dp.format %format%/tws.format %format%/headset.format %format%/ota.format %format%/msbc.format ..\CM0\User\btreg.h
+cd output
+osiuasm bt_program23 -O-W
+copy ..\sched\patch.dat + ..\sched\user.dat + ..\sched\rf.dat +..\sched\usb.dat  ..\output\sched.rom
+
+
+if "%1" equ "eep" (
+	goto genromrevc
+)else (
+  goto downloadram
+)
+
+:genromrevc
+echo off
+@echo Start to generate EEPROM code
+
+if exist "..\..\CM0\Prj\Output\out.rom" (
+	copy "..\..\CM0\Prj\Output\out.rom"  "out.rom" 
+) else (
+	@echo "*** !!! Waring: No CM0 CODE !!! ***" 
+)
+
+%util%/geneep  -n -z 
+@rem  %util%/geneep -f -n   -k %now_path%\key.dat 
+%util%/geneep -f -n -z  
+
+perl %util%\flash2bin.pl
+
+::perl %util%\svnversion.pl %output%
+::perl %util%\getcodesize.pl %output%
+::perl %util%\p_coef.pl %sched%\coef.dat %output%/coef_out.dat 
+::perl %util%\vp2.pl %voice_prompt% %output%
+::perl %util%\add_coef.pl %output% flash2.dat coef_out.dat flash_add_coef.dat
+::perl %util%\add_ota_pcm.pl %output%/flash_add_coef.dat %output%/flash_add_coef.dat %output%/all_pcm_data.dat %output%
+
+::copy %output%\flash.dat  ..\..\..\..\24_TWS\bt_demo\BT\output\ota.dat
+
+:gen_eep_end
+cd ..
+echo **********************************
+@rem echo flash.dat Generated.
+echo **********************************
+goto end
+
+
+
+:genrom
+@rem echo on
+perl ..\util\rom2mif.pl romcode
+del ..\..\%FPGA_PATH%\romcode.mif
+copy .\romcode.mif ..\..\%FPGA_PATH%\romcode.mif
+perl ..\util\gen_patch_h.pl >%YC_PATCH_FILE%
+copy .\%YC_PATCH_FILE% ..\..\%MV_PATCH%\%YC_PATCH_FILE%
+copy .\%YC_PATCH_FILE% D:\work\yichip\mv_proj\src\inc\%YC_PATCH_FILE%
+cd ..\..\%FPGA_PATH%
+quartus_cdb btspi -c btspi --update_mif
+quartus_asm --read_settings_files=off --write_settings_files=off btspi -c btspi
+quartus_pgm -c USB-Blaster[USB-0] -m jtag -o "p;.\output\btspi.sof" 
+@echo bitstream_compression=on >1
+@echo memory_map_file=on >> 1
+quartus_cpf -c -o 1 -s EP3C55 -d EPCS16 output\btspi.sof output\btspi.jic  
+@rem quartus_pgm -c USB-Blaster[USB-0] -m jtag -o "pi;.\output\btspi.jic"   
+@del 1
+goto end
+
+
+
+:downloadram
+echo on
+@echo Start to download ram code
+e ku
+e hu
+e su sched.rom
+@echo **********************************
+@echo RAM CODE has been downloaded. 
+@echo **********************************
+cd ..
+
+
+:end
+goto:eof
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+::------------------------------------------
+::---------------func:getstrlocation-------
+::------------------------------------------
+:getstrlocation
+setlocal
+set "bstr=%1"
+set "cstr=%2"
+set %3=0
+set "num=0"
+set "len_bstr=0"
+set "len_cstr=0"
+
+call:getstrlen %bstr% len_bstr
+call:getstrlen %cstr% len_cstr
+
+:getstrlocation_next
+set /a len_remain=len_bstr-num
+if %len_remain% lss %len_cstr% (
+echo "cann't get str location"
+set /a num =0
+goto getstrlocation_last
+)
+
+call:get_fix_len_str %bstr%  len_cstr compar_str
+
+if not %compar_str%==%cstr% (
+set /a num+=1
+set "bstr=%bstr:~1%"
+goto getstrlocation_next
+)
+
+:getstrlocation_last
+(endlocal
+	set %3=%num%
+)
+goto:eof
+::---------------end:func-------------------
+
+
+::------------------------------------------
+::---------------func:get_fix_len_str-------
+::------------------------------------------
+:get_fix_len_str
+setlocal
+set "getstr=%NULL%"
+set str=%1
+set /a len=%2
+set num=0
+:get_fix_len_str_loop
+set getstr=%getstr%%str:~0,1%
+set /a num+=1
+set str=%str:~1%
+if %num% lss %len% goto get_fix_len_str_loop
+(endlocal
+ set %3=%getstr%
+)
+goto:eof
+::---------------end:func-------------------
+
+
+
+
+::------------------------------------------
+::---------------func:getstrlen-------------
+::------------------------------------------
+:getstrlen
+setlocal
+set str=%1
+set %2=0
+set /a "num=0"
+
+:getstrlen_next
+if "%str%"=="" goto getstrlen_last
+
+if not "%str%"=="" (
+set /a num+=1 
+set "str=%str:~1%"
+goto getstrlen_next
+)
+
+:getstrlen_last
+(endlocal
+	set /a "%2=%num%"
+)
+goto:eof
+::---------------end:func-------------------
+
+
+
+
+::------------------------------------------
+::---------------func:getcharlocation-------
+::------------------------------------------
+:getcharlocation
+setlocal
+set "str=%1"
+set "ch=%2"
+set %3=0
+set /a "num=0"
+
+:getcharnext
+if "%str%"=="" ( 
+set /a num=0
+goto getcharlast
+)
+
+if not "%str%"=="" (
+set /a num+=1
+if "%str:~0,1%"=="%ch%" goto getcharlast
+set "str=%str:~1%"
+goto getcharnext
+)
+:getcharlast
+(endlocal
+set %3=%num%
+)
+goto:eof 
+::---------------end:func-------------------
+
+
+
+
+
+
Index: ModuleDemo/26_BOOT/bt_demo/BT/do_sdk.bat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/do_sdk.bat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/do_sdk.bat	(working copy)
@@ -0,0 +1,262 @@
+
+@set FPGA_PATH=fpgajic\fpga
+@set YC_PATCH_FILE=yc_patch_yc1121.h
+@set enc=1
+@set enckey=0000000000000000
+@echo off
+
+::get Rom path
+set now_path=%~dp0
+call:getstrlocation %now_path% ModuleDemo location
+call:get_fix_len_str  %now_path% location soft_path
+set lib_path=%soft_path%Librarier
+set rom_path=%lib_path%\bt_rom
+set program=%rom_path%\program
+set format=%rom_path%\format
+set util=%rom_path%\util
+set patch_path=%now_path%patch
+set sched=%now_path%sched
+set output=%now_path%output
+set voice_prompt=%now_path%voice_prompt
+
+rem @echo rom_path=%rom_path%
+rem @echo program_path=%program%
+rem @echo format_path=%format%
+rem @echo util_path=%util%
+rem @echo patch_path=%patch_path%
+
+
+::set progs=  %program%\a2dp.prog +  %program%\app.prog +  %program%\avctp.prog +  %program%\c51.prog +  %program%\cvsd.prog +  %program%\hci_main.prog +  %program%\audio.prog +  %program%\hid.prog +  %program%\hsphfp.prog +  %program%\ipc.prog +  %program%\l2cap.prog +  %program%\le_att.prog +  %program%\le.prog +  %program%\le_smp.prog +  %program%\lmp.prog +  %program%\peripherals.prog +  %program%\rfcomm.prog +  %program%\scheduler.prog +  %program%\sdp.prog +  %program%\security.prog +  %program%\simple_pairing.prog +  %program%\ui.prog +  %program%\upper_sm.prog +  %program%\usb.prog +  %program%\utility.prog +  %program%\tws_m.prog +  %program%\tws_s.prog +  %program%\headset.prog +  %program%\debug.prog  +  %program%\ota.prog 
+::copy %program%\bt.prog + %progs%  output\bt_program23.meta > nul
+copy patch\patch_sdk.prog + patch\patch.prog + %patch_path%\z.prog output\bt_program23.meta
+set fmts= %format%\a2dp.format +  %format%\app.format +  %format%\avctp.format +  %format%\cvsd.format +  %format%\hci.format +  %format%\headset.format +  %format%\hid.format +  %format%\hsphfp.format +  %format%\ipc.format +  %format%\l2cap.format +  %format%\le.format +  %format%\lmp.format +  %format%\memblocks.format +  %format%\patch.format +  %format%\prcp.format +  %format%\regs.format +  %format%\rfcomm.format +  %format%\sdp.format +  %format%\security.format +  %format%\simple_pairing.format +  %format%\ui.format +  %format%\upper_sm.format +  %format%\usb.format +  %format%\utility.format +  %format%\var.format +  %format%\xip.format +  %format%\tws.format +  %format%\remote.format +  %format%\mSBC.format +  %format%\debug.format +  %format%\tishi.format + %format%\ota.format + %format%\audio_dac_adc.format
+copy %format%\bt.format + %fmts% + format\labels.format + %format%\command.format  output\bt_format.meta > nul
+
+
+
+perl %util%/mergepatch.pl 				output/bt_program23.meta %patch_path%
+perl %util%/memalloc.pl 				output/bt_format.meta
+perl %util%/transform_memmap2btreg.pl 	output/memmap.format %format%/memblocks.format %format%/ipc.format %format%/ui.format %format%/hsphfp.format %format%/a2dp.format %format%/tws.format %format%/headset.format %format%/ota.format %format%/msbc.format ..\CM0\User\btreg.h
+cd output
+osiuasm bt_program23 -O-W
+copy ..\sched\patch.dat + ..\sched\user.dat + ..\sched\rf.dat +..\sched\usb.dat  ..\output\sched.rom
+
+
+
+if "%1" equ "eep" (
+	goto genromrevc
+)else (
+  goto downloadram
+)
+
+:genromrevc
+echo off
+@echo Start to generate EEPROM code
+
+if exist "..\..\CM0\Prj\Output\out.rom" (
+	copy "..\..\CM0\Prj\Output\out.rom"  "out.rom" 
+) else (
+	@echo "*** !!! Waring: No CM0 CODE !!! ***" 
+)
+
+%util%/geneep  -n -z 
+@rem  %util%/geneep -f -n   -k %now_path%\key.dat 
+%util%/geneep -f -n -z  
+
+::perl %util%\svnversion.pl %output%
+::perl %util%\getcodesize.pl %output%
+::perl %util%\p_coef.pl %sched%\coef.dat %output%/coef_out.dat 
+::perl %util%\vp2.pl %voice_prompt% %output%
+::perl %util%\add_coef.pl %output% flash2.dat coef_out.dat flash_add_coef.dat
+::perl %util%\add_ota_pcm.pl %output%/flash_add_coef.dat %output%/flash_add_coef.dat %output%/all_pcm_data.dat %output%
+
+::copy %output%\flash.dat  ..\..\..\..\24_TWS\bt_demo\BT\output\ota.dat
+
+:gen_eep_end
+cd ..
+echo **********************************
+@rem echo flash.dat Generated.
+echo **********************************
+goto end
+
+
+
+:genrom
+@rem echo on
+perl ..\util\rom2mif.pl romcode
+del ..\..\%FPGA_PATH%\romcode.mif
+copy .\romcode.mif ..\..\%FPGA_PATH%\romcode.mif
+perl ..\util\gen_patch_h.pl >%YC_PATCH_FILE%
+copy .\%YC_PATCH_FILE% ..\..\%MV_PATCH%\%YC_PATCH_FILE%
+copy .\%YC_PATCH_FILE% D:\work\yichip\mv_proj\src\inc\%YC_PATCH_FILE%
+cd ..\..\%FPGA_PATH%
+quartus_cdb btspi -c btspi --update_mif
+quartus_asm --read_settings_files=off --write_settings_files=off btspi -c btspi
+quartus_pgm -c USB-Blaster[USB-0] -m jtag -o "p;.\output\btspi.sof" 
+@echo bitstream_compression=on >1
+@echo memory_map_file=on >> 1
+quartus_cpf -c -o 1 -s EP3C55 -d EPCS16 output\btspi.sof output\btspi.jic  
+@rem quartus_pgm -c USB-Blaster[USB-0] -m jtag -o "pi;.\output\btspi.jic"   
+@del 1
+goto end
+
+
+
+:downloadram
+echo on
+@echo Start to download ram code
+e ku
+e hu
+e su sched.rom
+@echo **********************************
+@echo RAM CODE has been downloaded. 
+@echo **********************************
+cd ..
+
+
+:end
+goto:eof
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+::------------------------------------------
+::---------------func:getstrlocation-------
+::------------------------------------------
+:getstrlocation
+setlocal
+set "bstr=%1"
+set "cstr=%2"
+set %3=0
+set "num=0"
+set "len_bstr=0"
+set "len_cstr=0"
+
+call:getstrlen %bstr% len_bstr
+call:getstrlen %cstr% len_cstr
+
+:getstrlocation_next
+set /a len_remain=len_bstr-num
+if %len_remain% lss %len_cstr% (
+echo "cann't get str location"
+set /a num =0
+goto getstrlocation_last
+)
+
+call:get_fix_len_str %bstr%  len_cstr compar_str
+
+if not %compar_str%==%cstr% (
+set /a num+=1
+set "bstr=%bstr:~1%"
+goto getstrlocation_next
+)
+
+:getstrlocation_last
+(endlocal
+	set %3=%num%
+)
+goto:eof
+::---------------end:func-------------------
+
+
+::------------------------------------------
+::---------------func:get_fix_len_str-------
+::------------------------------------------
+:get_fix_len_str
+setlocal
+set "getstr=%NULL%"
+set str=%1
+set /a len=%2
+set num=0
+:get_fix_len_str_loop
+set getstr=%getstr%%str:~0,1%
+set /a num+=1
+set str=%str:~1%
+if %num% lss %len% goto get_fix_len_str_loop
+(endlocal
+ set %3=%getstr%
+)
+goto:eof
+::---------------end:func-------------------
+
+
+
+
+::------------------------------------------
+::---------------func:getstrlen-------------
+::------------------------------------------
+:getstrlen
+setlocal
+set str=%1
+set %2=0
+set /a "num=0"
+
+:getstrlen_next
+if "%str%"=="" goto getstrlen_last
+
+if not "%str%"=="" (
+set /a num+=1 
+set "str=%str:~1%"
+goto getstrlen_next
+)
+
+:getstrlen_last
+(endlocal
+	set /a "%2=%num%"
+)
+goto:eof
+::---------------end:func-------------------
+
+
+
+
+::------------------------------------------
+::---------------func:getcharlocation-------
+::------------------------------------------
+:getcharlocation
+setlocal
+set "str=%1"
+set "ch=%2"
+set %3=0
+set /a "num=0"
+
+:getcharnext
+if "%str%"=="" ( 
+set /a num=0
+goto getcharlast
+)
+
+if not "%str%"=="" (
+set /a num+=1
+if "%str:~0,1%"=="%ch%" goto getcharlast
+set "str=%str:~1%"
+goto getcharnext
+)
+:getcharlast
+(endlocal
+set %3=%num%
+)
+goto:eof 
+::---------------end:func-------------------
+
+
+
+
+
+
Index: ModuleDemo/26_BOOT/bt_demo/BT/download_full_bin.bat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/download_full_bin.bat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/download_full_bin.bat	(working copy)
@@ -0,0 +1,16 @@
+::e pu
+
+::e hu output/romcode.rom 2000
+e pu
+::e 8097   040307020506  
+e 8090 060502
+e 8094 040307
+
+e fp output/flash_all.dat 0
+
+e fe 0
+e fe 7f000
+e fw 0 036000
+e fw 3 a5
+e fw 4 a5
+e k
\ No newline at end of file
Index: ModuleDemo/26_BOOT/bt_demo/BT/fdo.bat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/fdo.bat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/fdo.bat	(working copy)
@@ -0,0 +1,3 @@
+e pu
+e hu output/romcode.rom 2000
+e ku
\ No newline at end of file
Index: ModuleDemo/26_BOOT/bt_demo/BT/get_sdk_labels.bat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/get_sdk_labels.bat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/get_sdk_labels.bat	(working copy)
@@ -0,0 +1,5 @@
+call do.bat eep
+cd output
+perl ..\getlabels.pl > labels.format
+copy labels.format ..\format\labels.format
+cd ..
\ No newline at end of file
Index: ModuleDemo/26_BOOT/bt_demo/BT/getlabels.pl
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/getlabels.pl	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/getlabels.pl	(working copy)
@@ -0,0 +1,19 @@
+open file,"program.lis";
+$labe2 = 0;
+while(<file>) {
+	if(/^([a-z_0-9]+):\s*$/) {
+		#printf "%s\n", $labe2;
+		$label = $1;
+		$_ = <file>;
+		if(length($_) > 1 && hex(substr($_, 0, 4)) >= 0x2000){
+			if($labe2){
+				printf "0x%s %s\n", substr($_, 0, 4),  $labe2;
+				$labe2 = 0;
+			}
+			printf "0x%s %s\n", substr($_, 0, 4),  $label;
+		}else{
+			$labe2 = $label;
+		}
+	}
+}
+close file;
Index: ModuleDemo/26_BOOT/bt_demo/BT/output/flash_boot.dat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/output/flash_boot.dat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/output/flash_boot.dat	(working copy)
@@ -0,0 +1,14965 @@
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Index: ModuleDemo/26_BOOT/bt_demo/BT/patch/patch.prog
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/patch/patch.prog	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/patch/patch.prog	(working copy)
@@ -0,0 +1,367 @@
+//define EFUSE_CODE
+//define FUNCTION_WATCH_DOG
+
+//define RF_DEBUG
+//define WHITE_LIST
+//define FSC_RTK_HOST
+/******************************************/
+/**************   Start   *****************/
+/******************************************/
+ifdef EFUSE_CODE
+	call wdt_init_reset_with_start // this supervision timeout is near 16.76s
+	branch loadcode_spi+2
+endif //EFUSE_CODE
+
+	bbit1 8,pf_patch_ext
+	beq patch00_2,p_main_loop
+		
+	beq patch10_6,p_initialize_radio_cont
+
+	
+	beq patch13_6,p_initialize_radio_cont_by_init_param
+
+	beq patch14_0,p_lpm_hibernate
+	beq patch14_4,p_lpm_dispatch
+	beq patch17_1,p_app_init
+	
+	beq patch1c_0,p_vp_check_get_data
+	branch assert
+pf_patch_ext:
+	beq patch20_7,p_ipc_init
+	beq patch21_4,p_ipc_rx_process	
+	beq patch31_0,p_check_m0_qspi_lock_and_pause
+	beq patch31_1,p_check_m0_qspi_continue
+	beq patch3d_2,p_check_51cmd_once
+	rtneq patch36_2
+	rtneq patch3a_4
+	branch assert
+
+p_main_loop:
+	branch main_loop+1
+
+p_initialize_radio_cont:
+	fetch 1,mem_patch13
+	set0 6,pdata
+	store 1,mem_patch13
+	branch p_initialize_radio_process
+// be-careful, this patch is not from <initialize_radio_cont>.
+p_initialize_radio_cont_by_init_param:
+	call p_initialize_radio_process
+
+	// becouse patch is from <init_param>
+	branch init_param_cont
+
+p_initialize_radio_process:
+		// in efuse will enable wdt
+ifdef FUNCTION_WATCH_DOG
+	call wdt_init_reset_with_start
+else
+	call wdt_disable_watchdog
+endif //FUNCTION_WATCH_DOG
+
+	// Change mixer power
+	jam 0xba,0x894b
+	call p_initialize_radio_tx_power
+	// Always use 2M IF
+	jam 0xff,0x8907	//7~5 000:0M IF 011:1M IF 111:2M IF
+	call initialize_radio_cont+1
+	jam 0x74,0x8950
+	jam 0x0e,0x8952
+	jam 0x07,0x896d
+	rtn
+
+p_initialize_radio_tx_power:
+	fetch 1,mem_tx_power
+//	beq TX_POWER_0DB,p_initialize_radio_tx_power_0db
+ifdef ENABLE_F3DB
+	beq TX_POWER_f3DB,p_initialize_radio_tx_power_f3db	
+endif // ENABLE_F3DB
+	beq TX_POWER_3DB,p_initialize_radio_tx_power_3db	
+	beq TX_POWER_f5DB,p_initialize_radio_tx_power_f5db	
+	beq TX_POWER_5DB,p_initialize_radio_tx_power_5db
+ifdef ENABLE_8DB
+	beq TX_POWER_8DB,p_initialize_radio_tx_power_8db	
+endif // ENABLE_8DB
+
+ifdef ENABLE_8DB
+p_initialize_radio_tx_power_8db:
+	setarg 0xcce0d0
+	store 3,0x8955
+	setarg 0x7a103e
+	store 3,0x8958
+	jam 0x43,0x8954
+	rtn
+endif // ENABLE_8DB
+
+p_initialize_radio_tx_power_3db:
+p_initialize_radio_tx_power_5db:
+	setarg 0x88e0d0
+	store 3,0x8955
+p_initialize_radio_tx_power_common:
+	setarg 0x4a103c
+p_initialize_radio_tx_power_common2:
+	store 3,0x8958
+	jam 0x68,0x8954
+	rtn
+p_initialize_radio_tx_power_f3db:
+p_initialize_radio_tx_power_f5db:
+	setarg 0x88c0d0
+	store 3,0x8955
+	setarg 0x4a106c
+	branch p_initialize_radio_tx_power_common2
+
+
+
+
+p_mram_clkon:
+	arg CLOCK_OFF_MRAM,queue
+	branch clk_on
+p_check_m0_qspi_lock_and_pause:
+	call wait_m0_lock_qspi
+	fetch 1,mem_m0_pause_state
+	beq M0_STATE_NORMAL,p_m0_pause
+	rtn
+
+p_m0_pause:
+	call p_enable_m0_work_clk
+	branch m0_pause
+	
+p_check_m0_qspi_continue:
+	fetch 1,mem_m0_pause_state
+	rtnne M0_STATE_PAUSE
+	branch m0_continue
+	// no need close m0 clock. it only for save power case
+	//branch p_disable_m0_work_clk
+
+p_enable_m0_work_clk:
+	fetch 1,0x1f000
+//	arg 0x1c,temp
+	or pdata,0x1c,pdata
+	store 1,0x1f000
+	rtn
+
+p_ipc_init:
+	//fetch 1,mem_ipc_enable
+	//rtn blank
+	call p_ipc_notify_m0_wakeup_flag_init
+	call p_mram_clkon
+	branch ipc_init+5
+
+
+
+p_buck_setting:
+	fetcht 4,core_lpm_buckctrl
+	storet 4,core_lpm_reg
+	jam 0xe6,0x804d
+	call p_lpm_write_wait_clock
+	jam 0x20,0x8005
+	//branch p_lpm_write_wait_clock
+p_lpm_write_wait_clock:
+	until null,lpo_edge
+	until null,lpo_edge
+	until null,lpo_edge
+	until null,lpo_edge
+	until null,lpo_edge
+	rtn
+
+ 	
+
+ 	
+p_headset_cb_idle_process:
+ifdef FUNCTION_WATCH_DOG
+	call p_wdt_kick_watchdog
+endif //FUNCTION_WATCH_DOG
+	rtn
+p_app_init:
+p_hci_init:
+	jam 0,mem_ota_enable_xip_flag
+	// RAM reset.
+	//jam 0,mem_ota_wdt_en_flag
+	//jam 0,mem_ota_wdt_m0_en
+	
+	jam 0x1c,0x1f000
+	jam 0x05,0x8042
+	call p_buck_setting
+	fetch 1,0x8341
+	store 1,mem_hibernate_flag
+ifdef FUNCTION_WATCH_DOG
+	call wdt_init_reset_with_start
+endif //FUNCTION_WATCH_DOG
+	call headset_init
+	call p_read_efuse_64_bytes
+
+	setarg p_app_event_normal_process
+	store 2,mem_cb_bb_event_process
+
+	setarg p_headset_evt_100ms_timer
+	store 2,mem_cb_event_timer
+	setarg p_headset_cb_idle_process
+	store 2,mem_cb_idle_process
+	//call headset_check_reconnet
+	//call p_ipc_notify_m0_wakeup_flag_init
+	jam 2,core_reset
+	call enable_xip
+	nbranch wake_from_power,wake
+wake_for_lpm:
+	call ipc_lock_m0_lmp_wait_work_flag
+	jam BT_EVT_WAKEUP,mem_fifo_temp
+	branch ipc_tx_bt_event
+
+wake_from_power:
+	// store local addr
+	fetch 6,mem_lap
+	store 6,mem_local_bdaddr
+	fetch 1,mem_hibernate_flag
+	bbit1 5,p_evt_restart
+	jam BT_EVT_RESET,mem_fifo_temp
+	branch ipc_tx_bt_event
+
+p_evt_restart:
+	call p_clear_charge_reset_flag
+	jam BT_EVT_RESTART,mem_fifo_temp
+	branch ipc_tx_bt_event
+
+	
+//p_app_process_bb_event:
+//	fetch 1,mem_state
+//	bbit1 state_inconn,app_process_bb_event+1
+//	
+//	fetch 2,mem_ui_state_map
+//	jam 0x03,mem_scan_mode
+//	branch app_process_bb_event+1
+
+p_app_event_normal_process:
+	copy regc,pdata
+	//beq BT_EVT_LE_CONNECTED,app_le_event_bb_connected
+//	beq BT_EVT_LE_DISCONNECTED,p_app_le_event_bb_disconn
+	branch app_event_normal_process 
+
+p_headset_evt_100ms_timer:
+// Voice all process by cm0
+p_vp_check_get_data:
+	rtn
+
+
+p_clear_charge_reset_flag:
+	fetch 4,core_lpm_buck_cfg
+	set0 29,pdata
+ 	store 4,core_lpm_reg
+	branch  p_lpm_write_ctrl_buck
+p_lpm_write_ctrl_buck:
+	until null,lpo_edge
+	jam lpmreg_sel_buck_cfg,core_lpm_wr
+	until null,lpo_edge
+	rtn
+p_lpm_hibernate:
+	arg -1,temp // Here must be -1, the rom code is error
+	branch lpm_doze
+
+p_read_efuse_64_bytes:
+	setarg 0
+	arg mem_efuse_64_bytes,rega
+	arg 64,temp
+	branch efuse_read_data
+
+
+p_ipc_rx_process:
+	fetch 1,mem_ipc_enable
+	rtn blank
+	call ipc_rx_items_inquire
+	rtn zero // no data
+	icopy contr
+	call ipc_rx_byte_read
+
+//	beq IPC_TYPE_CM0_TO_BT_DATA,ipc_rx_data_buf
+	branch ipc_rx_process+7
+
+p_ipc_notify_m0_wakeup_flag_init:
+	jam 1,mem_wake_flag
+	rtn wake
+	jam 0,mem_wake_flag
+	rtn
+ifdef FUNCTION_WATCH_DOG
+p_wdt_kick_watchdog:
+	//fetch 1,mem_ota_wdt_en_flag
+	//beq 0xaa,p_ota_change_code_wdt
+	call wdt_set_watchdog_mode_reset
+	branch wdt_kick_watchdog_1_5s
+endif //FUNCTION_WATCH_DOG
+
+/****************************************               Loadcode  FUC              *************************************************/	
+p_lpm_dispatch:
+	fetch 1,mem_ota_enable_xip_flag
+	beq OTA_NEED_ENABLE_XIP_FLAG, p_loadcode_normal
+	fetch 1,mem_app_loadcode_flag
+	nbranch p_boot_loadcode,blank
+	branch lpm_dispatch+1
+
+p_loadcode_normal:
+	branch soft_reset
+
+p_boot_loadcode:
+	jam 0,mem_app_loadcode_flag
+	call p_check_m0_qspi_lock_and_pause
+	//branch app_spec_reload_code
+app_spec_reload_code:
+	jam OTA_NEED_ENABLE_XIP_FLAG,mem_ota_enable_xip_flag
+	fetch 3,mem_app_flash_address
+	store 3,mem_addr_hi
+//	call set_enc_flag_by_efuse_header 
+	disable user
+	jam 0x00,mem_ucode_flag 
+	branch loadcode_spi_load_spec_start_offset
+	
+
+//set_enc_flag_by_efuse_header:
+//	fetch 1,mem_ucode_flag
+//	bbit1 UFLAG_AES,enable_user
+//	branch disable_user	
+
+// input start offset is: <mem_addr_hi>
+// must set: right <mem_qspi_gpio_ncs> 
+loadcode_spi_load_spec_start_offset::
+loadcode_spi_continue_load_spec_start_offset:
+	call clean_mem
+	call qspi_init_set_spec_load
+	//call qspi_gpio_init	// use default three qspi setting
+	//nop 400						// some flash will fail if no delay here
+	//call qspi_release_powerdown_flash
+	//nop 100
+	arg qspi_read_for_loadcode,regc
+	call read_first_flash_block_load_spec_start_offset
+	branch loadcode_spi_spec
+
+
+read_first_flash_block_load_spec_start_offset:
+	 fetcht 2,mem_addr_hi+1
+	 byteswap temp,pdata
+	 fetcht 1,mem_addr_hi
+	 lshift16 temp,temp
+	 iadd temp,pdata
+	 increase -3,pdata
+	 store 3,mem_start_addr_temp
+	 call get_iv,user
+	 rtn
+
+qspi_init_set_spec_load:
+	jam 8,core_qspi_delay
+	jam 1,core_qspi_ctrl
+	 rtn 
+
+p_check_51cmd_once:
+	call ui_ipc_get_lock
+	arg mem_ipc_fifo_c512bt,rega
+	call fifo_out
+	copy pdata,temp
+	call ui_ipc_put_lock
+	copy temp,pdata
+	rtn blank
+	beq BT_CMD_LOADCODE,p_set_boot_loadcode_flag
+	branch check_51cmd_once+8
+
+p_set_boot_loadcode_flag:
+	jam 1,mem_app_loadcode_flag
+	rtn
+
+/****************************************                Loadcode FUC END     *************************************************/	
+
Index: ModuleDemo/26_BOOT/bt_demo/BT/patch/patch_sdk.prog
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/patch/patch_sdk.prog	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/patch/patch_sdk.prog	(working copy)
@@ -0,0 +1,5 @@
+define SDKCODE
+ifdef SDKCODE
+INCLUDE "bt_format"
+org 0x0000  // start from patch ram address start
+endif
\ No newline at end of file
Index: ModuleDemo/26_BOOT/bt_demo/BT/patch/z.prog
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/patch/z.prog	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/patch/z.prog	(working copy)
@@ -0,0 +1 @@
+
Index: ModuleDemo/26_BOOT/bt_demo/BT/sched/coef.dat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/sched/coef.dat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/sched/coef.dat	(working copy)
@@ -0,0 +1,66 @@
+
+
+
+#mem_coef_dac_table: 
+#48k
+	5d 02 00 73 07 00 92 0f 00 44 18 00 be 1c 00 bb 17 00 f3 06 00 56 ee ff
+      81 d8 ff cb d2 ff cb e5 ff 0c 0e 00 0b 3a 00 af 50 00 bc 3e 00 96 04 00
+	42 bb ff dc 8a ff 50 96 ff c4 e1 ff 0a 4c 00 0f 9a 00 31 97 00 b8 37 00
+	de a7 ff d5 39 ff f3 37 ff a8 b3 ff 84 70 00 43 fe 00 49 f9 00 23 4e 00
+	21 54 ff 0d a6 fe 1a c7 fe e8 c6 ff 75 21 01 72 fb 01 5c a4 01 80 15 00
+	56 19 fe 1d f0 fc f4 93 fd 2b 04 00 e3 0e 03 bc d5 04 60 de 03 57 1d 00
+	c7 50 fb b2 4d f8 23 77 f9 df 24 ff a6 ef 06 f9 7e 0c 2b af 0b 3b 18 03
+	83 9b f5 6f ee e9 28 06 e8 e4 63 f5 01 f8 11 ba 37 37 8d 12 5a 60 19 6f
+
+#44.1k
+	90 fb ff 94 f3 ff 94 e7 ff 58 db ff 53 d5 ff 60 dc ff ae f3 ff ff 16 00
+	be 39 00 d1 4a 00 9f 3c 00 03 0e 00 08 cf ff 3a 9d ff fa 96 ff a8 ca ff
+	31 2a 00 9a 8b 00 97 b9 00 d0 8e 00 b1 0e 00 f2 6c ff 71 fb fe e9 02 ff
+	43 98 ff 01 86 00 e8 5a 01 2c 9d 01 99 0c 01 5b d1 ff 57 79 fe 47 bc fd
+	83 1d fe e5 99 ff c6 91 01 d8 05 03 7e 13 03 8f 76 01 a7 c9 fe 97 56 fc
+	a1 7e fb af fc fc 61 63 00 96 27 04 86 48 06 89 53 05 c4 45 01 88 cc fb
+	a7 a7 f7 93 5d f7 d4 d4 fb 4b 8b 03 6f ee 0a a0 d7 0d 3c 9c 09 2b c2 fe
+	c6 74 f1 58 51 e8 56 de e9 a6 a8 f9 e6 45 16 ae 31 39 52 be 58 2c 6f 6b
+
+# 32k#24k#16k#12k#8k
+	1e 00 00 80 fe ff f8 fa ff 9c f4 ff f0 eb ff 18 e3 ff d0 dd ff 64 e0 ff
+	c7 ed ff 69 05 00 d4 21 00 2c 39 00 10 40 00 65 2e 00 45 04 00 c5 cc ff
+	66 9c ff 8b 8a ff 9a a7 ff 6f f3 ff d4 58 00 85 b1 00 26 d3 00 7d a1 00
+	b4 1e 00 a9 71 ff f6 dc fe 41 a7 fe 73 fc fe 36 d4 ff a7 ea 00 43 d2 01
+	3a 1c 02 72 89 01 dc 2f 00 1f 81 fe c0 29 fd 04 d0 fc 93 c9 fd f0 18 00
+	cc 70 02 b1 5e 04 3f bd 04 57 1b 03 99 d2 ff 9c 04 fc 6f 41 f9 f2 eb f8
+	1e a8 fb 4c d4 00 db af 06 49 d1 0a b9 0b 0b 1b 62 06 c7 ad fd 4e ac f3
+	43 59 ec 49 b9 eb 06 75 f4 c1 bd 06 23 e6 1f 43 e2 3a 1c 95 51 0b 89 5e
+
+#mem_coef_voice_table:
+	0c 00 12 00 1b 00 24 00 29 00 28 00 1d 00 07 00 
+	e4 ff b9 ff 8a ff 5f ff 42 ff 3c ff 53 ff 8c ff 
+	e4 ff 50 00 c2 00 25 01 63 01 68 01 27 01 9d 00 
+	d5 ff e7 fe f7 fd 33 fd cb fc ea fc af fd 27 ff 
+	49 01 f3 03 ee 06 f6 09 bd 0c f9 0e 6b 10 eb 10 00 00	
+
+#mem_coef_adc_table:
+	06 00 00 b4 ff ff a1 fe ff 59 fd ff 62 fe ff a4 04 00 ad 0e 00 cf 12 00
+	60 03 00 3f dd ff 9a b6 ff a8 bc ff 47 18 00 7a c8 00 04 92 01 1f 19 02
+	2c 00 00 aa 00 00 45 00 00 2e 00 00 cd ff ff 6d ff ff 2e ff ff 3e ff ff
+	ac ff ff 62 00 00 20 01 00 8f 01 00 6a 01 00 99 00 00 51 ff ff 08 fe ff
+	4f fd ff 99 fd ff ff fe ff 20 01 00 36 03 00 57 04 00 d5 03 00 97 01 00
+	3e fe ff 06 fb ff 53 f9 ff 26 fa ff 97 fd ff a4 02 00 71 07 00 ec 09 00
+	a7 08 00 8d 03 00 23 fc ff 23 f5 ff 8e f1 ff 6e f3 ff d9 fa ff 96 05 00
+	b4 0f 00 e3 14 00 32 12 00 7a 07 00 e3 f7 ff 18 e9 ff 60 e1 ff 27 e5 ff
+	df f4 ff 2d 0c 00 cf 22 00 3a 2f 00 28 2a 00 de 11 00 f2 eb ff b5 c4 ff
+	1d ac ff 03 b1 ff 18 dc ff 3a 2c 00 8b 95 00 bc 03 01 15 5f 01 ce 92 01
+	06 ff ff 0d fe ff eb 01 00 e0 01 00 83 fd ff e9 fc ff cb 03 00 7a 04 00
+	99 fa ff b0 f9 ff 7d 07 00 a7 08 00 de f5 ff 62 f4 ff 7b 0d 00 5f 0f 00
+	46 ee ff d6 eb ff 2e 17 00 63 1a 00 a4 e1 ff 44 dd ff 37 28 00 8f 2e 00
+	45 c9 ff 1e bf ff ca 4e 00 28 62 00 83 7f ff 0e 4a ff f6 31 01 5f 99 03
+
+#mem_coef_eq_table:
+	00 00 10 c8 00 20 3e 2e c0 1e d1 1f c4 d1 3f 1b 2e e0 13 05 20 48 41 c0
+	33 ba 1f b8 be 3f ba 40 e0 b6 da 1f 99 b5 c0 dc 71 1f 67 4a 3f 6e b3 e0
+	f7 dc 1f 07 3e c1 9d ed 1e f9 c1 3e 6c 35 e1 2f f7 1f 41 43 c2 7a e7 1d
+	bf bc 3d 57 21 e2 66 5e 20 1d 40 c4 79 e5 1b e3 bf 3b 20 bc e3 3f 7e 21
+	d7 71 c8 9f 05 18 29 8e 37 22 7c e6 50 01 22 0d 5b d3 b4 8b 11 f3 a4 2c
+	fd 72 ec 4c 3e 20 42 f2 eb 2f dd 07 be 0d 14 85 e4 f7 0f 60 23 67 35 13
+	39 ee 07 b3 c0 e9 9e bb f7
+	
\ No newline at end of file
Index: ModuleDemo/26_BOOT/bt_demo/BT/sched/patch.dat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/sched/patch.dat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/sched/patch.dat	(working copy)
@@ -0,0 +1,67 @@
+
+mem_patch00:     
+04   #mem_patch00
+00   #mem_patch01
+00   #mem_patch02
+00   #mem_patch03
+00   #mem_patch04
+00   #mem_patch05
+00   #mem_patch06
+00   #mem_patch07
+00   #mem_patch08
+00   #mem_patch09
+00   #mem_patch0A
+00   #mem_patch0B
+00   #mem_patch0C
+00   #mem_patch0D
+00   #mem_patch0E
+00   #mem_patch0F
+40   #mem_patch10
+00   #mem_patch11
+00   #mem_patch12
+40   #mem_patch13
+11   #mem_patch14
+00   #mem_patch15
+00   #mem_patch16
+02   #mem_patch17
+00   #mem_patch18
+00   #mem_patch19
+00   #mem_patch1A
+00   #mem_patch1B
+01   #mem_patch1C
+00   #mem_patch1D  
+00   #mem_patch1E
+00   #mem_patch1F
+80   #mem_patch20
+10   #mem_patch21
+00   #mem_patch22
+00   #mem_patch23
+00   #mem_patch24
+00   #mem_patch25
+00   #mem_patch26
+00   #mem_patch27
+00   #mem_patch28
+00   #mem_patch29
+00   #mem_patch2A
+00   #mem_patch2B
+00   #mem_patch2C
+00   #mem_patch2D
+00    #mem_patch2E
+00   #mem_patch2F
+00   #mem_patch30
+03   #mem_patch31
+00   #mem_patch32
+00   #mem_patch33
+00   #mem_patch34
+00   #mem_patch35
+04   #mem_patch36
+00   #mem_patch37
+00   #mem_patch38
+00   #mem_patch39
+10   #mem_patch3A
+00   #mem_patch3B
+00   #mem_patch3C
+04   #mem_patch3D
+00   #mem_patch3E
+00   #mem_patch3F
+
Index: ModuleDemo/26_BOOT/bt_demo/BT/sched/rf.dat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/sched/rf.dat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/sched/rf.dat	(working copy)
@@ -0,0 +1,26 @@
+mem_lpm_config:8f 10 ca
+mem_lpm_buckcnt:0a 0b ef 07
+mem_lpm_hibernate_switch:00
+mem_gpio_wakeup_low:00 00 00 00 00 00 00 00
+mem_fcomp_mul:02
+mem_fcomp_div:24
+mem_iscan_window:20 00
+mem_iscan_interval:00 04
+mem_pscan_window:16 00
+mem_pscan_interval:00 04
+mem_inq_window:20 00
+mem_page_window:30 00
+mem_page_to:00 30
+mem_rx_window_init:80 03
+mem_rx_window_sniff:00 06
+
+mem_lpm_xtalcnt:00 0a 1b ef 0b
+
+mem_ef_base:00 ff 87
+mem_eeprom_block_size:80
+
+mem_rf_init:
+ff
+
+mem_rf_init_ptr:mem_rf_init
+
Index: ModuleDemo/26_BOOT/bt_demo/BT/sched/user.dat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/sched/user.dat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/BT/sched/user.dat	(working copy)
@@ -0,0 +1,311 @@
+
+##############NVRAM CONFIG##############
+mem_nv_data_ptr:mem_nv_data
+mem_nv_data_number:05
+#####################################
+
+##############BLUETOOTH CONFIG##############
+###commom###
+mem_device_option:0f
+mem_lmp_version:09 0e 05 06 00
+###ble###
+mem_le_lap:d5 cc aa aa cc 52
+
+mem_le_adv_data_len:12
+mem_le_adv_data:
+02 01 0e 
+04 09 4f 54 41
+09 ff 0e 05 21 11
+
+mem_le_scan_data_len:05
+mem_le_scan_data:
+'\09OTA
+
+
+mem_le_adv_enable:00
+mem_le_scan_type:01
+mem_le_adv_type:00
+mem_le_adv_direct_addr_type:00
+mem_le_scan_own_addr_type:00
+mem_le_scan_filter_policy:00
+mem_le_scan_interval:28
+mem_le_scan_window:0c 00
+mem_le_transmit_window:50
+mem_le_adv_interval_max:60 01 
+mem_le_adv_own_addr_type:00
+
+mem_le_pairing_mode:00
+mem_le_secure_connect_enable:00
+mem_le_pres:02 03 00 01 10 02 03 #justwork
+
+mem_le_pairing_handle:00 00
+
+mem_le_interal_min:
+10 00 #interval max
+10 00 #interval min
+00 00 #latency
+00 01 #supervision timeout
+
+###3.0###
+mem_sp_iocap_local:03 00 00
+mem_role_switch_flag:00
+mem_scan_mode:00
+mem_class: 04 04 24
+mem_local_name_length:
+'EVKOTA
+
+#FF FF FF is Fixed for OTA.
+mem_lap:45 FF 31 FF FF FF
+
+mem_discovery_timeout:00 07 
+mem_ssp_enable:01
+mem_ui_profile_supported:48
+mem_app_connection_options:17
+mem_eir_enable:01
+mem_all_uuid_16bits:
+05
+03#Type: Complete list of 16-bit UUIDs
+1e11 0e11 0811 0d11 0b11
+
+mem_all_uuid_128bits:00
+
+mem_ota_version:0a 00
+mem_ota_write_handle:06
+mem_ota_notify_handle:03
+mem_ota_buck_size:00 10
+mem_ota_packet_max_len:be 00
+
+#attribute list: handle 2bytes, uuid 2bytes, length 1bytes, attribute Nbytes
+mem_le_att_list:
+
+#Primary service yichip transmit ------
+01 00 02 00 28 02 ff ff
+#Characteristic tx--notify
+02 00 02 03 28 01 10
+03 00 02 11 ff 14 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+#Client Characteristic Configuration
+04 00 02 02 29 02 01 00
+
+#Characteristic rx--write
+05 00 02 03 28 01 04
+06 00 02 22 ff  14 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+
+#End of Attribute list
+00 00
+
+
+
+mem_lpm_mode:00
+mem_lpm_overhead:08
+mem_lpm_interval:00 02
+mem_lpm_mult:03
+mem_lpm_mult_timeout:03
+mem_ptt:01
+mem_features:
+ff
+ff
+ff
+fa	#fe--EDR  F8--BR
+db	#AFHclose 83  #AFHenable_slave cap and classification LMP_SLAVE_AFH_CLASSIFICATION enable 9b, disable 8b
+fd    #9d
+7b
+83
+
+mem_le_features:
+21				//length extension
+00
+00
+00
+00
+00
+00
+00
+
+
+mem_xip_option:5d 40 bb
+
+mem_ui_le_uuid_table:mem_le_att_list
+
+mem_seqi:7f
+
+mem_le_connection_updata_param:
+06 00
+06 00
+00 00
+f4 01
+
+
+mem_codec_msbc_support:00
+mem_codec_type:01
+mem_eq_flag:01
+
+mem_UI_HF_brsf_feature:313538 #30 33 30 
+mem_le_more_data:01
+mem_ipc_enable:01
+
+mem_tws_state:00
+mem_tws_bdaddr:96 55 12 11 33 62
+#mem_tws_bdaddr:96 45 12 00 19 62
+
+
+mem_hsp_role:00
+mem_auto_hsp_role:01
+mem_tws_allow_pairing:01
+mem_tws_allow_pairing_rssi_limit:45
+
+mem_tws_rf_start_anchor:b0 04   # 0x1e0 40us,   0x78 10us,   0x4b0 100us,   0x618 130us
+mem_tws_rf_rcv_window_size:78 00
+
+mem_tws_rf_packet_rx_window_size:f0 0a # 2800
+mem_tws_rf_slave_send_full_packet_sleep_time:58 02 # 50us
+# mem_tws_rf_rcv_window_size + 72us + hardware_delay(18us)
+# send delay is mem_tws_rf_slave_send_full_packet_sleep_time, so we can think the judge below
+# mem_tws_rf_packet_rx_window_size - (mem_tws_rf_rcv_window_size + 72us + hardware_delay(18us) + mem_tws_rf_slave_send_full_packet_sleep_time/2)
+mem_tws_rf_master_check_raw_id_time:db 04
+
+mem_rf_debug_enable: 00
+mem_rf_debug_rf_rx_debug_gpio: 0c
+mem_rf_debug_rf_tx_debug_gpio: 0e
+mem_rf_debug_rf_sync_detect_debug_gpio: 18
+mem_rf_debug_rf_crc_error_debug_gpio: 19
+
+
+mem_param_sco_use_cm0:01
+
+
+# ipc define
+#mem_param_ipc_mem_block_start_addr
+mem_param_ipc_to_bt_buf_start_addr:00 d8 01
+mem_param_ipc_to_bt_buf_end_addr:00 db 01
+mem_param_ipc_to_bt_wptr_addr:00 db 01
+mem_param_ipc_to_bt_rptr_addr:04 db 01
+mem_param_ipc_to_m0_wptr_addr:08 db 01
+mem_param_ipc_to_m0_rptr_addr:0c db 01
+mem_param_ipc_to_m0_buf_start_addr:50 db 01
+mem_param_ipc_to_m0_buf_end_addr:00 df 01
+#mem_param_ipc_mem_block_end_addr
+
+
+# debug log define
+#mem_param_debug_log_mem_block_start_addr
+mem_param_debug_log_func_enable:00
+
+mem_param_debug_log_initial_flag_addr:10 d3 01
+mem_param_debug_log_lock_flag_cm0_addr:11 d3 01
+mem_param_debug_log_lock_flag_respin_addr:12 d3 01
+mem_param_debug_log_lock_victim_addr:13 d3 01
+mem_param_debug_log_read_index_addr:14 d3 01
+mem_param_debug_log_write_index_addr:16 d3 01
+mem_param_debug_log_buffer_start_addr:18 d3 01
+mem_param_debug_log_buffer_end_addr:50 d3 01
+#mem_param_debug_log_mem_block_end_addr
+
+# soft dma define
+# size is SOFT_DMA_TABLE_TOTAL_COUNT*4 + SOFT_DMA_TABLE_TOTAL_COUNT*SOFT_DMA_TABLE_UNIT_SIZE = 0x100
+mem_param_soft_dma_enable:01
+mem_param_soft_dma_table_start_addr:10 d5 01
+
+
+# sco m0 rx buffer define
+# size is M0_SCO_RX_BUFFER_SIZE + M0_SCO_TX_BUFFER_SIZE
+mem_param_m0_respin_sco_buffer_start_addr:10 d6 01
+
+
+mem_param_use_cm0_control_flag:01
+# tishi buffer size is 0x2000
+mem_param_tishi_start_addr:00 a0
+
+#mem_app_debug_info_timer use to set first debug timeout
+#mem_param_app_debug_info_timeout use to set period
+mem_app_debug_info_timer:05
+mem_param_app_debug_info_timeout:32
+
+mem_param_tws_tx_power:02
+
+mem_param_tws_send_channel_array:08 24 08 24
+#mem_param_tws_send_channel_array:20 20 20 20
+#mem_param_tws_send_channel_array:08 09 10 11
+
+mem_tx_power:02
+
+mem_sfreq_enable:01
+#mem_param_rf_setup must big then mem_param_pll_setup, be-careful, mem_param_rf_setup real value = 0xEA6 - value
+#we suggest must reserve 0x3A6, means mem_param_rf_setup = (0xEA6 - mem_param_pll_setup - 0x3A6)
+#mem_param_rf_setup:B8 07
+#mem_param_pll_setup:48 03
+mem_param_rf_setup:00 06
+mem_param_pll_setup:00 05
+
+mem_audio_output_setting: 01
+
+
+mem_mram_qspi_tx_addr:00 60
+
+mem_vp_addr:
+000000 000000
+000000 000000
+000000 000000
+000000 000000
+000000 000000
+000000 000000
+000000 000000
+000000 000000
+000000 000000
+000000 000000
+
+000000 000000
+000000 000000
+000000 000000
+000000 000000
+000000 000000
+000000 000000
+000000 000000
+000000 000000
+000000 000000
+000000 000000
+
+mem_fec_required:00		
+mem_eir:
+00 00 00 00 00 00 00 00 		00 00 00 00 00 00 00 00 
+00 00 00 00 00 00 00 00 		00 00 00 00 00 00 00 00 
+00 00 00 00 00 00 00 00 		00 00 00 00 00 00 00 00 
+00 00 00 00 00 00 00 00 		00 00 00 00 00 00 00 00 
+00 00 00 00 00 00 00 00 		00 00 00 00 00 00 00 00
+00 00 00 00 00 00 00 00 		00 00 00 00 00 00 00 00 00 00 00 00
+mem_simple_pairing_mode:00	
+mem_conn_status:00
+mem_io_cap_flag:00
+mem_inquiry_mode:00
+
+mem_keyscan_switch:00
+
+mem_public_code_svn_version_code:00 00 00 00 00 00 00 00 00
+
+mem_le_tws_scan_interval:28 00
+mem_le_tws_scan_window:0c 00
+mem_param_le_tws_adv_interval_normal:00 01 
+mem_param_le_tws_adv_interval_master_listen:58 00 
+
+
+#mesh init
+mem_mesh_event_head_type:04	#HCI_H4_TYPE_EVENT
+
+mem_mesh_command_complete_num_hci_command_packet:01
+
+mem_mesh_read_local_version_info:
+09		#hci_version BT_HCI_VERSION_5_0
+00 00	#hci_revsion
+09		#lmp_version RADIO_BLE_VERSION_NUMBER:BT_HCI_VERSION_5_0
+0e 05	#manufacture_name Yichip Microelectronics (Hangzhou) Co.,Ltd.
+FF FF	#LPM_subversion
+
+mem_mesh_read_local_support_command:02 05 ff
+
+mem_device_public_address:11 22 33 44 55 66
+
+mem_local_rx_max_octets:fb 00 48 08 fb 00 48 08  
+
+
+mem_app_flash_address:01 00 03
+mem_app_loadcode_flag:00
+
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_Powering_On.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_Powering_On.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_battery_is_near_empty.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_battery_is_near_empty.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_battery_is_near_empty48_48k.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_battery_is_near_empty48_48k.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_disconnect.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_disconnect.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_max_vol.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_max_vol.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_max_vol_48k.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_max_vol_48k.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_paired.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_paired.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_powering_off.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_powering_off.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_tws_connected.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/British_Eng_tws_connected.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/eight.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/eight.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/five.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/five.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/four.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/four.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/nine.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/nine.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/one.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/one.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/ring.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/ring.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/seven.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/seven.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/six.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/six.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/three.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/three.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/two.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/two.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/zero.pcm
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream

Property changes on: ModuleDemo/26_BOOT/bt_demo/BT/voice_prompt/zero.pcm
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Index: ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/Objects/output/out.rom
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/Objects/output/out.rom	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/Objects/output/out.rom	(working copy)
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+00001461
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Index: ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/Objects/tool/c.bat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/Objects/tool/c.bat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/Objects/tool/c.bat	(working copy)
@@ -0,0 +1,21 @@
+::@echo off
+cls
+
+set ROOT_PATH=..\..\..
+set BT_PATH=%ROOT_PATH%\BT
+set PATCH_PATH=%BT_PATH%\output
+set OBJ_PATH=.\Objects
+
+echo start compile cm0 bin
+set OBJ_PATH=.\Objects
+perl %OBJ_PATH%\tool\hex2rom.pl 0 80000  32 %OBJ_PATH%\yc11xx.hex  %OBJ_PATH%\output\out.rom
+copy %OBJ_PATH%\output\out.rom ..\Output
+
+echo compile cm0 bin ok
+
+
+echo start compile full bin
+echo %BT_PATH%
+cd %BT_PATH%
+call do.bat eep
+echo compile full bin ok
Index: ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/Objects/tool/d.bat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/Objects/tool/d.bat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/Objects/tool/d.bat	(working copy)
@@ -0,0 +1,132 @@
+::@echo off
+cls
+
+set ROOT_PATH=..\..\..
+set BT_PATH=%ROOT_PATH%\BT
+set PATCH_PATH=%BT_PATH%\output
+set OBJ_PATH=.\Objects
+
+echo start download ROM code...
+cd %BT_PATH%
+call a.bat
+echo download ROM code OK
+goto:eof
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+::------------------------------------------
+::---------------func:getstrlocation-------
+::------------------------------------------
+:getstrlocation
+setlocal
+set "bstr=%1"
+set "cstr=%2"
+set %3=0
+set "num=0"
+set "len_bstr=0"
+set "len_cstr=0"
+
+call:getstrlen %bstr% len_bstr
+call:getstrlen %cstr% len_cstr
+
+:getstrlocation_next
+set /a len_remain=len_bstr-num
+if %len_remain% lss %len_cstr% (
+echo "cann't get str location"
+set /a num =0
+goto getstrlocation_last
+)
+
+call:get_fix_len_str %bstr%  len_cstr compar_str
+
+if not %compar_str%==%cstr% (
+set /a num+=1
+set "bstr=%bstr:~1%"
+goto getstrlocation_next
+)
+
+:getstrlocation_last
+(endlocal
+	set %3=%num%
+)
+goto:eof
+::---------------end:func-------------------
+
+
+::------------------------------------------
+::---------------func:get_fix_len_str-------
+::------------------------------------------
+:get_fix_len_str
+setlocal
+set "getstr=%NULL%"
+set str=%1
+set /a len=%2
+set num=0
+:get_fix_len_str_loop
+set getstr=%getstr%%str:~0,1%
+set /a num+=1
+set str=%str:~1%
+if %num% lss %len% goto get_fix_len_str_loop
+(endlocal
+ set %3=%getstr%
+)
+goto:eof
+::---------------end:func-------------------
+
+
+
+
+::------------------------------------------
+::---------------func:getstrlen-------------
+::------------------------------------------
+:getstrlen
+setlocal
+set str=%1
+set %2=0
+set /a "num=0"
+
+:getstrlen_next
+if "%str%"=="" goto getstrlen_last
+
+if not "%str%"=="" (
+set /a num+=1 
+set "str=%str:~1%"
+goto getstrlen_next
+)
+
+:getstrlen_last
+(endlocal
+	set /a "%2=%num%"
+)
+goto:eof
+::---------------end:func-------------------
+
Index: ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/Objects/tool/hex2rom.pl
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/Objects/tool/hex2rom.pl	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/Objects/tool/hex2rom.pl	(working copy)
@@ -0,0 +1,65 @@
+#!/usr/bin/perl
+
+my @rom = ();
+die "missing start and end address" if(@ARGV < 2);
+
+$addrhi = 0;
+$baseaddr = hex($ARGV[0]);
+$endaddr = hex($ARGV[1]);
+$bits = 32;
+$bits = $ARGV[2] if(@ARGV > 2);
+$endian = 1;
+
+
+$inputfile_addr = $ARGV[3];
+print "\input:  $inputfile_addr\n";
+$outputfile_addr =$ARGV[4];
+print "\output:  $outputfile_addr\n";
+
+
+open(DATA,$inputfile_addr);
+
+while(<DATA>){
+	$line++;
+	$count = (hex substr($_, 1, 2));
+	$addr = (hex substr($_, 3, 4));
+	$type = (hex substr($_, 7, 2));
+	if($type == 2 || $type == 4) {
+		$addrhi = hex(substr($_, 9, 4)) << ($type == 2 ? 4 : 16);
+		printf "type=%d, addr=%x, line=%d\n", $type, $addrhi, $line;
+	}
+	if($type == 0 && $addrhi >= $baseaddr && $addrhi <= $endaddr) {
+		for($x=0; $x<$count; $x++) {
+			$rom[$addrhi - $baseaddr + $addr + $x] = (hex substr($_, 9+2*$x, 2)) ; 
+		}
+	}
+}
+
+#删除目标文件
+unlink($outputfile_addr);
+#创建目标文件
+$outputfile_addr =$ARGV[4];
+$outputfile_addr = '+>'.$outputfile_addr;
+print "$outputfile_addr\n";
+open(DATA1,$outputfile_addr) or die "des file open fail,$!";
+
+if($bits == 1) {
+	for($x=0; $x<@rom; $x++) {
+			printf ("%04x\n", $rom[$x]);
+		}
+		print "\n";
+} else {
+	for($x=0; $x<@rom; $x+=$bits/8) {
+		for($i = 0;$i < $bits/8;$i++) {
+			$tmp = sprintf("%02x",($endian ? $rom[$x+$bits/8-1-$i] : $rom[$x+$i])),
+			print DATA1 "$tmp";
+#			printf "$tmp";
+			}
+		print DATA1 "\n";
+#		printf "\n";
+	}
+}
+$inputfile_addr = $ARGV[3];
+$outputfile_addr =$ARGV[4];
+close(inputfile_addr);
+close(outputfile_addr);
Index: ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/Objects/yc11xx.sct
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/Objects/yc11xx.sct	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/Objects/yc11xx.sct	(working copy)
@@ -0,0 +1,17 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x00000000 0x00080000  {    ; load region size_region
+  ER_IROM1 0x00000000 0x00080000  {  ; load address = execution address
+   startup.o (|.text|,+RO)
+   startup.o (RESET, +First)
+	*(InRoot$$Sections)
+	.ANY (+RO)
+  }
+	; if change this, must change startup.s __initial_sp
+	 RW_IRAM1 0x10010000 0x7fff  {  ; RW data
+	.ANY (+RW +ZI)
+	}
+}
+
Index: ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/kill.bat
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/kill.bat	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/kill.bat	(working copy)
@@ -0,0 +1,16 @@
+del yc11xx_asm.txt
+del yc11xx.uvguix.admin
+del *.lst	/s
+del *.map	/s
+cd Objects
+
+del *.hex	/s
+
+del *.lnp	/s
+del *.dep	/s
+del *.crf	/s
+del *.d	/s
+del *.o	/s
+del *.axf	/s
+
+del *.htm	/s
Index: ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/yc11xx.uvoptx
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/yc11xx.uvoptx	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/yc11xx.uvoptx	(working copy)
@@ -0,0 +1,471 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>Target 1</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\Listings\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>1</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>7</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>4</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>Segger\JL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGUARM</Key>
+          <Name>/</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JL2CM3</Key>
+          <Name>-U4294967295 -O111 -S2 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD20000000 -FC1000 -FN0</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMRTXEVENTFLAGS</Key>
+          <Name>-L70 -Z18 -C0 -M0 -T1</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>DLGTARM</Key>
+          <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ARMDBGFLAGS</Key>
+          <Name></Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0  -FC1000 -FD20000000</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <WatchWindow1>
+        <Ww>
+          <count>0</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>times</ItemText>
+        </Ww>
+        <Ww>
+          <count>1</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>CORE_UARTB_CTRL</ItemText>
+        </Ww>
+        <Ww>
+          <count>2</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>USART_InitStruct</ItemText>
+        </Ww>
+        <Ww>
+          <count>3</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>UartAdr</ItemText>
+        </Ww>
+        <Ww>
+          <count>4</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>WPtr</ItemText>
+        </Ww>
+        <Ww>
+          <count>5</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>regBeck</ItemText>
+        </Ww>
+        <Ww>
+          <count>6</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>I2cRxPtr</ItemText>
+        </Ww>
+        <Ww>
+          <count>7</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>I2cTxPtr</ItemText>
+        </Ww>
+        <Ww>
+          <count>8</count>
+          <WinNumber>1</WinNumber>
+          <ItemText>I2cAdr</ItemText>
+        </Ww>
+      </WatchWindow1>
+      <MemoryWindow1>
+        <Mm>
+          <WinNumber>1</WinNumber>
+          <SubType>0</SubType>
+          <ItemText>0xe000e100</ItemText>
+          <AccSizeX>0</AccSizeX>
+        </Mm>
+      </MemoryWindow1>
+      <MemoryWindow2>
+        <Mm>
+          <WinNumber>2</WinNumber>
+          <SubType>0</SubType>
+          <ItemText>0x100080aa</ItemText>
+          <AccSizeX>0</AccSizeX>
+        </Mm>
+      </MemoryWindow2>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>1</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>1</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+      <DebugDescription>
+        <Enable>1</Enable>
+        <EnableFlashSeq>0</EnableFlashSeq>
+        <EnableLog>0</EnableLog>
+        <Protocol>1</Protocol>
+        <DbgClock>10000000</DbgClock>
+      </DebugDescription>
+    </TargetOption>
+  </Target>
+
+  <Group>
+    <GroupName>main</GroupName>
+    <tvExp>1</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>1</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\User\main.c</PathWithFileName>
+      <FilenameWithoutPath>main.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>1</GroupNumber>
+      <FileNumber>2</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\User\Drv_bt.c</PathWithFileName>
+      <FilenameWithoutPath>Drv_bt.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>startup</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>2</GroupNumber>
+      <FileNumber>3</FileNumber>
+      <FileType>2</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\..\..\Librarier\startup\startup.s</PathWithFileName>
+      <FilenameWithoutPath>startup.s</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+  <Group>
+    <GroupName>driver</GroupName>
+    <tvExp>0</tvExp>
+    <tvExpOptDlg>0</tvExpOptDlg>
+    <cbSel>0</cbSel>
+    <RteFlg>0</RteFlg>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>4</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\..\..\Librarier\device\yc11xx.c</PathWithFileName>
+      <FilenameWithoutPath>yc11xx.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>5</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\User\hci\yc11xx_h4.c</PathWithFileName>
+      <FilenameWithoutPath>yc11xx_h4.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>6</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\..\..\Librarier\drivers\uart\yc11xx_uart.c</PathWithFileName>
+      <FilenameWithoutPath>yc11xx_uart.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>7</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\..\..\Librarier\drivers\bt\yc11xx_bt.c</PathWithFileName>
+      <FilenameWithoutPath>yc11xx_bt.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>8</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\..\..\Librarier\drivers\debug\yc_debug.c</PathWithFileName>
+      <FilenameWithoutPath>yc_debug.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>9</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\..\..\Librarier\drivers\hal\yc_drv_common.c</PathWithFileName>
+      <FilenameWithoutPath>yc_drv_common.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>10</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\..\..\Librarier\drivers\gpio\yc11xx_gpio.c</PathWithFileName>
+      <FilenameWithoutPath>yc11xx_gpio.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>11</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\..\..\Librarier\drivers\queue\yc_queue.c</PathWithFileName>
+      <FilenameWithoutPath>yc_queue.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>12</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\..\..\Librarier\drivers\systick\yc11xx_systick.c</PathWithFileName>
+      <FilenameWithoutPath>yc11xx_systick.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>13</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\..\..\Librarier\drivers\timer\yc11xx_timer.c</PathWithFileName>
+      <FilenameWithoutPath>yc11xx_timer.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>14</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\..\..\Librarier\drivers\timer\yc_timer.c</PathWithFileName>
+      <FilenameWithoutPath>yc_timer.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+    <File>
+      <GroupNumber>3</GroupNumber>
+      <FileNumber>15</FileNumber>
+      <FileType>1</FileType>
+      <tvExp>0</tvExp>
+      <tvExpOptDlg>0</tvExpOptDlg>
+      <bDave2>0</bDave2>
+      <PathWithFileName>..\..\..\..\..\..\Librarier\drivers\wdt\yc11xx_wdt.c</PathWithFileName>
+      <FilenameWithoutPath>yc11xx_wdt.c</FilenameWithoutPath>
+      <RteFlg>0</RteFlg>
+      <bShared>0</bShared>
+    </File>
+  </Group>
+
+</ProjectOpt>
Index: ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/yc11xx.uvprojx
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/yc11xx.uvprojx	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/MDK/yc11xx.uvprojx	(working copy)
@@ -0,0 +1,501 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>Target 1</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>ARMCM0</Device>
+          <Vendor>ARM</Vendor>
+          <PackID>ARM.CMSIS.5.5.1</PackID>
+          <PackURL>http://www.keil.com/pack/</PackURL>
+          <Cpu>IROM(0x00000000,0x00040000) IRAM(0x20000000,0x00020000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</FlashDriverDll>
+          <DeviceId>0</DeviceId>
+          <RegisterFile>$$Device:ARMCM0$Device/ARM/ARMCM0/Include/ARMCM0.h</RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile></SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\Objects\</OutputDirectory>
+          <OutputName>yc11xx</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>1</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>1</BrowseInformation>
+          <ListingPath>.\Listings\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>1</RunUserProg1>
+            <RunUserProg2>1</RunUserProg2>
+            <UserProg1Name>fromelf.exe --text -a -c --output=@L_asm.txt "!L"</UserProg1Name>
+            <UserProg2Name>"Objects/tool/c.bat"</UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>1</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments> </SimDllArguments>
+          <SimDlgDll>DARMCM1.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM0</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments> </TargetDllArguments>
+          <TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>0</UseTargetDll>
+            <UseExternalTool>1</UseExternalTool>
+            <RunIndependent>1</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4096</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
+          <Flash3>"Objects\tool\d.bat" ()</Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M0"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>0</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>1</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x40000</Size>
+              </IROM>
+              <XRAM>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x40000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>1</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>0</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>0</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>2</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>0</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>1</v6Lang>
+            <v6LangP>1</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls>--c99 --gnu</MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath>..\..\..\..\..\..\Librarier\device;..\..\User\hci;..\..\..\..\..\..\Librarier\drivers\uart;..\..\..\..\..\..\Librarier\drivers\gpio;..\..\..\..\..\..\Librarier\drivers\debug;..\..\..\..\..\..\Librarier\drivers\bt;..\..\..\..\..\..\Librarier\drivers\timer;..\..\..\..\..\..\Librarier\drivers\systick;..\..\..\..\..\..\Librarier\drivers\hal;..\..\..\..\..\..\Librarier\drivers\wdt;..\..\User</IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <uClangAs>0</uClangAs>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>0</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x00000000</TextAddressRange>
+            <DataAddressRange>0x100010000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile>.\Objects\yc11xx.sct</ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+      <Groups>
+        <Group>
+          <GroupName>main</GroupName>
+          <Files>
+            <File>
+              <FileName>main.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\User\main.c</FilePath>
+            </File>
+            <File>
+              <FileName>Drv_bt.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\User\Drv_bt.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>startup</GroupName>
+          <Files>
+            <File>
+              <FileName>startup.s</FileName>
+              <FileType>2</FileType>
+              <FilePath>..\..\..\..\..\..\Librarier\startup\startup.s</FilePath>
+            </File>
+          </Files>
+        </Group>
+        <Group>
+          <GroupName>driver</GroupName>
+          <Files>
+            <File>
+              <FileName>yc11xx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\..\..\Librarier\device\yc11xx.c</FilePath>
+            </File>
+            <File>
+              <FileName>yc11xx_h4.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\User\hci\yc11xx_h4.c</FilePath>
+            </File>
+            <File>
+              <FileName>yc11xx_uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\..\..\Librarier\drivers\uart\yc11xx_uart.c</FilePath>
+            </File>
+            <File>
+              <FileName>yc11xx_bt.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\..\..\Librarier\drivers\bt\yc11xx_bt.c</FilePath>
+            </File>
+            <File>
+              <FileName>yc_debug.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\..\..\Librarier\drivers\debug\yc_debug.c</FilePath>
+            </File>
+            <File>
+              <FileName>yc_drv_common.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\..\..\Librarier\drivers\hal\yc_drv_common.c</FilePath>
+            </File>
+            <File>
+              <FileName>yc11xx_gpio.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\..\..\Librarier\drivers\gpio\yc11xx_gpio.c</FilePath>
+            </File>
+            <File>
+              <FileName>yc_queue.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\..\..\Librarier\drivers\queue\yc_queue.c</FilePath>
+            </File>
+            <File>
+              <FileName>yc11xx_systick.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\..\..\Librarier\drivers\systick\yc11xx_systick.c</FilePath>
+            </File>
+            <File>
+              <FileName>yc11xx_timer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\..\..\Librarier\drivers\timer\yc11xx_timer.c</FilePath>
+            </File>
+            <File>
+              <FileName>yc_timer.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\..\..\Librarier\drivers\timer\yc_timer.c</FilePath>
+            </File>
+            <File>
+              <FileName>yc11xx_wdt.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\..\..\..\..\..\Librarier\drivers\wdt\yc11xx_wdt.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files>
+      <file attr="config" category="header" name="CMSIS\Config\RTE_Device.h" version="1.0.0">
+        <instance index="0" removed="1">RTE\Device\CMSDK_CM0\RTE_Device.h</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="CMSDK_CM0 CMSIS"/>
+        <package name="V2M-MPS2_CMx_BSP" schemaVersion="1.2" url="http://www.keil.com/pack/" vendor="Keil" version="1.7.0"/>
+        <targetInfos/>
+      </file>
+      <file attr="config" category="source" condition="ARMCC" name="Device\CMSDK_CM0\Source\ARM\startup_CMSDK_CM0.s" version="1.0.0">
+        <instance index="0" removed="1">RTE\Device\CMSDK_CM0\startup_CMSDK_CM0.s</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="CMSDK_CM0 CMSIS"/>
+        <package name="V2M-MPS2_CMx_BSP" schemaVersion="1.2" url="http://www.keil.com/pack/" vendor="Keil" version="1.7.0"/>
+        <targetInfos/>
+      </file>
+      <file attr="config" category="source" name="Device\CMSDK_CM0\Source\system_CMSDK_CM0.c" version="1.0.0">
+        <instance index="0" removed="1">RTE\Device\CMSDK_CM0\system_CMSDK_CM0.c</instance>
+        <component Cclass="Device" Cgroup="Startup" Cvendor="Keil" Cversion="1.0.0" condition="CMSDK_CM0 CMSIS"/>
+        <package name="V2M-MPS2_CMx_BSP" schemaVersion="1.2" url="http://www.keil.com/pack/" vendor="Keil" version="1.7.0"/>
+        <targetInfos/>
+      </file>
+    </files>
+  </RTE>
+
+</Project>
Index: ModuleDemo/26_BOOT/bt_demo/CM0/Prj/Output/out.rom
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/Output/out.rom	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/Prj/Output/out.rom	(working copy)
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Index: ModuleDemo/26_BOOT/bt_demo/CM0/User/Drv_bt.h
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/Drv_bt.h	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/Drv_bt.h	(working copy)
@@ -0,0 +1,85 @@
+#ifndef  _DRV_BT_H_
+#define _DRV_BT_H_
+
+#include <stdio.h>
+#include "ipc.h"
+#include "yc11xx.h"
+#include "yc_debug.h"
+#include "yc11xx_timer.h"
+#include "yc_timer.h"
+
+#define DEVICE_INFO_BASE 	0x07f000 // mem_ef_base
+
+#define REVERSE_3BYTE_DEFINE(a) ((a>>16)+(a&0xff00)+((a&0xff)<<16))  
+//#define REVERSE_2BYTE_DEFINE(a,b)
+
+#define M0_SCO_BUF_START_ADDR    (reg_map(HREADADDR3(mem_param_m0_respin_sco_buffer_start_addr)))
+
+
+#define CODE_START_FLASHADDR1 0x1003
+#define CODE_START_FLASHADDR2 0X18003
+#define CODE_MAX_LENGTH 0x17000
+
+typedef struct
+{
+	uint8_t topState;
+		
+	SYS_TIMER_TYPE autoPowerTimer;
+}BR_STATE;
+
+typedef enum
+{
+	BR_POWER_OFF=0,
+	BR_WAIT_POWER_OFF,
+	BR_CHARGER_IN,
+	BR_WAIT_POWER_ON,
+	BR_POWER_ON,
+}BR_STATE_TOP_TYPE;
+
+
+extern BR_STATE gBRState;
+
+
+
+#define HCI_QUEUE_MAX (5)
+#define HCI_DATA_BUFFER_SIZE (800)
+
+typedef struct{
+        uint16_t len;
+	uint8_t data[HCI_DATA_BUFFER_SIZE];
+}__attribute__((packed)) BT_HCI_DATA;
+typedef struct{
+	uint8_t rptr;
+	uint8_t wptr;
+	uint8_t cnt;
+	BT_HCI_DATA queue[HCI_QUEUE_MAX];
+}__attribute__((packed)) BT_HCI_DATA_FIFO;
+
+void Bt_EvtCallBack(uint8_t len,uint8_t *dataPtr);
+void Bt_HciFifoInit(void);
+BT_HCI_DATA *Bt_HciGetSendBufferPtr(void);
+void Bt_HciFifoIn(void);
+
+void Bt_HciFifoOut(void);
+uint8_t Bt_HciCheckBufferFull(void);
+void Bt_SndToBtData(uint8_t subType, uint32_t payloadPtr);
+void Bt_HciCallback(uint8_t *dataPtr);
+void Bt_DataBufferCallBack(uint8_t len,uint8_t *dataPtr);
+void Bt_PowerResetWork(void);
+void Bt_Init(void);
+void Bt_Reset(void);
+void Bt_PowerOn(bool isPowerOnFromKeyPress);
+void Bt_PowerOnBtWork(void);
+uint8_t Bt_CheckPowerOn(void);
+void Bt_StartWork(void);
+void Bt_ActionBeforeHibernate(void);
+void Bt_ActionBeforeLpm(void);
+void Bt_SndCmdPwroff(void);
+void Bt_SndHciToRespin(uint8_t *data, uint16_t len);
+void Bt_ACLCallbackBle(uint8_t *dataPtr,uint16_t conn_handle);
+void Bt_ACLCallbackClassic(uint8_t *dataPtr,uint16_t conn_handle);
+
+// extern function defined
+extern void SCO_NVIC_Config(void);
+extern void SCO_NVIC_DeConfig(void);
+#endif //_DRV_IPC_H_
Index: ModuleDemo/26_BOOT/bt_demo/CM0/User/Drv_bt.c
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/Drv_bt.c	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/Drv_bt.c	(working copy)
@@ -0,0 +1,371 @@
+#include <stdio.h>
+#include "Drv_bt.h"
+#include "yc11xx_h4.h"
+
+BR_STATE gBRState;
+BT_HCI_DATA_FIFO gHciDataFifo;
+
+void Bt_EvtCallBack(uint8_t len,uint8_t *dataPtr)
+{
+    if (*dataPtr >BT_EVT_100MS_UINT)
+    {
+        Bt_100ms_timer((*dataPtr)&(0x0F));
+        return;
+    }
+    DEBUG_LOG(LOG_LEVEL_CORE, "IPC" ,"Bt_EvtCallBack: 0x%04X", LOG_POINT_9001, *dataPtr);
+
+    switch(*dataPtr)
+    {
+        case BT_EVT_WAKEUP:
+            SYS_TimerStartTickTimer(CLOCK_48M_multiple);
+            break;
+        case BT_EVT_RESET:
+            Bt_Reset();
+            Bt_PowerOn(true);
+            Bt_PowerOnBtWork();
+            break;
+        case BT_EVT_RESTART:
+            Bt_PowerResetWork();
+            break;
+
+        default:
+            break;
+    }
+
+    return;
+}
+
+
+
+
+void Bt_HciFifoInit(void)
+{
+    memset((void *)&gHciDataFifo, 0, sizeof(BT_HCI_DATA_FIFO));
+}
+BT_HCI_DATA *Bt_HciGetSendBufferPtr(void)
+{
+    BT_HCI_DATA_FIFO* pFifo = &gHciDataFifo;
+    return &(pFifo->queue[pFifo->wptr]);
+}
+
+void Bt_HciFifoIn(void)
+{
+    BT_HCI_DATA_FIFO* pFifo = &gHciDataFifo;
+    if(pFifo->cnt >= HCI_QUEUE_MAX)
+    {
+        return;
+    }
+
+    pFifo->cnt++;
+    pFifo->wptr += 1;
+    //if(prxDataFifo->wptr == M0_SCO_RX_BUFFER_SIZE)
+    if(pFifo->wptr == HCI_QUEUE_MAX)
+    {
+    	pFifo->wptr = 0;
+    }
+}
+
+void Bt_HciFifoOut(void)
+{
+    BT_HCI_DATA_FIFO* pFifo = &gHciDataFifo;
+    if(pFifo->cnt == 0)
+    {
+        return;
+    }
+
+    pFifo->cnt--;
+    pFifo->rptr += 1;
+    //if(prxDataFifo->wptr == M0_SCO_RX_BUFFER_SIZE)
+    if(pFifo->rptr == HCI_QUEUE_MAX)
+    {
+    	pFifo->rptr = 0;
+    }
+}
+uint8_t Bt_HciCheckBufferFull(void)
+{
+    BT_HCI_DATA_FIFO* pFifo = &gHciDataFifo;
+    if(pFifo->cnt >= HCI_QUEUE_MAX)
+    {
+        return 1;
+    }
+    return 0;
+}
+void Bt_HciParseEvt(uint8_t evtCode, uint16_t len, uint8_t *dataPtr)
+{
+    uint16_t opcode = 0;
+    uint8_t numPacket = 0;
+    DEBUG_LOG_2(LOG_LEVEL_CORE, "HCI" ,"", LOG_POINT_E000, evtCode, len);
+    if(evtCode == BT_HCI_EVT_CMD_COMPLETE)
+    {
+        numPacket = (*(dataPtr + 0) << 0);
+        opcode = (*(dataPtr + 1) << 0) |(*(dataPtr + 2) << 8);
+        DEBUG_LOG(LOG_LEVEL_CORE, "HCI" ,"", LOG_POINT_E001, opcode);
+        DEBUG_LOG_2(LOG_LEVEL_CORE, "HCI" ,"", LOG_POINT_E002, (*(dataPtr + 3)), (*(dataPtr + 4)));
+    }
+    
+}
+void Bt_HciParseCmd(uint16_t opcode, uint8_t len, uint8_t *dataPtr)
+{
+    DEBUG_LOG(LOG_LEVEL_CORE, "HCI" ,"", LOG_POINT_E100, opcode);
+    
+}
+
+void Bt_SndToBtData(uint8_t subType, uint32_t payloadPtr)
+{
+    DEBUG_LOG_STRING("Bt_SndToBtData subType=%d, payloadPtr=0x%x\r\n",subType, payloadPtr);
+    uint8_t data[4];
+    data[0] = subType;
+    data[1] = payloadPtr;
+    data[2] = payloadPtr >> 8;
+    data[3] = payloadPtr >> 16;
+    IPC_TxCommon(IPC_TYPE_CM0_TO_BT_DATA, data, sizeof(data));
+}
+void Bt_HciCallback(uint8_t *dataPtr)
+{
+    uint8_t type = *(dataPtr);
+    uint16_t len = 0;
+    uint16_t handle = 0;
+    uint16_t totalLength = 0;
+    uint8_t evtCode = 0;
+    //Avoid host use respin buffer
+    uint8_t evtBuffer[500];
+    switch(type)
+    {
+        case H4_EVT:
+            evtCode = *(dataPtr + 1);
+            len = *(dataPtr + 2);
+            totalLength = len+3;// 04 + evtCode(1) + length(1)
+            
+            //Avoid host use respin buffer
+            xmemcpy(evtBuffer,dataPtr,totalLength);
+            dataPtr = evtBuffer;
+
+            Bt_HciParseEvt(evtCode, len, dataPtr + 3);
+
+            
+            break;
+        case H4_ACL:
+            handle = (*(dataPtr + 1) << 0) |(*(dataPtr + 2) << 8);
+            len = (*(dataPtr + 3) << 0) |(*(dataPtr + 4) << 8);
+            totalLength = len+5;// 02 + handle(2) + length(2)
+            DEBUG_LOG(LOG_LEVEL_CORE, "HCI" ,"", LOG_POINT_E010, handle);
+            DEBUG_LOG(LOG_LEVEL_CORE, "HCI" ,"", LOG_POINT_E011, len);
+            break;
+        default:
+            _ASSERT_FAULT();
+            break;
+    }
+
+
+    h4_send_data(dataPtr, totalLength);
+}
+void Bt_DataBufferCallBack(uint8_t len,uint8_t *dataPtr)
+{
+    uint32_t payloadPtr;
+    uint8_t subType;
+	uint16_t conn_handle;
+    //uint16_t lenPayload;
+    subType = dataPtr[0];
+    payloadPtr = reg_map(dataPtr[1] +(dataPtr[2]<<8)+(dataPtr[3]<<16));
+    DEBUG_LOG_STRING("Bt_DataBufferCallBack len: %d, subType=0x%x, payloadPtr=0x%x\r\n", len, subType, payloadPtr);
+    //	MyPrintf("handle=%x\r\n",handle);
+    switch(subType) 
+    {
+        case IPC_DATA_SUBTYPE_HCI:
+            // TODO: Need change to m0 ram.
+            Bt_HciCallback((uint8_t *)payloadPtr);
+            Bt_SndToBtData(IPC_DATA_SUBTYPE_FREE, payloadPtr);
+            break;
+        case IPC_DATA_SUBTYPE_FREE:
+            /************************release tx buffer *****************************/
+            Bt_HciFifoOut();
+            break;
+        case IPC_DATA_SUBTYPE_ACL_BLE:
+            conn_handle = dataPtr[4]+(dataPtr[5]<<8);
+            Bt_ACLCallbackBle((uint8_t *)payloadPtr,conn_handle);
+            Bt_SndToBtData(IPC_DATA_SUBTYPE_FREE, payloadPtr);
+            break;
+        case IPC_DATA_SUBTYPE_ACL_CLASSIC:
+            conn_handle = dataPtr[4]+(dataPtr[5]<<8);
+            Bt_ACLCallbackClassic((uint8_t *)payloadPtr,conn_handle);
+            Bt_SndToBtData(IPC_DATA_SUBTYPE_FREE, payloadPtr);
+            break;
+    }
+}
+
+
+
+void Bt_PowerResetWork(void)
+{
+	Bt_Reset();
+	//WDT_Kick();
+	SYS_delay_ms(500);
+	//WDT_Kick();
+	SYS_delay_ms(500);
+	//WDT_Kick();
+	SYS_delay_ms(100);
+	Bt_PowerOn(false);
+	//Bat_StateSwitchPooling();
+	if(gBRState.topState != BR_CHARGER_IN)
+	{
+		Bt_PowerOnBtWork();
+	}
+}
+
+void Bt_Init(void)
+{
+	DEBUG_LOG(LOG_LEVEL_CORE, "UI" ,"Bt_Reset: 0x%04X", LOG_POINT_A200, gBRState.topState);
+	gBRState.topState = BR_WAIT_POWER_ON;
+
+}
+
+//extern void KeyPad_Event_Handle(KEY_INDEX index,KEYPAD_EVT_TYPE key_evt);
+void Bt_Reset(void)
+{
+	DEBUG_LOG(LOG_LEVEL_CORE, "UI" ,"Bt_Reset: 0x%04X", LOG_POINT_A201, gBRState.topState);
+	Bt_Init();	
+	//SYS_TimerInit(CLOCK_48M_multiple);
+	//keypad_init(KeyPad_Event_Handle);
+	//QSPI_ReadFlashData(OTA_LED_FLASH_ADDR,1,&gLedCfg.red_gpio);
+	//Read_Ledgpionum();
+	//VP_Init();
+	//Led_Init();
+	//Bat_InitDev();
+}
+
+void Bt_PowerOn(bool isPowerOnFromKeyPress)
+{
+	gBRState.topState = BR_POWER_ON;
+
+}
+
+
+void Bt_PowerOnBtWork(void)
+{
+}
+
+
+uint8_t Bt_CheckPowerOn(void)
+{
+	return (gBRState.topState >= BR_POWER_ON);
+}
+
+void Bt_StartWork(void)
+{
+
+	DEBUG_LOG(LOG_LEVEL_CORE, "IPC" ,"Bt_startWork: 0x%04X", LOG_POINT_9011, gBRState.topState);
+
+	
+}
+
+
+void Bt_ActionBeforeHibernate()
+{
+	//gpio leakage of electricity
+	//Bat_ClcGpio();
+}
+void Bt_ActionBeforeLpm()
+{
+	//gpio leakage of electricity
+	//Bat_ClcGpio();
+}
+
+void Bt_SndCmdPwroff(void)
+{
+	//disable interrupt,will disable keyscan
+	OS_ENTER_CRITICAL();
+	gBRState.topState = BR_POWER_OFF;
+	IPC_TxControlCmd(BT_CMD_ENTER_HIBERNATE);
+	
+	while(1){
+	 	uint8_t temp = HREAD(IPC_MCU_STATE);
+		if (temp == IPC_MCU_STATE_HIBERNATE)
+		{	
+			Bt_ActionBeforeHibernate();
+			HWRITE(IPC_MCU_STATE,IPC_MCU_STATE_STOP);
+			while(1);
+		}
+		else if (temp == IPC_MCU_STATE_LMP){
+			HWRITE(IPC_MCU_STATE,IPC_MCU_STATE_RUNNING);
+		}
+		hw_delay();
+	}
+}
+
+void Bt_HciParseRcvData(uint8_t *dataPtr, uint16_t len)
+{
+    uint8_t type = *(dataPtr);
+    uint16_t handle = 0;
+    uint16_t opcode = 0;
+    switch(type)
+    {
+        case H4_CMD:
+            opcode = (*(dataPtr + 1) << 0) |(*(dataPtr + 2) << 8);
+            len = *(dataPtr + 3);
+            Bt_HciParseCmd(opcode, len, dataPtr + 4);
+            break;
+        case H4_ACL:
+            handle = (*(dataPtr + 1) << 0) |(*(dataPtr + 2) << 8);
+            len = (*(dataPtr + 3) << 0) |(*(dataPtr + 4) << 8);
+            DEBUG_LOG(LOG_LEVEL_CORE, "HCI" ,"", LOG_POINT_E110, handle);
+            DEBUG_LOG(LOG_LEVEL_CORE, "HCI" ,"", LOG_POINT_E111, len);
+            break;
+        default:
+            _ASSERT_FAULT();
+            break;
+    }
+    
+}
+void Bt_SndHciToRespin(uint8_t *data, uint16_t len)
+{
+    BT_HCI_DATA* pHciData = Bt_HciGetSendBufferPtr();
+
+    memcpy((pHciData->data), data, len);
+    pHciData->len = len;
+    Bt_HciParseRcvData(data, len);
+    Bt_SndToBtData(IPC_DATA_SUBTYPE_HCI, (uint32_t)pHciData->data);
+    //DEBUG_LOG_STRING("Bt_SndHciToRespin len=%d, payload=0x%x\r\n",len, (uint32_t)pHciData->data);
+    if(!len)
+    {
+        //while(1);
+        return;
+    }
+    Bt_HciFifoIn();
+}
+
+void Bt_ACLCallbackBle(uint8_t *dataPtr,uint16_t conn_handle)
+{
+	uint8_t packet[300];
+	uint16_t handle = 0;
+	uint16_t len=0;
+	uint16_t totalLength = 0;
+	handle = (((*(dataPtr))& 0x03)<<12)|conn_handle; 
+	len = (*(dataPtr+1));
+	packet[0] = H4_ACL;
+	packet[1] = handle& 0xff;
+	packet[2] = (handle>>8)& 0xff;
+	packet[3] = len & 0xff;
+	packet[4] = (len>>8)& 0xff;
+	totalLength =len+5;
+	xmemcpy(packet+5,dataPtr+2,len);
+	Bt_HciCallback(packet);
+}
+void Bt_ACLCallbackClassic(uint8_t *dataPtr,uint16_t conn_handle)
+{
+	uint8_t packet[800];
+	uint16_t handle = 0;
+	uint16_t len=0;
+	uint16_t totalLength = 0;
+	handle = (((*(dataPtr))& 0x03)<<12)|conn_handle; 
+	len = (*(dataPtr + 1) << 0) |(*(dataPtr + 2) << 8);
+	packet[0] = H4_ACL;
+	packet[1] = handle& 0xff;
+	packet[2] = (handle>>8)& 0xff;
+	packet[3] = len & 0xff;
+	packet[4] = (len>>8)& 0xff;
+	totalLength =len+5;
+	xmemcpy(packet+5,dataPtr+3,len);
+	Bt_HciCallback(packet);
+}
+
+
Index: ModuleDemo/26_BOOT/bt_demo/CM0/User/app_config.h
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/app_config.h	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/app_config.h	(working copy)
@@ -0,0 +1,18 @@
+#ifndef  _APP_CONFIG_H_
+#define _APP_CONFIG_H_
+
+#include <stdio.h>
+#include "type.h"
+#include "btreg.h"
+
+
+/////////////////// Function Control///////////////////
+#define FUNCTION_CONTROL_DEBUG_ENABLE
+//#define FUNCTION_WATCH_DOG
+//#define FUNCTION_FSC_RTK_HOST
+#define FUNCTION_FSC_RTK_HOST_WHITE
+
+/////////////////// DEBUG Setting///////////////////
+#define DEBUG_GPIO_DEFINE GPIO_23
+
+#endif //_APP_CONFIG_H_
Index: ModuleDemo/26_BOOT/bt_demo/CM0/User/btreg.h
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/btreg.h	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/btreg.h	(working copy)
@@ -0,0 +1,2385 @@
+#ifndef _BT_REG_H_
+#define _BT_REG_H_
+#define	mem_le_adv_transmit                     	0x0000
+#define	mem_le_adv_waitcnt                      	0x0001
+#define	mem_sbc_error                           	0x0002
+#define	mem_le_adv_rcv                          	0x0002
+#define	mem_le_req_rcv                          	0x0003
+#define	mem_le_scanrsp_rcv                      	0x0004
+#define	mem_le_conn_rcv                         	0x0005
+#define	mem_inquiryscan_waitcnt                 	0x0006
+#define	mem_inquiryscan_rcvcnt                  	0x0007
+#define	mem_pagescan_waitcnt                    	0x0008
+#define	mem_pagescan_rcvcnt                     	0x0009
+#define	mem_pagescan_rcvfhscnt                  	0x000a
+#define	mem_slave_rcvcnt                        	0x000b
+#define	mem_page_transmit                       	0x000c
+#define	mem_page_rcv                            	0x000d
+#define	mem_page_rcv_fhs                        	0x000e
+#define	mem_master_rcvcnt                       	0x000f
+#define	mem_fhs_wait_counter                    	0x0010
+#define	mem_newconnto_counter                   	0x0011
+#define	mem_inquiry_transmit                    	0x0012
+#define	mem_inquiry_rcv                         	0x0013
+#define	mem_fw_ver                              	0x0014
+#define	mem_current_context                     	0x0015
+#define	mem_empty_block                         	0x0016
+#define	mem_last_freq                           	0x0017
+#define	mem_rssi                                	0x0018
+#define	mem_rx_type                             	0x0019
+#define	mem_rx_hec_err                          	0x001a
+#define	mem_rx_crc_err                          	0x001c
+#define	mem_context_ptr                         	0x001e
+#define	mem_display                             	0x0020
+#define	mem_bcd                                 	0x0028
+#define	mem_state                               	0x0030
+#define	mem_mode                                	0x0031
+#define	mem_tsniff                              	0x0032
+#define	mem_sniff_anchor                        	0x0034
+#define	mem_clk_offset                          	0x0038
+#define	mem_rx_window                           	0x003e
+#define	mem_plap                                	0x0040
+#define	mem_puap                                	0x0043
+#define	mem_pnap                                	0x0044
+#define	mem_conn_handle                         	0x0046
+#define	mem_cur_arq                             	0x0047
+#define	mem_lmp_to_send                         	0x0048
+#define	mem_lmi_opcode                          	0x0049
+#define	mem_lmo_reason                          	0x004a
+#define	mem_op                                  	0x004b
+#define	mem_state_map                           	0x004c
+#define	mem_supervision_timer                   	0x004d
+#define	mem_supervision_to                      	0x0051
+#define	mem_name_offset                         	0x0053
+#define	mem_key_size                            	0x0054
+#define	mem_reconn_lmp_sm                       	0x0055
+#define	mem_aco                                 	0x0056
+#define	mem_kc                                  	0x0062
+#define	mem_conn_timer                          	0x0072
+#define	mem_sniff_attempt                       	0x0073
+#define	mem_sniff_timeout                       	0x0074
+#define	mem_dsniff                              	0x0075
+#define	mem_amaddr                              	0x0077
+#define	mem_lmo_opcode1                         	0x0078
+#define	mem_lmi_opcode1                         	0x0079
+#define	mem_lmo_reason1                         	0x007a
+#define	mem_lmo_tid1                            	0x007b
+#define	mem_lmo_opcode2                         	0x007c
+#define	mem_lmi_opcode2                         	0x007d
+#define	mem_lmo_reason2                         	0x007e
+#define	mem_lmo_tid2                            	0x007f
+#define	mem_mark_load                           	0x0080
+#define	mem_hci_version                         	0x0088
+#define	mem_acl_pktlen                          	0x008b
+#define	mem_sco_pktlen                          	0x008d
+#define	mem_acl_pktcnt                          	0x008e
+#define	mem_sco_pktcnt                          	0x0090
+#define	mem_current_sniff_attempt               	0x0092
+#define	mem_current_sniff_timeout               	0x0093
+#define	mem_nfreq_index_inq                     	0x0094
+#define	mem_nfreq_index_page                    	0x0095
+#define	mem_ninqy_index                         	0x0096
+#define	mem_fhs_misc                            	0x0097
+#define	mem_tx_lch                              	0x0098
+#define	mem_tx_len                              	0x0099
+#define	mem_subsniff_instant                    	0x009b
+#define	mem_subsniff_rate                       	0x009f
+#define	mem_subsniff_tcmax                      	0x00a0
+#define	mem_subsniff_tsniff                     	0x00a2
+#define	mem_lpm_adjust                          	0x00a3
+#define	mem_sync_clke                           	0x00a4
+#define	mem_lpm_current_mult                    	0x00aa
+#define	mem_gpio_wakeup_low                     	0x00ab
+#define	mem_gpio_wakeup_high                    	0x00b0
+#define	mem_npage_index                         	0x00b5
+#define	mem_page_mode                           	0x00b6
+#define	mem_page_clk                            	0x00b7
+#define	mem_tst_pktcnt_sync                     	0x00bb
+#define	mem_tst_pktcnt_hec                      	0x00bd
+#define	mem_tst_pktcnt_crc                      	0x00bf
+#define	mem_tst_pktcnt_dmh                      	0x00c1
+#define	mem_tmp_buffer_head                     	0x00c3
+#define	mem_tmp_buffer                          	0x00c6
+#define	mem_tester_emulate                      	0x0116
+#define	mem_temp_payload                        	0x0117
+#define	test_mode_scenario                      	0x0117
+#define	test_mode_hopping_mode                  	0x0118
+#define	test_mode_tx_freq                       	0x0119
+#define	test_mode_rx_freq                       	0x011a
+#define	test_mode_power_mode                    	0x011b
+#define	test_mode_poll_period                   	0x011c
+#define	test_mode_packet_type                   	0x011d
+#define	test_mode_data_length                   	0x011e
+#define	mem_test_mode_old_debug_config          	0x0120
+#define	mem_tester_cnt                          	0x0121
+#define	mem_temp_am_addr                        	0x0122
+#define	mem_temp_arq                            	0x0123
+#define	mem_pdatatemp                           	0x0124
+#define	mem_len                                 	0x012c
+#define	mem_clkn_bt                             	0x012e
+#define	mem_clke_bt                             	0x0132
+#define	mem_dpll_clkn                           	0x0136
+#define	mem_connection_options                  	0x013a
+#define	mem_nameres_cnt                         	0x013b
+#define	mem_txptr                               	0x013c
+#define	mem_slot_offset                         	0x013e
+#define	mem_wait_auth_clk                       	0x0140
+#define	extm_fhs_misc                           	0x0144
+#define	extm_newconn_am_addr                    	0x0145
+#define	extm_class                              	0x0146
+#define	extm_lap                                	0x0149
+#define	extm_uap                                	0x014c
+#define	extm_nap                                	0x014d
+#define	mem_debug_config                        	0x0150
+#define	mem_lch_code                            	0x0151
+#define	mem_fhs_am_addr                         	0x0152
+#define	mem_dpll_error                          	0x0153
+#define	mem_bdaddr_list_buff                    	0x0155
+#define	mem_select_list_item                    	0x0179
+#define	mem_temp_reconn_record                  	0x017a
+#define	mem_record_bt_mode                      	0x017a
+#define	mem_temp_lap                            	0x017b
+#define	mem_list_item_ptr                       	0x0181
+#define	mem_eir                                 	0x0183
+#define	mem_switch_timeout                      	0x01e7
+#define	mem_acl_dsniff                          	0x01e9
+#define	mem_acl_tsniff                          	0x01eb
+#define	mem_acl_attempt                         	0x01ed
+#define	mem_acl_timeout                         	0x01ee
+#define	mem_temp_force_nack                     	0x01ef
+#define	mem_avdtp_signal_cmd                    	0x01f0
+#define	mem_transaction_label                   	0x01f1
+#define	mem_temp_sbc_decode_buffer_size         	0x01f2
+#define	mem_temp_dac_soft_dma_work_wptr         	0x01f4
+#define	mem_temp_sbc_soft_dma_start_addr        	0x01f6
+#define	mem_temp_dac_soft_dma_start_addr        	0x01f8
+#define	mem_temp_soft_dma_work_length           	0x01fa
+#define	mem_temp_soft_dma_work_table_index_value	0x01fc
+#define	mem_ucode_status                        	0x01fd
+#define	mem_ucode_flag                          	0x01fe
+#define	mem_qspi_tbuf                           	0x0200
+#define	mem_iicd_tbuf                           	0x0201
+#define	mem_addr_hi                             	0x0201
+#define	mem_eep_addr_hi                         	0x0202
+#define	mem_addr_mi                             	0x0202
+#define	mem_addr_lo                             	0x0203
+#define	mem_iicd_addr                           	0x0204
+#define	mem_spid_rbuf                           	0x0205
+#define	mem_ucode_buf                           	0x0209
+#define	mem_ucode_len                           	0x020b
+#define	mem_sched_addr                          	0x020d
+#define	mem_ucode_ptr                           	0x020f
+#define	mem_ucode_keybuf                        	0x0212
+#define	mem_check_plap_temp                     	0x0222
+#define	mem_start_addr_temp                     	0x0234
+#define	mem_spid_tbuf                           	0x0237
+#define	mem_qspi_defualt                        	0x0239
+#define	mem_switch_fail_master_count            	0x023a
+#define	mem_app_evt_timer_count                 	0x023b
+#define	mem_flash_address                       	0x023c
+#define	mem_flash_data_address                  	0x023f
+#define	mem_flash_trans_length                  	0x0241
+#define	mem_soft_dma_src_addr                   	0x0243
+#define	mem_soft_dma_dst_addr                   	0x0247
+#define	mem_avctp_command_response              	0x024b
+#define	mem_avrcp_vol                           	0x024c
+#define	mem_avctp_rx_label                      	0x024d
+#define	mem_h5rx_ackcnt                         	0x024e
+#define	mem_check_err_acl_cont                  	0x024f
+#define	mem_rp_packets                          	0x0250
+#define	mem_packet_type                         	0x0251
+#define	mem_hci_sniff_conn_handle               	0x0253
+#define	mem_hci_sniff_max_interval              	0x0255
+#define	mem_hci_sniff_min_interval              	0x0257
+#define	mem_hci_sniff_attempt                   	0x0259
+#define	mem_hci_sniff_timeout                   	0x025b
+#define	mem_voice_setting                       	0x025d
+#define	mem_retransmission_effort               	0x025f
+#define	mem_sco_ptype                           	0x0260
+#define	mem_extm_uap_restore                    	0x0262
+#define	mem_h5rx_rptr                           	0x0265
+#define	mem_h5rx_ack                            	0x0267
+#define	mem_h5tx_ack                            	0x0268
+#define	mem_h5tx_rptr                           	0x0269
+#define	mem_h5tx_wptr                           	0x026b
+#define	mem_h5tx_free                           	0x026d
+#define	mem_h5rx_tmp                            	0x026f
+#define	mem_h5tx_seq                            	0x0270
+#define	mem_hci_acl_queue_wptr                  	0x0271
+#define	mem_hci_acl_queue_rptr                  	0x0273
+#define	mem_hci_acl_queue_end                   	0x0275
+#define	mem_hci_acl_queue_wcnt                  	0x0277
+#define	mem_hci_acl_cnt                         	0x0278
+#define	mem_hci_acl_tx_trigger_wptr             	0x0279
+#define	mem_ucode_id_local                      	0x027b
+#define	mem_ucode_id_remote                     	0x027c
+#define	mem_check_sum                           	0x027d
+#define	mem_ucode_temp                          	0x027e
+#define	mem_ucode_temp1                         	0x027f
+#define	mem_lock_in_enc                         	0x0280
+#define	mem_hci_disconn_reason                  	0x0281
+#define	mem_hci_curr_len                        	0x0282
+#define	mem_hci_curr_target                     	0x0283
+#define	mem_coef_table_temp                     	0x0285
+#define	mem_sco_indata                          	0x03d7
+#define	mem_sco_outdata                         	0x0413
+#define	mem_phone_num_count                     	0x044f
+#define	mem_phone_num_len                       	0x0450
+#define	mem_phone_number                        	0x0451
+#define	mem_at_command_data                     	0x0460
+#define	mem_sco_flag                            	0x047e
+#define	mem_l2cap_mem_start                     	0x047f
+#define	mem_l2cap_rxbuff1_len                   	0x047f
+#define	mem_l2cap_rxbuff2_len                   	0x0481
+#define	mem_l2cap_rxbuff_new_temp               	0x0483
+#define	mem_l2cap_rxbuff_new                    	0x0484
+#define	mem_l2cap_rxbuff_fifo                   	0x0485
+#define	mem_l2cap_rxbuff_fifo1                  	0x0485
+#define	mem_l2cap_rxbuff_fifo2                  	0x0486
+#define	mem_l2cap_payload_ptr                   	0x0487
+#define	mem_l2cap_rx_pkt_length                 	0x0489
+#define	mem_l2cap_rx_cid                        	0x048b
+#define	mem_l2cap_rx_done                       	0x048d
+#define	mem_l2cap_signal_ident                  	0x048e
+#define	mem_sdp_tx_buff_ptr                     	0x048f
+#define	mem_sdp_tx_payload_ptr                  	0x0491
+#define	mem_sdp_tx_pkt_length                   	0x0493
+#define	mem_tx_malloc_log                       	0x0495
+#define	mem_l2cap_temp_ch_info                  	0x04d5
+#define	mem_l2cap_temp_ch_psm                   	0x04d5
+#define	mem_l2cap_temp_ch_state                 	0x04d6
+#define	mem_l2cap_temp_local_cid                	0x04d7
+#define	mem_l2cap_temp_remote_cid               	0x04d9
+#define	mem_l2cap_mem_end                       	0x04db
+#define	mem_le_rxbuf                            	0x04db
+#define	mem_le_l2capbuf                         	0x0503
+#define	mem_le_mic                              	0x05db
+#define	mem_le_peer_mic                         	0x05df
+#define	mem_le_skdm                             	0x05e3
+#define	mem_le_skds                             	0x05eb
+#define	mem_le_peer_ltk                         	0x05f3
+#define	mem_le_my_ltk                           	0x0603
+#define	mem_le_mrand                            	0x0613
+#define	mem_le_state                            	0x0623
+#define	mem_le_mode                             	0x0624
+#define	mem_le_tsniff                           	0x0625
+#define	mem_le_anchor                           	0x0627
+#define	mem_le_clk_offset                       	0x062b
+#define	mem_le_receive_window                   	0x0631
+#define	mem_le_plap                             	0x0633
+#define	mem_le_conn_handle                      	0x0639
+#define	mem_le_arq                              	0x063a
+#define	mem_le_ch                               	0x063b
+#define	mem_le_hop                              	0x063c
+#define	mem_le_event_count                      	0x063d
+#define	mem_le_supervision_timer                	0x063f
+#define	mem_le_instant                          	0x0643
+#define	mem_le_channels                         	0x0645
+#define	mem_le_conn_sm                          	0x0646
+#define	mem_le_op                               	0x0647
+#define	mem_le_access                           	0x0648
+#define	mem_le_crcinit                          	0x064c
+#define	mem_le_window_size                      	0x064f
+#define	mem_le_slave_latency                    	0x0650
+#define	mem_le_superto                          	0x0652
+#define	mem_le_channel_map                      	0x0654
+#define	mem_le_no_using                         	0x0659
+#define	mem_le_peer_sca                         	0x065b
+#define	mem_le_att_opcode                       	0x065c
+#define	mem_le_att_handle                       	0x065d
+#define	mem_le_err_code                         	0x065f
+#define	mem_le_ll_pairing_fail_reason           	0x0660
+#define	mem_le_sk                               	0x0661
+#define	mem_le_testtype                         	0x0671
+#define	mem_le_test_sync                        	0x0672
+#define	mem_le_test_pcnt                        	0x0674
+#define	mem_le_notify_len                       	0x0676
+#define	mem_cmd_le_create_conn                  	0x0677
+#define	mem_le_adv_temp                         	0x0678
+#define	mem_le_packet_size                      	0x068c
+#define	mem_le_packet_llid                      	0x068d
+#define	mem_le_payload_ptr                      	0x068e
+#define	mem_lmo_header_length                   	0x0690
+#define	mem_lmo_header_opcode                   	0x0691
+#define	mem_lmo_payload                         	0x0692
+#define	mem_lmi_accepted_opcode                 	0x06a3
+#define	mem_disconn_reason_send                 	0x06a4
+#define	mem_tx_fixed_freq                       	0x06a5
+#define	mem_rx_fixed_freq                       	0x06a6
+#define	mem_ext_features_page                   	0x06a7
+#define	mem_lmpext_ssp_enable                   	0x06a8
+#define	mem_remote_sppcap                       	0x06aa
+#define	mem_lmp_conn_state                      	0x06ab
+#define	mem_soft_timer                          	0x06ac
+#define	mem_pincode_state                       	0x06ae
+#define	mem_sres_tid                            	0x06af
+#define	mem_accptsco_tid                        	0x06b0
+#define	mem_wait_encryption                     	0x06b1
+#define	mem_sniff_payload                       	0x06b2
+#define	mem_aurand_send_delay_time              	0x06c2
+#define	mem_prcp_data                           	0x06c6
+#define	mem_prcp                                	0x06da
+#define	mem_prcp_tx_len                         	0x06db
+#define	rx_buf_data_ptr                         	0x06dc
+#define	mem_mod2div_temp                        	0x06de
+#define	mem_contw_temp                          	0x06e1
+#define	mem_rfc_adss                            	0x06e3
+#define	mem_rfc_current_channel                 	0x06e4
+#define	mem_rfc_frame_type                      	0x06e5
+#define	mem_current_fcs                         	0x06e6
+#define	mem_rfc_paylead_length                  	0x06e7
+#define	mem_rfc_paylead_ptr                     	0x06e9
+#define	mem_uih_cmd_type                        	0x06eb
+#define	mem_uih_length                          	0x06ec
+#define	mem_rfc_payload_ptr                     	0x06ee
+#define	mem_ms_param                            	0x06f0
+#define	mem_pn_credit_flow_type_info            	0x06f1
+#define	mem_pn_priority                         	0x06f2
+#define	mem_pn_acknowledg_timer                 	0x06f3
+#define	mem_pn_max_retrans                      	0x06f4
+#define	mem_rfcomm_send_adss                    	0x06f5
+#define	mem_rfcomm_send_frame_type              	0x06f6
+#define	mem_rfcomm_send_fcs                     	0x06f7
+#define	mem_sdp_mem_start                       	0x06f8
+#define	mem_sdp_uuid_search_ptr                 	0x06f8
+#define	mem_sdp_continue_byte                   	0x0700
+#define	mem_sdp_pduid                           	0x0702
+#define	mem_sdp_transactionid                   	0x0703
+#define	mem_sdp_transactionid_local             	0x0705
+#define	mem_sdp_attribute_maxbyte               	0x0707
+#define	mem_sdp_record_maxcnt                   	0x0709
+#define	mem_sdp_record_handle                   	0x070b
+#define	mem_sdp_LACAP_found                     	0x070f
+#define	mem_sdp_RFCOMM_found                    	0x0710
+#define	mem_sdp_handle_list                     	0x0711
+#define	mem_sdp_attrib_list                     	0x0711
+#define	mem_sdp_error_code                      	0x0731
+#define	mem_sdp_all_length                      	0x0733
+#define	mem_handle_humber                       	0x0735
+#define	mem_search_uuid                         	0x0736
+#define	mem_sdp_mem_end                         	0x0738
+#define	mem_rxbuf                               	0x0738
+#define	mem_random_number                       	0x0749
+#define	mem_round_key                           	0x0759
+#define	mem_kinit                               	0x0769
+#define	mem_input_store                         	0x0779
+#define	mem_x                                   	0x0789
+#define	mem_y                                   	0x0799
+#define	mem_y15                                 	0x07a8
+#define	mem_key_store                           	0x07a9
+#define	mem_key_store_end                       	0x07ba
+#define	memp_ar_key                             	0x07bb
+#define	memp_ar_input                           	0x07bd
+#define	mem_ar_hround                           	0x07bf
+#define	mem_ec_infinite                         	0x07c9
+#define	mem_ec_loopc                            	0x07ca
+#define	mem_aes_cmac_data_length                	0x07cc
+#define	memdat                                  	0x07cd
+#define	mem_ax                                  	0x07cd
+#define	mem_ay                                  	0x07e5
+#define	mem_az                                  	0x07fd
+#define	mem_bx                                  	0x0815
+#define	mem_ax_256                              	0x082d
+#define	mem_by                                  	0x082d
+#define	mem_bz                                  	0x0845
+#define	mem_ay_256                              	0x084d
+#define	mem_cx                                  	0x085d
+#define	mem_az_256                              	0x086d
+#define	mem_cy                                  	0x0875
+#define	mem_cy5                                 	0x088c
+#define	mem_bx_256                              	0x088d
+#define	mem_cz                                  	0x088d
+#define	mem_k                                   	0x08a5
+#define	mem_by_256                              	0x08ad
+#define	mem_align                               	0x08bd
+#define	mem_bz_256                              	0x08cd
+#define	mem_tmp1                                	0x08cd
+#define	memahbak                                	0x08cd
+#define	mem_tmp5                                	0x08e5
+#define	mem_cx_256                              	0x08ed
+#define	memahsave                               	0x08ed
+#define	mem_tmp2                                	0x08fd
+#define	mem_cy_256                              	0x090d
+#define	memahsave_end                           	0x090d
+#define	mem_addr_padding                        	0x090d
+#define	mem_addr_value                          	0x090e
+#define	mem_tmp3                                	0x0915
+#define	mem_t1                                  	0x0915
+#define	mem_addr_value_end                      	0x091a
+#define	mem_addr_iocap_end                      	0x091d
+#define	mem_cy5_256                             	0x092c
+#define	mem_cz_256                              	0x092d
+#define	mem_tmp0                                	0x092d
+#define	mem_t0                                  	0x092d
+#define	mem_tmp0a                               	0x0935
+#define	mem_t2                                  	0x0945
+#define	mem_k_256                               	0x094d
+#define	mem_t3                                  	0x095d
+#define	mem_tmp1_256                            	0x096d
+#define	mem_t7                                  	0x0975
+#define	mem_tmp5_256                            	0x098d
+#define	mem_tmp2_256                            	0x09ad
+#define	mem_tmp3_256                            	0x09cd
+#define	mem_t1_256                              	0x09cd
+#define	mem_tmp0_256                            	0x09ed
+#define	mem_t0_256                              	0x09ed
+#define	mem_t2_256                              	0x0a0d
+#define	mem_t3_256                              	0x0a2d
+#define	mem_t7_256                              	0x0a4d
+#define	mem_p                                   	0x0a6d
+#define	mem_a                                   	0x0a85
+#define	mem_b                                   	0x0a9d
+#define	mem_gx                                  	0x0ab5
+#define	mem_gy                                  	0x0acd
+#define	memh0                                   	0x0ae5
+#define	mem_p_256                               	0x0b05
+#define	mem_a_256                               	0x0b25
+#define	mem_gx_256                              	0x0b45
+#define	mem_gy_256                              	0x0b65
+#define	mem_le_slat                             	0x0b85
+#define	mem_sp_state_start                      	0x0b95
+#define	mem_sp_state                            	0x0b95
+#define	mem_master_sp_state                     	0x0b96
+#define	mem_sp_flag                             	0x0b97
+#define	mem_master_sp_flag                      	0x0b98
+#define	mem_sp_calc                             	0x0b99
+#define	mem_sp_dh_ready                         	0x0b9a
+#define	mem_sp_localsm                          	0x0b9b
+#define	mem_pairing_auth                        	0x0b9c
+#define	mem_sp_flag_start                       	0x0b9d
+#define	mem_sp_local_key_send_count             	0x0b9d
+#define	mem_sp_remote_key_recv_count            	0x0b9e
+#define	mem_sp_remote_key_invalid               	0x0b9f
+#define	mem_sp_dhkey_invalid                    	0x0ba0
+#define	mem_gkey                                	0x0ba1
+#define	mem_le_pubkey_remote_x_256              	0x0ba5
+#define	mem_sp_pubkey_remote                    	0x0bad
+#define	mem_sp_pubkey_remote_x                  	0x0bad
+#define	mem_sp_pubkey_remote_x_end              	0x0bc5
+#define	mem_sp_pubkey_remote_y                  	0x0bc5
+#define	mem_le_pubkey_remote_y_256              	0x0bc5
+#define	mem_le_dhkey_256                        	0x0be5
+#define	mem_sp_dhkey                            	0x0bed
+#define	mem_sp_dhkey_end                        	0x0c05
+#define	mem_sp_random_local                     	0x0c05
+#define	mem_sp_random_local_end                 	0x0c15
+#define	mem_sp_random_remote                    	0x0c15
+#define	mem_sp_random_remote_end                	0x0c25
+#define	memresult                               	0x0c25
+#define	mem_sp_calc_result                      	0x0c25
+#define	memh                                    	0x0c25
+#define	memg                                    	0x0c29
+#define	memf                                    	0x0c2d
+#define	meme                                    	0x0c31
+#define	mem_sp_calc_result_high                 	0x0c35
+#define	memd                                    	0x0c35
+#define	memc                                    	0x0c39
+#define	memb                                    	0x0c3d
+#define	mema                                    	0x0c41
+#define	mem_sp_check_result                     	0x0c45
+#define	mem_sp_confirm_remote                   	0x0c55
+#define	mem_sp_prarm_stack                      	0x0c65
+#define	mem_ipc_skip_continue_proc              	0x0c75
+#define	mem_row_scanned_record                  	0x0c76
+#define	mem_col_scanned_record                  	0x0c77
+#define	mem_get_keypress_flag_record            	0x0c78
+#define	mem_usb_status                          	0x0c79
+#define	mem_usb_fifo_empty                      	0x0c7a
+#define	mem_usb_read_len                        	0x0c7b
+#define	mem_usb_txbuf                           	0x0c7d
+#define	mem_usb_txbuf1                          	0x0cbe
+#define	mem_usb_txbuf2                          	0x0cc8
+#define	mem_usb_rxbuf                           	0x0cd2
+#define	mem_usb_rxbuf_end                       	0x0d0e
+#define	mem_usb_state                           	0x0d0f
+#define	mem_bufptr                              	0x0d10
+#define	mem_remain                              	0x0d12
+#define	mem_devicedesc                          	0x0d13
+#define	mem_hidreportdesc_kb                    	0x0d27
+#define	mem_hidreportdesc_m                     	0x0d6d
+#define	mem_confdesc                            	0x0e35
+#define	mem_string0                             	0x0e7b
+#define	mem_string1                             	0x0e80
+#define	mem_string2                             	0x0e9e
+#define	mem_string3                             	0x0ebc
+#define	mem_usb_setup                           	0x0eda
+#define	mem_usb_setup_bmRequestType             	0x0eda
+#define	mem_usb_setup_bRequest                  	0x0edb
+#define	mem_usb_setup_bValue                    	0x0edc
+#define	mem_usb_setup_bValueH                   	0x0edd
+#define	mem_usb_setup_wIndex                    	0x0ede
+#define	mem_usb_setup_bLength                   	0x0ee0
+#define	mem_usb_setup_bLengthH                  	0x0ee1
+#define	mem_usb0_setup_ptr                      	0x0ee2
+#define	mem_usb0_set_report_data_ptr            	0x0ee4
+#define	mem_usb_setup_bValue_temp               	0x0ee6
+#define	mem_usb0_get_set_report                 	0x0ee8
+#define	mem_usb0_data_ready_report              	0x0ee9
+#define	mem_usb_tx_win_enable                   	0x0eea
+#define	mem_usb_tx_mac_enable                   	0x0eeb
+#define	mem_usb_zero_packet                     	0x0eec
+#define	mem_usb_ones_packet                     	0x0eee
+#define	mem_usb_two_packet                      	0x0ef0
+#define	mem_usb_idle_flag                       	0x0ef2
+#define	mem_usb_idle_rate                       	0x0ef3
+#define	mem_usb_get_protocol_flag               	0x0ef4
+#define	mem_usb_set_protocol_status             	0x0ef5
+#define	mem_usb_set_protocol_value              	0x0ef6
+#define	mem_usb0_state                          	0x0ef7
+#define	mem_usb_remote_wakeup                   	0x0ef8
+#define	mem_usb_clear_remote_wakeup             	0x0ef9
+#define	mem_usb_ep0_stall_status                	0x0efa
+#define	mem_usb_ep1_stall_status                	0x0efb
+#define	mem_usb_ep2_stall_status                	0x0efc
+#define	mem_usb_ep3_stall_status                	0x0efd
+#define	mem_dsc_info_data_pointer               	0x0efe
+#define	mem_dsc_info_len                        	0x0f00
+#define	mem_usb_ep1_data                        	0x0f01
+#define	mem_usb_ep2_data                        	0x0f02
+#define	mem_usb_tx_enable                       	0x0f03
+#define	mem_usb_device_enumeration_endflag      	0x0f04
+#define	mem_usb_wakestate_onetime_flag          	0x0f05
+#define	mem_usb_mac_wakeup_trig                 	0x0f06
+#define	mem_usb_set_high_addr_flag              	0x0f07
+#define	mem_usb_clear_halt                      	0x0f08
+#define	mem_hold_contr                          	0x0f09
+#define	mem_hold_contw                          	0x0f0b
+#define	mem_fifo_temp                           	0x0f0d
+#define	mem_max_bitsneed                        	0x0f0e
+#define	mem_bits_need00                         	0x0f12
+#define	mem_temp                                	0x0f12
+#define	mem_bits_need01                         	0x0f16
+#define	mem_temp1                               	0x0f16
+#define	mem_bits_need02                         	0x0f1a
+#define	mem_timeup                              	0x0f1a
+#define	mem_bits_need03                         	0x0f1e
+#define	mem_rega                                	0x0f1e
+#define	mem_bits_need04                         	0x0f22
+#define	mem_regb                                	0x0f22
+#define	mem_bits_need05                         	0x0f26
+#define	mem_regc                                	0x0f26
+#define	mem_bits_need06                         	0x0f2a
+#define	mem_contr                               	0x0f2a
+#define	mem_contw                               	0x0f2c
+#define	mem_bits_need07                         	0x0f2e
+#define	mem_bits_need10                         	0x0f32
+#define	mem_bits_need11                         	0x0f36
+#define	mem_bits_need12                         	0x0f3a
+#define	mem_bits_need13                         	0x0f3e
+#define	mem_bits_need14                         	0x0f42
+#define	mem_bits_need15                         	0x0f46
+#define	mem_bits_need16                         	0x0f4a
+#define	mem_bits_need17                         	0x0f4e
+#define	mem_wakup_from_power_flag               	0x0f52
+#define	mem_saved_gpio_in                       	0x0f53
+#define	mem_flash_data_address_t                	0x0f57
+#define	mem_le_data_len_temp                    	0x0f57
+#define	mem_tx_fifo_map_temp                    	0x0f57
+#define	mem_rpn_dlci                            	0x0f57
+#define	mem_event_cmd_response_content          	0x0f57
+#define	mem_le_prand                            	0x0f57
+#define	mem_AES_CMAC_k                          	0x0f57
+#define	mem_regext_index                        	0x0f57
+#define	mem_temp_block0                         	0x0f57
+#define	mem_le_data_temp                        	0x0f58
+#define	mem_temp_block1                         	0x0f58
+#define	mem_le_aes_128                          	0x0f67
+#define	mem_regext                              	0x0f67
+#define	mem_AES_CMAC_k1                         	0x0f67
+#define	mem_sum_temp                            	0x0f67
+#define	mem_temp_block2                         	0x0f67
+#define	mem_AES_CMAC_k2                         	0x0f77
+#define	mem_temp_block3                         	0x0f77
+#define	mem_AES_CMAC_temp                       	0x0f87
+#define	mem_temp_block4                         	0x0f87
+#define	mem_AES_CMAC_M_last                     	0x0f97
+#define	mem_temp_block5                         	0x0f97
+#define	mem_le_mackey                           	0x0fa7
+#define	mem_temp_block6                         	0x0fa7
+#define	mem_zcode_temp_param0                   	0x0fb7
+#define	mem_zcode_temp_param1                   	0x0fb8
+#define	mem_zcode_temp_param2                   	0x0fba
+#define	mem_tws_sync_clk                        	0x0fbc
+#define	mem_tws_connecting_phase                	0x0fc0
+#define	mem_temp_tx_power                       	0x0fc1
+#define	mem_msbc_miss                           	0x0fc2
+#define	mem_msbc_error                          	0x0fc4
+#define	mem_vp_length                           	0x0fc6
+#define	mem_ota_cmd                             	0x0fc9
+#define	mem_ota_return_result                   	0x0fca
+#define	mem_ota_update_flash_mode               	0x0fcb
+#define	mem_ota_write_index                     	0x0fcc
+#define	mem_ota_write_length                    	0x0fce
+#define	mem_ota_write_data_addr                 	0x0fd0
+#define	mem_ota_write_flash_addr                	0x0fd3
+#define	mem_ota_enable_xip_flag                 	0x0fd6
+#define	mem_xip_flash_offset_mram               	0x0fd7
+#define	mem_storage_start_addr_mram             	0x0fda
+#define	mem_ota_notify_handle_mram              	0x0fdd
+#define	mem_ota_write_handle_mram               	0x0fde
+#define	mem_ota_buck_size_mram                  	0x0fdf
+#define	mem_ota_packet_max_len_mram             	0x0fe1
+#define	mem_ota_wdt_en_flag                     	0x0fe3
+#define	mem_ota_wdt_m0_en                       	0x0fe4
+#define	mem_patch00                             	0x4000
+#define	mem_patch01                             	0x4001
+#define	mem_patch02                             	0x4002
+#define	mem_patch03                             	0x4003
+#define	mem_patch04                             	0x4004
+#define	mem_patch05                             	0x4005
+#define	mem_patch06                             	0x4006
+#define	mem_patch07                             	0x4007
+#define	mem_patch08                             	0x4008
+#define	mem_patch09                             	0x4009
+#define	mem_patch0a                             	0x400a
+#define	mem_patch0b                             	0x400b
+#define	mem_patch0c                             	0x400c
+#define	mem_patch0d                             	0x400d
+#define	mem_patch0e                             	0x400e
+#define	mem_patch0f                             	0x400f
+#define	mem_patch10                             	0x4010
+#define	mem_patch11                             	0x4011
+#define	mem_patch12                             	0x4012
+#define	mem_patch13                             	0x4013
+#define	mem_patch14                             	0x4014
+#define	mem_patch15                             	0x4015
+#define	mem_patch16                             	0x4016
+#define	mem_patch17                             	0x4017
+#define	mem_patch18                             	0x4018
+#define	mem_patch19                             	0x4019
+#define	mem_patch1a                             	0x401a
+#define	mem_patch1b                             	0x401b
+#define	mem_patch1c                             	0x401c
+#define	mem_patch1d                             	0x401d
+#define	mem_patch1e                             	0x401e
+#define	mem_patch1f                             	0x401f
+#define	mem_patch20                             	0x4020
+#define	mem_patch21                             	0x4021
+#define	mem_patch22                             	0x4022
+#define	mem_patch23                             	0x4023
+#define	mem_patch24                             	0x4024
+#define	mem_patch25                             	0x4025
+#define	mem_patch26                             	0x4026
+#define	mem_patch27                             	0x4027
+#define	mem_patch28                             	0x4028
+#define	mem_patch29                             	0x4029
+#define	mem_patch2a                             	0x402a
+#define	mem_patch2b                             	0x402b
+#define	mem_patch2c                             	0x402c
+#define	mem_patch2d                             	0x402d
+#define	mem_patch2e                             	0x402e
+#define	mem_patch2f                             	0x402f
+#define	mem_patch30                             	0x4030
+#define	mem_patch31                             	0x4031
+#define	mem_patch32                             	0x4032
+#define	mem_patch33                             	0x4033
+#define	mem_patch34                             	0x4034
+#define	mem_patch35                             	0x4035
+#define	mem_patch36                             	0x4036
+#define	mem_patch37                             	0x4037
+#define	mem_patch38                             	0x4038
+#define	mem_patch39                             	0x4039
+#define	mem_patch3a                             	0x403a
+#define	mem_patch3b                             	0x403b
+#define	mem_patch3c                             	0x403c
+#define	mem_patch3d                             	0x403d
+#define	mem_patch3e                             	0x403e
+#define	mem_patch3f                             	0x403f
+#define	mem_context                             	0x4040
+#define	mem_current_amaddr                      	0x4130
+#define	mem_lpm_mode                            	0x4131
+#define	mem_device_option                       	0x4132
+#define	mem_scan_mode                           	0x4133
+#define	mem_last_clkn                           	0x4134
+#define	mem_features                            	0x4138
+#define	mem_lap                                 	0x4140
+#define	mem_uap                                 	0x4143
+#define	mem_nap                                 	0x4144
+#define	mem_npage                               	0x4146
+#define	mem_glap                                	0x4147
+#define	mem_class                               	0x414a
+#define	mem_iscan_window                        	0x414d
+#define	mem_iscan_interval                      	0x414f
+#define	mem_pscan_window                        	0x4151
+#define	mem_pscan_interval                      	0x4153
+#define	mem_page_interval                       	0x4155
+#define	mem_page_window                         	0x4157
+#define	mem_page_to                             	0x4159
+#define	mem_inq_window                          	0x415b
+#define	mem_fcomp_mul                           	0x415d
+#define	mem_fcomp_div                           	0x415e
+#define	mem_rx_window_init                      	0x415f
+#define	mem_rx_window_sniff                     	0x4161
+#define	mem_rf_init_ptr                         	0x4163
+#define	mem_rf_init                             	0x4165
+#define	mem_last_type                           	0x4166
+#define	mem_retransmission_cnt                  	0x4167
+#define	mem_next_btclk                          	0x4169
+#define	mem_seqi                                	0x416d
+#define	mem_rf_rccal                            	0x416e
+#define	mem_handle_num                          	0x416f
+#define	mem_max_slot                            	0x4170
+#define	mem_eir_enable                          	0x4171
+#define	mem_afh_instant                         	0x4172
+#define	mem_afh_error_total                     	0x4176
+#define	mem_afh_cfg                             	0x4178
+#define	mem_afh_new_mod                         	0x4179
+#define	mem_afh_map_lo                          	0x417a
+#define	mem_afh_map_hi                          	0x417f
+#define	mem_afh_used                            	0x4184
+#define	mem_afh_index                           	0x4185
+#define	mem_afh_map_new                         	0x4187
+#define	mem_afh_map                             	0x4192
+#define	mem_afh_timer                           	0x41e2
+#define	mem_afh_classify_channel_map            	0x41e6
+#define	mem_chip_functions                      	0x41f0
+#define	mem_lpm_wake_lock                       	0x41f2
+#define	mem_lpm_interval                        	0x41f4
+#define	mem_lpm_overhead                        	0x41f6
+#define	mem_lpm_hibernate_switch                	0x41f7
+#define	mem_sniff_unint_lost                    	0x41f8
+#define	mem_ptt                                 	0x41f9
+#define	mem_sleep_counter                       	0x41fa
+#define	mem_sleep_counter_all                   	0x41fe
+#define	mem_sleep_clkn                          	0x4202
+#define	mem_sniff_rcv                           	0x4208
+#define	mem_sniff_lost                          	0x420b
+#define	mem_clks_per_lpo                        	0x420e
+#define	mem_lpm_loadcode_switch                 	0x4211
+#define	mem_lpm_memory_choose                   	0x4212
+#define	mem_lpm_mult                            	0x4213
+#define	mem_lpm_mult_timeout                    	0x4214
+#define	mem_lpm_mult_cnt                        	0x4215
+#define	mem_lpm_config                          	0x4216
+#define	mem_lpm_xtalcnt                         	0x4219
+#define	mem_lpm_buckcnt                         	0x421a
+#define	mem_lpm_ldocnt                          	0x421b
+#define	mem_lpm_isogate                         	0x421c
+#define	mem_lpm_isogate_final                   	0x421d
+#define	mem_saved_gpio                          	0x421e
+#define	mem_saved_mark                          	0x4246
+#define	mem_saved_spidctrl                      	0x424e
+#define	mem_patch_ptr                           	0x424f
+#define	mem_patch_len                           	0x4251
+#define	mem_timers                              	0x4253
+#define	mem_link_key_exists                     	0x4293
+#define	mem_link_key_eeprom_head                	0x4294
+#define	mem_link_key                            	0x4297
+#define	mem_hci_cmd                             	0x42a7
+#define	mem_hci_conn_handle                     	0x42a8
+#define	mem_hci_plap                            	0x42a9
+#define	mem_hci_puap                            	0x42ac
+#define	mem_hci_pnap                            	0x42ad
+#define	mem_uartd_rxitems_got_data              	0x42af
+#define	mem_uartd_rxitems_threshold             	0x42b0
+#define	mem_uartd_rx_timeout                    	0x42b1
+#define	mem_sco_attempt_cout                    	0x42b3
+#define	mem_tx_power                            	0x42b4
+#define	mem_sfreq_enable                        	0x42b5
+#define	mem_param_rf_setup                      	0x42b6
+#define	mem_param_pll_setup                     	0x42b8
+#define	mem_avdtp_xmem_start                    	0x42ba
+#define	mem_avdtpsignal_l2capch_ptr             	0x42ba
+#define	mem_avdtpmedia_l2capch_ptr              	0x42bc
+#define	mem_audio_allow                         	0x42be
+#define	mem_audio_state                         	0x42bf
+#define	mem_audio_src_endpoint                  	0x42c0
+#define	mem_audio_src_endpoint_state            	0x42c1
+#define	mem_a2dp_reconnct_delay_timer           	0x42c2
+#define	mem_avdtp_xmem_end                      	0x42c3
+#define	mem_get_media_type                      	0x42c3
+#define	mem_get_codec_type                      	0x42c4
+#define	mem_get_samplefreq_channelmode          	0x42c5
+#define	mem_get_blocklen_subb_allocation        	0x42c6
+#define	mem_get_min_bitpool                     	0x42c7
+#define	mem_get_max_bitpool                     	0x42c8
+#define	mem_get_r_media_type                    	0x42c9
+#define	mem_get_r_codec_type                    	0x42ca
+#define	mem_get_r_samplefreq_channelmode        	0x42cb
+#define	mem_get_r_blocklen_subb_allocation      	0x42cc
+#define	mem_get_r_min_bitpool                   	0x42cd
+#define	mem_get_r_max_bitpool                   	0x42ce
+#define	mem_conf_media_type                     	0x42cf
+#define	mem_conf_codec_type                     	0x42d0
+#define	mem_conf_samplefreq_channelmode         	0x42d1
+#define	mem_conf_blocklen_subb_allocation       	0x42d2
+#define	mem_conf_min_bitpool                    	0x42d3
+#define	mem_conf_max_bitpool                    	0x42d4
+#define	mem_avc_local_transaction_label         	0x42d5
+#define	mem_avdtp_signal                        	0x42d6
+#define	mem_avdtp_media                         	0x42d8
+#define	mem_a2dp_state                          	0x42da
+#define	mem_a2dp_seq_num                        	0x42db
+#define	mem_audio_output_setting                	0x42dd
+#define	mem_param_sco_use_cm0                   	0x42de
+#define	mem_media_in_fast_mode                  	0x42df
+#define	mem_a2dp_buffer_judge_add               	0x42e0
+#define	mem_param_a2dp_buffer_judge_add_limit   	0x42e1
+#define	mem_a2dp_buffer_judge_drop              	0x42e2
+#define	mem_param_a2dp_buffer_judge_drop_limit  	0x42e3
+#define	mem_drop_or_add_process_state           	0x42e4
+#define	mem_drop_or_add_min_receive_packet_size 	0x42e5
+#define	mem_first_buffer_cache                  	0x42e7
+#define	mem_farrow_filter_delta_uk_sign_bit     	0x42e8
+#define	mem_farrow_filter_delta_uk              	0x42e9
+#define	mem_a2dp_adjust_delta_uk_sign_bit       	0x42ed
+#define	mem_a2dp_adjust_delta_uk                	0x42ee
+#define	mem_a2dp_adjust_total_work_sample       	0x42f2
+#define	mem_a2dp_adjust_delta_bytes_sign_bit    	0x42f6
+#define	mem_a2dp_adjust_delta_bytes             	0x42f7
+#define	mem_slave_force_mute_a2dp_voice         	0x42f9
+#define	mem_slave_force_mute_a2dp_voice_cnt     	0x42fa
+#define	mem_tws_wait_sync_ok                    	0x42fb
+#define	mem_last_a2dp_seq_num                   	0x42fc
+#define	mem_param_a2dp_dac_sbc_same_buffer_flag 	0x42fe
+#define	mem_param_a2dp_dac_buffer_addr_mram_flag	0x42ff
+#define	mem_param_a2dp_dac_buffer_start_addr    	0x4300
+#define	mem_param_a2dp_dac_buffer_size          	0x4302
+#define	mem_param_a2dp_sbc_buffer_addr_mram_flag	0x4304
+#define	mem_param_a2dp_sbc_buffer_start_addr    	0x4305
+#define	mem_param_a2dp_sbc_buffer_size          	0x4307
+#define	mem_app_state                           	0x4309
+#define	mem_app_handshake_flag                  	0x430a
+#define	mem_sniff_param_interval                	0x430b
+#define	mem_sniff_param_attempt                 	0x430d
+#define	mem_sniff_param_timeout                 	0x430f
+#define	mem_cb_check_wakelock                   	0x4311
+#define	mem_cb_before_hibernate                 	0x4313
+#define	mem_cb_before_lpm                       	0x4315
+#define	mem_cb_le_process                       	0x4317
+#define	mem_cb_bt_process                       	0x4319
+#define	mem_cb_idle_process                     	0x431b
+#define	mem_cb_bb_event_process                 	0x431d
+#define	mem_cb_event_timer                      	0x431f
+#define	mem_cb_keyscan                          	0x4321
+#define	mem_device_nums                         	0x4323
+#define	mem_uart_txpin                          	0x4324
+#define	mem_uart_rxpin                          	0x4325
+#define	mem_uart_rtspin                         	0x4326
+#define	mem_uart_ctspin                         	0x4327
+#define	mem_uartb_txpin                         	0x4328
+#define	mem_uartb_rxpin                         	0x4329
+#define	mem_uartb_rtspin                        	0x432a
+#define	mem_uartb_ctspin                        	0x432b
+#define	mem_spid_sclkpin                        	0x432c
+#define	mem_spid_sdiopin                        	0x432d
+#define	mem_iic_sda_pin                         	0x432e
+#define	mem_iic_scl_pin                         	0x432f
+#define	mem_ef_base                             	0x4330
+#define	mem_eeprom_block_size                   	0x4333
+#define	mem_mram_qspi_tx_addr                   	0x4335
+#define	mem_poweron_state                       	0x4337
+#define	mem_app_connection_options              	0x4338
+#define	mem_app_disconn_reason                  	0x4339
+#define	mem_app_disconn_reason_flag             	0x433b
+#define	mem_storage_start_addr                  	0x433d
+#define	mem_local_bdaddr                        	0x4340
+#define	mem_qspi_gpio_ncs                       	0x4346
+#define	mem_qspi_gpio_sck                       	0x4347
+#define	mem_qspi_gpio_io0                       	0x4348
+#define	mem_qspi_gpio_io1                       	0x4349
+#define	mem_qspi_gpio_io2                       	0x434a
+#define	mem_qspi_gpio_io3                       	0x434b
+#define	mem_nv_data_ptr                         	0x434c
+#define	mem_nv_data_number                      	0x434e
+#define	mem_saradc_check_clk                    	0x434f
+#define	mem_saradc_flag                         	0x4350
+#define	mem_bat_read_timer                      	0x4351
+#define	mem_rf_debug_enable                     	0x4352
+#define	mem_rf_debug_rf_rx_debug_gpio           	0x4353
+#define	mem_rf_debug_rf_tx_debug_gpio           	0x4354
+#define	mem_rf_debug_rf_sync_detect_debug_gpio  	0x4355
+#define	mem_rf_debug_rf_crc_error_debug_gpio    	0x4356
+#define	mem_param_soft_dma_enable               	0x4357
+#define	mem_param_soft_dma_table_start_addr     	0x4358
+#define	mem_param_m0_respin_sco_buffer_start_addr	0x435b
+#define	mem_param_app_debug_info_timeout        	0x435e
+#define	mem_app_debug_info_timer                	0x435f
+#define	mem_public_code_svn_version_code        	0x4360
+#define	mem_public_code_time_info               	0x4362
+#define	mem_public_code_size                    	0x4366
+#define	mem_fixed_param_area_start              	0x4369
+#define	mem_fixed_param_area_reserve            	0x4369
+#define	mem_param_use_cm0_control_flag          	0x436e
+#define	mem_avctp_xmem_start                    	0x436f
+#define	mem_avctp_tx_label                      	0x436f
+#define	mem_avr_state                           	0x4370
+#define	mem_avr_l2capch_ptr                     	0x4371
+#define	mem_hp_avctp_timer                      	0x4373
+#define	mem_avctp_play_state                    	0x4374
+#define	mem_vlm_notify_enable                   	0x4375
+#define	mem_vlm_notify_label                    	0x4376
+#define	mem_avctp_xmem_end                      	0x4377
+#define	mem_cvsd_in_addr_end                    	0x4377
+#define	mem_cvsd_in_addr_ptr                    	0x4379
+#define	mem_cvsd_out_addr_start                 	0x437b
+#define	mem_cvsd_out_addr_end                   	0x437d
+#define	mem_cvsd_out_addr_ptr                   	0x437f
+#define	mem_pcm_in_addr_end                     	0x4381
+#define	mem_param_pcm_in_buffer_addr_mram_flag  	0x4383
+#define	mem_param_pcm_in_buffer_addr            	0x4384
+#define	mem_param_cvsd_out_buffer_addr_mram_flag	0x4386
+#define	mem_param_cvsd_out_buffer_addr          	0x4387
+#define	mem_param_cvsd_in_buffer_addr_mram_flag 	0x4389
+#define	mem_param_cvsd_in_buffer_addr           	0x438a
+#define	mem_param_pcm_8k_out_buffer_addr_mram_flag	0x438c
+#define	mem_param_pcm_8k_out_buffer_addr        	0x438d
+#define	mem_param_pcm_48k_out_buffer_addr_mram_flag	0x438f
+#define	mem_param_pcm_48k_out_buffer_addr       	0x4390
+#define	mem_cvsd_start_send                     	0x4392
+#define	mem_baud                                	0x4393
+#define	mem_hci_lt_rx_state                     	0x4395
+#define	mem_hid_xmem_start                      	0x4396
+#define	mem_hid_l2capch_ptr                     	0x4396
+#define	mem_hidint_l2capch_ptr                  	0x4398
+#define	mem_hid_xmem_end                        	0x439a
+#define	mem_xmem_sco_start                      	0x439a
+#define	mem_sco_asso_handle                     	0x439a
+#define	mem_sco_handle                          	0x439b
+#define	mem_sco_dsniff                          	0x439d
+#define	mem_sco_tsniff                          	0x439f
+#define	mem_sco_wsniff                          	0x43a1
+#define	mem_sco_tx_packet_type                  	0x43a2
+#define	mem_sco_rx_packet_type                  	0x43a3
+#define	mem_sco_rx_packet_len                   	0x43a4
+#define	mem_sco_tx_packet_len                   	0x43a6
+#define	mem_air_mode                            	0x43a8
+#define	mem_neogotiation_state                  	0x43a9
+#define	mem_acl_amaddr                          	0x43aa
+#define	mem_esco_amaddr                         	0x43ab
+#define	mem_esco_arq                            	0x43ac
+#define	mem_acl_arq                             	0x43ad
+#define	mem_last_type_esco                      	0x43ae
+#define	mem_last_type_acl                       	0x43af
+#define	mem_sco_poll                            	0x43b0
+#define	mem_esco_attempt                        	0x43b1
+#define	mem_esco_abnormal_attempt               	0x43b2
+#define	mem_xmem_sco_end                        	0x43b3
+#define	mem_xmem_hf_state_start                 	0x43b3
+#define	mem_hf_state                            	0x43b3
+#define	mem_hf_call_state                       	0x43b4
+#define	mem_hf_command                          	0x43b5
+#define	mem_agoption                            	0x43b6
+#define	mem_AG_indicator_map                    	0x43b8
+#define	mem_AG_indicator                        	0x43bf
+#define	mem_telephone_dialing_state             	0x43c6
+#define	mem_telephone_dialing_timer             	0x43c7
+#define	mem_xmem_hf_state_end                   	0x43c8
+#define	mem_hf_vlm_speaker                      	0x43c8
+#define	mem_music_vlm_speaker                   	0x43c9
+#define	mem_hf_vlm_mic                          	0x43ca
+#define	mem_at_payload_ptr                      	0x43cb
+#define	mem_at_command_ptr                      	0x43cd
+#define	mem_at_rfcomm_data_ptr                  	0x43cf
+#define	mem_UI_HF_brsf_feature                  	0x43d1
+#define	mem_codec_type                          	0x43d4
+#define	mem_codec_msbc_support                  	0x43d5
+#define	mem_cb_hfp_result_code                  	0x43d6
+#define	mem_hfp_battery_state                   	0x43d8
+#define	mem_esco_test                           	0x43d9
+#define	mem_sco_transaction_enable              	0x43da
+#define	mem_local_sco_in_process_flag           	0x43db
+#define	mem_ipc_mcu_phase                       	0x43dc
+#define	mem_ipc_mcu_state                       	0x43dd
+#define	mem_ipc_enable                          	0x43de
+#define	mem_ipc_le_data_len                     	0x43df
+#define	mem_ipc_le_data_att_handle              	0x43e0
+#define	mem_ipc_tx_data_len                     	0x43e2
+#define	mem_ipc_tx_data_ptr                     	0x43e3
+#define	mem_ipc_loss_packet                     	0x43e5
+#define	mem_temp_for_addr                       	0x43e7
+#define	mem_ipc_test_buff                       	0x43ea
+#define	mem_param_ipc_mem_block_start_addr      	0x43f4
+#define	mem_param_ipc_to_bt_buf_start_addr      	0x43f4
+#define	mem_param_ipc_to_bt_buf_end_addr        	0x43f7
+#define	mem_param_ipc_to_bt_wptr_addr           	0x43fa
+#define	mem_param_ipc_to_bt_rptr_addr           	0x43fd
+#define	mem_param_ipc_to_m0_wptr_addr           	0x4400
+#define	mem_param_ipc_to_m0_rptr_addr           	0x4403
+#define	mem_param_ipc_to_m0_buf_start_addr      	0x4406
+#define	mem_param_ipc_mem_block_end_addr        	0x4409
+#define	mem_param_ipc_to_m0_buf_end_addr        	0x4409
+#define	mem_param_debug_log_func_enable         	0x440c
+#define	mem_debug_log_temp_point                	0x440d
+#define	mem_param_debug_log_mem_block_start_addr	0x4411
+#define	mem_param_debug_log_initial_flag_addr   	0x4411
+#define	mem_param_debug_log_lock_flag_cm0_addr  	0x4414
+#define	mem_param_debug_log_lock_flag_respin_addr	0x4417
+#define	mem_param_debug_log_lock_victim_addr    	0x441a
+#define	mem_param_debug_log_read_index_addr     	0x441d
+#define	mem_param_debug_log_write_index_addr    	0x4420
+#define	mem_param_debug_log_buffer_start_addr   	0x4423
+#define	mem_param_debug_log_mem_block_end_addr  	0x4426
+#define	mem_param_debug_log_buffer_end_addr     	0x4426
+#define	mem_wake_flag                           	0x4429
+#define	mem_m0_lpm_flag                         	0x442a
+#define	mem_l2cap_xmem_start                    	0x442c
+#define	mem_l2cap_tx_multi_offset               	0x442c
+#define	mem_l2cap_pending_info                  	0x442e
+#define	mem_l2cap_pending_id0                   	0x442e
+#define	mem_l2cap_pending_delay_time0           	0x442f
+#define	mem_l2cap_pending_ptr0                  	0x4433
+#define	mem_l2cap_pending_id1                   	0x4435
+#define	mem_l2cap_pending_delay_time1           	0x4436
+#define	mem_l2cap_pending_ptr1                  	0x443a
+#define	mem_l2cap_pending_id2                   	0x443c
+#define	mem_l2cap_pending_delay_time2           	0x443d
+#define	mem_l2cap_pending_ptr2                  	0x4441
+#define	mem_l2cap_pending_count                 	0x4443
+#define	mem_l2cap_active_ch_count               	0x4444
+#define	mem_l2cap_ch_info                       	0x4445
+#define	mem_l2cap_ch_psm0                       	0x4445
+#define	mem_l2cap_ch_state0                     	0x4446
+#define	mem_l2cap_local_cid0                    	0x4447
+#define	mem_l2cap_remote_cid0                   	0x4449
+#define	mem_l2cap_ch_psm1                       	0x444b
+#define	mem_l2cap_ch_state1                     	0x444c
+#define	mem_l2cap_local_cid1                    	0x444d
+#define	mem_l2cap_remote_cid1                   	0x444f
+#define	mem_l2cap_ch_psm2                       	0x4451
+#define	mem_l2cap_ch_state2                     	0x4452
+#define	mem_l2cap_local_cid2                    	0x4453
+#define	mem_l2cap_remote_cid2                   	0x4455
+#define	mem_l2cap_ch_psm3                       	0x4457
+#define	mem_l2cap_ch_state3                     	0x4458
+#define	mem_l2cap_local_cid3                    	0x4459
+#define	mem_l2cap_remote_cid3                   	0x445b
+#define	mem_l2cap_ch_psm4                       	0x445d
+#define	mem_l2cap_ch_state4                     	0x445e
+#define	mem_l2cap_local_cid4                    	0x445f
+#define	mem_l2cap_remote_cid4                   	0x4461
+#define	mem_l2cap_ch_psm5                       	0x4463
+#define	mem_l2cap_ch_state5                     	0x4464
+#define	mem_l2cap_local_cid5                    	0x4465
+#define	mem_l2cap_remote_cid5                   	0x4467
+#define	mem_l2cap_ch_psm6                       	0x4469
+#define	mem_l2cap_ch_state6                     	0x446a
+#define	mem_l2cap_local_cid6                    	0x446b
+#define	mem_l2cap_remote_cid6                   	0x446d
+#define	mem_l2cap_ch_psm7                       	0x446f
+#define	mem_l2cap_ch_state7                     	0x4470
+#define	mem_l2cap_local_cid7                    	0x4471
+#define	mem_l2cap_remote_cid7                   	0x4473
+#define	mem_l2cap_prepare_confreq_count         	0x4475
+#define	mem_l2cap_channel_disconnect_timer      	0x4476
+#define	mem_sdp_state                           	0x4477
+#define	mem_ML2CAP_comm_id                      	0x4478
+#define	mem_used_map                            	0x4479
+#define	mem_tx_fifo0                            	0x447a
+#define	mem_tx_fifo0_map                        	0x447a
+#define	mem_tx_fifo0_ptr                        	0x447b
+#define	mem_tx_fifo1                            	0x447d
+#define	mem_tx_fifo1_map                        	0x447d
+#define	mem_tx_fifo1_ptr                        	0x447e
+#define	mem_tx_fifo2                            	0x4480
+#define	mem_tx_fifo2_map                        	0x4480
+#define	mem_tx_fifo2_ptr                        	0x4481
+#define	mem_tx_fifo3                            	0x4483
+#define	mem_tx_fifo3_map                        	0x4483
+#define	mem_tx_fifo3_ptr                        	0x4484
+#define	mem_tx_fifo_end                         	0x4486
+#define	mem_alloc_block                         	0x4486
+#define	mem_alloc_header                        	0x4486
+#define	mem_alloc_rptr                          	0x4488
+#define	mem_alloc_wptr                          	0x448a
+#define	mem_alloc_end                           	0x448c
+#define	mem_alloc_cur_len                       	0x448e
+#define	mem_alloc_block_start                   	0x448f
+#define	mem_media_release                       	0x449e
+#define	mem_media_block                         	0x449f
+#define	mem_media_header                        	0x449f
+#define	mem_media_rptr                          	0x44a1
+#define	mem_media_wptr                          	0x44a3
+#define	mem_media_end                           	0x44a5
+#define	mem_media_cur_len                       	0x44a7
+#define	mem_media_block_start                   	0x44a8
+#define	mem_lcp_block                           	0x44b7
+#define	mem_lcp_header                          	0x44b7
+#define	mem_lcp_rptr                            	0x44b9
+#define	mem_lcp_wptr                            	0x44bb
+#define	mem_lcp_end                             	0x44bd
+#define	mem_lcp_cur_len                         	0x44bf
+#define	mem_lcp_block_start                     	0x44c0
+#define	mem_l2cap_flow_ctrl_flag                	0x44cf
+#define	mem_l2cap_pending_item                  	0x44d0
+#define	mem_l2cap_rxbuff_len_error              	0x44d1
+#define	mem_l2cap_xmem_end                      	0x44d2
+#define	mem_l2cap_rx_max_lenth                  	0x44d2
+#define	mem_l2cap_rx_malloc_num                 	0x44d4
+#define	mem_le_dsniff                           	0x44d5
+#define	mem_le_conn_interval                    	0x44d7
+#define	mem_le_scan_enable                      	0x44d9
+#define	mem_le_scan_interval                    	0x44da
+#define	mem_le_scan_window                      	0x44dc
+#define	mem_le_adv_enable                       	0x44de
+#define	mem_le_adv_data_len                     	0x44df
+#define	mem_le_adv_data                         	0x44e0
+#define	mem_le_scan_data_len                    	0x44ff
+#define	mem_le_scan_data                        	0x4500
+#define	mem_le_interal_min                      	0x451f
+#define	mem_le_interal_max                      	0x4521
+#define	mem_le_latency                          	0x4523
+#define	mem_le_timeout                          	0x4525
+#define	mem_le_ch_mapped                        	0x4527
+#define	mem_le_new_map                          	0x4528
+#define	mem_le_new_param                        	0x452d
+#define	mem_le_new_transmitwindowsize           	0x452d
+#define	mem_le_new_transmitwindowoffset         	0x452e
+#define	mem_le_new_conninterval                 	0x4530
+#define	mem_le_new_connslavelatency             	0x4532
+#define	mem_le_new_connsupervisiontimeout       	0x4534
+#define	mem_le_txheader                         	0x4536
+#define	mem_le_txlen                            	0x4537
+#define	mem_le_txpayload                        	0x4538
+#define	mem_le_txcid                            	0x453a
+#define	mem_le_l2cap                            	0x453c
+#define	mem_le_l2cap_response                   	0x453d
+#define	mem_le_txbdy                            	0x453e
+#define	mem_le_pcnt_tx                          	0x455d
+#define	mem_le_pcnt_rx                          	0x4562
+#define	mem_le_last_mic                         	0x4567
+#define	mem_le_ivm                              	0x456b
+#define	mem_le_ivs                              	0x456f
+#define	mem_le_ltk                              	0x4573
+#define	mem_ltk_exists                          	0x4583
+#define	mem_le_rconfirm                         	0x4584
+#define	mem_le_srand                            	0x4594
+#define	mem_le_iat                              	0x45a4
+#define	mem_le_rat                              	0x45a5
+#define	mem_le_preq                             	0x45a6
+#define	mem_le_preq_iocap                       	0x45a7
+#define	mem_le_preq_oob                         	0x45a8
+#define	mem_le_preq_auth                        	0x45a9
+#define	mem_le_preq_max_keysize                 	0x45aa
+#define	mem_le_preq_init_key_distribution       	0x45ab
+#define	mem_le_preq_resp_key_distribution       	0x45ac
+#define	mem_le_pres                             	0x45ad
+#define	mem_le_pres_iocap                       	0x45ae
+#define	mem_le_pres_oob                         	0x45af
+#define	mem_le_pres_auth                        	0x45b0
+#define	mem_le_pres_max_keysize                 	0x45b1
+#define	mem_le_pres_init_key_distribution       	0x45b2
+#define	mem_le_pres_resp_key_distribution       	0x45b3
+#define	mem_le_pairing_state                    	0x45b4
+#define	mem_le_enc_state                        	0x45b5
+#define	mem_le_pairing_mode                     	0x45b6
+#define	mem_le_tk                               	0x45b7
+#define	mem_le_ediv                             	0x45bb
+#define	mem_le_rand                             	0x45bd
+#define	mem_le_irk                              	0x45c5
+#define	mem_le_fixed_passkey_flag               	0x45d5
+#define	mem_le_secure_connect_enable            	0x45d6
+#define	mem_le_secure_connect_flag              	0x45d7
+#define	mem_le_sc_calc                          	0x45d8
+#define	mem_le_secure_connect_state             	0x45d9
+#define	mem_le_sc_confirm_gkey_flag             	0x45da
+#define	mem_le_sc_local_key_invalid             	0x45db
+#define	mem_le_pairing_handle                   	0x45dc
+#define	mem_le_search_handle_start              	0x45de
+#define	mem_le_search_handle_end                	0x45e0
+#define	mem_le_att_offset                       	0x45e2
+#define	mem_le_search_att_type_length           	0x45e2
+#define	mem_le_search_att_type                  	0x45e3
+#define	mem_le_notify_handle                    	0x45f3
+#define	mem_le_search_uuid_length               	0x45f5
+#define	mem_le_search_uuid                      	0x45f6
+#define	mem_le_handle_data_len                  	0x4606
+#define	mem_le_handle_data                      	0x4607
+#define	mem_le_adv_param                        	0x4617
+#define	mem_le_adv_interval_min                 	0x4617
+#define	mem_le_adv_interval_max                 	0x4619
+#define	mem_le_adv_type                         	0x461b
+#define	mem_le_adv_own_addr_type                	0x461c
+#define	mem_le_adv_direct_addr_type             	0x461d
+#define	mem_le_adv_direct_addr                  	0x461e
+#define	mem_le_adv_channel_map                  	0x4624
+#define	mem_le_adv_filter_policy                	0x4625
+#define	mem_le_conn_param                       	0x4626
+#define	mem_le_conn_peer_addr_type              	0x4626
+#define	mem_le_conn_peer_addr                   	0x4627
+#define	mem_le_conn_own_addr_type               	0x462d
+#define	mem_le_conn_interval_min                	0x462e
+#define	mem_le_conn_interval_max                	0x4630
+#define	mem_le_conn_latency                     	0x4632
+#define	mem_le_conn_superto                     	0x4634
+#define	mem_le_scan_params                      	0x4636
+#define	mem_le_scan_type                        	0x4636
+#define	mem_le_scan_own_addr_type               	0x4637
+#define	mem_le_scan_filter_policy               	0x4638
+#define	mem_le_lap                              	0x4639
+#define	mem_le_uap                              	0x463c
+#define	mem_le_nap                              	0x463d
+#define	mem_le_xtype_fifo                       	0x463f
+#define	mem_le_transmit_window                  	0x4644
+#define	mem_le_connection_updata_param          	0x4648
+#define	mem_le_l2cap_size                       	0x4658
+#define	mem_le_packet_len_recved                	0x465a
+#define	mem_le_tx_buff_used                     	0x465b
+#define	mem_le_tx_ptr0                          	0x465c
+#define	mem_le_tx_ptr1                          	0x465e
+#define	mem_le_tx_ptr2                          	0x4660
+#define	mem_le_tx_ptr3                          	0x4662
+#define	mem_ui_le_uuid_table                    	0x4664
+#define	mem_le_cur_attlist_start_ptr            	0x4666
+#define	mem_le_cur_handle_start                 	0x4668
+#define	mem_le_cur_handle_end                   	0x466a
+#define	mem_le_cur_uuid_lenth                   	0x466c
+#define	mem_le_cur_uuid                         	0x466d
+#define	mem_notify_handle_pool                  	0x467d
+#define	mem_le_curr_att_len                     	0x4681
+#define	mem_le_signaling_identifier             	0x4682
+#define	mem_le_more_data                        	0x4683
+#define	mem_lmp_version                         	0x4684
+#define	mem_lmp_subversion                      	0x4687
+#define	mem_local_name_length                   	0x4689
+#define	mem_local_name                          	0x468a
+#define	mem_local_name2                         	0x468d
+#define	mem_local_name_end                      	0x46cd
+#define	mem_unsniff2sniff_timer                 	0x46ce
+#define	mem_switch_flag                         	0x46cf
+#define	mem_role_switch_flag                    	0x46d0
+#define	mem_eeprom_ota_base_addr                	0x46d1
+#define	mem_rfc_xmem_start                      	0x46d3
+#define	mem_pn_dlci                             	0x46d3
+#define	mem_pn_max_frame_size                   	0x46d4
+#define	memFCStemp1                             	0x46d6
+#define	memFCStemp2                             	0x46d7
+#define	memFCStemp3                             	0x46d8
+#define	mem_rfcomm_initiator                    	0x46d9
+#define	mem_remote_spp_channel                  	0x46da
+#define	mem_HIUfcs_SPP                          	0x46db
+#define	mem_HIUfcs_SPP_WCredits                 	0x46dc
+#define	mem_remote_credits                      	0x46dd
+#define	mem_credit_given                        	0x46df
+#define	mem_ms_channel                          	0x46e0
+#define	mem_current_packet_length               	0x46e1
+#define	mem_profile_channel                     	0x46e3
+#define	mem_rfc_l2capch_ptr                     	0x46e4
+#define	mem_rfc_server_state                    	0x46e6
+#define	mem_rfc_xmem_end                        	0x46e8
+#define	mem_ui_uuid_table                       	0x46e8
+#define	mem_all_uuid_16bits                     	0x46ea
+#define	mem_all_uuid_128bits                    	0x4700
+#define	mem_sdp_l2capch_ptr                     	0x4722
+#define	mem_sp_local_key_invalid                	0x4724
+#define	mem_le_private_key_256                  	0x4725
+#define	mem_le_pubkey_local_x_256               	0x4745
+#define	mem_le_pubkey_local_y_256               	0x4765
+#define	mem_sp_private_key                      	0x4785
+#define	mem_sp_pubkey_local                     	0x479d
+#define	mem_sp_pubkey_local_x                   	0x479d
+#define	mem_sp_pubkey_local_x_end               	0x47b5
+#define	mem_sp_pubkey_local_y                   	0x47b5
+#define	mem_ssp_enable                          	0x47cd
+#define	mem_sp_iocap_local                      	0x47ce
+#define	mem_ssp_mode_flag                       	0x47d1
+#define	mem_spp_reject_justwork_flag            	0x47d2
+#define	mem_sp_iocap_remote                     	0x47d3
+#define	mem_flag_mode_ssp_pin                   	0x47d6
+#define	mem_authentication_passkey_times        	0x47d7
+#define	mem_passkey_1bit                        	0x47d8
+#define	mem_flag_pairing_state                  	0x47d9
+#define	mem_ipc_lock_bt                         	0x47da
+#define	mem_ipc_lock_c51                        	0x47db
+#define	mem_ipc_fifo_bt2c51                     	0x47dc
+#define	mem_ipc_fifo_c512bt                     	0x47e1
+#define	mem_ui_timer_last_btclk                 	0x47e6
+#define	mem_ui_state_map                        	0x47ea
+#define	mem_discovery_timer_count               	0x47ec
+#define	mem_discovery_timeout                   	0x47ee
+#define	mem_ui_profile_supported                	0x47f0
+#define	mem_pin_length                          	0x47f1
+#define	mem_pin                                 	0x47f2
+#define	mem_keyscan_switch                      	0x4802
+#define	mem_kscan_row_nums                      	0x4803
+#define	mem_kscan_col_nums                      	0x4804
+#define	mem_row_scanned                         	0x4805
+#define	mem_col_scanned                         	0x4806
+#define	mem_row_cnt                             	0x4807
+#define	mem_get_keypress_flag                   	0x4808
+#define	mem_kscan_row_gpio_pin                  	0x4809
+#define	mem_kscan_col_gpio_pin                  	0x4829
+#define	mem_button_gpio1                        	0x4849
+#define	mem_button_last_state1                  	0x484a
+#define	mem_button_timer1                       	0x484b
+#define	mem_button_press_count1                 	0x484c
+#define	mem_button_timeout1                     	0x484d
+#define	mem_button_press_timeout1               	0x484e
+#define	mem_button_down_cb1                     	0x484f
+#define	mem_button_up_cb1                       	0x4851
+#define	mem_button_longpress_cb1                	0x4853
+#define	mem_button_long_release_cb1             	0x4855
+#define	mem_button_gpio2                        	0x4857
+#define	mem_button_last_state2                  	0x4858
+#define	mem_button_timer2                       	0x4859
+#define	mem_button_press_count2                 	0x485a
+#define	mem_button_timeout2                     	0x485b
+#define	mem_button_press_timeout2               	0x485c
+#define	mem_button_down_cb2                     	0x485d
+#define	mem_button_up_cb2                       	0x485f
+#define	mem_button_longpress_cb2                	0x4861
+#define	mem_button_long_release_cb2             	0x4863
+#define	mem_led_gpio1                           	0x4865
+#define	mem_led_state1                          	0x4866
+#define	mem_led_on_timer1                       	0x4867
+#define	mem_led_off_timer1                      	0x4868
+#define	mem_led_repeat1                         	0x4869
+#define	mem_led_timer1                          	0x486a
+#define	mem_led_gpio2                           	0x486b
+#define	mem_led_state2                          	0x486c
+#define	mem_led_on_timer2                       	0x486d
+#define	mem_led_off_timer2                      	0x486e
+#define	mem_led_repeat2                         	0x486f
+#define	mem_led_timer2                          	0x4870
+#define	mem_uppersm_xmem_start                  	0x4871
+#define	mem_major_uppersm                       	0x4871
+#define	mem_sub_uppersm                         	0x4872
+#define	mem_uppersm_list                        	0x4873
+#define	mem_uppersm_disl2capch_index            	0x4878
+#define	mem_uppersm_xmem_end                    	0x4879
+#define	mem_m0_lock_qspi                        	0x4879
+#define	mem_m0_pause_state                      	0x487a
+#define	mem_xip_flash_offset                    	0x487b
+#define	mem_xip_option                          	0x487e
+#define	mem_xip_flash_read_cmd                  	0x4880
+#define	mem_zcode_current_number                	0x4881
+#define	mem_zcode_buff                          	0x4882
+#define	mem_tws_bdaddr                          	0x4884
+#define	mem_tws_lap                             	0x4884
+#define	mem_tws_uap                             	0x4887
+#define	mem_tws_nap                             	0x4888
+#define	mem_hsp_role                            	0x488a
+#define	mem_auto_hsp_role                       	0x488b
+#define	mem_tws_allow_pairing_rssi_limit        	0x488c
+#define	mem_tws_role                            	0x488d
+#define	mem_tws_state                           	0x488e
+#define	mem_tws_last_rcv_phone_packet_crc_fail  	0x488f
+#define	mem_tws_rcv_ack                         	0x4890
+#define	mem_tws_local_rcv_packet                	0x4891
+#define	mem_tws_last_send_ack                   	0x4892
+#define	mem_tws_timeout_timer                   	0x4893
+#define	mem_param_tws_timeout_master            	0x4894
+#define	mem_param_tws_timeout_slave             	0x4895
+#define	mem_tws_observe_wait_connect_timeout_timer	0x4896
+#define	mem_param_tws_observe_wait_connect_timeout_no_connect	0x4897
+#define	mem_param_tws_observe_wait_connect_timeout_error_disconnect	0x4898
+#define	mem_tws_slave_loss_link_listen_master_timeout_timer	0x4899
+#define	mem_param_tws_slave_loss_link_listen_master_timeout	0x489a
+#define	mem_tws_poll_slave_timer                	0x489b
+#define	mem_param_tws_poll_slave                	0x489c
+#define	mem_tws_master_wait_slave_timeout_timer 	0x489d
+#define	mem_param_tws_master_wait_slave_timeout 	0x489e
+#define	mem_tws_m2s_ack_send_timeout_count      	0x489f
+#define	mem_param_tws_m2s_ack_send_timeout      	0x48a0
+#define	mem_tws_poll_null_ack_interval          	0x48a1
+#define	mem_tws_poll_null_ack_interval_count    	0x48a2
+#define	mem_loss_match                          	0x48a3
+#define	mem_count_rcv_adv                       	0x48a5
+#define	mem_tws_adv_match                       	0x48a6
+#define	mem_tws_ack                             	0x48a7
+#define	mem_tws_count_poll                      	0x48a8
+#define	mem_tws_role_switch_in_process          	0x48aa
+#define	mem_tws_slave_wait_master_first_polling_flag	0x48ab
+#define	mem_tws_profile_connected               	0x48ac
+#define	mem_tws_profile_disconnected_after_connected	0x48ad
+#define	mem_tws_adv_count                       	0x48ae
+#define	mem_tws_adv_try_num                     	0x48af
+#define	mem_tws_snd_op                          	0x48b0
+#define	mem_tws_snd_op_nextseq                  	0x48b1
+#define	mem_tws_snd_cur_arq                     	0x48b2
+#define	mem_tws_rcv_op                          	0x48b3
+#define	mem_tws_rcv_op_nextseq                  	0x48b4
+#define	mem_tws_rcv_old_seq                     	0x48b5
+#define	mem_tws_cmd_fifo                        	0x48b6
+#define	mem_tws_no_connect_cmd_trans_limit      	0x48bb
+#define	mem_tws_no_connect_cmd                  	0x48bc
+#define	mem_tws_is_slave_send                   	0x48bd
+#define	mem_tws_is_need_send_header             	0x48be
+#define	mem_tws_remote_version                  	0x48bf
+#define	mem_param_tws_tx_power                  	0x48c1
+#define	mem_le_tws_scan_interval_min            	0x48c2
+#define	mem_le_tws_scan_interval_max            	0x48c4
+#define	mem_le_tws_scan_interval                	0x48c6
+#define	mem_le_tws_scan_window                  	0x48c8
+#define	mem_le_tws_adv_interval                 	0x48ca
+#define	mem_param_le_tws_adv_interval_normal    	0x48cc
+#define	mem_param_le_tws_adv_interval_master_listen	0x48ce
+#define	mem_tws_first_packet_dynamic_buffer     	0x48d0
+#define	mem_tws_first_packet_dynamic_buffer_status	0x48d0
+#define	mem_tws_first_packet_dynamic_buffer_local_bdaddr	0x48d2
+#define	mem_tws_first_packet_dynamic_buffer_paired_bdaddr	0x48d8
+#define	mem_tws_first_packet_dynamic_buffer_reserved	0x48de
+#define	mem_tws_allow_pairing                   	0x48ee
+#define	mem_tws_last_paired_lap                 	0x48ef
+#define	mem_tws_rf_start_anchor                 	0x48f5
+#define	mem_tws_rf_rcv_window_size              	0x48f7
+#define	mem_tws_rf_packet_rx_window_size        	0x48f9
+#define	mem_tws_rf_slave_send_full_packet_sleep_time	0x48fb
+#define	mem_tws_rf_master_check_raw_id_time     	0x48fd
+#define	mem_temp_rf_freq_index                  	0x48ff
+#define	mem_temp_rf_switch_flag                 	0x4900
+#define	mem_tws_buffer_master_switch            	0x4901
+#define	mem_tws_buffer_master_switch_reason     	0x4901
+#define	mem_process_sync_buffer                 	0x4902
+#define	mem_process_a2dp_seq_num                	0x4902
+#define	mem_process_clk                         	0x4904
+#define	mem_process_clkrt                       	0x4908
+#define	mem_process_used_buffer_size            	0x490a
+#define	mem_process_audio_vol                   	0x490c
+#define	mem_process_sync_receive_buffer         	0x490d
+#define	mem_process_receive_a2dp_seq_num        	0x490d
+#define	mem_process_receive_clk                 	0x490f
+#define	mem_process_receive_clkrt               	0x4913
+#define	mem_process_receive_used_buffer_size    	0x4915
+#define	mem_process_receive_audio_vol           	0x4917
+#define	mem_enable_hfp_start_sync               	0x4918
+#define	mem_hfp_start_sync_buffer               	0x4919
+#define	mem_hfp_start_sync_clk                  	0x4919
+#define	mem_param_tws_send_channel_array        	0x491d
+#define	mem_tws_last_send_channel_index         	0x4921
+#define	mem_save_state                          	0x4922
+#define	mem_white_list                          	0x4923
+#define	mem_remote_rx_max_octets                	0x4953
+#define	mem_remote_rx_max_time                  	0x4955
+#define	mem_remote_tx_max_octets                	0x4957
+#define	mem_remote_tx_max_time                  	0x4959
+#define	mem_local_rx_max_octets                 	0x495b
+#define	mem_local_rx_max_time                   	0x495d
+#define	mem_local_tx_max_octets                 	0x495f
+#define	mem_local_tx_max_time                   	0x4961
+#define	mem_remote_reserve                      	0x4963
+#define	mem_sequence_number_rx                  	0x49f3
+#define	mem_sequence_number_tx                  	0x49f4
+#define	mem_msbc_pcm_in_wptr                    	0x49f5
+#define	mem_msbc_pcm_in_rptr                    	0x49f7
+#define	mem_msbc_out_wptr                       	0x49f9
+#define	mem_msbc_out_rptr                       	0x49fb
+#define	mem_msbc_in_wptr                        	0x49fd
+#define	mem_msbc_in_rptr                        	0x49ff
+#define	mem_msbc_pcm_out_saddr                  	0x4a01
+#define	mem_msbc_pcm_out_wptr                   	0x4a03
+#define	mem_msbc_pcm_out_rptr                   	0x4a05
+#define	mem_msbc_packet_len                     	0x4a07
+#define	mem_msbc_pcm_packet_len                 	0x4a09
+#define	mem_msbc_enc_dec_bt_lock                	0x4a0b
+#define	mem_msbc_enc_dec_m0_lock                	0x4a0c
+#define	mem_msbc_adc_start_send                 	0x4a0d
+#define	mem_vp_language                         	0x4a0e
+#define	mem_vp_play_phonenumber                 	0x4a0f
+#define	mem_vp_mram_flag                        	0x4a10
+#define	mem_vp_addr_temp                        	0x4a11
+#define	mem_vp_enable                           	0x4a14
+#define	mem_vp_dac_addr                         	0x4a15
+#define	mem_vp_dac_half                         	0x4a17
+#define	mem_vp_play_block_num                   	0x4a19
+#define	mem_vp_offset                           	0x4a1a
+#define	mem_vp_start_addr                       	0x4a1c
+#define	mem_vp_end_addr                         	0x4a1f
+#define	mem_vp_play_by_cmd                      	0x4a22
+#define	mem_vp_play_addr_offset_temp            	0x4a23
+#define	mem_param_tishi_start_addr              	0x4a24
+#define	mem_nv_le_data                          	0x4a26
+#define	mem_vp_addr                             	0x4a26
+#define	mem_vp_end                              	0x4ab6
+#define	mem_ota_notify_handle                   	0x4ab6
+#define	mem_ota_write_handle                    	0x4ab7
+#define	mem_ota_version                         	0x4ab8
+#define	mem_ota_buck_size                       	0x4aba
+#define	mem_ota_packet_max_len                  	0x4abc
+#define	mem_ota_work_mode                       	0x4abe
+#define	mem_adc_start_addr                      	0x4abf
+#define	mem_adc_buf_size                        	0x4ac1
+#define	mem_dac_start_addr                      	0x4ac3
+#define	mem_dac_buf_size                        	0x4ac5
+#define	mem_dac_clk                             	0x4ac7
+#define	mem_dac_mram_flag                       	0x4ac8
+#define	mem_adc_mram_flag                       	0x4ac9
+#define	mem_mono_flag                           	0x4aca
+#define	mem_l_din_sel                           	0x4acb
+#define	mem_r_din_sel                           	0x4acc
+#define	mem_eq_flag                             	0x4acd
+#define	mem_acl_credits                         	0x4ace
+#define	mem_allow_switch                        	0x4ad0
+#define	mem_hci_acl_queue_start                 	0x4ad1
+#define	mem_hci_wake_clk                        	0x4ad5
+#define	mem_nv_data                             	0x4ace
+#define	mem_nv_data0                            	0x4ace
+#define	mem_nv_data1                            	0x4ae6
+#define	mem_nv_data2                            	0x4afe
+#define	mem_nv_data3                            	0x4b16
+#define	mem_nv_data4                            	0x4b2e
+#define	mem_battery_vol                         	0x4b46
+#define	mem_coef_base_addr                      	0x4b47
+#define	mem_ipc_tx_buf                          	0x4b4a
+#define	mem_le_att_list                         	0x4bae
+#define	mem_tws_fac_adv_name                    	0x4bb0
+#define	mem_param_bt_tx_power                   	0x4bcc
+#define	mem_leadv_action                        	0x4bcd
+#define	mem_hibernate_flag                      	0x4bce
+#define	mem_lpm_write_temp_adc_low              	0x4bcf
+#define	mem_lpm_write_temp_adc_high             	0x4bd3
+#define	mem_lpm_write_temp_charge_control       	0x4bd7
+#define	mem_lpm_write_temp_charge_wakeup_low_active	0x4bdb
+#define	mem_lpm_write_temp_charge_wakeup_high_active	0x4bdd
+#define	mem_efuse_dc_offset                     	0x4bdf
+#define	mem_efuse_dc_offset_l                   	0x4bdf
+#define	mem_efuse_dc_offset_r                   	0x4be1
+#define	mem_efuse_dc_offset_f6                  	0x4be3
+#define	mem_efuse_dc_offset_l_f6                	0x4be3
+#define	mem_efuse_dc_offset_r_f6                	0x4be5
+#define	mem_efuse_adc_offset                    	0x4be7
+#define	mem_0_5_adc_io_data                     	0x4be7
+#define	mem_3v_adc_hvin_data                    	0x4be9
+#define	mem_1v_adc_io_data                      	0x4beb
+#define	mem_5v_adc_hvin_data                    	0x4bed
+#define	mem_xlmp_conn_state                     	0x4bef
+#define	mem_xlmp_clock_offset_valid             	0x4bf0
+#define	mem_rf_power_fix                        	0x4bf1
+#define	mem_ipc_rx_ptr                          	0x4bf2
+#define	mem_module_le_rx_data_len               	0x4bf5
+#define	mem_module_le_rx_data_address           	0x4bf6
+#define	mem_module_le_rx_data_handle            	0x4bf8
+#define	mem_module_data_write_handle            	0x4bfa
+#define	mem_module_data_write_handle2           	0x4bfc
+#define	mem_module_flag                         	0x4bfe
+#define	mem_module_hci_notify_len               	0x4bff
+#define	mem_module_hci_notify_handle            	0x4c00
+#define	mem_module_hci_nofiy_addr               	0x4c02
+#define	mem_last_transmite_clock                	0x4c04
+#define	mem_module_le_att_list                  	0x4c08
+#define	mem_module_le_att_list_end              	0x4c09
+#define	mem_le_disconnect_reason                	0x4c09
+#define	mem_mesh_le_features                    	0x4c0a
+#define	mem_mesh_le_version                     	0x4c12
+#define	mem_mesh_le_version_exchange_times      	0x4c17
+#define	mem_mesh_hci_opcode_ocf                 	0x4c18
+#define	mem_mesh_hci_opcode_ogf                 	0x4c1a
+#define	mem_mesh_hci_cmd_len                    	0x4c1b
+#define	mem_mesh_event_mask                     	0x4c1c
+#define	mem_mesh_read_local_version_info        	0x4c24
+#define	mem_mesh_read_local_version_info_hci_version	0x4c24
+#define	mem_mesh_read_local_version_info_hci_revision	0x4c25
+#define	mem_mesh_read_local_version_info_lmp_version	0x4c27
+#define	mem_mesh_read_local_version_info_manufacturer	0x4c28
+#define	mem_mesh_read_local_version_info_lmp_subversion	0x4c2a
+#define	mem_mesh_read_local_support_command     	0x4c2c
+#define	mem_mesh_le_event_mask                  	0x4c6c
+#define	mem_mesh_le_public_address              	0x4c74
+#define	mem_mesh_le_random_address              	0x4c7a
+#define	mem_mesh_vendor_tx_flag                 	0x4c80
+#define	mem_mesh_vendor_tx_freq                 	0x4c81
+#define	mem_mesh_vendor_tx_data                 	0x4c82
+#define	mem_mesh_vendor_tx_power_calibration    	0x4c83
+#define	mem_mesh_vendor_rx_flag                 	0x4c84
+#define	mem_mesh_vendor_rx_freq                 	0x4c85
+#define	mem_mesh_event_head_type                	0x4c86
+#define	mem_mesh_event_head_event_code          	0x4c87
+#define	mem_mesh_event_para_total_length        	0x4c88
+#define	mem_mesh_event_parameter_rtn            	0x4c89
+#define	mem_mesh_event_parameter_status         	0x4c8a
+#define	mem_mesh_creat_connection_flag          	0x4c8b
+#define	mem_mesh_recevie_acl_packet_number      	0x4c8c
+#define	mem_device_public_address               	0x4c8d
+#define	mem_mesh_command_complete_num_hci_command_packet	0x4c93
+#define	mem_mesh_command_complete_command_opcode	0x4c94
+#define	mem_mesh_hci_opcode                     	0x4c94
+#define	mem_mesh_command_complete_return_parameter_status	0x4c96
+#define	mem_simple_pairing_mode                 	0x4c97
+#define	mem_fec_required                        	0x4c98
+#define	mem_inquiry_num_responses               	0x4c99
+#define	mem_inquiry_num_check                   	0x4c9a
+#define	mem_conn_status                         	0x4c9b
+#define	mem_inquiry_mode                        	0x4c9c
+#define	mem_inquiry_eir_data                    	0x4c9d
+#define	mem_io_cap_flag                         	0x4c9f
+#define	mem_page_scan_repetition_mode           	0x4ca0
+#define	mem_conn_req_status                     	0x4ca1
+#define	mem_alloc_normal_block                  	0x4ca2
+#define	mem_alloc_normal_header                 	0x4ca2
+#define	mem_alloc_normal_rptr                   	0x4ca4
+#define	mem_alloc_normal_wptr                   	0x4ca6
+#define	mem_alloc_normal_end                    	0x4ca8
+#define	mem_alloc_normal_cur_len                	0x4caa
+#define	mem_alloc_normal_block_start            	0x4cab
+#define	mem_alloc_big_block                     	0x4cc9
+#define	mem_alloc_big_header                    	0x4cc9
+#define	mem_alloc_big_rptr                      	0x4ccb
+#define	mem_alloc_big_wptr                      	0x4ccd
+#define	mem_alloc_big_end                       	0x4ccf
+#define	mem_alloc_big_cur_len                   	0x4cd1
+#define	mem_alloc_big_block_start               	0x4cd2
+#define	mem_big_block_ptr_list                  	0x4cf0
+#define	mem_rcv_br_queue_ptr                    	0x4d0e
+#define	mem_rcv_ble_queue_ptr                   	0x4d11
+#define	mem_rcv_br_block                        	0x4d14
+#define	mem_rcv_br_header                       	0x4d14
+#define	mem_rcv_br_rptr                         	0x4d16
+#define	mem_rcv_br_wptr                         	0x4d18
+#define	mem_rcv_br_end                          	0x4d1a
+#define	mem_rcv_br_cur_len                      	0x4d1c
+#define	mem_rcv_br_block_start                  	0x4d1d
+#define	mem_rcv_ble_block                       	0x4d3b
+#define	mem_rcv_ble_header                      	0x4d3b
+#define	mem_rcv_ble_rptr                        	0x4d3d
+#define	mem_rcv_ble_wptr                        	0x4d3f
+#define	mem_rcv_ble_end                         	0x4d41
+#define	mem_rcv_ble_cur_len                     	0x4d43
+#define	mem_rcv_ble_block_start                 	0x4d44
+#define	mem_snd_br_block                        	0x4d62
+#define	mem_snd_br_header                       	0x4d62
+#define	mem_snd_br_rptr                         	0x4d64
+#define	mem_snd_br_wptr                         	0x4d66
+#define	mem_snd_br_end                          	0x4d68
+#define	mem_snd_br_cur_len                      	0x4d6a
+#define	mem_snd_br_block_start                  	0x4d6b
+#define	mem_snd_ble_block                       	0x4d89
+#define	mem_snd_ble_header                      	0x4d89
+#define	mem_snd_ble_rptr                        	0x4d8b
+#define	mem_snd_ble_wptr                        	0x4d8d
+#define	mem_snd_ble_end                         	0x4d8f
+#define	mem_snd_ble_cur_len                     	0x4d91
+#define	mem_snd_ble_block_start                 	0x4d92
+#define	mem_snd_hci_block                       	0x4db0
+#define	mem_snd_hci_header                      	0x4db0
+#define	mem_snd_hci_rptr                        	0x4db2
+#define	mem_snd_hci_wptr                        	0x4db4
+#define	mem_snd_hci_end                         	0x4db6
+#define	mem_snd_hci_cur_len                     	0x4db8
+#define	mem_snd_hci_block_start                 	0x4db9
+#define	mem_regd                                	0x4dd7
+#define	mem_alloc_buffer_len                    	0x4ddb
+#define	mem_ipc_data_rx_buf_subtype             	0x4ddd
+#define	mem_ipc_data_rx_buf_payload_ptr         	0x4dde
+#define	mem_ipc_data_tx_buf_subtype             	0x4de1
+#define	mem_ipc_data_tx_buf_payload_ptr         	0x4de2
+#define	mem_le_features                         	0x4de5
+#define	mem_le_supported_host                   	0x4ded
+#define	mem_simultaneous_le_host                	0x4dee
+#define	mem_default_link_policy_settings        	0x4def
+#define	mem_link_policy_settings                	0x4df1
+#define	mem_le_white_list_cnt                   	0x4df3
+#define	mem_le_white_list                       	0x4df4
+#define	mem_le_white_list_type_and_bd_addr      	0x4e10
+#define	mem_le_white_list_filter_policy         	0x4e17
+#define	mem_hci_acl_packet_pb_flag              	0x4e18
+#define	mem_hci_acl_packet_len_recved           	0x4e19
+#define	mem_hci_acl_packet_payload_ptr          	0x4e1b
+#define	mem_le_first_packet_count               	0x4e1d
+#define	mem_hci_record_disc_conn_handle         	0x4e1e
+#define	mem_fsc_rtk_host                        	0x4e1f
+#define	mem_remote_features                     	0x4e20
+#define	mem_remote_ext_features0                	0x4e28
+#define	mem_remote_ext_features1                	0x4e30
+#define	mem_le_scan_window_temp                 	0x4e38
+#define	mem_zcode_buff_user                     	0x4e3a
+#define	mem_queue_init_flag                     	0x4f3a
+#define	mem_efuse_64_bytes                      	0x4f3b
+#define	mem_app_flash_address                   	0x4f7b
+#define	mem_app_loadcode_flag                   	0x4f7e
+#define	mem_headset_end                         	0x4f7f
+#define	mem_usb_mouse_data                      	0x4ace
+#define	mem_usb_kb_data                         	0x4ade
+#define	mem_usb_kb_multikey                     	0x4aee
+#define	mem_usb0_get_report_data                	0x4afe
+#define	mem_mcmd                                	0xff0
+#define	mem_mouse_data                          	0xff1
+#define	L2CAP_ONE_RXBUFF_LENTH_NEW              	0x266
+#define	L2CAP_ONE_RXBUFF_LENTH                  	0x300
+#define	L2CAP_NORMAL_BUFF_CNT                   	0x01
+#define	L2CAP_NORMAL_BUFF_LENTH                 	0x100
+#define	L2CAP_NORMAL_BUFF_START_ADDR            	0x2000
+#define	L2CAP_BIG_BUFF_CNT                      	0x09
+#define	L2CAP_BIG_BUFF_LENTH                    	0x2b0
+#define	L2CAP_BIG_BUFF_LENTH_BLE                	0x200
+#define	L2CAP_BIG_BUFF_LENTH_CLASSIC            	0x2b0
+#define	L2CAP_BIG_BUFF_START_ADDR               	0x2200
+#define	mem_l2cap_rxbuff1                       	0x1400
+#define	mem_l2cap_rxbuff2                       	0x1700
+#define	mem_l2cap_rxbuff3                       	0x1a00
+#define	mem_l2cap_rxbuff4                       	0x1d00
+#define	mem_tx_buff0                            	0x1000
+#define	mem_tx_buff1                            	0x1080
+#define	mem_tx_buff2                            	0x1100
+#define	mem_tx_buff3                            	0x1180
+#define	mem_tx_buff4                            	0x1200
+#define	mem_tx_buff5                            	0x1280
+#define	mem_tx_buff6                            	0x1300
+#define	mem_tx_buff7                            	0x1380
+#define	mem_le_tx_buffer0                       	0x1c00
+#define	mem_le_tx_buffer1                       	0x1c80
+#define	mem_le_tx_buffer2                       	0x1d00
+#define	mem_le_tx_buffer3                       	0x1d80
+#define	mem_le_txheader_temp                    	0x1000
+#define	mem_le_txlen_temp                       	0x1001
+#define	mem_le_txpayload_temp                   	0x1002
+#define	mem_le_txcid_temp                       	0x1004
+#define	mem_le_l2cap_temp                       	0x1006
+#define	mem_le_l2cap_response_temp              	0x1007
+#define	mem_le_txbdy_temp                       	0x1008
+#define	mem_h5rx_buf                            	0x1e00
+#define	mem_h5rx_buf_end                        	0x1eff
+#define	mem_h5tx_buf                            	0x1f00
+#define	mem_h5tx_buf_end                        	0x1fff
+#define	DEBUG_LOG_INITIAL_SUCCESS_FLAG          	0x5f
+#define	DEBUG_LOG_LOCK_VICTIM_CM0               	0x35
+#define	DEBUG_LOG_LOCK_VICTIM_RESPIN            	0x53
+#define	IPC_DATA_SUBTYPE_FREE                   	0x00
+#define	IPC_DATA_SUBTYPE_BLE                    	0x01
+#define	IPC_DATA_SUBTYPE_SPP                    	0x02
+#define	IPC_DATA_SUBTYPE_HCI                    	0x03
+#define	IPC_DATA_SUBTYPE_ACL_BLE                	0x04
+#define	IPC_DATA_SUBTYPE_ACL_CLASSIC            	0x05
+#define	IPC_TYPE_CMD                            	0x01
+#define	IPC_TYPE_EVT                            	0x02
+#define	IPC_TYPE_HID                            	0x03
+#define	IPC_TYPE_SPP                            	0x04
+#define	IPC_TYPE_BLE                            	0x05
+#define	IPC_TYPE_24G                            	0x06
+#define	IPC_TYPE_MESH                           	0x07
+#define	IPC_TYPE_ADV                            	0x08
+#define	IPC_TYPE_SCAN                           	0x09
+#define	IPC_TYPE_BT_TO_CM0_DATA                 	0x0a
+#define	IPC_TYPE_CM0_TO_BT_DATA                 	0x0b
+#define	IPC_TYPE_A2DP                           	0x0a
+#define	IPC_TYPE_HFP                            	0x0b
+#define	IPC_TYPE_TWS                            	0x0c
+#define	IPC_TYPE_HCI                            	0x0d
+#define	MSBC_PCM_IN_BUFFER_ADDR                 	0x2000
+#define	MSBC_OUT_BUFFER_ADDR                    	0x2800
+#define	MSBC_IN_BUFFER_ADDR                     	0x3000
+#define	MSBC_PCM_OUT_BUFFER_ADDR                	0x3800
+#define	MSBC_PACKET_LEN                         	0x39
+#define	MSBC_PCM_PACKET_LEN                     	0xF0
+#define	MSBC_PACKET_MAX_LEN                     	0x1c8
+#define	MSBC_PCM_MAX_PACKET_LEN                 	0x780
+#define	MSBC_ENCODE_BUF_ADDRESS                 	0x2c00
+#define	MSBC_DECODE_BUF_ADDRESS                 	0x3400
+#define	MSBC_BUF_LENTH                          	0x400
+#define	MSBC_NEW_DAC_48K_START_ADDR             	0x2000
+#define	MSBC_NEW_DAC_8K_START_ADDR              	//0xB800
+#define	MSBC_NEW_ADC_8K_START_ADDR              	0xb640
+#define	MSBC_NEW_CACHE_START_ADDR               	0xC540
+#define	MSBC_NEW_DECODE_CACHE_START_ADDR        	0xC940
+#define	MSBC_NEW_PCM_MAX_BUFFER_LEN             	0xF00
+#define	MSBC_NEW_DAC_48K_MAX_BUFFER_LEN         	0x2000
+#define	PNP_PROFILE                             	0x00
+#define	AVCTP_PROFILE                           	0x01
+#define	AVRCP_TARGET_PROFILE                    	0x02
+#define	AVRCP_CONTROL_PROFILE                   	0x03
+#define	HFP_PROFILE                             	0x04
+#define	HSP_PROFILE                             	0x05
+#define	HID_PROFILE                             	0x06
+#define	AAP_PROFILE                             	0x07
+#define	SPP_PROFILE                             	0x08
+#define	NUM_PROFILE                             	0x09
+#define	LED_REPEAT_FORERVER                     	0xff
+#define	BUTTON_GPIO_DISABLE                     	0XFF
+#define	BUTTON_LONGPRESS                        	0xff
+#define	BT_CMD_STANDBY                          	0x00
+#define	BT_CMD_START_DISCOVERY                  	0x01
+#define	BT_CMD_STOP_DISCOVERY                   	0x02
+#define	BT_CMD_RECONNECT                        	0x03
+#define	BT_CMD_DISCONNECT                       	0x04
+#define	BT_CMD_ENTER_SNIFF                      	0x05
+#define	BT_CMD_EXIT_SNIFF                       	0x06
+#define	BT_CMD_ENTER_SNIFF_SUBRATING            	0x07
+#define	BT_CMD_EXIT_SNIFF_SUBRATING             	0x08
+#define	BT_CMD_SNIFF_TEST                       	0x09
+#define	BT_CMD_SET_PIN_CODE                     	0x0a
+#define	BT_CMD_START_INQUIRY                    	0x0b
+#define	BT_CMD_STOP_INQUIRY                     	0x0c
+#define	BT_CMD_START_ADV                        	0x0d
+#define	BT_CMD_STOP_ADV                         	0x0e
+#define	BT_CMD_START_DIRECT_ADV                 	0x0f
+#define	BT_CMD_STOP_DIRECT_ADV                  	0x10
+#define	BT_CMD_LE_DISCONNECT                    	0x11
+#define	BT_CMD_LE_UPDATE_CONN                   	0x12
+#define	BT_CMD_LE_START_CONN                    	0x16
+#define	BT_CMD_LE_START_SCAN                    	0x17
+#define	BT_CMD_LE_STOP_SCAN                     	0x18
+#define	BT_CMD_ENTER_HIBERNATE                  	0x19
+#define	BT_CMD_LE_SMP_SECURITY_REQUEST          	0x1b
+#define	BT_CMD_LE_START_WRITE                   	0x1c
+#define	BT_CMD_ROLE_SWITCH                      	0x1d
+#define	BT_CMD_BB_RECONN_CANCEL                 	0x1e
+#define	BT_CMD_STORE_RECONN_INFO_LE             	0x1f
+#define	BT_CMD_STORE_RECONN_INFO_BT             	0x20
+#define	BT_CMD_MTU_EXCHANGE                     	0x21
+#define	BT_CMD_DHKEY_NOT_ACCEPT                 	0x22
+#define	BT_CMD_EST_ESCO_REQ                     	0x23
+#define	BT_CMD_RMV_ESCO_REQ                     	0x24
+#define	BT_CMD_EST_SCO_REQ                      	0x25
+#define	BT_CMD_RMV_SCO_REQ                      	0x26
+#define	BT_CMD_LOAD_FLASH_PARAMS                	0x2d
+#define	BT_CMD_INCREASE_POWER_REQ               	0x2e
+#define	BT_CMD_READ_RESPONSE_READY              	0x2f
+#define	BT_CMD_LE_DATA_LEGNTH_REQ               	0x30
+#define	BT_CMD_PLAY_PAUSE                       	0x32
+#define	BT_CMD_BACKWARD                         	0x33
+#define	BT_CMD_FORWARD                          	0x34
+#define	BT_CMD_VOL_UP                           	0x35
+#define	BT_CMD_VOL_DOWN                         	0x36
+#define	BT_CMD_ACCEPT_CALL                      	0x37
+#define	BT_CMD_HANG_UP                          	0x38
+#define	BT_CMD_REDIAL                           	0x39
+#define	BT_CMD_RECOGNITION                      	0x3a
+#define	BT_CMD_PLAY_VP                          	0x3b
+#define	BT_CMD_PLAY_TISHI_VP                    	0x3c
+#define	BT_CMD_RECOGNITION_STOP                 	0x3d
+#define	BT_CMD_ThreeWay_ReleaseAll              	0x3e
+#define	BT_CMD_ThreeWay_ReleaseNAcp             	0x3f
+#define	BT_CMD_ThreeWay_HoldNAcp                	0x31
+#define	BT_CMD_ENTER_TWS_PAIR                   	0x40
+#define	BT_CMD_EXIT_TWS_PAIR                    	0x41
+#define	BT_CMD_START_RECON_TWS                  	0x42
+#define	BT_CMD_STOP_RECON_TWS                   	0x43
+#define	BT_CMD_START_WAIT_MASTER                	0x44
+#define	BT_CMD_STOP_WAIT_MASTER                 	0x45
+#define	BT_CMD_START_WAIT_SLAVE                 	0x46
+#define	BT_CMD_STOP_WAIT_SLAVE                  	0x47
+#define	BT_CMD_TWS_NONE                         	0x48
+#define	TWS_SYNC_CMD_START                      	0x4f
+#define	TWS_SYNC_CMD_IND_0                      	0x50
+#define	TWS_SYNC_CMD_IND_1                      	0x51
+#define	TWS_SYNC_CMD_IND_2                      	0x52
+#define	TWS_SYNC_CMD_IND_3                      	0x53
+#define	TWS_SYNC_CMD_FIX_VOICE_PLAY             	0x5d
+#define	TWS_SYNC_CMD_EAR_DETECT_ON              	0x5e
+#define	TWS_SYNC_CMD_EAR_DETECT_OFF             	0x5f
+#define	TWS_SYNC_CMD_POWR_OFF                   	0x60
+#define	TWS_SYNC_CMD_MASTER_SWITCH              	0x61
+#define	TWS_SYNC_CMD_POLLING                    	0x62
+#define	TWS_SYNC_CMD_USER1                      	0x63
+#define	TWS_SYNC_CMD_USER2                      	0x64
+#define	TWS_SYNC_CMD_USER3                      	0x65
+#define	TWS_SYNC_CMD_USER4                      	0x66
+#define	TWS_SYNC_CMD_USER5                      	0x67
+#define	TWS_SYNC_CMD_RESET_AUDIO                	0x68
+#define	TWS_SYNC_CMD_SLAVE_RESET_AUDIO          	0x69
+#define	TWS_SYNC_CMD_AUDIO_PROCESS_INFO         	0x6A
+#define	TWS_SYNC_CMD_HFP_START_SYNC             	0x6B
+#define	TWS_SYNC_CMD_HFP_SLVAE_START_SYNC       	0x6C
+#define	TWS_SYNC_CMD_ALL_PROFILE_DISCONNECTED   	0x6D
+#define	TWS_SYNC_CMD_DROP_ONE_PACKET            	0x6E
+#define	TWS_SYNC_CMD_AUTO_POWR_OFF              	0x6F
+#define	TWS_SYNC_CMD_ENTER_FAST_SYNC            	0x70
+#define	TWS_SYNC_CMD_EXIT_FAST_SYNC             	0x71
+#define	TWS_SYNC_CMD_ADD_ONE_PACKET             	0x72
+#define	TWS_SYNC_CMD_SLAVE_IN_STORAGE           	0x73
+#define	TWS_SYNC_CMD_USER6                      	0x74
+#define	TWS_SYNC_CMD_USER7                      	0x75
+#define	TWS_SYNC_CMD_OAL_CALL                   	0x76
+#define	TWS_SYNC_CMD_OAL_NOCALL                 	0x77
+#define	TWS_SYNC_CMD_OAL_MUSIC_PLAY             	0x78
+#define	TWS_SYNC_CMD_OAL_MUSIC_PAUSE            	0x79
+#define	TWS_SYNC_CMD_OAL_LAST_MUSIC             	0x7a
+#define	TWS_SYNC_CMD_OAL_NEXT_MUSIC             	0x7b
+#define	TWS_SYNC_CMD_OAL_ADD_VOL                	0x7c
+#define	TWS_SYNC_CMD_OAL_SUB_VOL                	0x7d
+#define	TWS_SYNC_CMD_END                        	0x7f
+#define	BT_CMD_LOAD_INFO                        	0x80
+#define	BT_CMD_RECOVER_AUDIO                    	0x81
+#define	BT_CMD_REPORT_BAT                       	0x82
+#define	BT_CMD_ENABLE_SNIFF_MUL                 	0x84
+#define	BT_CMD_DISABLE_SNIFF_MUL                	0x85
+#define	BT_CMD_BT_DISCONNECT                    	0x86
+#define	BT_CMD_RESET_M0_CLK                     	0x87
+#define	BT_CMD_HFP_INDICATORS_UPDATE            	0x88
+#define	BT_CMD_RECONNECT_AVDTP                  	0x89
+#define	TWS_SYNC_CMD_SWITCH_TO_MASTER           	0x8a
+#define	TWS_SYNC_CMD_ACCPET_SWITCH              	0x8b
+#define	BT_CMD_CHARGE_STOP_POWEROFF             	0X8c
+#define	BT_CMD_CHARGE_DISCONNECT                	0x8d
+#define	TWS_SYNC_CMD_WAIT_TWS_SLAVE             	0x8e
+#define	BT_CMD_VP_END_RECOVER_DAC               	0x8f
+#define	BT_CMD_CHARGE_POWER_OFF                 	0x90
+#define	BT_CMD_OTA_RESET                        	0x91
+#define	BT_CMD_OTA_SWITCH                       	0x92
+#define	BT_CMD_CHARGE_INSCENB                   	0x93
+#define	BT_CMD_CHARGE_INSCENB_CLEAR             	0x94
+#define	BT_CMD_SHUTDOWN_QSPI                    	0x95
+#define	BT_CMD_MSR_TEMP                         	0x96
+#define	BT_CMD_UPDATE_WAKEUP                    	0x97
+#define	BT_CMD_BATVALUE                         	0x98
+#define	BT_CMD_EnterTestMode                    	0x99
+#define	BT_CMD_ExitTestMode                     	0x9a
+#define	BT_CMD_TestPlay                         	0x9b
+#define	BT_CMD_TetstPause                       	0x9c
+#define	BT_CMD_TestEnterSCO                     	0x9d
+#define	BT_CMD_TestExitSCO                      	0x9e
+#define	TWS_NO_CONNECT_TRANS_CMD_START          	0xa0
+#define	TWS_NO_CONNECT_TRANS_CMD_POWER_OFF      	0xa1
+#define	TWS_NO_CONNECT_TRANS_CMD_IN_STORE       	0xa2
+#define	TWS_NO_CONNECT_TRANS_CMD_CHANGE_LANGUAGE_EN	0xa3
+#define	TWS_NO_CONNECT_TRANS_CMD_CHANGE_LANGUAGE_CH	0xa4
+#define	TWS_NO_CONNECT_TRANS_CMD_SWITCH_OAL_ON  	0xa5
+#define	TWS_NO_CONNECT_TRANS_CMD_SWITCH_OAL_OFF 	0xa6
+#define	TWS_NO_CONNECT_TRANS_CMD_END            	0xaf
+#define	BT_CMD_SET_POWER_ON_FLAG                	0xb0
+#define	BT_CMD_ENABLE_LE_LATENCY                	0xb1
+#define	BT_CMD_DISABLE_LE_LATENCY               	0xb2
+#define	BT_CMD_FREQ_CHECK                       	0xb3
+#define	BT_CMD_PLAY                             	0xb4
+#define	BT_CMD_PAUSE                            	0xb5
+#define	BT_CMD_ENTER_OTA                        	0xbd
+#define	BT_CMD_EXIT_OTA                         	0xbe
+#define	BT_CMD_LOADCODE                         	0xbf
+#define	BT_EVT_NULL                             	0x00
+#define	BT_EVT_BB_CONNECTED                     	0x01
+#define	BT_EVT_BB_DISCONNECTED                  	0x02
+#define	BT_EVT_RECONN_STARTED                   	0x03
+#define	BT_EVT_RECONN_FAILED                    	0x04
+#define	BT_EVT_SETUP_COMPLETE                   	0x05
+#define	BT_EVT_HID_CONNECTED                    	0x06
+#define	BT_EVT_HID_DISCONNECTED                 	0x07
+#define	BT_EVT_SPP_CONNECTED                    	0x08
+#define	BT_EVT_SPP_DISCONNECTED                 	0x09
+#define	BT_EVT_PINCODE_REQ                      	0x0A
+#define	BT_EVT_ENTER_SNIFF                      	0x0B
+#define	BT_EVT_EXIT_SNIFF                       	0x0C
+#define	BT_EVT_ENTER_SNIFF_SUB                  	0x0D
+#define	BT_EVT_EXIT_SNIFF_SUB                   	0x0E
+#define	BT_EVT_DISCOVERY_STOPED                 	0x0F
+#define	BT_EVT_BUTTON_LONG_PRESSED              	0x10
+#define	BT_EVT_START_PAGE                       	0x11
+#define	BT_EVT_HID_HANDSHAKE                    	0x12
+#define	BT_EVT_RECONN_PAGE_TIMEOUT              	0x13
+#define	BT_EVT_LE_CONNECTED                     	0x14
+#define	BT_EVT_LE_DISCONNECTED                  	0x15
+#define	BT_EVT_ML2CAP_CONN_REFUSED              	0x16
+#define	BT_EVT_BUTTON_ENTER_HIBERNATE           	0x17
+#define	BT_EVT_LINKKEY_GENERATE                 	0x18
+#define	BT_EVT_SWITCH_NOT_ACCEPT                	0x19
+#define	BT_EVT_SWITCH_ACCEPT                    	0x20
+#define	BT_EVT_SNIFF_NOT_ACCEPT                 	0x21
+#define	BT_EVT_SNIFF_ACCEPT                     	0x22
+#define	BT_EVT_UNSNIFF_ACCEPT                   	0x23
+#define	BT_EVT_UNSNIFF_NOT_ACCEPT               	0x24
+#define	BT_EVT_SEND_UNSNIFF_ACCEPT              	0x26
+#define	BT_EVT_VIRTUAL_CABLE_UNPLUG             	0x27
+#define	BT_EVT_LE_WRITE_REQUEST                 	0x28
+#define	BT_EVT_LE_ENC_INFO                      	0x29
+#define	BT_EVT_SWITCH_FAIL_MASTER               	0x2a
+#define	BT_EVT_SWITCH_SUCCESS_MASTER            	0x2b
+#define	BT_EVT_BUTTON_DOWN                      	0x2c
+#define	BT_EVT_BUTTON_UP                        	0x2d
+#define	BT_EVT_REMOTE_UNSNIFF                   	0x2e
+#define	BT_EVT_LE_PAIRING_FAIL                  	0x30
+#define	BT_EVT_LE_PAIRING_SUCCESS               	0x31
+#define	BT_EVT_LE_START_ENC                     	0x32
+#define	BT_EVT_LE_PAUSE_ENC                     	0x33
+#define	BT_EVT_LE_TK_GENERATE                   	0x34
+#define	BT_EVT_BT_GKEY_GENERATE                 	0x35
+#define	BT_EVT_BT_GET_PASSKEY                   	0x36
+#define	BT_EVT_BT_PAIRING_FAIL                  	0x37
+#define	BT_EVT_BT_PAIRING_SUCCESS               	0x38
+#define	BT_EVT_BT_START_ENC                     	0x39
+#define	BT_EVT_LE_GKEY_GENERATE                 	0x3b
+#define	BT_EVT_HFP_RING                         	0x3c
+#define	BT_EVT_A2DP_OPEN                        	0x58
+#define	BT_EVT_HFP_START_DIALING                	0x59
+#define	BT_EVT_HFP_INCOMMING                    	0x5a
+#define	BT_EVT_HFP_OUTGOING                     	0x5b
+#define	BT_EVT_HFP_CALLACTIVE                   	0x5c
+#define	BT_EVT_HFP_CALLIMG                      	0x5d
+#define	BT_EVT_HFP_CALLOGG                      	0x5e
+#define	BT_EVT_HFP_CALMULTY                     	0x5f
+#define	BT_EVT_HFP_CONNECTED                    	0x60
+#define	BT_EVT_HFP_DISCONNECTED                 	0x61
+#define	BT_EVT_HFP_NONO                         	0x62
+#define	BT_EVT_HFP_UP_TO_MAX_VLM                	0x63
+#define	BT_EVT_HFP_DOWN_TO_MIN_VLM              	0x64
+#define	BT_EVT_RESET                            	0x65
+#define	BT_EVT_WAKEUP                           	0x66
+#define	BT_EVT_ENC_CONNECTED                    	0x67
+#define	BT_EVT_ENTER_DISCOVERABLE               	0x68
+#define	BT_EVT_EXIT_DISCOVERABLE                	0x69
+#define	BT_EVT_RESTART                          	0x6a
+#define	BT_EVT_DEV_UPDATE_INFO                  	0x70
+#define	BT_EVT_PROFILE_DISCONNECT               	0x71
+#define	BT_EVT_ABNORMAL_DISCONNECT              	0x72
+#define	BT_EVT_RECONNECT_RSP                    	0x73
+#define	BT_EVT_ALL_PROFILE_CONNECT              	0x74
+#define	BT_EVT_RESET_AUTO_TIMER                 	0x75
+#define	BT_EVT_PHONE_NUM                        	0x76
+#define	BT_EVT_MAX_POWER                        	0x77
+#define	BT_EVT_CLOSE_ADAC                       	0x78
+#define	BT_EVT_DISCONNECT_KEY_ERROR             	0x79
+#define	BT_EVT_DISCONNECT_KEY_MISSING           	0x7a
+#define	BT_EVT_A2DP_CONNECTED                   	0x80
+#define	BT_EVT_A2DP_DISCONNECTED                	0x81
+#define	BT_EVT_AVRCP_CONNECTED                  	0x82
+#define	BT_EVT_AVRCP_DISCONNECTED               	0x83
+#define	BT_EVT_PROFILE_DISCONNECTED             	0x84
+#define	BT_EVT_START_DAC                        	0x85
+#define	BT_EVT_STOP_DAC                         	0x86
+#define	BT_EVT_RESTART_HFP                      	0x87
+#define	BT_EVT_ENTER_TEST_MODE                  	0x88
+#define	BT_EVT_EXIT_TEST_MODE                   	0x89
+#define	BT_EVT_TEST_PLAY                        	0x8a
+#define	BT_EVT_TEST_PAUSE                       	0x8b
+#define	BT_EVT_TEST_ENTER_SCO                   	0x8c
+#define	BT_EVT_TEST_EXIT_SCO                    	0x8d
+#define	BT_EVT_TEST_ENTER_OTA                   	0x8e
+#define	BT_EVT_TEST_EXIT_OTA                    	0x8f
+#define	BT_EVT_OTA_SEND_SEITCH_REQURST          	0x90
+#define	BT_EVT_RECONN_PAGE_CANCELED             	0x91
+#define	BT_EVT_MSR_TEMP                         	0x92
+#define	BT_EVT_TWS_HFP_SYNC_START_PLAY          	0x93
+#define	BT_EVT_LE_DATA_LENGTH_CHANGE            	0x97
+#define	BT_EVT_LE_CONN_PARAM_UPDATE_COMPLETE    	0x98
+#define	BT_EVT_LE_RECEIVED_SMP_PAIRING_REQ      	0x99
+#define	BT_EVT_LE_ATT_EXCHANGE_MTU              	0x9a
+#define	BT_EVT_ENCRYPTION_CHANGE                	0x9b
+#define	BT_EVT_ATT_READ_REQUEST_HANDLE          	0x9c
+#define	BT_EVT_INDENTITYADDRESS                 	0x9d
+#define	BT_EVT_BATVALUE                         	0x9e
+#define	BT_EVT_FIRST_PWR_ON                     	0x9f
+#define	BT_EVT_VOL_CHANGE_MAP                   	0xa0
+#define	BT_EVT_100MS_UINT                       	0xE0
+#define	BT_EVT_100MS                            	0xE1
+#define	BT_EVT_200MS                            	0xE2
+#define	BT_EVT_300MS                            	0xE3
+#define	BT_EVT_400MS                            	0xE4
+#define	BT_EVT_500MS                            	0xE5
+#define	TWS_EVT_PAIR_SUCCESS                    	0x01
+#define	TWS_EVT_EXIT_PAIR                       	0x02
+#define	TWS_EVT_ENTER_PAIR                      	0x03
+#define	TWS_EVT_START_RECON                     	0x04
+#define	TWS_EVT_RECON_FAILE                     	0x05
+#define	TWS_EVT_WAIT_MASTER                     	0x06
+#define	TWS_EVT_SLAVE_CONNECTED                 	0x07
+#define	TWS_EVT_WAIT_SLAVE                      	0x08
+#define	TWS_EVT_MASTER_CONNECTED                	0x09
+#define	TWS_EVT_SLAVE_FOUND                     	0x0a
+#define	TWS_EVT_MASTER_FOUND                    	0x0b
+#define	TWS_SYNC_EVT_UPDATE_AUDIO_PROCESS_INFO  	0x0c
+#define	TWS_EVT_SLAVE_CHANGE_MASTER_NO_CON      	0x0d
+#define	TWS_EVT_SLAVE_SWITCH_MASTER_WAIT        	0x0e
+#define	TWS_EVT_TWS_NONE                        	0x0f
+#define	TWS_EVT_REMOTE_POWER_OFF                	0x10
+#define	TWS_EVT_LOCAL_POWER_OFF                 	0x11
+#define	TWS_SYNC_EVT_START                      	0x1f
+#define	TWS_SYNC_EVT_IND_0                      	0x20
+#define	TWS_SYNC_EVT_IND_1                      	0x21
+#define	TWS_SYNC_EVT_IND_2                      	0x22
+#define	TWS_SYNC_EVT_IND_3                      	0x23
+#define	TWS_SYNC_EVT_FIX_VOICE_PLAY             	0x2d
+#define	TWS_SYNC_EVT_EAR_DETECT_ON              	0x2e
+#define	TWS_SYNC_EVT_EAR_DETECT_OFF             	0x2f
+#define	TWS_SYNC_EVT_POWR_OFF                   	0x30
+#define	TWS_SYNC_EVT_MASTER_SWITCH              	0x31
+#define	TWS_SYNC_EVT_POLLING                    	0x32
+#define	TWS_SYNC_EVT_USER1                      	0x33
+#define	TWS_SYNC_EVT_USER2                      	0x34
+#define	TWS_SYNC_EVT_USER3                      	0x35
+#define	TWS_SYNC_EVT_USER4                      	0x36
+#define	TWS_SYNC_EVT_USER5                      	0x37
+#define	TWS_SYNC_EVT_RESET_AUDIO                	0x38
+#define	TWS_SYNC_EVT_SLAVE_RESET_AUDIO          	0x39
+#define	TWS_SYNC_EVT_AUDIO_PROCESS_INFO         	0x3A
+#define	TWS_SYNC_EVT_HFP_START_SYNC             	0x3B
+#define	TWS_SYNC_EVT_ALL_PROFILE_DISCONNECTED   	0x3D
+#define	TWS_SYNC_EVT_DROP_ONE_PACKET            	0x3E
+#define	TWS_SYNC_EVT_AUTO_POWR_OFF              	0x3F
+#define	TWS_SYNC_EVT_ENTER_FAST_SYNC            	0x40
+#define	TWS_SYNC_EVT_EXIT_FAST_SYNC             	0x41
+#define	TWS_SYNC_EVT_ADD_ONE_PACKET             	0x42
+#define	TWS_SYNC_EVT_SLAVE_IN_STORAGE           	0x43
+#define	TWS_SYNC_EVT_USER6                      	0x44
+#define	TWS_SYNC_EVT_USER7                      	0x45
+#define	TWS_SYNC_EVT_OAL_CALL                   	0x46
+#define	TWS_SYNC_EVT_OAL_NOCALL                 	0x47
+#define	TWS_SYNC_EVT_OAL_MUSIC_PLAY             	0x48
+#define	TWS_SYNC_EVT_OAL_MUSIC_PAUSE            	0x49
+#define	TWS_SYNC_EVT_OAL_LAST_MUSIC             	0x4a
+#define	TWS_SYNC_EVT_OAL_NEXT_MUSIC             	0x4b
+#define	TWS_SYNC_EVT_OAL_ADD_VOL                	0x4c
+#define	TWS_SYNC_EVT_OAL_SUB_VOL                	0x4d
+#define	TWS_SYNC_EVT_SLAVE_ACK                  	0x4e
+#define	TWS_SYNC_EVT_END                        	0x4f
+#define	TWS_NO_CONNECT_TRANS_EVT_START          	0x50
+#define	TWS_NO_CONNECT_TRANS_EVT_POWER_OFF      	0x51
+#define	TWS_NO_CONNECT_TRANS_EVT_IN_STORE       	0x52
+#define	TWS_NO_CONNECT_TRANS_EVT_CHANGE_LANGUAGE_EN	0x53
+#define	TWS_NO_CONNECT_TRANS_EVT_CHANGE_LANGUAGE_CH	0x54
+#define	TWS_NO_CONNECT_TRANS_EVT_SWITCH_OAL_ON  	0x55
+#define	TWS_NO_CONNECT_TRANS_EVT_SWITCH_OAL_OFF 	0x56
+#define	TWS_NO_CONNECT_TRANS_EVT_END            	0x5f
+#define	LOCAL_SCO_WORK_DONE                     	0x00
+#define	LOCAL_SCO_WORK_IN_PROCESS               	0x01
+#define	HFP_SPEAKER_MAX_VLM_MEDIA               	0x20
+#define	HFP_SPEAKER_MAX_VLM_SCO                 	0x1E
+#define	HFP_NONO                                	0x00
+#define	HFP_INCOMMING                           	0x01
+#define	HFP_OUTGOING                            	0x02
+#define	HFP_CALLACTIVE                          	0x03
+#define	HFP_CALLIMG                             	0x04
+#define	HFP_CALLOGG                             	0x05
+#define	HFP_CALMULTY                            	0x06
+#define	CODEC_TYPE_CVSD                         	0x01
+#define	CODEC_TYPE_mSBC                         	0x02
+#define	HF_STATE_WAITING_RFCOMM_CONN            	0x00
+#define	HF_STATE_HF_SEND_FEATURE                	0x01
+#define	HF_STATE_WAITING_AG_FEATURE_OK          	0x02
+#define	HF_STATE_HF_SEND_CODECS                 	0x03
+#define	HF_STATE_WAITING_CODECS_OK              	0x04
+#define	HF_STATE_HF_SEND_INDICATORS             	0x05
+#define	HF_STATE_WAITING_AG_INDICATORS_OK       	0x06
+#define	HF_STATE_HF_SEND_CURR_STATUS            	0x07
+#define	HF_STATE_WAITING_AG_STATUS_OK           	0x08
+#define	HF_STATE_HF_SEND_UPDATE_STATUS          	0x09
+#define	HF_STATE_WAITING_AG_UPDATE_STATUS_OK    	0x0a
+#define	HF_STATE_CONNECTED                      	0x0b
+#define	HF_STATE_HF_SEND_RECEIVE_INFO           	0x0c
+#define	HF_STATE_WAITING_AG_INFO                	0x0d
+#define	HF_STATE_HF_SEND_AT_CLIP                	0x0e
+#define	HF_STATE_WAITING_AT_CLIP                	0x0f
+#define	HF_STATE_HF_SEND_AT_CCWA                	0x10
+#define	HF_STATE_WAITING_AT_CCWA                	0x11
+#define	HFP_EVT_ESCO_START                      	0x01
+#define	HFP_EVT_ESCO_STOP                       	0x02
+#define	AUDIO_STATE_IDLE                        	0x00
+#define	AUDIO_STATE_WAIT_SBC                    	0x01
+#define	AUDIO_STATE_WAIT_SOFT_DMA               	0x02
+#define	AUDIO_STATE_WAIT_UPSTACK_PROCESS        	0x03
+#define	TWS_DROP_OR_ADD_PROCESS_STATE_NONE      	0x00
+#define	TWS_DROP_OR_ADD_PROCESS_STATE_INPROCESS 	0x17
+#define	TWS_DROP_OR_ADD_PROCESS_STATE_WAIT_ADD  	0x53
+#define	TWS_DROP_OR_ADD_PROCESS_STATE_WAIT_DROP 	0x54
+#define	FIRST_BUFFER_CACHE_ENABLE               	0x53
+#define	AUDIO_OUTPUT_FULLMODE                   	0x00
+#define	AUDIO_OUTPUT_TWS_SINGLE_EAR_LEFT        	0x01
+#define	AUDIO_OUTPUT_TWS_SINGLE_EAR_RIGHT       	0x02
+#define	AVDTP_PACKET_TYPE_SINGLE                	0x00
+#define	AVDTP_PACKET_TYPE_START                 	0x01
+#define	AVDTP_PACKET_TYPE_CONTINUE              	0x02
+#define	AVDTP_PACKET_TYPE_END                   	0x03
+#define	AVDTP_MESSAGE_TYPE_CMD                  	0x00
+#define	AVDTP_MESSGAE_TYPE_GENERAL_REJECT       	0x01
+#define	AVDTP_MESSGAE_TYPE_RSP_ACCEPT           	0x02
+#define	AVDTP_MESSGAE_TYPE_RSP_REJECT           	0x03
+#define	AVDTP_IDENTIFIER_DISCOVER               	0x01
+#define	AVDTP_IDENTIFIER_GET_CAPABILITIES       	0x02
+#define	AVDTP_IDENTIFIER_SET_CONFIGURATION      	0x03
+#define	AVDTP_IDENTIFIER_GET_CONFIGURATION      	0x04
+#define	AVDTP_IDENTIFIER_RECONFIGURE            	0x05
+#define	AVDTP_IDENTIFIER_OPEN                   	0x06
+#define	AVDTP_IDENTIFIER_START                  	0x07
+#define	AVDTP_IDENTIFIER_CLOSE                  	0x08
+#define	AVDTP_IDENTIFIER_SUSPEND                	0x09
+#define	AVDTP_IDENTIFIER_ABORT                  	0x0a
+#define	AVDTP_IDENTIFIER_SECURITY_CONTROL       	0x0b
+#define	AVDTP_IDENTIFIER_GET_ALL_CAPABILITIES   	0x0c
+#define	AVDTP_IDENTIFIER_DELAYREPORT            	0x0d
+#define	AVDTP_SEP1                              	0x01
+#define	AVDTP_SEP1_CONFIG                       	0x08
+#define	AVDTP_CATEGORY_MEDIA_TRANS              	0x01
+#define	AVDTP_CATEGORY_REPORTING                	0x02
+#define	AVDTP_CATEGORY_RECOVERY                 	0x03
+#define	AVDTP_CATEGORY_CONTECT_PROTECT          	0x04
+#define	AVDTP_CATEGORY_HEADER_COMPRESSION       	0x05
+#define	AVDTP_CATEGORY_MULTIPLEXING             	0x06
+#define	AVDTP_CATEGORY_MEDIA_CODEC              	0x07
+#define	AVDTP_CATEGORY_DELAY_REPORT             	0x08
+#define	AVD_CPTYPE_SCMS_T                       	0x0002
+#define	A2DP_STATE_OPEN                         	0x01
+#define	A2DP_STATE_START                        	0x02
+#define	A2DP_STATE_CLOSE                        	0x03
+#define	A2DP_STATE_SUSPEND                      	0x04
+#define	A2DP_STATE_PALY_PRESS                   	0x05
+#define	A2DP_STATE_PALY_RELEASE                 	0x06
+#define	A2DP_STATE_PAUSE_PRESS                  	0x07
+#define	A2DP_STATE_PAUSE_RELEASE                	0x08
+#define	AVDTP_SAMPLE_FREQ_44K1                  	0x20
+#define	AVDTP_SAMPLE_FREQ_48K                   	0x10
+#define	HSP_ROLE_L                              	0x00
+#define	HSP_ROLE_R                              	0x01
+#define	TWS_STATE_NONE                          	0x00
+#define	TWS_STATE_PAIRING                       	0x01
+#define	TWS_STATE_WAIT_MASTER                   	0x10
+#define	TWS_STATE_SLAVE_LISTEN                  	0x11
+#define	TWS_STATE_SLAVE_CONNECTED               	0x12
+#define	TWS_STATE_SLAVE_SWITCH_LISTEN           	0x13
+#define	TWS_STATE_WAIT_SLAVE                    	0x20
+#define	TWS_STATE_MASTER_LISTEN                 	0x21
+#define	TWS_STATE_MASTER_CONNECTED              	0x22
+#define	TWS_SET_NONE                            	0x00
+#define	TWS_SET_SLAVE                           	0x33
+#define	TWS_SET_MASTER                          	0x55
+#define	ADV_INTERVAL                            	0x38
+#define	TWS_BLE_ADV_FLAG_POWER_ON               	0xFFEE
+#define	TWS_BLE_ADV_FLAG_NO_CONNECTED           	0xFFDD
+#define	TWS_BLE_ADV_FLAG_CONNECTED              	0xFF0D
+#define	TWS_BLE_ADV_FLAG_TRANS                  	0x8FBB
+#define	TWS_BLE_ADV_FLAG_SPEC_SETTING           	0x9FD7
+#define	TWS_SPEC_ADV_FLAG_NAME                  	0x30
+#define	TWS_SPEC_ADV_FLAG_UPDATE_FLASH          	0x35
+#define	TWS_SPEC_ADV_FLAG_TEST_MUSIC            	0x37
+#define	HCI_ROLE_MASTER                         	0x00
+#define	HCI_ROLE_SLAVE                          	0x01
+#define	LE_WHITE_LIST_MAX_SIZE                  	0x04
+#define	AADC_0_DEFAULT_VALUE                    	0x28
+#define	AADC_1_DEFAULT_VALUE                    	0x52
+#define	AADC_2_DEFAULT_VALUE                    	0x02
+#define	AADC_3_DEFAULT_VALUE                    	0xc3
+#define	AADC_4_DEFAULT_VALUE                    	0x18
+#define	AADC_5_DEFAULT_VALUE                    	0x00
+#define	AADC_6_DEFAULT_VALUE                    	0x00
+#define	AADC_7_DEFAULT_VALUE                    	0xf0
+#define	AADC_8_DEFAULT_VALUE                    	0xa0
+#define	AADC_9_DEFAULT_VALUE                    	0xff
+#define	AADC_A_DEFAULT_VALUE                    	0x3c
+#define	rg_clkpll_8_16_48K                      	0x2D
+#define	rg_clkpll_44d1K                         	0x3D
+#define	rg_misc_8_16_48K                        	0x94
+#define	rg_misc_44d1K                           	0xC4
+#define	left_down_en                            	0x00
+#define	left_up_en                              	0x01
+#define	right_down_en                           	0x02
+#define	right_up_en                             	0x03
+#define	ramp_down_finish_clr                    	0x04
+#define	ramp_up_finish_clr                      	0x05
+#define	RG_ADAC_OPARES_SEL1                     	0x00
+#define	RG_ADAC_OPARES_SEL2                     	0x01
+#define	RG_ADAC_VCMIOPA_SEL                     	0x02
+#define	RG_ADAC_VCMIBUF_BYP                     	0x04
+#define	RG_ADAC_INT_CAPSEL                      	0x05
+#define	RG_ADAC_VOLL0                           	0x06
+#define	DA_ADAC_LDO_AVDD_EN                     	0x05
+#define	DA_ADAC_LDO_HPVDD_EN                    	0x07
+#define	DA_EN_ADAC_BIAS                         	0x00
+#define	DA_EN_ADAC_REF                          	0x01
+#define	DA_EN_ADAC_INT_L                        	0x02
+#define	DA_EN_ADAC_INT_R                        	0x03
+#define	DA_EN_ADAC_OPAL                         	0x04
+#define	DA_EN_ADAC_OPAR                         	0x05
+#define	DA_EN_ADAC_PATHL                        	0x06
+#define	DA_EN_ADAC_PATHR                        	0x07
+#define	DA_ADAC_RST_INT_L                       	0x00
+#define	DA_ADAC_RST_INT_R                       	0x01
+#define	DA_EN_ADAC_OPA_LOOP_L                   	0x02
+#define	DA_EN_ADAC_OPA_LOOP_R                   	0x03
+#define	DA_EN_ADAC_DEPOP_SW_L                   	0x04
+#define	DA_EN_ADAC_DEPOP_SW_R                   	0x05
+#define	DA_EN_ADAC_OPA_DUMMY_L                  	0x06
+#define	DA_EN_ADAC_OPA_DUMMY_R                  	0x07
+#define	CHARGE_PMU_CHGPUMP_EN                   	0x00
+#define	CHARGE_PMU_CHGPUMP_HV                   	0x01
+#define	CHARGE_CHGR_INSC_ENB                    	0x02
+#define	CHARGE_CHGR_UART_EN                     	0x03
+#define	CHARGE_CHGR_SHUTDOWN_SW                 	0x14
+#define	CHARGE_CHGR_SHUTDOWN_BIAS               	0x15
+#define	CHARGE_CHGR_SHUTDOWN_CORE               	0x16
+#define	CHARGE_CHGR_FORCE_CC                    	0x17
+#define	CHARGE_CHGR_FORCE_CV                    	0x18
+#define	CHARGE_CHGR_FORCE_CORE_ON               	0x19
+#define	CHARGE_LPM_CHARGER_EVENT_EN             	0x1A
+#define	CHGR_STATE_ICHG                         	0x01
+#define	CHGR_STATE_RCH_EN                       	0x02
+#define	CHGR_DPPM_OV_CC                         	0x04
+#define	CHGR_STATE_VBAT_LV                      	0x08
+#define	CHGR_DPPM_OV_CV                         	0x10
+#define	CHGR_CC_OV_CV                           	0x20
+#define	CHGR_STATE_IND                          	0x40
+#define	CHGR_PGOOD_AON                          	0x80
+#define	CHGR_PGOOD                              	0x100
+#define	CHGR_IN_PRESENT                         	0x200
+#define	rg_mic_diff_en                          	0x16
+#define	rg_mic_op_cm_en                         	0x17
+#define	rg_mic_pga_vcmsettle_en                 	0x18
+#define	rg_aadc_refbuf_en                       	0x19
+#define	da_aadc_en                              	0x1A
+#define	da_aadc_en_biasgen                      	0x1B
+#define	da_aadc_en_constgm                      	0x1C
+#define	da_aadc_en_reg                          	0x1D
+#define	da_aadda_bg_en                          	0x1E
+#define	da_aadda_bg_en_fc                       	0x1F
+#define	da_mic_pga_en                           	0x00
+#define	da_mic_bias_en                          	0x01
+#define	da_mic_lpm_en                           	0x05
+#define	OTA_SOFT_CHANGE_FLAG                    	0xa5
+#define	OTA_NEED_ENABLE_XIP_FLAG                	0xaa
+#define	DIN_SEL_L_LEFT_CHANNEL                  	0x00
+#define	DIN_SEL_L_RIGHT_CHANNEL                 	0x01
+#define	DIN_SEL_L_LEFT_RIGHT_MIX_CHANNEL        	0x02
+#define	DIN_SEL_L_FIX_ZERO                      	0x03
+#define	DIN_SEL_L_CLOSE                         	0xFF
+#define	DIN_SEL_R_LEFT_CHANNEL                  	0x00
+#define	DIN_SEL_R_RIGHT_CHANNEL                 	0x10
+#define	DIN_SEL_R_LEFT_RIGHT_MIX_CHANNEL        	0x20
+#define	DIN_SEL_R_FIX_ZERO                      	0x30
+#define	DIN_SEL_R_CLOSE                         	0xFF
+#define	RAMP_LEFT_DOWN_STEP_VALUE               	0x03
+#define	RAMP_RIGHT_DOWN_STEP_VALUE              	0x03
+#define	RAMP_LEFT_DOWN_DEST_VALUE               	0x0100
+#define	RAMP_RIGHT_DOWN_DEST_VALUE              	0x0100
+#define	RAMP_LEFT_UP_STEP_VALUE                 	0x03
+#define	RAMP_RIGHT_UP_STEP_VALUE                	0x03
+#define	RAMP_LEFT_UP_DEST_VALUE                 	0x09
+#define	RAMP_RIGHT_UP_DEST_VALUE                	0x09
+#define	ADV_STOP                                	0x00
+#define	ADV_DIS_OPEN_BOX                        	0x01
+#define	ADV_DIS_CLOSE_BOX                       	0x02
+#define	ADV_RESERVE_0                           	0x03
+#define	ADV_RESERVE_1                           	0x04
+#define	ADV_RESERVE_2                           	0x05
+#define	ADV_NORMAL_BLE                          	0x06
+#define	ADV_NUM                                 	0x06
+#define	ADV_OTA                                 	0xff
+#define	TX_POWER_0DB                            	0x00
+#define	TX_POWER_3DB                            	0x01
+#define	TX_POWER_5DB                            	0x02
+#define	TX_POWER_f3DB                           	0x03
+#define	TX_POWER_f5DB                           	0x04
+#define	TX_POWER_8DB                            	0x05
+#define	MEDIA_RELASE_STATE_NONE                 	0x00
+#define	MEDIA_RELASE_STATE_WAIT_UPSTACK         	0x01
+#define	MEDIA_RELASE_STATE_READY                	0x02
+#define	BT_RESPIN_HIBERNATE_FLAG                	0x10000
+#define	BT_RESPIN_HIBERNATE_CHG_LOW             	0x10002
+#define	BT_RESPIN_HIBERNATE_CHG_HIGH            	0x10004
+#define	BT_RESPIN_FLAG_VALID_FLAG               	0x3579
+#define	RSSI_ADJUST_PHO_F5DB                    	0x49
+#define	RSSI_ADJUST_PHO                         	0x55
+#define	RSSI_ADJUST_PHO_5DB                     	0x59
+#define	RSSI_ADJUST_PHO_8DB                     	0x60
+#define	OTA_EVENT                               	0XAB
+#define	OTA_COMMAND                             	0XBA
+#define	OTA_WORK_MODE_NORMAL                    	0x0
+#define	OTA_WORK_MODE_OTA                       	0x1
+#define	OTA_PORTOCOL_VERSION_REQUEST            	0x10
+#define	OTA_BUCK_SIZE_REQUEST                   	0x11
+#define	OTA_WORK_MODE_REQUEST                   	0x12
+#define	OTA_SWITCH_WORK_MODE_REQUEST            	0x13
+#define	OTA_FLASH_CHECKSUM_REQUEST              	0x14
+#define	OTA_START_REQUEST                       	0x15
+#define	OTA_DATA_WRITE_CMD                      	0x16
+#define	OTA_DATA_WRITE_REQUEST                  	0x17
+#define	OTA_END_REQUEST                         	0x18
+#define	OTA_UPDATE_FLASH_NORMAL                 	0x0
+#define	OTA_UPDATE_FLASH_OTA                    	0x1
+#define	OTA_UPDATE_FLASH_PCM                    	0x2
+#define	OTA_RESULT_SUCCESS                      	0x0
+#define	OTA_RESULT_WORKMODE_NOT_SUPPORT         	0x1
+#define	OTA_RESULT_WORKMODE_ERROR               	0x2
+#define	OTA_RESULT_FLASHMODE_NOT_SUPPORT        	0x3
+#define	OTA_RESULT_INDEX_ERROR                  	0x4
+#define	OTA_RESULT_LENGTH_ERROR                 	0x5
+#define	OTA_RESULT_BUCK_SIZE_ERROR              	0x6
+#define	OTA_RESULT_WRITE_FLASH_ERROR            	0x7
+#define	OTA_RESULT_ERROR                        	0xFF
+#define	OTA_CODE_START_ADDR                     	0x1000
+#define	NORMAL_CODE_START_ADDR                  	0x6000
+#define	OTA_DATA_ADDR                           	0x2000
+#define	OTA_FLASH_START_ADDR                    	0x1000
+#define	OTA_FLASH_ALL_LENGTH                    	0x5000
+#define	OTA_FLASH_NORMAL_LENGTH                 	0x29000
+#define	VP_FLASH_START_ADDR                     	0x30000
+#define	VP_FLASH_ALL_LENGTH                     	0X4F000
+#define	MSBC_H2_SYNCWORD                        	0x801
+#define	MSBC_SEQUENCE_NUMBER_0                  	0x00
+#define	MSBC_SEQUENCE_NUMBER_1                  	0x30
+#define	MSBC_SEQUENCE_NUMBER_2                  	0xC0
+#define	MSBC_SEQUENCE_NUMBER_3                  	0xF0
+#endif
Index: ModuleDemo/26_BOOT/bt_demo/CM0/User/hci/yc11xx_addr.h
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/hci/yc11xx_addr.h	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/hci/yc11xx_addr.h	(working copy)
@@ -0,0 +1,108 @@
+/** @file
+ *  @brief Bluetooth device address definitions and utilities.
+ */
+
+/*
+ * Copyright (c) 2019 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _YC11XX_ADDR_H_
+#define _YC11XX_ADDR_H_
+
+#include <stdbool.h>
+#include <string.h>
+#include "type.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Bluetooth device address definitions and utilities.
+ * @defgroup bt_addr Device Address
+ * @ingroup bluetooth
+ * @{
+ */
+
+#define BT_ADDR_LE_PUBLIC       0x00
+#define BT_ADDR_LE_RANDOM       0x01
+#define BT_ADDR_LE_PUBLIC_ID    0x02
+#define BT_ADDR_LE_RANDOM_ID    0x03
+
+/** Bluetooth Device Address */
+typedef struct {
+	uint8_t  val[6];
+} bt_addr_t;
+
+/** Bluetooth LE Device Address */
+typedef struct {
+	uint8_t      type;
+	bt_addr_t a;
+} bt_addr_le_t;
+
+#define BT_ADDR_ANY     ((bt_addr_t[]) { { { 0, 0, 0, 0, 0, 0 } } })
+#define BT_ADDR_NONE    ((bt_addr_t[]) { { \
+			 { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff } } })
+#define BT_ADDR_LE_ANY  ((bt_addr_le_t[]) { { 0, { { 0, 0, 0, 0, 0, 0 } } } })
+#define BT_ADDR_LE_NONE ((bt_addr_le_t[]) { { 0, \
+			 { { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff } } } })
+
+static inline int bt_addr_cmp(const bt_addr_t *a, const bt_addr_t *b)
+{
+	return memcmp(a, b, sizeof(*a));
+}
+
+static inline int bt_addr_le_cmp(const bt_addr_le_t *a, const bt_addr_le_t *b)
+{
+	return memcmp(a, b, sizeof(*a));
+}
+
+static inline void bt_addr_copy(bt_addr_t *dst, const bt_addr_t *src)
+{
+	memcpy(dst, src, sizeof(*dst));
+}
+
+static inline void bt_addr_le_copy(bt_addr_le_t *dst, const bt_addr_le_t *src)
+{
+	memcpy(dst, src, sizeof(*dst));
+}
+
+#define BT_ADDR_IS_RPA(a)     (((a)->val[5] & 0xc0) == 0x40)
+#define BT_ADDR_IS_NRPA(a)    (((a)->val[5] & 0xc0) == 0x00)
+#define BT_ADDR_IS_STATIC(a)  (((a)->val[5] & 0xc0) == 0xc0)
+
+#define BT_ADDR_SET_RPA(a)    ((a)->val[5] = (((a)->val[5] & 0x3f) | 0x40))
+#define BT_ADDR_SET_NRPA(a)   ((a)->val[5] &= 0x3f)
+#define BT_ADDR_SET_STATIC(a) ((a)->val[5] |= 0xc0)
+
+int bt_addr_le_create_nrpa(bt_addr_le_t *addr);
+int bt_addr_le_create_static(bt_addr_le_t *addr);
+
+static inline bool bt_addr_le_is_rpa(const bt_addr_le_t *addr)
+{
+	if (addr->type != BT_ADDR_LE_RANDOM) {
+		return false;
+	}
+
+	return BT_ADDR_IS_RPA(&addr->a);
+}
+
+static inline bool bt_addr_le_is_identity(const bt_addr_le_t *addr)
+{
+	if (addr->type == BT_ADDR_LE_PUBLIC) {
+		return true;
+	}
+
+	return BT_ADDR_IS_STATIC(&addr->a);
+}
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _YC11XX_ADDR_H_ */
Index: ModuleDemo/26_BOOT/bt_demo/CM0/User/hci/yc11xx_h4.h
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/hci/yc11xx_h4.h	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/hci/yc11xx_h4.h	(working copy)
@@ -0,0 +1,33 @@
+#ifndef DRIVERS_HCI_YC11XX_H4_H_
+#define DRIVERS_HCI_YC11XX_H4_H_
+
+#include "yc11xx_hci.h"
+#include "yc11xx_uart.h"
+#include "yc11xx_gpio.h"
+
+
+#define H4_NONE 0x00
+#define H4_CMD  0x01
+#define H4_ACL  0x02
+#define H4_SCO  0x03
+#define H4_EVT  0x04
+#define H4_ISO  0x05
+
+#define HCI_H4_UART (UARTA)
+#define H4_UART_RXIO  (GPIO_28)
+#define H4_UART_TXIO  (GPIO_27)  
+
+#define BT_DBG(fmt, ...) DEBUG_LOG_STRING(fmt, ##__VA_ARGS__)
+#define BT_ERR(fmt, ...) DEBUG_LOG_STRING(fmt, ##__VA_ARGS__)
+#define BT_WARN(fmt, ...) DEBUG_LOG_STRING(fmt, ##__VA_ARGS__)
+#define BT_INFO(fmt, ...) DEBUG_LOG_STRING(fmt, ##__VA_ARGS__)
+
+#define  MIN(a, b)      (((a) < (b)) ? (a) : (b))
+
+void h4_init(void);
+void h4_polling_rx(void);
+void h4_send_data(uint8_t* buf, uint16_t len);
+
+#endif //DRIVERS_HCI_YC11XX_H4_H_
+
+
Index: ModuleDemo/26_BOOT/bt_demo/CM0/User/hci/yc11xx_h4.c
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/hci/yc11xx_h4.c	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/hci/yc11xx_h4.c	(working copy)
@@ -0,0 +1,336 @@
+/* h4.c - H:4 UART based Bluetooth driver */
+
+/*
+ * Copyright (c) 2015-2016 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+//#include <errno.h>
+#include "yc11xx_gpio.h"
+#include "yc11xx.h"
+#include "yc_drv_common.h"
+#include <string.h>
+//#include "yc11xx_pwm.h"
+#include "yc_debug.h"
+#include "yc11xx_h4.h"
+#include "Drv_bt.h"
+
+static struct {
+	uint8_t buf[600];
+	uint16_t buf_pos;
+
+	
+	uint16_t    remaining;
+	uint16_t    discard;
+
+	bool     have_hdr;
+	bool     discardable;
+
+	uint8_t     hdr_len;
+
+	uint8_t     type;
+	union {
+		struct bt_hci_cmd_hdr cmd;
+		struct bt_hci_evt_hdr evt;
+		struct bt_hci_acl_hdr acl;
+		struct bt_hci_iso_hdr iso;
+		uint8_t hdr[4];
+	};
+} rx;
+
+static struct {
+	uint8_t type;
+	uint8_t *buf;
+} tx;
+
+
+void h4_uart_init(uint16_t baudRate)
+{
+	USART_InitTypeDef USART_InitStruct ;
+
+	USART_InitStruct.USART_BaudRate             = baudRate;
+	USART_InitStruct.USART_HardwareFlowControl  = USART_HardwareFlowControl_None;
+	USART_InitStruct.USART_WordLength           = USART_WordLength_8b;	
+	USART_InitStruct.USART_StopBits             = USART_StopBits_1;
+	USART_InitStruct.USART_Mode                 = USART_Mode_duplex;
+	USART_InitStruct.USART_Parity               = USART_Parity_Even ;
+	USART_InitStruct.USART_TXLen                = 512;
+	USART_InitStruct.USART_RXLen                = 512;
+
+	if(UARTA == HCI_H4_UART){
+		GPIO_SetGpioMultFunction(H4_UART_TXIO,GPCFG_UART_TXD);
+		GPIO_SetGpioMultFunction(H4_UART_RXIO,GPCFG_UART_RXD);
+	}else if (UARTB == HCI_H4_UART){
+		GPIO_SetGpioMultFunction(H4_UART_TXIO,GPCFG_UARTB_TXD);
+		GPIO_SetGpioMultFunction(H4_UART_RXIO,GPCFG_UARTB_RXD);
+	}
+	USART_Init(HCI_H4_UART,&USART_InitStruct);
+}
+
+
+static size_t h4_discard(size_t len)
+{
+	uint8_t buf[33];
+	return USART_ReadDatatoBuff(HCI_H4_UART, buf, MIN(len, sizeof(buf)));
+}
+
+static size_t h4_read(uint8_t* rxBuff, size_t len)
+{
+	return USART_ReadDatatoBuff(HCI_H4_UART, rxBuff, len);
+}
+
+const char *bt_hex_real(const void *buf, size_t len)
+{
+	static const char hex[] = "0123456789abcdef";
+	static char str[129];
+	const uint8_t *b = buf;
+	size_t i;
+
+	len = MIN(len, (sizeof(str) - 1) / 2);
+
+	for (i = 0; i < len; i++) {
+		str[i * 2]     = hex[b[i] >> 4];
+		str[i * 2 + 1] = hex[b[i] & 0xf];
+	}
+
+	str[i * 2] = '\0';
+
+	return str;
+}
+
+static inline void h4_get_type(void)
+{
+	/* Get packet type */
+	if (h4_read(&rx.type, 1) != 1)
+	{
+		BT_WARN("Unable to read H:4 packet type\r\n");
+		rx.type = H4_NONE;
+		return;
+	}
+
+	switch (rx.type) {
+	case H4_CMD:
+		rx.remaining = sizeof(rx.cmd);
+		rx.hdr_len = rx.remaining;
+		break;
+	case H4_EVT:
+		rx.remaining = sizeof(rx.evt);
+		rx.hdr_len = rx.remaining;
+		break;
+	case H4_ACL:
+		rx.remaining = sizeof(rx.acl);
+		rx.hdr_len = rx.remaining;
+		break;
+	case H4_ISO:
+		rx.remaining = sizeof(rx.iso);
+		rx.hdr_len = rx.remaining;
+		break;
+	default:
+		BT_ERR("Unknown H:4 type 0x%02x\r\n", rx.type);
+		rx.type = H4_NONE;
+	}
+}
+
+static inline void get_acl_hdr(void)
+{
+	struct bt_hci_acl_hdr *hdr = &rx.acl;
+	int to_read = sizeof(*hdr) - rx.remaining;
+
+	rx.remaining -= h4_read((uint8_t *)hdr + to_read,
+				       rx.remaining);
+	if (!rx.remaining) {
+		rx.remaining = (hdr->len);
+		BT_DBG("Got ACL header. Payload %u bytes\r\n", rx.remaining);
+		rx.have_hdr = true;
+	}
+}
+
+static inline void get_cmd_hdr(void)
+{
+	struct bt_hci_cmd_hdr *hdr = &rx.cmd;
+	int to_read = rx.hdr_len - rx.remaining;
+
+	rx.remaining -= h4_read((uint8_t *)hdr + to_read,
+				       rx.remaining);
+
+	if (!rx.remaining) {
+		rx.remaining = hdr->param_len;
+		BT_DBG("Got cmd header. Payload %u bytes\r\n", hdr->param_len);
+		rx.have_hdr = true;
+	}
+}
+
+static inline uint8_t* get_rx_buf_read_pos(void)
+{
+	return rx.buf + rx.buf_pos;
+}
+static inline void increase_rx_buf_pos(uint16_t len)
+{
+	rx.buf_pos += len;
+}
+
+static inline void copy_hdr(void)
+{
+	// Save type.
+	*(uint8_t *)get_rx_buf_read_pos() = rx.type;
+	increase_rx_buf_pos(1);
+
+	// Save header
+	memcpy(get_rx_buf_read_pos(), rx.hdr, rx.hdr_len);
+	increase_rx_buf_pos(rx.hdr_len);
+}
+
+static void reset_rx(void)
+{
+	rx.type = H4_NONE;
+	rx.remaining = 0U;
+	rx.have_hdr = false;
+	rx.hdr_len = 0U;
+	rx.discardable = false;
+	rx.buf_pos= 0;
+}
+
+static inline void process_rx_packet(uint8_t type, uint8_t* buf, uint16_t len)
+{
+	//
+	BT_DBG("<--- process_rx_packet (type %u) (len %u): %s\r\n", type, len,
+	       bt_hex_real(buf, len));
+
+        DEBUG_LOG_PRINT_HCI_H4(0, buf, len);
+	Bt_SndHciToRespin(buf, len);
+}
+
+static inline void read_payload(void)
+{
+	uint8_t evt_flags;
+	int read;
+
+	if (rx.remaining) {
+		read = h4_read(get_rx_buf_read_pos(), rx.remaining);
+		increase_rx_buf_pos(read);
+		rx.remaining -= read;
+
+		BT_DBG("got %d bytes, remaining %u\r\n", read, rx.remaining);
+		BT_DBG("Payload (len %u): %s\r\n", rx.buf_pos,
+		       bt_hex_real(rx.buf, rx.buf_pos));
+
+		if (rx.remaining) {
+			return;
+		}
+	}
+
+	// receive a full packet
+	process_rx_packet(rx.type, rx.buf, rx.buf_pos);
+	
+	reset_rx();
+}
+
+static inline void read_header(void)
+{
+	switch (rx.type) {
+	case H4_NONE:
+		h4_get_type();
+		return;
+	case H4_CMD:
+		get_cmd_hdr();
+		break;
+	case H4_ACL:
+		get_acl_hdr();
+		break;
+	default:
+		BT_ERR("Something error\r\n");
+		return;
+	}
+
+	if (rx.have_hdr) {
+		if (rx.remaining > (sizeof(rx.buf) - rx.buf_pos)) {
+			BT_ERR("Not enough space in buffer\r\n");
+			rx.discard = rx.remaining;
+			reset_rx();
+		} else {
+			copy_hdr();
+
+			// Check receive full packet
+			if (!rx.remaining) {
+				// receive a full packet
+				process_rx_packet(rx.type, rx.buf, rx.buf_pos);
+				
+				reset_rx();
+			}
+
+		}
+	}
+}
+static inline void process_rx(void)
+{
+	if(USART_GetRxCount(HCI_H4_UART) == 0)
+	{
+		return;
+	}
+	BT_DBG("remaining %u discard %u have_hdr %u len %u\r\n",
+	       rx.remaining, rx.discard, rx.have_hdr,
+	       rx.buf_pos);
+
+	if (rx.discard) {
+		rx.discard -= h4_discard(rx.discard);
+		return;
+	}
+
+	if (rx.have_hdr) {
+		read_payload();
+	} else {
+		read_header();
+	}
+}
+
+
+static int h4_send(uint8_t* buf, uint16_t len)
+{
+	BT_DBG("---> h4_send Payload (len %u): %s\r\n", len,
+	       bt_hex_real(buf, len));
+
+	USART_SendDataFromBuff(HCI_H4_UART, buf, len);
+
+	return 0;
+}
+
+
+static int h4_open(void)
+{
+	int ret;
+
+	BT_DBG("");
+#ifdef FUNCTION_FSC_RTK_HOST
+	h4_uart_init(UARTE_BAUDRATE_BAUDRATE_Baud115200);
+#else
+	h4_uart_init(UARTE_BAUDRATE_BAUDRATE_Baud921600);
+#endif
+	
+	return 0;
+}
+
+
+void h4_init(void)
+{
+	h4_open();
+}
+void h4_polling_rx(void)
+{
+	process_rx();
+}
+void h4_send_data(uint8_t* buf, uint16_t len)
+{
+	h4_send(buf, len);
+        DEBUG_LOG_PRINT_HCI_H4(1, buf, len);
+        if(HREAD(mem_fsc_rtk_host) == 0x3f)
+        {
+#ifdef FUNCTION_FSC_RTK_HOST_WHITE
+            h4_uart_init(UARTE_BAUDRATE_BAUDRATE_Baud512000);
+#else
+            h4_uart_init(UARTE_BAUDRATE_BAUDRATE_Baud1M);
+#endif
+            HWRITE(mem_fsc_rtk_host, 0);
+        }
+}
+
Index: ModuleDemo/26_BOOT/bt_demo/CM0/User/hci/yc11xx_hci.h
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/hci/yc11xx_hci.h	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/hci/yc11xx_hci.h	(working copy)
@@ -0,0 +1,2235 @@
+/* hci.h - Bluetooth Host Control Interface definitions */
+
+/*
+ * Copyright (c) 2015-2016 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _YC11XX_HCI_H_
+#define _YC11XX_HCI_H_
+
+#include <stdbool.h>
+#include <string.h>
+#include "yc11xx_hci_err.h"
+#include "yc11xx_addr.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef __packed
+#define __packed        __attribute__((__packed__))
+#endif
+
+/**
+ * @brief Unsigned integer with bit position @p n set (signed in
+ * assembly language).
+ */
+#define BIT(n)  (1UL << (n))
+
+/**
+ * @brief Bit mask with bits 0 through <tt>n-1</tt> (inclusive) set,
+ * or 0 if @p n is 0.
+ */
+#define BIT_MASK(n) (BIT(n) - 1)
+
+/* Special own address types for LL privacy (used in adv & scan parameters) */
+#define BT_HCI_OWN_ADDR_RPA_OR_PUBLIC  0x02
+#define BT_HCI_OWN_ADDR_RPA_OR_RANDOM  0x03
+#define BT_HCI_OWN_ADDR_RPA_MASK       0x02
+
+#define BT_HCI_PEER_ADDR_RPA_UNRESOLVED 0xfe
+#define BT_HCI_PEER_ADDR_ANONYMOUS      0xff
+
+#define BT_ENC_KEY_SIZE_MIN                     0x07
+#define BT_ENC_KEY_SIZE_MAX                     0x10
+
+
+
+
+
+
+
+/* Special own address types for LL privacy (used in adv & scan parameters) */
+#define BT_HCI_OWN_ADDR_RPA_OR_PUBLIC  0x02
+#define BT_HCI_OWN_ADDR_RPA_OR_RANDOM  0x03
+#define BT_HCI_OWN_ADDR_RPA_MASK       0x02
+
+#define BT_HCI_PEER_ADDR_RPA_UNRESOLVED 0xfe
+#define BT_HCI_PEER_ADDR_ANONYMOUS      0xff
+
+#define BT_ENC_KEY_SIZE_MIN                     0x07
+#define BT_ENC_KEY_SIZE_MAX                     0x10
+
+struct bt_hci_evt_hdr {
+	uint8_t  evt;
+	uint8_t  len;
+} __packed;
+#define BT_HCI_EVT_HDR_SIZE             2
+
+#define BT_ACL_START_NO_FLUSH           0x00
+#define BT_ACL_CONT                     0x01
+#define BT_ACL_START                    0x02
+#define BT_ACL_COMPLETE                 0x03
+
+#define BT_ACL_POINT_TO_POINT           0x00
+#define BT_ACL_BROADCAST                0x01
+
+#define bt_acl_handle(h)                ((h) & BIT_MASK(12))
+#define bt_acl_flags(h)                 ((h) >> 12)
+#define bt_acl_flags_pb(f)              ((f) & BIT_MASK(2))
+#define bt_acl_flags_bc(f)              ((f) >> 2)
+#define bt_acl_handle_pack(h, f)        ((h) | ((f) << 12))
+
+struct bt_hci_acl_hdr {
+	uint16_t handle;
+	uint16_t len;
+} __packed;
+#define BT_HCI_ACL_HDR_SIZE             4
+
+#define BT_ISO_START                    0x00
+#define BT_ISO_CONT                     0x01
+#define BT_ISO_SINGLE                   0x02
+#define BT_ISO_END                      0x03
+
+#define bt_iso_handle(h)                ((h) & 0x0fff)
+#define bt_iso_flags(h)                 ((h) >> 12)
+#define bt_iso_flags_pb(f)              ((f) & 0x0003)
+#define bt_iso_flags_ts(f)              (((f) >> 2) & 0x0001)
+#define bt_iso_pack_flags(pb, ts) \
+	(((pb) & 0x0003) | (((ts) & 0x0001) << 2))
+#define bt_iso_handle_pack(h, pb, ts) \
+	((h) | (bt_iso_pack_flags(pb, ts) << 12))
+
+#define BT_ISO_DATA_VALID                0x00
+#define BT_ISO_DATA_INVALID              0x01
+#define BT_ISO_DATA_NOP                  0x02
+
+#define bt_iso_pkt_len(h)                ((h) & 0x3fff)
+#define bt_iso_pkt_flags(h)              ((h) >> 14)
+#define bt_iso_pkt_len_pack(h, f)        ((h) | ((f) << 14))
+
+struct bt_hci_iso_data_hdr {
+	uint16_t sn;
+	uint16_t slen;
+} __packed;
+#define BT_HCI_ISO_DATA_HDR_SIZE	4
+
+struct bt_hci_iso_ts_data_hdr {
+	uint32_t ts;
+	struct bt_hci_iso_data_hdr data;
+} __packed;
+#define BT_HCI_ISO_TS_DATA_HDR_SIZE     8
+
+struct bt_hci_iso_hdr {
+	uint16_t handle;
+	uint16_t len;
+} __packed;
+#define BT_HCI_ISO_HDR_SIZE             4
+
+struct bt_hci_cmd_hdr {
+	uint16_t opcode;
+	uint8_t  param_len;
+} __packed;
+#define BT_HCI_CMD_HDR_SIZE             3
+
+/* Supported Commands */
+#define BT_CMD_TEST(cmd, octet, bit)            (cmd[octet] & BIT(bit))
+#define BT_CMD_LE_STATES(cmd)                   BT_CMD_TEST(cmd, 28, 3)
+
+#define BT_FEAT_TEST(feat, page, octet, bit)    (feat[page][octet] & BIT(bit))
+
+#define BT_FEAT_BREDR(feat)                     !BT_FEAT_TEST(feat, 0, 4, 5)
+#define BT_FEAT_LE(feat)                        BT_FEAT_TEST(feat, 0, 4, 6)
+#define BT_FEAT_EXT_FEATURES(feat)              BT_FEAT_TEST(feat, 0, 7, 7)
+#define BT_FEAT_HOST_SSP(feat)                  BT_FEAT_TEST(feat, 1, 0, 0)
+#define BT_FEAT_SC(feat)                        BT_FEAT_TEST(feat, 2, 1, 0)
+
+#define BT_FEAT_LMP_ESCO_CAPABLE(feat)          BT_FEAT_TEST(feat, 0, 3, 7)
+#define BT_FEAT_HV2_PKT(feat)                   BT_FEAT_TEST(feat, 0, 1, 4)
+#define BT_FEAT_HV3_PKT(feat)                   BT_FEAT_TEST(feat, 0, 1, 5)
+#define BT_FEAT_EV4_PKT(feat)                   BT_FEAT_TEST(feat, 0, 4, 0)
+#define BT_FEAT_EV5_PKT(feat)                   BT_FEAT_TEST(feat, 0, 4, 1)
+#define BT_FEAT_2EV3_PKT(feat)                  BT_FEAT_TEST(feat, 0, 5, 5)
+#define BT_FEAT_3EV3_PKT(feat)                  BT_FEAT_TEST(feat, 0, 5, 6)
+#define BT_FEAT_3SLOT_PKT(feat)                 BT_FEAT_TEST(feat, 0, 5, 7)
+
+/* LE features */
+#define BT_LE_FEAT_BIT_ENC                      0
+#define BT_LE_FEAT_BIT_CONN_PARAM_REQ           1
+#define BT_LE_FEAT_BIT_EXT_REJ_IND              2
+#define BT_LE_FEAT_BIT_SLAVE_FEAT_REQ           3
+#define BT_LE_FEAT_BIT_PING                     4
+#define BT_LE_FEAT_BIT_DLE                      5
+#define BT_LE_FEAT_BIT_PRIVACY                  6
+#define BT_LE_FEAT_BIT_EXT_SCAN                 7
+#define BT_LE_FEAT_BIT_PHY_2M                   8
+#define BT_LE_FEAT_BIT_SMI_TX                   9
+#define BT_LE_FEAT_BIT_SMI_RX                   10
+#define BT_LE_FEAT_BIT_PHY_CODED                11
+#define BT_LE_FEAT_BIT_EXT_ADV                  12
+#define BT_LE_FEAT_BIT_PER_ADV                  13
+#define BT_LE_FEAT_BIT_CHAN_SEL_ALGO_2          14
+#define BT_LE_FEAT_BIT_PWR_CLASS_1              15
+#define BT_LE_FEAT_BIT_MIN_USED_CHAN_PROC       16
+#define BT_LE_FEAT_BIT_CONN_CTE_REQ             17
+#define BT_LE_FEAT_BIT_CONN_CTE_RESP            18
+#define BT_LE_FEAT_BIT_CONNECTIONLESS_CTE_TX    19
+#define BT_LE_FEAT_BIT_CONNECTIONLESS_CTE_RX    20
+#define BT_LE_FEAT_BIT_ANT_SWITCH_TX_AOD        21
+#define BT_LE_FEAT_BIT_ANT_SWITCH_RX_AOA        22
+#define BT_LE_FEAT_BIT_RX_CTE                   23
+#define BT_LE_FEAT_BIT_PERIODIC_SYNC_XFER_SEND  24
+#define BT_LE_FEAT_BIT_PERIODIC_SYNC_XFER_RECV  25
+#define BT_LE_FEAT_BIT_SCA_UPDATE               26
+#define BT_LE_FEAT_BIT_REMOTE_PUB_KEY_VALIDATE  27
+#define BT_LE_FEAT_BIT_CIS_MASTER               28
+#define BT_LE_FEAT_BIT_CIS_SLAVE                29
+#define BT_LE_FEAT_BIT_ISO_BROADCASTER          30
+#define BT_LE_FEAT_BIT_SYNC_RECEIVER            31
+#define BT_LE_FEAT_BIT_ISO_CHANNELS             32
+#define BT_LE_FEAT_BIT_PWR_CTRL_REQ             33
+#define BT_LE_FEAT_BIT_PWR_CHG_IND              34
+#define BT_LE_FEAT_BIT_PATH_LOSS_MONITOR        35
+
+#define BT_LE_FEAT_TEST(feat, n)                (feat[(n) >> 3] & \
+						 BIT((n) & 7))
+
+#define BT_FEAT_LE_ENCR(feat)                   BT_LE_FEAT_TEST(feat, \
+						BT_LE_FEAT_BIT_ENC)
+#define BT_FEAT_LE_CONN_PARAM_REQ_PROC(feat)    BT_LE_FEAT_TEST(feat, \
+						BT_LE_FEAT_BIT_CONN_PARAM_REQ)
+#define BT_FEAT_LE_SLAVE_FEATURE_XCHG(feat)     BT_LE_FEAT_TEST(feat, \
+						BT_LE_FEAT_BIT_SLAVE_FEAT_REQ)
+#define BT_FEAT_LE_DLE(feat)                    BT_LE_FEAT_TEST(feat, \
+						BT_LE_FEAT_BIT_DLE)
+#define BT_FEAT_LE_PHY_2M(feat)                 BT_LE_FEAT_TEST(feat, \
+						BT_LE_FEAT_BIT_PHY_2M)
+#define BT_FEAT_LE_PHY_CODED(feat)              BT_LE_FEAT_TEST(feat, \
+						BT_LE_FEAT_BIT_PHY_CODED)
+#define BT_FEAT_LE_PRIVACY(feat)                BT_LE_FEAT_TEST(feat, \
+						BT_LE_FEAT_BIT_PRIVACY)
+#define BT_FEAT_LE_EXT_ADV(feat)                BT_LE_FEAT_TEST(feat, \
+						BT_LE_FEAT_BIT_EXT_ADV)
+#define BT_FEAT_LE_EXT_PER_ADV(feat)            BT_LE_FEAT_TEST(feat, \
+						BT_LE_FEAT_BIT_PER_ADV)
+#define BT_FEAT_LE_CIS_MASTER(feat)             BT_LE_FEAT_TEST(feat, \
+						BT_LE_FEAT_BIT_CIS_MASTER)
+#define BT_FEAT_LE_CIS_SLAVE(feat)              BT_LE_FEAT_TEST(feat, \
+						BT_LE_FEAT_BIT_CIS_SLAVE)
+#define BT_FEAT_LE_ISO_BROADCASTER(feat)        BT_LE_FEAT_TEST(feat, \
+						BT_LE_FEAT_BIT_ISO_BROADCASTER)
+#define BT_FEAT_LE_SYNC_RECEIVER(feat)          BT_LE_FEAT_TEST(feat, \
+						BT_LE_FEAT_BIT_SYNC_RECEIVER)
+#define BT_FEAT_LE_ISO_CHANNELS(feat)           BT_LE_FEAT_TEST(feat, \
+						BT_LE_FEAT_BIT_ISO_CHANNELS)
+
+#define BT_FEAT_LE_CIS(feat)            (BT_FEAT_LE_CIS_MASTER(feat) | \
+					BT_FEAT_LE_CIS_SLAVE(feat))
+#define BT_FEAT_LE_BIS(feat)            (BT_FEAT_LE_ISO_BROADCASTER(feat) | \
+					BT_FEAT_LE_SYNC_RECEIVER(feat))
+#define BT_FEAT_LE_ISO(feat)            (BT_FEAT_LE_CIS(feat) | \
+					BT_FEAT_LE_BIS(feat))
+
+/* LE States */
+#define BT_LE_STATES_SLAVE_CONN_ADV(states)     (states & 0x0000004000000000)
+
+/* Bonding/authentication types */
+#define BT_HCI_NO_BONDING                       0x00
+#define BT_HCI_NO_BONDING_MITM                  0x01
+#define BT_HCI_DEDICATED_BONDING                0x02
+#define BT_HCI_DEDICATED_BONDING_MITM           0x03
+#define BT_HCI_GENERAL_BONDING                  0x04
+#define BT_HCI_GENERAL_BONDING_MITM             0x05
+
+/*
+ * MITM protection is enabled in SSP authentication requirements octet when
+ * LSB bit is set.
+ */
+#define BT_MITM                                 0x01
+
+/* I/O capabilities */
+#define BT_IO_DISPLAY_ONLY                      0x00
+#define BT_IO_DISPLAY_YESNO                     0x01
+#define BT_IO_KEYBOARD_ONLY                     0x02
+#define BT_IO_NO_INPUT_OUTPUT                   0x03
+
+/* SCO packet types */
+#define HCI_PKT_TYPE_HV1                        0x0020
+#define HCI_PKT_TYPE_HV2                        0x0040
+#define HCI_PKT_TYPE_HV3                        0x0080
+
+/* eSCO packet types */
+#define HCI_PKT_TYPE_ESCO_HV1                   0x0001
+#define HCI_PKT_TYPE_ESCO_HV2                   0x0002
+#define HCI_PKT_TYPE_ESCO_HV3                   0x0004
+#define HCI_PKT_TYPE_ESCO_EV3                   0x0008
+#define HCI_PKT_TYPE_ESCO_EV4                   0x0010
+#define HCI_PKT_TYPE_ESCO_EV5                   0x0020
+#define HCI_PKT_TYPE_ESCO_2EV3                  0x0040
+#define HCI_PKT_TYPE_ESCO_3EV3                  0x0080
+#define HCI_PKT_TYPE_ESCO_2EV5                  0x0100
+#define HCI_PKT_TYPE_ESCO_3EV5                  0x0200
+
+
+#define ESCO_PKT_MASK                           (HCI_PKT_TYPE_ESCO_HV1 | \
+						 HCI_PKT_TYPE_ESCO_HV2 | \
+						 HCI_PKT_TYPE_ESCO_HV3)
+#define SCO_PKT_MASK                            (HCI_PKT_TYPE_HV1 | \
+						 HCI_PKT_TYPE_HV2 | \
+						 HCI_PKT_TYPE_HV3)
+#define EDR_ESCO_PKT_MASK                       (HCI_PKT_TYPE_ESCO_2EV3 | \
+						 HCI_PKT_TYPE_ESCO_3EV3 | \
+						 HCI_PKT_TYPE_ESCO_2EV5 | \
+						 HCI_PKT_TYPE_ESCO_3EV5)
+
+/* HCI BR/EDR link types */
+#define BT_HCI_SCO                              0x00
+#define BT_HCI_ACL                              0x01
+#define BT_HCI_ESCO                             0x02
+
+/* OpCode Group Fields */
+#define BT_OGF_LINK_CTRL                        0x01
+#define BT_OGF_BASEBAND                         0x03
+#define BT_OGF_INFO                             0x04
+#define BT_OGF_STATUS                           0x05
+#define BT_OGF_LE                               0x08
+#define BT_OGF_VS                               0x3f
+
+/* Construct OpCode from OGF and OCF */
+#define BT_OP(ogf, ocf)                         ((ocf) | ((ogf) << 10))
+
+/* Invalid opcode */
+#define BT_OP_NOP				0x0000
+
+/* Obtain OGF from OpCode */
+#define BT_OGF(opcode)                          (((opcode) >> 10) & BIT_MASK(6))
+/* Obtain OCF from OpCode */
+#define BT_OCF(opcode)                          ((opcode) & BIT_MASK(10))
+
+#define BT_HCI_OP_INQUIRY                       BT_OP(BT_OGF_LINK_CTRL, 0x0001)
+struct bt_hci_op_inquiry {
+	uint8_t lap[3];
+	uint8_t length;
+	uint8_t num_rsp;
+} __packed;
+
+#define BT_HCI_OP_INQUIRY_CANCEL                BT_OP(BT_OGF_LINK_CTRL, 0x0002)
+
+#define BT_HCI_OP_CONNECT                       BT_OP(BT_OGF_LINK_CTRL, 0x0005)
+struct bt_hci_cp_connect {
+	bt_addr_t bdaddr;
+	uint16_t  packet_type;
+	uint8_t   pscan_rep_mode;
+	uint8_t   reserved;
+	uint16_t  clock_offset;
+	uint8_t   allow_role_switch;
+} __packed;
+
+#define BT_HCI_OP_DISCONNECT                    BT_OP(BT_OGF_LINK_CTRL, 0x0006)
+struct bt_hci_cp_disconnect {
+	uint16_t handle;
+	uint8_t  reason;
+} __packed;
+
+#define BT_HCI_OP_CONNECT_CANCEL                BT_OP(BT_OGF_LINK_CTRL, 0x0008)
+struct bt_hci_cp_connect_cancel {
+	bt_addr_t bdaddr;
+} __packed;
+struct bt_hci_rp_connect_cancel {
+	uint8_t   status;
+	bt_addr_t bdaddr;
+} __packed;
+
+#define BT_HCI_OP_ACCEPT_CONN_REQ               BT_OP(BT_OGF_LINK_CTRL, 0x0009)
+struct bt_hci_cp_accept_conn_req {
+	bt_addr_t bdaddr;
+	uint8_t   role;
+} __packed;
+
+#define BT_HCI_OP_SETUP_SYNC_CONN               BT_OP(BT_OGF_LINK_CTRL, 0x0028)
+struct bt_hci_cp_setup_sync_conn {
+	uint16_t  handle;
+	uint32_t  tx_bandwidth;
+	uint32_t  rx_bandwidth;
+	uint16_t  max_latency;
+	uint16_t  content_format;
+	uint8_t   retrans_effort;
+	uint16_t  pkt_type;
+} __packed;
+
+#define BT_HCI_OP_ACCEPT_SYNC_CONN_REQ          BT_OP(BT_OGF_LINK_CTRL, 0x0029)
+struct bt_hci_cp_accept_sync_conn_req {
+	bt_addr_t bdaddr;
+	uint32_t  tx_bandwidth;
+	uint32_t  rx_bandwidth;
+	uint16_t  max_latency;
+	uint16_t  content_format;
+	uint8_t   retrans_effort;
+	uint16_t  pkt_type;
+} __packed;
+
+#define BT_HCI_OP_REJECT_CONN_REQ               BT_OP(BT_OGF_LINK_CTRL, 0x000a)
+struct bt_hci_cp_reject_conn_req {
+	bt_addr_t bdaddr;
+	uint8_t   reason;
+} __packed;
+
+#define BT_HCI_OP_LINK_KEY_REPLY                BT_OP(BT_OGF_LINK_CTRL, 0x000b)
+struct bt_hci_cp_link_key_reply {
+	bt_addr_t bdaddr;
+	uint8_t   link_key[16];
+} __packed;
+
+#define BT_HCI_OP_LINK_KEY_NEG_REPLY            BT_OP(BT_OGF_LINK_CTRL, 0x000c)
+struct bt_hci_cp_link_key_neg_reply {
+	bt_addr_t bdaddr;
+} __packed;
+
+#define BT_HCI_OP_PIN_CODE_REPLY                BT_OP(BT_OGF_LINK_CTRL, 0x000d)
+struct bt_hci_cp_pin_code_reply {
+	bt_addr_t bdaddr;
+	uint8_t   pin_len;
+	uint8_t   pin_code[16];
+} __packed;
+struct bt_hci_rp_pin_code_reply {
+	uint8_t      status;
+	bt_addr_t bdaddr;
+} __packed;
+
+#define BT_HCI_OP_PIN_CODE_NEG_REPLY            BT_OP(BT_OGF_LINK_CTRL, 0x000e)
+struct bt_hci_cp_pin_code_neg_reply {
+	bt_addr_t bdaddr;
+} __packed;
+struct bt_hci_rp_pin_code_neg_reply {
+	uint8_t   status;
+	bt_addr_t bdaddr;
+} __packed;
+
+#define BT_HCI_OP_AUTH_REQUESTED                BT_OP(BT_OGF_LINK_CTRL, 0x0011)
+struct bt_hci_cp_auth_requested {
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_OP_SET_CONN_ENCRYPT              BT_OP(BT_OGF_LINK_CTRL, 0x0013)
+struct bt_hci_cp_set_conn_encrypt {
+	uint16_t handle;
+	uint8_t  encrypt;
+} __packed;
+
+#define BT_HCI_OP_REMOTE_NAME_REQUEST           BT_OP(BT_OGF_LINK_CTRL, 0x0019)
+struct bt_hci_cp_remote_name_request {
+	bt_addr_t bdaddr;
+	uint8_t   pscan_rep_mode;
+	uint8_t   reserved;
+	uint16_t  clock_offset;
+} __packed;
+
+#define BT_HCI_OP_REMOTE_NAME_CANCEL            BT_OP(BT_OGF_LINK_CTRL, 0x001a)
+struct bt_hci_cp_remote_name_cancel {
+	bt_addr_t bdaddr;
+} __packed;
+struct bt_hci_rp_remote_name_cancel {
+	uint8_t   status;
+	bt_addr_t bdaddr;
+} __packed;
+
+#define BT_HCI_OP_READ_REMOTE_FEATURES          BT_OP(BT_OGF_LINK_CTRL, 0x001b)
+struct bt_hci_cp_read_remote_features {
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_OP_READ_REMOTE_EXT_FEATURES      BT_OP(BT_OGF_LINK_CTRL, 0x001c)
+struct bt_hci_cp_read_remote_ext_features {
+	uint16_t handle;
+	uint8_t  page;
+} __packed;
+
+#define BT_HCI_OP_READ_REMOTE_VERSION_INFO      BT_OP(BT_OGF_LINK_CTRL, 0x001d)
+struct bt_hci_cp_read_remote_version_info {
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_OP_IO_CAPABILITY_REPLY           BT_OP(BT_OGF_LINK_CTRL, 0x002b)
+struct bt_hci_cp_io_capability_reply {
+	bt_addr_t bdaddr;
+	uint8_t   capability;
+	uint8_t   oob_data;
+	uint8_t   authentication;
+} __packed;
+
+#define BT_HCI_OP_USER_CONFIRM_REPLY            BT_OP(BT_OGF_LINK_CTRL, 0x002c)
+#define BT_HCI_OP_USER_CONFIRM_NEG_REPLY        BT_OP(BT_OGF_LINK_CTRL, 0x002d)
+struct bt_hci_cp_user_confirm_reply {
+	bt_addr_t bdaddr;
+} __packed;
+struct bt_hci_rp_user_confirm_reply {
+	uint8_t   status;
+	bt_addr_t bdaddr;
+} __packed;
+
+#define BT_HCI_OP_USER_PASSKEY_REPLY            BT_OP(BT_OGF_LINK_CTRL, 0x002e)
+struct bt_hci_cp_user_passkey_reply {
+	bt_addr_t bdaddr;
+	uint32_t  passkey;
+} __packed;
+
+#define BT_HCI_OP_USER_PASSKEY_NEG_REPLY        BT_OP(BT_OGF_LINK_CTRL, 0x002f)
+struct bt_hci_cp_user_passkey_neg_reply {
+	bt_addr_t bdaddr;
+} __packed;
+
+#define BT_HCI_OP_IO_CAPABILITY_NEG_REPLY       BT_OP(BT_OGF_LINK_CTRL, 0x0034)
+struct bt_hci_cp_io_capability_neg_reply {
+	bt_addr_t bdaddr;
+	uint8_t   reason;
+} __packed;
+
+#define BT_HCI_OP_SET_EVENT_MASK                BT_OP(BT_OGF_BASEBAND, 0x0001)
+struct bt_hci_cp_set_event_mask {
+	uint8_t  events[8];
+} __packed;
+
+#define BT_HCI_OP_RESET                         BT_OP(BT_OGF_BASEBAND, 0x0003)
+
+#define BT_HCI_OP_WRITE_LOCAL_NAME              BT_OP(BT_OGF_BASEBAND, 0x0013)
+struct bt_hci_write_local_name {
+	uint8_t local_name[248];
+} __packed;
+
+#define BT_HCI_OP_WRITE_PAGE_TIMEOUT            BT_OP(BT_OGF_BASEBAND, 0x0018)
+
+#define BT_HCI_OP_WRITE_SCAN_ENABLE             BT_OP(BT_OGF_BASEBAND, 0x001a)
+#define BT_BREDR_SCAN_DISABLED                  0x00
+#define BT_BREDR_SCAN_INQUIRY                   0x01
+#define BT_BREDR_SCAN_PAGE                      0x02
+
+#define BT_TX_POWER_LEVEL_CURRENT               0x00
+#define BT_TX_POWER_LEVEL_MAX                   0x01
+#define BT_HCI_OP_READ_TX_POWER_LEVEL           BT_OP(BT_OGF_BASEBAND, 0x002d)
+struct bt_hci_cp_read_tx_power_level {
+	uint16_t handle;
+	uint8_t  type;
+} __packed;
+
+struct bt_hci_rp_read_tx_power_level {
+	uint8_t  status;
+	uint16_t handle;
+	int8_t   tx_power_level;
+} __packed;
+
+#define BT_HCI_CTL_TO_HOST_FLOW_DISABLE         0x00
+#define BT_HCI_CTL_TO_HOST_FLOW_ENABLE          0x01
+#define BT_HCI_OP_SET_CTL_TO_HOST_FLOW          BT_OP(BT_OGF_BASEBAND, 0x0031)
+struct bt_hci_cp_set_ctl_to_host_flow {
+	uint8_t  flow_enable;
+} __packed;
+
+#define BT_HCI_OP_HOST_BUFFER_SIZE              BT_OP(BT_OGF_BASEBAND, 0x0033)
+struct bt_hci_cp_host_buffer_size {
+	uint16_t acl_mtu;
+	uint8_t  sco_mtu;
+	uint16_t acl_pkts;
+	uint16_t sco_pkts;
+} __packed;
+
+struct bt_hci_handle_count {
+	uint16_t handle;
+	uint16_t count;
+} __packed;
+
+#define BT_HCI_OP_HOST_NUM_COMPLETED_PACKETS    BT_OP(BT_OGF_BASEBAND, 0x0035)
+struct bt_hci_cp_host_num_completed_packets {
+	uint8_t  num_handles;
+	struct bt_hci_handle_count h[0];
+} __packed;
+
+#define BT_HCI_OP_WRITE_INQUIRY_MODE            BT_OP(BT_OGF_BASEBAND, 0x0045)
+struct bt_hci_cp_write_inquiry_mode {
+	uint8_t  mode;
+} __packed;
+
+#define BT_HCI_OP_WRITE_SSP_MODE                BT_OP(BT_OGF_BASEBAND, 0x0056)
+struct bt_hci_cp_write_ssp_mode {
+	uint8_t mode;
+} __packed;
+
+#define BT_HCI_OP_SET_EVENT_MASK_PAGE_2         BT_OP(BT_OGF_BASEBAND, 0x0063)
+struct bt_hci_cp_set_event_mask_page_2 {
+	uint8_t  events_page_2[8];
+} __packed;
+
+#define BT_HCI_OP_LE_WRITE_LE_HOST_SUPP         BT_OP(BT_OGF_BASEBAND, 0x006d)
+struct bt_hci_cp_write_le_host_supp {
+	uint8_t  le;
+	uint8_t  simul;
+} __packed;
+
+#define BT_HCI_OP_WRITE_SC_HOST_SUPP            BT_OP(BT_OGF_BASEBAND, 0x007a)
+struct bt_hci_cp_write_sc_host_supp {
+	uint8_t  sc_support;
+} __packed;
+
+#define BT_HCI_OP_READ_AUTH_PAYLOAD_TIMEOUT     BT_OP(BT_OGF_BASEBAND, 0x007b)
+struct bt_hci_cp_read_auth_payload_timeout {
+	uint16_t handle;
+} __packed;
+
+struct bt_hci_rp_read_auth_payload_timeout {
+	uint8_t  status;
+	uint16_t handle;
+	uint16_t auth_payload_timeout;
+} __packed;
+
+#define BT_HCI_OP_WRITE_AUTH_PAYLOAD_TIMEOUT    BT_OP(BT_OGF_BASEBAND, 0x007c)
+struct bt_hci_cp_write_auth_payload_timeout {
+	uint16_t handle;
+	uint16_t auth_payload_timeout;
+} __packed;
+
+struct bt_hci_rp_write_auth_payload_timeout {
+	uint8_t  status;
+	uint16_t handle;
+} __packed;
+
+/* HCI version from Assigned Numbers */
+#define BT_HCI_VERSION_1_0B                     0
+#define BT_HCI_VERSION_1_1                      1
+#define BT_HCI_VERSION_1_2                      2
+#define BT_HCI_VERSION_2_0                      3
+#define BT_HCI_VERSION_2_1                      4
+#define BT_HCI_VERSION_3_0                      5
+#define BT_HCI_VERSION_4_0                      6
+#define BT_HCI_VERSION_4_1                      7
+#define BT_HCI_VERSION_4_2                      8
+#define BT_HCI_VERSION_5_0                      9
+#define BT_HCI_VERSION_5_1                      10
+#define BT_HCI_VERSION_5_2                      11
+
+#define BT_HCI_OP_READ_LOCAL_VERSION_INFO       BT_OP(BT_OGF_INFO, 0x0001)
+struct bt_hci_rp_read_local_version_info {
+	uint8_t  status;
+	uint8_t  hci_version;
+	uint16_t hci_revision;
+	uint8_t  lmp_version;
+	uint16_t manufacturer;
+	uint16_t lmp_subversion;
+} __packed;
+
+#define BT_HCI_OP_READ_SUPPORTED_COMMANDS       BT_OP(BT_OGF_INFO, 0x0002)
+struct bt_hci_rp_read_supported_commands {
+	uint8_t  status;
+	uint8_t  commands[64];
+} __packed;
+
+#define BT_HCI_OP_READ_LOCAL_EXT_FEATURES       BT_OP(BT_OGF_INFO, 0x0004)
+struct bt_hci_cp_read_local_ext_features {
+	uint8_t page;
+};
+struct bt_hci_rp_read_local_ext_features {
+	uint8_t  status;
+	uint8_t  page;
+	uint8_t  max_page;
+	uint8_t  ext_features[8];
+} __packed;
+
+#define BT_HCI_OP_READ_LOCAL_FEATURES           BT_OP(BT_OGF_INFO, 0x0003)
+struct bt_hci_rp_read_local_features {
+	uint8_t  status;
+	uint8_t  features[8];
+} __packed;
+
+#define BT_HCI_OP_READ_BUFFER_SIZE              BT_OP(BT_OGF_INFO, 0x0005)
+struct bt_hci_rp_read_buffer_size {
+	uint8_t  status;
+	uint16_t acl_max_len;
+	uint8_t  sco_max_len;
+	uint16_t acl_max_num;
+	uint16_t sco_max_num;
+} __packed;
+
+#define BT_HCI_OP_READ_BD_ADDR                  BT_OP(BT_OGF_INFO, 0x0009)
+struct bt_hci_rp_read_bd_addr {
+	uint8_t   status;
+	bt_addr_t bdaddr;
+} __packed;
+
+#define BT_HCI_OP_READ_RSSI                     BT_OP(BT_OGF_STATUS, 0x0005)
+struct bt_hci_cp_read_rssi {
+	uint16_t handle;
+} __packed;
+struct bt_hci_rp_read_rssi {
+	uint8_t  status;
+	uint16_t handle;
+	int8_t   rssi;
+} __packed;
+
+#define BT_HCI_ENCRYPTION_KEY_SIZE_MIN          7
+#define BT_HCI_ENCRYPTION_KEY_SIZE_MAX          16
+
+#define BT_HCI_OP_READ_ENCRYPTION_KEY_SIZE      BT_OP(BT_OGF_STATUS, 0x0008)
+struct bt_hci_cp_read_encryption_key_size {
+	uint16_t handle;
+} __packed;
+struct bt_hci_rp_read_encryption_key_size {
+	uint8_t  status;
+	uint16_t handle;
+	uint8_t  key_size;
+} __packed;
+
+/* BLE */
+
+#define BT_HCI_OP_LE_SET_EVENT_MASK             BT_OP(BT_OGF_LE, 0x0001)
+struct bt_hci_cp_le_set_event_mask {
+	uint8_t events[8];
+} __packed;
+
+#define BT_HCI_OP_LE_READ_BUFFER_SIZE           BT_OP(BT_OGF_LE, 0x0002)
+struct bt_hci_rp_le_read_buffer_size {
+	uint8_t  status;
+	uint16_t le_max_len;
+	uint8_t  le_max_num;
+} __packed;
+
+#define BT_HCI_OP_LE_READ_LOCAL_FEATURES        BT_OP(BT_OGF_LE, 0x0003)
+struct bt_hci_rp_le_read_local_features {
+	uint8_t  status;
+	uint8_t  features[8];
+} __packed;
+
+#define BT_HCI_OP_LE_SET_RANDOM_ADDRESS         BT_OP(BT_OGF_LE, 0x0005)
+struct bt_hci_cp_le_set_random_address {
+	bt_addr_t bdaddr;
+} __packed;
+
+/* LE Advertising Types (LE Advertising Parameters Set)*/
+#define BT_LE_ADV_IND                  (__DEPRECATED_MACRO 0x00)
+#define BT_LE_ADV_DIRECT_IND           (__DEPRECATED_MACRO 0x01)
+#define BT_LE_ADV_SCAN_IND             (__DEPRECATED_MACRO 0x02)
+#define BT_LE_ADV_NONCONN_IND          (__DEPRECATED_MACRO 0x03)
+#define BT_LE_ADV_DIRECT_IND_LOW_DUTY  (__DEPRECATED_MACRO 0x04)
+/* LE Advertising PDU Types. */
+#define BT_LE_ADV_SCAN_RSP             (__DEPRECATED_MACRO 0x04)
+
+#define BT_HCI_ADV_IND                          0x00
+#define BT_HCI_ADV_DIRECT_IND                   0x01
+#define BT_HCI_ADV_SCAN_IND                     0x02
+#define BT_HCI_ADV_NONCONN_IND                  0x03
+#define BT_HCI_ADV_DIRECT_IND_LOW_DUTY          0x04
+#define BT_HCI_ADV_SCAN_RSP                     0x04
+
+#define BT_LE_ADV_FP_NO_WHITELIST               0x00
+#define BT_LE_ADV_FP_WHITELIST_SCAN_REQ         0x01
+#define BT_LE_ADV_FP_WHITELIST_CONN_IND         0x02
+#define BT_LE_ADV_FP_WHITELIST_BOTH             0x03
+
+#define BT_HCI_OP_LE_SET_ADV_PARAM              BT_OP(BT_OGF_LE, 0x0006)
+struct bt_hci_cp_le_set_adv_param {
+	uint16_t     min_interval;
+	uint16_t     max_interval;
+	uint8_t      type;
+	uint8_t      own_addr_type;
+	bt_addr_le_t direct_addr;
+	uint8_t      channel_map;
+	uint8_t      filter_policy;
+} __packed;
+
+#define BT_HCI_OP_LE_READ_ADV_CHAN_TX_POWER     BT_OP(BT_OGF_LE, 0x0007)
+struct bt_hci_rp_le_read_chan_tx_power {
+	uint8_t status;
+	int8_t  tx_power_level;
+} __packed;
+
+#define BT_HCI_OP_LE_SET_ADV_DATA               BT_OP(BT_OGF_LE, 0x0008)
+struct bt_hci_cp_le_set_adv_data {
+	uint8_t  len;
+	uint8_t  data[31];
+} __packed;
+
+#define BT_HCI_OP_LE_SET_SCAN_RSP_DATA          BT_OP(BT_OGF_LE, 0x0009)
+struct bt_hci_cp_le_set_scan_rsp_data {
+	uint8_t  len;
+	uint8_t  data[31];
+} __packed;
+
+#define BT_HCI_LE_ADV_DISABLE                   0x00
+#define BT_HCI_LE_ADV_ENABLE                    0x01
+
+#define BT_HCI_OP_LE_SET_ADV_ENABLE             BT_OP(BT_OGF_LE, 0x000a)
+struct bt_hci_cp_le_set_adv_enable {
+	uint8_t  enable;
+} __packed;
+
+/* Scan types */
+#define BT_HCI_OP_LE_SET_SCAN_PARAM             BT_OP(BT_OGF_LE, 0x000b)
+#define BT_HCI_LE_SCAN_PASSIVE                  0x00
+#define BT_HCI_LE_SCAN_ACTIVE                   0x01
+
+#define BT_HCI_LE_SCAN_FP_NO_WHITELIST          0x00
+#define BT_HCI_LE_SCAN_FP_USE_WHITELIST         0x01
+
+struct bt_hci_cp_le_set_scan_param {
+	uint8_t  scan_type;
+	uint16_t interval;
+	uint16_t window;
+	uint8_t  addr_type;
+	uint8_t  filter_policy;
+} __packed;
+
+#define BT_HCI_OP_LE_SET_SCAN_ENABLE            BT_OP(BT_OGF_LE, 0x000c)
+
+#define BT_HCI_LE_SCAN_DISABLE                  0x00
+#define BT_HCI_LE_SCAN_ENABLE                   0x01
+
+#define BT_HCI_LE_SCAN_FILTER_DUP_DISABLE       0x00
+#define BT_HCI_LE_SCAN_FILTER_DUP_ENABLE        0x01
+
+struct bt_hci_cp_le_set_scan_enable {
+	uint8_t  enable;
+	uint8_t  filter_dup;
+} __packed;
+
+#define BT_HCI_OP_LE_CREATE_CONN                BT_OP(BT_OGF_LE, 0x000d)
+
+#define BT_HCI_LE_CREATE_CONN_FP_DIRECT         0x00
+#define BT_HCI_LE_CREATE_CONN_FP_WHITELIST      0x01
+
+struct bt_hci_cp_le_create_conn {
+	uint16_t     scan_interval;
+	uint16_t     scan_window;
+	uint8_t      filter_policy;
+	bt_addr_le_t peer_addr;
+	uint8_t      own_addr_type;
+	uint16_t     conn_interval_min;
+	uint16_t     conn_interval_max;
+	uint16_t     conn_latency;
+	uint16_t     supervision_timeout;
+	uint16_t     min_ce_len;
+	uint16_t     max_ce_len;
+} __packed;
+
+#define BT_HCI_OP_LE_CREATE_CONN_CANCEL         BT_OP(BT_OGF_LE, 0x000e)
+
+#define BT_HCI_OP_LE_READ_WL_SIZE               BT_OP(BT_OGF_LE, 0x000f)
+struct bt_hci_rp_le_read_wl_size {
+	uint8_t  status;
+	uint8_t  wl_size;
+} __packed;
+
+#define BT_HCI_OP_LE_CLEAR_WL                   BT_OP(BT_OGF_LE, 0x0010)
+
+#define BT_HCI_OP_LE_ADD_DEV_TO_WL              BT_OP(BT_OGF_LE, 0x0011)
+struct bt_hci_cp_le_add_dev_to_wl {
+	bt_addr_le_t  addr;
+} __packed;
+
+#define BT_HCI_OP_LE_REM_DEV_FROM_WL            BT_OP(BT_OGF_LE, 0x0012)
+struct bt_hci_cp_le_rem_dev_from_wl {
+	bt_addr_le_t  addr;
+} __packed;
+
+#define BT_HCI_OP_LE_CONN_UPDATE                BT_OP(BT_OGF_LE, 0x0013)
+struct hci_cp_le_conn_update {
+	uint16_t handle;
+	uint16_t conn_interval_min;
+	uint16_t conn_interval_max;
+	uint16_t conn_latency;
+	uint16_t supervision_timeout;
+	uint16_t min_ce_len;
+	uint16_t max_ce_len;
+} __packed;
+
+#define BT_HCI_OP_LE_SET_HOST_CHAN_CLASSIF      BT_OP(BT_OGF_LE, 0x0014)
+struct bt_hci_cp_le_set_host_chan_classif {
+	uint8_t  ch_map[5];
+} __packed;
+
+#define BT_HCI_OP_LE_READ_CHAN_MAP              BT_OP(BT_OGF_LE, 0x0015)
+struct bt_hci_cp_le_read_chan_map {
+	uint16_t handle;
+} __packed;
+struct bt_hci_rp_le_read_chan_map {
+	uint8_t  status;
+	uint16_t handle;
+	uint8_t  ch_map[5];
+} __packed;
+
+#define BT_HCI_OP_LE_READ_REMOTE_FEATURES       BT_OP(BT_OGF_LE, 0x0016)
+struct bt_hci_cp_le_read_remote_features {
+	uint16_t  handle;
+} __packed;
+
+#define BT_HCI_OP_LE_ENCRYPT                    BT_OP(BT_OGF_LE, 0x0017)
+struct bt_hci_cp_le_encrypt {
+	uint8_t  key[16];
+	uint8_t  plaintext[16];
+} __packed;
+struct bt_hci_rp_le_encrypt {
+	uint8_t  status;
+	uint8_t  enc_data[16];
+} __packed;
+
+#define BT_HCI_OP_LE_RAND                       BT_OP(BT_OGF_LE, 0x0018)
+struct bt_hci_rp_le_rand {
+	uint8_t  status;
+	uint8_t  rand[8];
+} __packed;
+
+#define BT_HCI_OP_LE_START_ENCRYPTION           BT_OP(BT_OGF_LE, 0x0019)
+struct bt_hci_cp_le_start_encryption {
+	uint16_t handle;
+	uint64_t rand;
+	uint16_t ediv;
+	uint8_t  ltk[16];
+} __packed;
+
+#define BT_HCI_OP_LE_LTK_REQ_REPLY              BT_OP(BT_OGF_LE, 0x001a)
+struct bt_hci_cp_le_ltk_req_reply {
+	uint16_t handle;
+	uint8_t  ltk[16];
+} __packed;
+struct bt_hci_rp_le_ltk_req_reply {
+	uint8_t  status;
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_OP_LE_LTK_REQ_NEG_REPLY          BT_OP(BT_OGF_LE, 0x001b)
+struct bt_hci_cp_le_ltk_req_neg_reply {
+	uint16_t handle;
+} __packed;
+struct bt_hci_rp_le_ltk_req_neg_reply {
+	uint8_t  status;
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_OP_LE_READ_SUPP_STATES           BT_OP(BT_OGF_LE, 0x001c)
+struct bt_hci_rp_le_read_supp_states {
+	uint8_t  status;
+	uint8_t  le_states[8];
+} __packed;
+
+#define BT_HCI_OP_LE_RX_TEST                    BT_OP(BT_OGF_LE, 0x001d)
+struct bt_hci_cp_le_rx_test {
+	uint8_t  rx_ch;
+} __packed;
+
+#define BT_HCI_OP_LE_TX_TEST                    BT_OP(BT_OGF_LE, 0x001e)
+struct bt_hci_cp_le_tx_test {
+	uint8_t  tx_ch;
+	uint8_t  test_data_len;
+	uint8_t  pkt_payload;
+} __packed;
+
+#define BT_HCI_OP_LE_TEST_END                   BT_OP(BT_OGF_LE, 0x001f)
+struct bt_hci_rp_le_test_end {
+	uint8_t  status;
+	uint16_t rx_pkt_count;
+} __packed;
+
+#define BT_HCI_OP_LE_CONN_PARAM_REQ_REPLY       BT_OP(BT_OGF_LE, 0x0020)
+struct bt_hci_cp_le_conn_param_req_reply {
+	uint16_t handle;
+	uint16_t interval_min;
+	uint16_t interval_max;
+	uint16_t latency;
+	uint16_t timeout;
+	uint16_t min_ce_len;
+	uint16_t max_ce_len;
+} __packed;
+struct bt_hci_rp_le_conn_param_req_reply {
+	uint8_t  status;
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_OP_LE_CONN_PARAM_REQ_NEG_REPLY   BT_OP(BT_OGF_LE, 0x0021)
+struct bt_hci_cp_le_conn_param_req_neg_reply {
+	uint16_t handle;
+	uint8_t  reason;
+} __packed;
+struct bt_hci_rp_le_conn_param_req_neg_reply {
+	uint8_t  status;
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_OP_LE_SET_DATA_LEN               BT_OP(BT_OGF_LE, 0x0022)
+struct bt_hci_cp_le_set_data_len {
+	uint16_t handle;
+	uint16_t tx_octets;
+	uint16_t tx_time;
+} __packed;
+struct bt_hci_rp_le_set_data_len {
+	uint8_t  status;
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_OP_LE_READ_DEFAULT_DATA_LEN      BT_OP(BT_OGF_LE, 0x0023)
+struct bt_hci_rp_le_read_default_data_len {
+	uint8_t  status;
+	uint16_t max_tx_octets;
+	uint16_t max_tx_time;
+} __packed;
+
+#define BT_HCI_OP_LE_WRITE_DEFAULT_DATA_LEN     BT_OP(BT_OGF_LE, 0x0024)
+struct bt_hci_cp_le_write_default_data_len {
+	uint16_t max_tx_octets;
+	uint16_t max_tx_time;
+} __packed;
+
+#define BT_HCI_OP_LE_P256_PUBLIC_KEY            BT_OP(BT_OGF_LE, 0x0025)
+
+#define BT_HCI_OP_LE_GENERATE_DHKEY             BT_OP(BT_OGF_LE, 0x0026)
+struct bt_hci_cp_le_generate_dhkey {
+	uint8_t key[64];
+} __packed;
+
+#define BT_HCI_OP_LE_ADD_DEV_TO_RL              BT_OP(BT_OGF_LE, 0x0027)
+struct bt_hci_cp_le_add_dev_to_rl {
+	bt_addr_le_t  peer_id_addr;
+	uint8_t       peer_irk[16];
+	uint8_t       local_irk[16];
+} __packed;
+
+#define BT_HCI_OP_LE_REM_DEV_FROM_RL            BT_OP(BT_OGF_LE, 0x0028)
+struct bt_hci_cp_le_rem_dev_from_rl {
+	bt_addr_le_t  peer_id_addr;
+} __packed;
+
+#define BT_HCI_OP_LE_CLEAR_RL                   BT_OP(BT_OGF_LE, 0x0029)
+
+#define BT_HCI_OP_LE_READ_RL_SIZE               BT_OP(BT_OGF_LE, 0x002a)
+struct bt_hci_rp_le_read_rl_size {
+	uint8_t  status;
+	uint8_t  rl_size;
+} __packed;
+
+#define BT_HCI_OP_LE_READ_PEER_RPA              BT_OP(BT_OGF_LE, 0x002b)
+struct bt_hci_cp_le_read_peer_rpa {
+	bt_addr_le_t  peer_id_addr;
+} __packed;
+struct bt_hci_rp_le_read_peer_rpa {
+	uint8_t    status;
+	bt_addr_t  peer_rpa;
+} __packed;
+
+#define BT_HCI_OP_LE_READ_LOCAL_RPA             BT_OP(BT_OGF_LE, 0x002c)
+struct bt_hci_cp_le_read_local_rpa {
+	bt_addr_le_t  peer_id_addr;
+} __packed;
+struct bt_hci_rp_le_read_local_rpa {
+	uint8_t    status;
+	bt_addr_t  local_rpa;
+} __packed;
+
+#define BT_HCI_ADDR_RES_DISABLE                 0x00
+#define BT_HCI_ADDR_RES_ENABLE                  0x01
+
+#define BT_HCI_OP_LE_SET_ADDR_RES_ENABLE        BT_OP(BT_OGF_LE, 0x002d)
+struct bt_hci_cp_le_set_addr_res_enable {
+	uint8_t  enable;
+} __packed;
+
+#define BT_HCI_OP_LE_SET_RPA_TIMEOUT            BT_OP(BT_OGF_LE, 0x002e)
+struct bt_hci_cp_le_set_rpa_timeout {
+	uint16_t rpa_timeout;
+} __packed;
+
+#define BT_HCI_OP_LE_READ_MAX_DATA_LEN          BT_OP(BT_OGF_LE, 0x002f)
+struct bt_hci_rp_le_read_max_data_len {
+	uint8_t  status;
+	uint16_t max_tx_octets;
+	uint16_t max_tx_time;
+	uint16_t max_rx_octets;
+	uint16_t max_rx_time;
+} __packed;
+
+#define BT_HCI_LE_PHY_1M                        0x01
+#define BT_HCI_LE_PHY_2M                        0x02
+#define BT_HCI_LE_PHY_CODED                     0x03
+
+#define BT_HCI_OP_LE_READ_PHY                   BT_OP(BT_OGF_LE, 0x0030)
+struct bt_hci_cp_le_read_phy {
+	uint16_t handle;
+} __packed;
+struct bt_hci_rp_le_read_phy {
+	uint8_t  status;
+	uint16_t handle;
+	uint8_t  tx_phy;
+	uint8_t  rx_phy;
+} __packed;
+
+#define BT_HCI_LE_PHY_TX_ANY                    BIT(0)
+#define BT_HCI_LE_PHY_RX_ANY                    BIT(1)
+
+#define BT_HCI_LE_PHY_PREFER_1M                 BIT(0)
+#define BT_HCI_LE_PHY_PREFER_2M                 BIT(1)
+#define BT_HCI_LE_PHY_PREFER_CODED              BIT(2)
+
+#define BT_HCI_OP_LE_SET_DEFAULT_PHY            BT_OP(BT_OGF_LE, 0x0031)
+struct bt_hci_cp_le_set_default_phy {
+	uint8_t all_phys;
+	uint8_t tx_phys;
+	uint8_t rx_phys;
+} __packed;
+
+#define BT_HCI_LE_PHY_CODED_ANY                 0x00
+#define BT_HCI_LE_PHY_CODED_S2                  0x01
+#define BT_HCI_LE_PHY_CODED_S8                  0x02
+
+#define BT_HCI_OP_LE_SET_PHY                    BT_OP(BT_OGF_LE, 0x0032)
+struct bt_hci_cp_le_set_phy {
+	uint16_t  handle;
+	uint8_t   all_phys;
+	uint8_t   tx_phys;
+	uint8_t   rx_phys;
+	uint16_t  phy_opts;
+} __packed;
+
+#define BT_HCI_LE_MOD_INDEX_STANDARD            0x00
+#define BT_HCI_LE_MOD_INDEX_STABLE              0x01
+
+#define BT_HCI_OP_LE_ENH_RX_TEST                BT_OP(BT_OGF_LE, 0x0033)
+struct bt_hci_cp_le_enh_rx_test {
+	uint8_t  rx_ch;
+	uint8_t  phy;
+	uint8_t  mod_index;
+} __packed;
+
+/* Extends BT_HCI_LE_PHY */
+#define BT_HCI_LE_TX_PHY_CODED_S8               0x03
+#define BT_HCI_LE_TX_PHY_CODED_S2               0x04
+
+#define BT_HCI_OP_LE_ENH_TX_TEST                BT_OP(BT_OGF_LE, 0x0034)
+struct bt_hci_cp_le_enh_tx_test {
+	uint8_t  tx_ch;
+	uint8_t  test_data_len;
+	uint8_t  pkt_payload;
+	uint8_t  phy;
+} __packed;
+
+#define BT_HCI_OP_LE_SET_ADV_SET_RANDOM_ADDR    BT_OP(BT_OGF_LE, 0x0035)
+struct bt_hci_cp_le_set_adv_set_random_addr {
+	uint8_t   handle;
+	bt_addr_t bdaddr;
+} __packed;
+
+#define BT_HCI_LE_ADV_PROP_CONN                 BIT(0)
+#define BT_HCI_LE_ADV_PROP_SCAN                 BIT(1)
+#define BT_HCI_LE_ADV_PROP_DIRECT               BIT(2)
+#define BT_HCI_LE_ADV_PROP_HI_DC_CONN           BIT(3)
+#define BT_HCI_LE_ADV_PROP_LEGACY               BIT(4)
+#define BT_HCI_LE_ADV_PROP_ANON                 BIT(5)
+#define BT_HCI_LE_ADV_PROP_TX_POWER             BIT(6)
+
+#define BT_HCI_LE_ADV_SCAN_REQ_ENABLE  1
+#define BT_HCI_LE_ADV_SCAN_REQ_DISABLE 0
+
+#define BT_HCI_LE_ADV_TX_POWER_NO_PREF 0x7F
+
+#define BT_HCI_LE_ADV_HANDLE_MAX       0xEF
+
+#define BT_HCI_OP_LE_SET_EXT_ADV_PARAM          BT_OP(BT_OGF_LE, 0x0036)
+struct bt_hci_cp_le_set_ext_adv_param {
+	uint8_t      handle;
+	uint16_t     props;
+	uint8_t      prim_min_interval[3];
+	uint8_t      prim_max_interval[3];
+	uint8_t      prim_channel_map;
+	uint8_t      own_addr_type;
+	bt_addr_le_t peer_addr;
+	uint8_t      filter_policy;
+	int8_t       tx_power;
+	uint8_t      prim_adv_phy;
+	uint8_t      sec_adv_max_skip;
+	uint8_t      sec_adv_phy;
+	uint8_t      sid;
+	uint8_t      scan_req_notify_enable;
+} __packed;
+struct bt_hci_rp_le_set_ext_adv_param {
+	uint8_t status;
+	int8_t  tx_power;
+} __packed;
+
+#define BT_HCI_LE_EXT_ADV_OP_INTERM_FRAG        0x00
+#define BT_HCI_LE_EXT_ADV_OP_FIRST_FRAG         0x01
+#define BT_HCI_LE_EXT_ADV_OP_LAST_FRAG          0x02
+#define BT_HCI_LE_EXT_ADV_OP_COMPLETE_DATA      0x03
+#define BT_HCI_LE_EXT_ADV_OP_UNCHANGED_DATA     0x04
+
+#define BT_HCI_LE_EXT_ADV_FRAG_ENABLED          0x00
+#define BT_HCI_LE_EXT_ADV_FRAG_DISABLED         0x01
+
+#define BT_HCI_LE_EXT_ADV_FRAG_MAX_LEN          251
+
+#define BT_HCI_OP_LE_SET_EXT_ADV_DATA           BT_OP(BT_OGF_LE, 0x0037)
+struct bt_hci_cp_le_set_ext_adv_data {
+	uint8_t  handle;
+	uint8_t  op;
+	uint8_t  frag_pref;
+	uint8_t  len;
+	uint8_t  data[251];
+} __packed;
+
+#define BT_HCI_OP_LE_SET_EXT_SCAN_RSP_DATA      BT_OP(BT_OGF_LE, 0x0038)
+struct bt_hci_cp_le_set_ext_scan_rsp_data {
+	uint8_t  handle;
+	uint8_t  op;
+	uint8_t  frag_pref;
+	uint8_t  len;
+	uint8_t  data[251];
+} __packed;
+
+#define BT_HCI_OP_LE_SET_EXT_ADV_ENABLE         BT_OP(BT_OGF_LE, 0x0039)
+struct bt_hci_ext_adv_set {
+	uint8_t  handle;
+	uint16_t duration;
+	uint8_t  max_ext_adv_evts;
+} __packed;
+
+struct bt_hci_cp_le_set_ext_adv_enable {
+	uint8_t  enable;
+	uint8_t  set_num;
+	struct bt_hci_ext_adv_set s[0];
+} __packed;
+
+#define BT_HCI_OP_LE_READ_MAX_ADV_DATA_LEN      BT_OP(BT_OGF_LE, 0x003a)
+struct bt_hci_rp_le_read_max_adv_data_len {
+	uint8_t  status;
+	uint16_t max_adv_data_len;
+} __packed;
+
+#define BT_HCI_OP_LE_READ_NUM_ADV_SETS          BT_OP(BT_OGF_LE, 0x003b)
+struct bt_hci_rp_le_read_num_adv_sets {
+	uint8_t  status;
+	uint8_t  num_sets;
+} __packed;
+
+#define BT_HCI_OP_LE_REMOVE_ADV_SET             BT_OP(BT_OGF_LE, 0x003c)
+struct bt_hci_cp_le_remove_adv_set {
+	uint8_t  handle;
+} __packed;
+
+#define BT_HCI_OP_CLEAR_ADV_SETS                BT_OP(BT_OGF_LE, 0x003d)
+
+#define BT_HCI_OP_LE_SET_PER_ADV_PARAM          BT_OP(BT_OGF_LE, 0x003e)
+struct bt_hci_cp_le_set_per_adv_param {
+	uint8_t  handle;
+	uint16_t min_interval;
+	uint16_t max_interval;
+	uint16_t props;
+} __packed;
+
+#define BT_HCI_LE_PER_ADV_OP_INTERM_FRAG        0x00
+#define BT_HCI_LE_PER_ADV_OP_FIRST_FRAG         0x01
+#define BT_HCI_LE_PER_ADV_OP_LAST_FRAG          0x02
+#define BT_HCI_LE_PER_ADV_OP_COMPLETE_DATA      0x03
+
+#define BT_HCI_LE_PER_ADV_FRAG_MAX_LEN          252
+
+#define BT_HCI_OP_LE_SET_PER_ADV_DATA           BT_OP(BT_OGF_LE, 0x003f)
+struct bt_hci_cp_le_set_per_adv_data {
+	uint8_t  handle;
+	uint8_t  op;
+	uint8_t  len;
+	uint8_t  data[251];
+} __packed;
+
+#define BT_HCI_OP_LE_SET_PER_ADV_ENABLE         BT_OP(BT_OGF_LE, 0x0040)
+struct bt_hci_cp_le_set_per_adv_enable {
+	uint8_t  enable;
+	uint8_t  handle;
+} __packed;
+
+#define BT_HCI_OP_LE_SET_EXT_SCAN_PARAM         BT_OP(BT_OGF_LE, 0x0041)
+struct bt_hci_ext_scan_phy {
+	uint8_t  type;
+	uint16_t interval;
+	uint16_t window;
+} __packed;
+
+#define BT_HCI_LE_EXT_SCAN_PHY_1M               BIT(0)
+#define BT_HCI_LE_EXT_SCAN_PHY_2M               BIT(1)
+#define BT_HCI_LE_EXT_SCAN_PHY_CODED            BIT(2)
+
+struct bt_hci_cp_le_set_ext_scan_param {
+	uint8_t  own_addr_type;
+	uint8_t  filter_policy;
+	uint8_t  phys;
+	struct bt_hci_ext_scan_phy p[0];
+} __packed;
+
+/* Extends BT_HCI_LE_SCAN_FILTER_DUP */
+#define BT_HCI_LE_EXT_SCAN_FILTER_DUP_ENABLE_RESET  0x02
+
+#define BT_HCI_OP_LE_SET_EXT_SCAN_ENABLE        BT_OP(BT_OGF_LE, 0x0042)
+struct bt_hci_cp_le_set_ext_scan_enable {
+	uint8_t  enable;
+	uint8_t  filter_dup;
+	uint16_t duration;
+	uint16_t period;
+} __packed;
+
+#define BT_HCI_OP_LE_EXT_CREATE_CONN            BT_OP(BT_OGF_LE, 0x0043)
+struct bt_hci_ext_conn_phy {
+	uint16_t scan_interval;
+	uint16_t scan_window;
+	uint16_t conn_interval_min;
+	uint16_t conn_interval_max;
+	uint16_t conn_latency;
+	uint16_t supervision_timeout;
+	uint16_t min_ce_len;
+	uint16_t max_ce_len;
+} __packed;
+
+struct bt_hci_cp_le_ext_create_conn {
+	uint8_t      filter_policy;
+	uint8_t      own_addr_type;
+	bt_addr_le_t peer_addr;
+	uint8_t      phys;
+	struct bt_hci_ext_conn_phy p[0];
+} __packed;
+
+#define BT_HCI_LE_PER_ADV_CREATE_SYNC_FP_USE_LIST               BIT(0)
+#define BT_HCI_LE_PER_ADV_CREATE_SYNC_FP_REPORTS_DISABLED       BIT(1)
+
+#define BT_HCI_LE_PER_ADV_CREATE_SYNC_CTE_TYPE_NO_AOA           BIT(0)
+#define BT_HCI_LE_PER_ADV_CREATE_SYNC_CTE_TYPE_NO_AOD_1US       BIT(1)
+#define BT_HCI_LE_PER_ADV_CREATE_SYNC_CTE_TYPE_NO_AOD_2US       BIT(2)
+#define BT_HCI_LE_PER_ADV_CREATE_SYNC_CTE_TYPE_NO_CTE           BIT(3)
+#define BT_HCI_LE_PER_ADV_CREATE_SYNC_CTE_TYPE_ONLY_CTE         BIT(4)
+
+#define BT_HCI_OP_LE_PER_ADV_CREATE_SYNC        BT_OP(BT_OGF_LE, 0x0044)
+struct bt_hci_cp_le_per_adv_create_sync {
+	uint8_t      options;
+	uint8_t      sid;
+	bt_addr_le_t addr;
+	uint16_t     skip;
+	uint16_t     sync_timeout;
+	uint8_t      cte_type;
+} __packed;
+
+#define BT_HCI_OP_LE_PER_ADV_CREATE_SYNC_CANCEL BT_OP(BT_OGF_LE, 0x0045)
+
+#define BT_HCI_OP_LE_PER_ADV_TERMINATE_SYNC     BT_OP(BT_OGF_LE, 0x0046)
+struct bt_hci_cp_le_per_adv_terminate_sync {
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_OP_LE_ADD_DEV_TO_PER_ADV_LIST    BT_OP(BT_OGF_LE, 0x0047)
+struct bt_hci_cp_le_add_dev_to_per_adv_list {
+	bt_addr_le_t addr;
+	uint8_t      sid;
+} __packed;
+
+#define BT_HCI_OP_LE_REM_DEV_FROM_PER_ADV_LIST  BT_OP(BT_OGF_LE, 0x0048)
+struct bt_hci_cp_le_rem_dev_from_per_adv_list {
+	bt_addr_le_t addr;
+	uint8_t      sid;
+} __packed;
+
+#define BT_HCI_OP_LE_CLEAR_PER_ADV_LIST         BT_OP(BT_OGF_LE, 0x0049)
+
+#define BT_HCI_OP_LE_READ_PER_ADV_LIST_SIZE     BT_OP(BT_OGF_LE, 0x004a)
+struct bt_hci_rp_le_read_per_adv_list_size {
+	uint8_t  status;
+	uint8_t  list_size;
+} __packed;
+
+#define BT_HCI_OP_LE_READ_TX_POWER              BT_OP(BT_OGF_LE, 0x004b)
+struct bt_hci_rp_le_read_tx_power {
+	uint8_t status;
+	int8_t  min_tx_power;
+	int8_t  max_tx_power;
+} __packed;
+
+#define BT_HCI_OP_LE_READ_RF_PATH_COMP          BT_OP(BT_OGF_LE, 0x004c)
+struct bt_hci_rp_le_read_rf_path_comp {
+	uint8_t status;
+	int16_t tx_path_comp;
+	int16_t rx_path_comp;
+} __packed;
+
+#define BT_HCI_OP_LE_WRITE_RF_PATH_COMP         BT_OP(BT_OGF_LE, 0x004d)
+struct bt_hci_cp_le_write_rf_path_comp {
+	int16_t  tx_path_comp;
+	int16_t  rx_path_comp;
+} __packed;
+
+#define BT_HCI_LE_PRIVACY_MODE_NETWORK          0x00
+#define BT_HCI_LE_PRIVACY_MODE_DEVICE           0x01
+
+#define BT_HCI_OP_LE_SET_PRIVACY_MODE           BT_OP(BT_OGF_LE, 0x004e)
+struct bt_hci_cp_le_set_privacy_mode {
+	bt_addr_le_t id_addr;
+	uint8_t         mode;
+} __packed;
+
+#define BT_HCI_OP_LE_SET_PER_ADV_RECV_ENABLE     BT_OP(BT_OGF_LE, 0x0059)
+struct bt_hci_cp_le_set_per_adv_recv_enable {
+	uint16_t handle;
+	uint8_t  enable;
+} __packed;
+
+#define BT_HCI_OP_LE_READ_BUFFER_SIZE_V2        BT_OP(BT_OGF_LE, 0x0060)
+struct bt_hci_rp_le_read_buffer_size_v2 {
+	uint8_t  status;
+	uint16_t acl_mtu;
+	uint8_t  acl_max_pkt;
+	uint16_t iso_mtu;
+	uint8_t  iso_max_pkt;
+} __packed;
+
+#define BT_HCI_OP_LE_READ_ISO_TX_SYNC           BT_OP(BT_OGF_LE, 0x0061)
+struct bt_hci_cp_le_read_iso_tx_sync {
+	uint16_t handle;
+} __packed;
+
+struct bt_hci_rp_le_read_iso_tx_sync {
+	uint8_t  status;
+	uint16_t handle;
+	uint16_t seq;
+	uint32_t timestamp;
+	uint8_t  offset[3];
+} __packed;
+
+#define BT_HCI_OP_LE_SET_CIG_PARAMS             BT_OP(BT_OGF_LE, 0x0062)
+struct bt_hci_cis_params {
+	uint8_t  cis_id;
+	uint16_t m_sdu;
+	uint16_t s_sdu;
+	uint8_t  m_phy;
+	uint8_t  s_phy;
+	uint8_t  m_rtn;
+	uint8_t  s_rtn;
+} __packed;
+
+struct bt_hci_cp_le_set_cig_params {
+	uint8_t  cig_id;
+	uint8_t  m_interval[3];
+	uint8_t  s_interval[3];
+	uint8_t  sca;
+	uint8_t  packing;
+	uint8_t  framing;
+	uint16_t m_latency;
+	uint16_t s_latency;
+	uint8_t  num_cis;
+	struct bt_hci_cis_params cis[0];
+} __packed;
+
+struct bt_hci_rp_le_set_cig_params {
+	uint8_t  status;
+	uint8_t  cig_id;
+	uint8_t  num_handles;
+	uint16_t handle[0];
+} __packed;
+
+#define BT_HCI_OP_LE_SET_CIG_PARAMS_TEST        BT_OP(BT_OGF_LE, 0x0063)
+
+#define BT_HCI_OP_LE_CREATE_CIS                 BT_OP(BT_OGF_LE, 0x0064)
+struct bt_hci_cis {
+	uint16_t  cis_handle;
+	uint16_t  acl_handle;
+} __packed;
+
+struct bt_hci_cp_le_create_cis {
+	uint8_t  num_cis;
+	struct bt_hci_cis cis[0];
+} __packed;
+
+#define BT_HCI_OP_LE_REMOVE_CIG                 BT_OP(BT_OGF_LE, 0x0065)
+struct bt_hci_cp_le_remove_cig {
+	uint8_t  cig_id;
+} __packed;
+
+struct bt_hci_rp_le_remove_cig {
+	uint8_t  status;
+	uint8_t  cig_id;
+} __packed;
+
+#define BT_HCI_OP_LE_ACCEPT_CIS                 BT_OP(BT_OGF_LE, 0x0066)
+struct bt_hci_cp_le_accept_cis {
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_OP_LE_REJECT_CIS                 BT_OP(BT_OGF_LE, 0x0067)
+struct bt_hci_cp_le_reject_cis {
+	uint16_t handle;
+	uint8_t  reason;
+} __packed;
+
+struct bt_hci_rp_le_reject_cis {
+	uint8_t  status;
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_OP_LE_CREATE_BIG                 BT_OP(BT_OGF_LE, 0x0068)
+struct bt_hci_cp_le_create_big {
+	uint8_t  big_handle;
+	uint8_t  adv_handle;
+	uint8_t  num_bis;
+	uint8_t  sdu_interval[3];
+	uint16_t max_sdu;
+	uint16_t max_latency;
+	uint8_t  rtn;
+	uint8_t  phy;
+	uint8_t  packing;
+	uint8_t  framing;
+	uint8_t  encryption;
+	uint8_t  bcode[16];
+} __packed;
+
+#define BT_HCI_OP_LE_CREATE_BIG_TEST            BT_OP(BT_OGF_LE, 0x0069)
+struct bt_hci_cp_le_create_big_test {
+	uint8_t  big_handle;
+	uint8_t  adv_handle;
+	uint8_t  num_bis;
+	uint8_t  sdu_interval[3];
+	uint16_t iso_interval;
+	uint8_t  nse;
+	uint16_t max_sdu;
+	uint16_t max_pdu;
+	uint8_t  phy;
+	uint8_t  packing;
+	uint8_t  framing;
+	uint8_t  bn;
+	uint8_t  irc;
+	uint8_t  pto;
+	uint8_t  encryption;
+	uint8_t  bcode[16];
+} __packed;
+
+#define BT_HCI_OP_LE_TERMINATE_BIG              BT_OP(BT_OGF_LE, 0x006a)
+struct bt_hci_cp_le_terminate_big {
+	uint8_t  big_handle;
+	uint8_t  reason;
+} __packed;
+
+#define BT_HCI_OP_LE_BIG_CREATE_SYNC            BT_OP(BT_OGF_LE, 0x006b)
+struct bt_hci_cp_le_big_create_sync {
+	uint8_t  big_handle;
+	uint16_t sync_handle;
+	uint8_t  encryption;
+	uint8_t  bcode[16];
+	uint8_t  mse;
+	uint16_t sync_timeout;
+	uint8_t  num_bis;
+	uint8_t  bis[0];
+} __packed;
+
+#define BT_HCI_OP_LE_BIG_TERMINATE_SYNC         BT_OP(BT_OGF_LE, 0x006c)
+struct bt_hci_cp_le_big_terminate_sync {
+	uint8_t  big_handle;
+} __packed;
+
+struct bt_hci_rp_le_big_terminate_sync {
+	uint8_t  status;
+	uint8_t  big_handle;
+} __packed;
+
+#define BT_HCI_OP_LE_REQ_PEER_SC                BT_OP(BT_OGF_LE, 0x006d)
+struct bt_hci_cp_le_req_peer_sca {
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_OP_LE_SETUP_ISO_PATH             BT_OP(BT_OGF_LE, 0x006e)
+struct bt_hci_cp_le_setup_iso_path {
+	uint16_t handle;
+	uint8_t  path_dir;
+	uint8_t  path_id;
+	uint8_t  coding_format;
+	uint16_t company_id;
+	uint16_t vendor_id;
+	uint8_t  controller_delay[3];
+	uint8_t  codec_config_len;
+	uint8_t  codec_config[0];
+} __packed;
+
+struct bt_hci_rp_le_setup_iso_path {
+	uint8_t  status;
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_OP_LE_REMOVE_ISO_PATH            BT_OP(BT_OGF_LE, 0x006f)
+struct bt_hci_cp_le_remove_iso_path {
+	uint16_t handle;
+	uint8_t  path_dir;
+} __packed;
+
+struct bt_hci_rp_le_remove_iso_path {
+	uint8_t  status;
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_OP_LE_ISO_TRANSMIT_TEST          BT_OP(BT_OGF_LE, 0x0070)
+
+#define BT_HCI_OP_LE_ISO_RECEIVE_TEST           BT_OP(BT_OGF_LE, 0x0071)
+
+#define BT_HCI_OP_LE_ISO_READ_TEST_COUNTERS     BT_OP(BT_OGF_LE, 0x0072)
+
+#define BT_HCI_OP_LE_ISO_TEST_END               BT_OP(BT_OGF_LE, 0x0073)
+
+#define BT_HCI_OP_LE_SET_HOST_FEATURE           BT_OP(BT_OGF_LE, 0x0074)
+struct bt_hci_cp_le_set_host_feature {
+	uint8_t  bit_number;
+	uint8_t  bit_value;
+} __packed;
+
+struct bt_hci_rp_le_set_host_feature {
+	uint8_t  status;
+} __packed;
+
+#define BT_HCI_OP_LE_READ_ISO_LINK_QUALITY      BT_OP(BT_OGF_LE, 0x0075)
+struct bt_hci_cp_le_read_iso_link_quality {
+	uint16_t handle;
+} __packed;
+
+struct bt_hci_rp_le_read_iso_link_quality {
+	uint8_t  status;
+	uint16_t handle;
+	uint32_t tx_unacked_packets;
+	uint32_t tx_flushed_packets;
+	uint32_t tx_last_subevent_packets;
+	uint32_t retransmitted_packets;
+	uint32_t crc_error_packets;
+	uint32_t rx_unreceived_packets;
+	uint32_t duplicate_packets;
+} __packed;
+
+/* Event definitions */
+
+#define BT_HCI_EVT_UNKNOWN                      0x00
+#define BT_HCI_EVT_VENDOR                       0xff
+
+#define BT_HCI_EVT_INQUIRY_COMPLETE             0x01
+struct bt_hci_evt_inquiry_complete {
+	uint8_t status;
+} __packed;
+
+#define BT_HCI_EVT_CONN_COMPLETE                0x03
+struct bt_hci_evt_conn_complete {
+	uint8_t   status;
+	uint16_t  handle;
+	bt_addr_t bdaddr;
+	uint8_t   link_type;
+	uint8_t   encr_enabled;
+} __packed;
+
+#define BT_HCI_EVT_CONN_REQUEST                 0x04
+struct bt_hci_evt_conn_request {
+	bt_addr_t bdaddr;
+	uint8_t   dev_class[3];
+	uint8_t   link_type;
+} __packed;
+
+#define BT_HCI_EVT_DISCONN_COMPLETE             0x05
+struct bt_hci_evt_disconn_complete {
+	uint8_t  status;
+	uint16_t handle;
+	uint8_t  reason;
+} __packed;
+
+#define BT_HCI_EVT_AUTH_COMPLETE                0x06
+struct bt_hci_evt_auth_complete {
+	uint8_t  status;
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_EVT_REMOTE_NAME_REQ_COMPLETE     0x07
+struct bt_hci_evt_remote_name_req_complete {
+	uint8_t   status;
+	bt_addr_t bdaddr;
+	uint8_t   name[248];
+} __packed;
+
+#define BT_HCI_EVT_ENCRYPT_CHANGE               0x08
+struct bt_hci_evt_encrypt_change {
+	uint8_t  status;
+	uint16_t handle;
+	uint8_t  encrypt;
+} __packed;
+
+#define BT_HCI_EVT_REMOTE_FEATURES              0x0b
+struct bt_hci_evt_remote_features {
+	uint8_t  status;
+	uint16_t handle;
+	uint8_t  features[8];
+} __packed;
+
+#define BT_HCI_EVT_REMOTE_VERSION_INFO          0x0c
+struct bt_hci_evt_remote_version_info {
+	uint8_t  status;
+	uint16_t handle;
+	uint8_t  version;
+	uint16_t manufacturer;
+	uint16_t subversion;
+} __packed;
+
+#define BT_HCI_EVT_CMD_COMPLETE                 0x0e
+struct bt_hci_evt_cmd_complete {
+	uint8_t  ncmd;
+	uint16_t opcode;
+} __packed;
+
+struct bt_hci_evt_cc_status {
+	uint8_t  status;
+} __packed;
+
+#define BT_HCI_EVT_CMD_STATUS                   0x0f
+struct bt_hci_evt_cmd_status {
+	uint8_t  status;
+	uint8_t  ncmd;
+	uint16_t opcode;
+} __packed;
+
+#define BT_HCI_EVT_HARDWARE_ERROR               0x10
+struct bt_hci_evt_hardware_error {
+	uint8_t  hardware_code;
+} __packed;
+
+#define BT_HCI_EVT_ROLE_CHANGE                  0x12
+struct bt_hci_evt_role_change {
+	uint8_t   status;
+	bt_addr_t bdaddr;
+	uint8_t   role;
+} __packed;
+
+#define BT_HCI_EVT_NUM_COMPLETED_PACKETS        0x13
+struct bt_hci_evt_num_completed_packets {
+	uint8_t  num_handles;
+	struct bt_hci_handle_count h[0];
+} __packed;
+
+#define BT_HCI_EVT_PIN_CODE_REQ                 0x16
+struct bt_hci_evt_pin_code_req {
+	bt_addr_t bdaddr;
+} __packed;
+
+#define BT_HCI_EVT_LINK_KEY_REQ                 0x17
+struct bt_hci_evt_link_key_req {
+	bt_addr_t bdaddr;
+} __packed;
+
+/* Link Key types */
+#define BT_LK_COMBINATION                       0x00
+#define BT_LK_LOCAL_UNIT                        0x01
+#define BT_LK_REMOTE_UNIT                       0x02
+#define BT_LK_DEBUG_COMBINATION                 0x03
+#define BT_LK_UNAUTH_COMBINATION_P192           0x04
+#define BT_LK_AUTH_COMBINATION_P192             0x05
+#define BT_LK_CHANGED_COMBINATION               0x06
+#define BT_LK_UNAUTH_COMBINATION_P256           0x07
+#define BT_LK_AUTH_COMBINATION_P256             0x08
+
+#define BT_HCI_EVT_LINK_KEY_NOTIFY              0x18
+struct bt_hci_evt_link_key_notify {
+	bt_addr_t bdaddr;
+	uint8_t   link_key[16];
+	uint8_t   key_type;
+} __packed;
+
+/* Overflow link types */
+#define BT_OVERFLOW_LINK_SYNCH                  0x00
+#define BT_OVERFLOW_LINK_ACL                    0x01
+
+#define BT_HCI_EVT_DATA_BUF_OVERFLOW            0x1a
+struct bt_hci_evt_data_buf_overflow {
+	uint8_t  link_type;
+} __packed;
+
+#define BT_HCI_EVT_INQUIRY_RESULT_WITH_RSSI     0x22
+struct bt_hci_evt_inquiry_result_with_rssi {
+	bt_addr_t addr;
+	uint8_t   pscan_rep_mode;
+	uint8_t   reserved;
+	uint8_t   cod[3];
+	uint16_t  clock_offset;
+	int8_t    rssi;
+} __packed;
+
+#define BT_HCI_EVT_REMOTE_EXT_FEATURES          0x23
+struct bt_hci_evt_remote_ext_features {
+	uint8_t  status;
+	uint16_t handle;
+	uint8_t  page;
+	uint8_t  max_page;
+	uint8_t  features[8];
+} __packed;
+
+#define BT_HCI_EVT_SYNC_CONN_COMPLETE           0x2c
+struct bt_hci_evt_sync_conn_complete {
+	uint8_t    status;
+	uint16_t   handle;
+	bt_addr_t  bdaddr;
+	uint8_t    link_type;
+	uint8_t    tx_interval;
+	uint8_t    retansmission_window;
+	uint16_t   rx_pkt_length;
+	uint16_t   tx_pkt_length;
+	uint8_t    air_mode;
+} __packed;
+
+#define BT_HCI_EVT_EXTENDED_INQUIRY_RESULT      0x2f
+struct bt_hci_evt_extended_inquiry_result {
+	uint8_t    num_reports;
+	bt_addr_t  addr;
+	uint8_t    pscan_rep_mode;
+	uint8_t    reserved;
+	uint8_t    cod[3];
+	uint16_t   clock_offset;
+	int8_t     rssi;
+	uint8_t    eir[240];
+} __packed;
+
+#define BT_HCI_EVT_ENCRYPT_KEY_REFRESH_COMPLETE 0x30
+struct bt_hci_evt_encrypt_key_refresh_complete {
+	uint8_t  status;
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_EVT_IO_CAPA_REQ                  0x31
+struct bt_hci_evt_io_capa_req {
+	bt_addr_t bdaddr;
+} __packed;
+
+#define BT_HCI_EVT_IO_CAPA_RESP                 0x32
+struct bt_hci_evt_io_capa_resp {
+	bt_addr_t bdaddr;
+	uint8_t   capability;
+	uint8_t   oob_data;
+	uint8_t   authentication;
+} __packed;
+
+#define BT_HCI_EVT_USER_CONFIRM_REQ             0x33
+struct bt_hci_evt_user_confirm_req {
+	bt_addr_t bdaddr;
+	uint32_t  passkey;
+} __packed;
+
+#define BT_HCI_EVT_USER_PASSKEY_REQ             0x34
+struct bt_hci_evt_user_passkey_req {
+	bt_addr_t bdaddr;
+} __packed;
+
+#define BT_HCI_EVT_SSP_COMPLETE                 0x36
+struct bt_hci_evt_ssp_complete {
+	uint8_t   status;
+	bt_addr_t bdaddr;
+} __packed;
+
+#define BT_HCI_EVT_USER_PASSKEY_NOTIFY          0x3b
+struct bt_hci_evt_user_passkey_notify {
+	bt_addr_t bdaddr;
+	uint32_t  passkey;
+} __packed;
+
+#define BT_HCI_EVT_LE_META_EVENT                0x3e
+struct bt_hci_evt_le_meta_event {
+	uint8_t  subevent;
+} __packed;
+
+#define BT_HCI_EVT_AUTH_PAYLOAD_TIMEOUT_EXP     0x57
+struct bt_hci_evt_auth_payload_timeout_exp {
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_ROLE_MASTER                      0x00
+#define BT_HCI_ROLE_SLAVE                       0x01
+
+#define BT_HCI_EVT_LE_CONN_COMPLETE             0x01
+struct bt_hci_evt_le_conn_complete {
+	uint8_t      status;
+	uint16_t     handle;
+	uint8_t      role;
+	bt_addr_le_t peer_addr;
+	uint16_t     interval;
+	uint16_t     latency;
+	uint16_t     supv_timeout;
+	uint8_t      clock_accuracy;
+} __packed;
+
+#define BT_HCI_EVT_LE_ADVERTISING_REPORT        0x02
+struct bt_hci_evt_le_advertising_info {
+	uint8_t      evt_type;
+	bt_addr_le_t addr;
+	uint8_t      length;
+	uint8_t      data[0];
+} __packed;
+struct bt_hci_evt_le_advertising_report {
+	uint8_t num_reports;
+	struct bt_hci_evt_le_advertising_info adv_info[0];
+} __packed;
+
+#define BT_HCI_EVT_LE_CONN_UPDATE_COMPLETE      0x03
+struct bt_hci_evt_le_conn_update_complete {
+	uint8_t  status;
+	uint16_t handle;
+	uint16_t interval;
+	uint16_t latency;
+	uint16_t supv_timeout;
+} __packed;
+
+#define BT_HCI_EV_LE_REMOTE_FEAT_COMPLETE       0x04
+struct bt_hci_evt_le_remote_feat_complete {
+	uint8_t  status;
+	uint16_t handle;
+	uint8_t  features[8];
+} __packed;
+
+#define BT_HCI_EVT_LE_LTK_REQUEST               0x05
+struct bt_hci_evt_le_ltk_request {
+	uint16_t handle;
+	uint64_t rand;
+	uint16_t ediv;
+} __packed;
+
+#define BT_HCI_EVT_LE_CONN_PARAM_REQ            0x06
+struct bt_hci_evt_le_conn_param_req {
+	uint16_t handle;
+	uint16_t interval_min;
+	uint16_t interval_max;
+	uint16_t latency;
+	uint16_t timeout;
+} __packed;
+
+#define BT_HCI_EVT_LE_DATA_LEN_CHANGE           0x07
+struct bt_hci_evt_le_data_len_change {
+	uint16_t handle;
+	uint16_t max_tx_octets;
+	uint16_t max_tx_time;
+	uint16_t max_rx_octets;
+	uint16_t max_rx_time;
+} __packed;
+
+#define BT_HCI_EVT_LE_P256_PUBLIC_KEY_COMPLETE  0x08
+struct bt_hci_evt_le_p256_public_key_complete {
+	uint8_t status;
+	uint8_t key[64];
+} __packed;
+
+#define BT_HCI_EVT_LE_GENERATE_DHKEY_COMPLETE   0x09
+struct bt_hci_evt_le_generate_dhkey_complete {
+	uint8_t status;
+	uint8_t dhkey[32];
+} __packed;
+
+#define BT_HCI_EVT_LE_ENH_CONN_COMPLETE         0x0a
+struct bt_hci_evt_le_enh_conn_complete {
+	uint8_t      status;
+	uint16_t     handle;
+	uint8_t      role;
+	bt_addr_le_t peer_addr;
+	bt_addr_t    local_rpa;
+	bt_addr_t    peer_rpa;
+	uint16_t     interval;
+	uint16_t     latency;
+	uint16_t     supv_timeout;
+	uint8_t      clock_accuracy;
+} __packed;
+
+#define BT_HCI_EVT_LE_DIRECT_ADV_REPORT         0x0b
+struct bt_hci_evt_le_direct_adv_info {
+	uint8_t      evt_type;
+	bt_addr_le_t addr;
+	bt_addr_le_t dir_addr;
+	int8_t       rssi;
+} __packed;
+struct bt_hci_evt_le_direct_adv_report {
+	uint8_t num_reports;
+	struct bt_hci_evt_le_direct_adv_info direct_adv_info[0];
+} __packed;
+
+#define BT_HCI_EVT_LE_PHY_UPDATE_COMPLETE       0x0c
+struct bt_hci_evt_le_phy_update_complete {
+	uint8_t  status;
+	uint16_t handle;
+	uint8_t  tx_phy;
+	uint8_t  rx_phy;
+} __packed;
+
+#define BT_HCI_EVT_LE_EXT_ADVERTISING_REPORT    0x0d
+
+#define BT_HCI_LE_ADV_EVT_TYPE_CONN                 BIT(0)
+#define BT_HCI_LE_ADV_EVT_TYPE_SCAN                 BIT(1)
+#define BT_HCI_LE_ADV_EVT_TYPE_DIRECT               BIT(2)
+#define BT_HCI_LE_ADV_EVT_TYPE_SCAN_RSP             BIT(3)
+#define BT_HCI_LE_ADV_EVT_TYPE_LEGACY               BIT(4)
+
+#define BT_HCI_LE_ADV_EVT_TYPE_DATA_STATUS(ev_type) (((ev_type) >> 5) & 0x03)
+#define BT_HCI_LE_ADV_EVT_TYPE_DATA_STATUS_COMPLETE   0
+#define BT_HCI_LE_ADV_EVT_TYPE_DATA_STATUS_PARTIAL    1
+#define BT_HCI_LE_ADV_EVT_TYPE_DATA_STATUS_INCOMPLETE 2
+
+struct bt_hci_evt_le_ext_advertising_info {
+	uint16_t     evt_type;
+	bt_addr_le_t addr;
+	uint8_t      prim_phy;
+	uint8_t      sec_phy;
+	uint8_t      sid;
+	int8_t       tx_power;
+	int8_t       rssi;
+	uint16_t     interval;
+	bt_addr_le_t direct_addr;
+	uint8_t      length;
+	uint8_t      data[0];
+} __packed;
+struct bt_hci_evt_le_ext_advertising_report {
+	uint8_t num_reports;
+	struct bt_hci_evt_le_ext_advertising_info adv_info[0];
+} __packed;
+
+#define BT_HCI_EVT_LE_PER_ADV_SYNC_ESTABLISHED  0x0e
+struct bt_hci_evt_le_per_adv_sync_established {
+	uint8_t      status;
+	uint16_t     handle;
+	uint8_t      sid;
+	bt_addr_le_t adv_addr;
+	uint8_t      phy;
+	uint16_t     interval;
+	uint8_t      clock_accuracy;
+} __packed;
+
+#define BT_HCI_EVT_LE_PER_ADVERTISING_REPORT    0x0f
+struct bt_hci_evt_le_per_advertising_report {
+	uint16_t handle;
+	int8_t   tx_power;
+	int8_t   rssi;
+	uint8_t  cte_type;
+	uint8_t  data_status;
+	uint8_t  length;
+	uint8_t  data[0];
+} __packed;
+
+#define BT_HCI_EVT_LE_PER_ADV_SYNC_LOST         0x10
+struct bt_hci_evt_le_per_adv_sync_lost {
+	uint16_t handle;
+} __packed;
+
+#define BT_HCI_EVT_LE_SCAN_TIMEOUT              0x11
+
+#define BT_HCI_EVT_LE_ADV_SET_TERMINATED        0x12
+struct bt_hci_evt_le_adv_set_terminated {
+	uint8_t  status;
+	uint8_t  adv_handle;
+	uint16_t conn_handle;
+	uint8_t  num_completed_ext_adv_evts;
+} __packed;
+
+#define BT_HCI_EVT_LE_SCAN_REQ_RECEIVED         0x13
+struct bt_hci_evt_le_scan_req_received {
+	uint8_t      handle;
+	bt_addr_le_t addr;
+} __packed;
+
+#define BT_HCI_LE_CHAN_SEL_ALGO_1               0x00
+#define BT_HCI_LE_CHAN_SEL_ALGO_2               0x01
+
+#define BT_HCI_EVT_LE_CHAN_SEL_ALGO             0x14
+struct bt_hci_evt_le_chan_sel_algo {
+	uint16_t handle;
+	uint8_t  chan_sel_algo;
+} __packed;
+
+#define BT_HCI_EVT_LE_CIS_ESTABLISHED           0x19
+struct bt_hci_evt_le_cis_established {
+	uint8_t  status;
+	uint16_t conn_handle;
+	uint8_t  cig_sync_delay[3];
+	uint8_t  cis_sync_delay[3];
+	uint8_t  m_latency[3];
+	uint8_t  s_latency[3];
+	uint8_t  m_phy;
+	uint8_t  s_phy;
+	uint8_t  nse;
+	uint8_t  m_bn;
+	uint8_t  s_bn;
+	uint8_t  m_ft;
+	uint8_t  s_ft;
+	uint16_t m_max_pdu;
+	uint16_t s_max_pdu;
+	uint16_t interval;
+} __packed;
+
+#define BT_HCI_EVT_LE_CIS_REQ                   0x1a
+struct bt_hci_evt_le_cis_req {
+	uint16_t acl_handle;
+	uint16_t cis_handle;
+	uint8_t  cig_id;
+	uint8_t  cis_id;
+} __packed;
+
+#define BT_HCI_EVT_LE_BIG_COMPLETE              0x1b
+struct bt_hci_evt_le_big_complete {
+	uint8_t  status;
+	uint8_t  big_handle;
+	uint8_t  sync_delay[3];
+	uint8_t  latency[3];
+	uint8_t  phy;
+	uint8_t  nse;
+	uint8_t  bn;
+	uint8_t  pto;
+	uint8_t  irc;
+	uint16_t max_pdu;
+	uint8_t  num_bis;
+	uint16_t handle[0];
+} __packed;
+
+#define BT_HCI_EVT_LE_BIG_TERMINATE             0x1c
+struct bt_hci_evt_le_big_terminate {
+	uint8_t  big_handle;
+	uint8_t  reason;
+} __packed;
+
+#define BT_HCI_EVT_LE_BIG_SYNC_ESTABLISHED      0x1d
+struct bt_hci_evt_le_big_sync_established {
+	uint8_t  status;
+	uint8_t  big_handle;
+	uint8_t  latency[3];
+	uint8_t  nse;
+	uint8_t  bn;
+	uint8_t  pto;
+	uint8_t  irc;
+	uint16_t max_pdu;
+	uint8_t  num_bis;
+	uint16_t handle[0];
+} __packed;
+
+#define BT_HCI_EVT_LE_BIG_SYNC_LOST             0x1e
+struct bt_hci_evt_le_big_sync_lost {
+	uint8_t  big_handle;
+	uint8_t  reason;
+} __packed;
+
+#define BT_HCI_EVT_LE_REQ_PEER_SCA_COMPLETE     0x1f
+struct bt_hci_evt_le_req_peer_sca_complete {
+	uint8_t  status;
+	uint16_t handle;
+	uint8_t  sca;
+} __packed;
+
+#define BT_HCI_EVT_LE_BIGINFO_ADV_REPORT        0x22
+struct bt_hci_evt_le_biginfo_adv_report {
+	uint16_t sync_handle;
+	uint8_t  num_bis;
+	uint8_t  nse;
+	uint16_t iso_interval;
+	uint8_t  bn;
+	uint8_t  pto;
+	uint8_t  irc;
+	uint16_t max_pdu;
+	uint8_t  sdu_interval[3];
+	uint16_t max_sdu;
+	uint8_t  phy;
+	uint8_t  framing;
+	uint8_t  encryption;
+} __packed;
+
+/* Event mask bits */
+
+#define BT_EVT_BIT(n) (1ULL << (n))
+
+#define BT_EVT_MASK_INQUIRY_COMPLETE             BT_EVT_BIT(0)
+#define BT_EVT_MASK_CONN_COMPLETE                BT_EVT_BIT(2)
+#define BT_EVT_MASK_CONN_REQUEST                 BT_EVT_BIT(3)
+#define BT_EVT_MASK_DISCONN_COMPLETE             BT_EVT_BIT(4)
+#define BT_EVT_MASK_AUTH_COMPLETE                BT_EVT_BIT(5)
+#define BT_EVT_MASK_REMOTE_NAME_REQ_COMPLETE     BT_EVT_BIT(6)
+#define BT_EVT_MASK_ENCRYPT_CHANGE               BT_EVT_BIT(7)
+#define BT_EVT_MASK_REMOTE_FEATURES              BT_EVT_BIT(10)
+#define BT_EVT_MASK_REMOTE_VERSION_INFO          BT_EVT_BIT(11)
+#define BT_EVT_MASK_HARDWARE_ERROR               BT_EVT_BIT(15)
+#define BT_EVT_MASK_ROLE_CHANGE                  BT_EVT_BIT(17)
+#define BT_EVT_MASK_PIN_CODE_REQ                 BT_EVT_BIT(21)
+#define BT_EVT_MASK_LINK_KEY_REQ                 BT_EVT_BIT(22)
+#define BT_EVT_MASK_LINK_KEY_NOTIFY              BT_EVT_BIT(23)
+#define BT_EVT_MASK_DATA_BUFFER_OVERFLOW         BT_EVT_BIT(25)
+#define BT_EVT_MASK_INQUIRY_RESULT_WITH_RSSI     BT_EVT_BIT(33)
+#define BT_EVT_MASK_REMOTE_EXT_FEATURES          BT_EVT_BIT(34)
+#define BT_EVT_MASK_SYNC_CONN_COMPLETE           BT_EVT_BIT(43)
+#define BT_EVT_MASK_EXTENDED_INQUIRY_RESULT      BT_EVT_BIT(46)
+#define BT_EVT_MASK_ENCRYPT_KEY_REFRESH_COMPLETE BT_EVT_BIT(47)
+#define BT_EVT_MASK_IO_CAPA_REQ                  BT_EVT_BIT(48)
+#define BT_EVT_MASK_IO_CAPA_RESP                 BT_EVT_BIT(49)
+#define BT_EVT_MASK_USER_CONFIRM_REQ             BT_EVT_BIT(50)
+#define BT_EVT_MASK_USER_PASSKEY_REQ             BT_EVT_BIT(51)
+#define BT_EVT_MASK_SSP_COMPLETE                 BT_EVT_BIT(53)
+#define BT_EVT_MASK_USER_PASSKEY_NOTIFY          BT_EVT_BIT(58)
+#define BT_EVT_MASK_LE_META_EVENT                BT_EVT_BIT(61)
+
+/* Page 2 */
+#define BT_EVT_MASK_PHY_LINK_COMPLETE            BT_EVT_BIT(0)
+#define BT_EVT_MASK_CH_SELECTED_COMPLETE         BT_EVT_BIT(1)
+#define BT_EVT_MASK_DISCONN_PHY_LINK_COMPLETE    BT_EVT_BIT(2)
+#define BT_EVT_MASK_PHY_LINK_LOSS_EARLY_WARN     BT_EVT_BIT(3)
+#define BT_EVT_MASK_PHY_LINK_RECOVERY            BT_EVT_BIT(4)
+#define BT_EVT_MASK_LOG_LINK_COMPLETE            BT_EVT_BIT(5)
+#define BT_EVT_MASK_DISCONN_LOG_LINK_COMPLETE    BT_EVT_BIT(6)
+#define BT_EVT_MASK_FLOW_SPEC_MODIFY_COMPLETE    BT_EVT_BIT(7)
+#define BT_EVT_MASK_NUM_COMPLETE_DATA_BLOCKS     BT_EVT_BIT(8)
+#define BT_EVT_MASK_AMP_START_TEST               BT_EVT_BIT(9)
+#define BT_EVT_MASK_AMP_TEST_END                 BT_EVT_BIT(10)
+#define BT_EVT_MASK_AMP_RX_REPORT                BT_EVT_BIT(11)
+#define BT_EVT_MASK_AMP_SR_MODE_CHANGE_COMPLETE  BT_EVT_BIT(12)
+#define BT_EVT_MASK_AMP_STATUS_CHANGE            BT_EVT_BIT(13)
+#define BT_EVT_MASK_TRIGG_CLOCK_CAPTURE          BT_EVT_BIT(14)
+#define BT_EVT_MASK_SYNCH_TRAIN_COMPLETE         BT_EVT_BIT(15)
+#define BT_EVT_MASK_SYNCH_TRAIN_RX               BT_EVT_BIT(16)
+#define BT_EVT_MASK_CL_SLAVE_BC_RX               BT_EVT_BIT(17)
+#define BT_EVT_MASK_CL_SLAVE_BC_TIMEOUT          BT_EVT_BIT(18)
+#define BT_EVT_MASK_TRUNC_PAGE_COMPLETE          BT_EVT_BIT(19)
+#define BT_EVT_MASK_SLAVE_PAGE_RSP_TIMEOUT       BT_EVT_BIT(20)
+#define BT_EVT_MASK_CL_SLAVE_BC_CH_MAP_CHANGE    BT_EVT_BIT(21)
+#define BT_EVT_MASK_INQUIRY_RSP_NOT              BT_EVT_BIT(22)
+#define BT_EVT_MASK_AUTH_PAYLOAD_TIMEOUT_EXP     BT_EVT_BIT(23)
+#define BT_EVT_MASK_SAM_STATUS_CHANGE            BT_EVT_BIT(24)
+
+#define BT_EVT_MASK_LE_CONN_COMPLETE             BT_EVT_BIT(0)
+#define BT_EVT_MASK_LE_ADVERTISING_REPORT        BT_EVT_BIT(1)
+#define BT_EVT_MASK_LE_CONN_UPDATE_COMPLETE      BT_EVT_BIT(2)
+#define BT_EVT_MASK_LE_REMOTE_FEAT_COMPLETE      BT_EVT_BIT(3)
+#define BT_EVT_MASK_LE_LTK_REQUEST               BT_EVT_BIT(4)
+#define BT_EVT_MASK_LE_CONN_PARAM_REQ            BT_EVT_BIT(5)
+#define BT_EVT_MASK_LE_DATA_LEN_CHANGE           BT_EVT_BIT(6)
+#define BT_EVT_MASK_LE_P256_PUBLIC_KEY_COMPLETE  BT_EVT_BIT(7)
+#define BT_EVT_MASK_LE_GENERATE_DHKEY_COMPLETE   BT_EVT_BIT(8)
+#define BT_EVT_MASK_LE_ENH_CONN_COMPLETE         BT_EVT_BIT(9)
+#define BT_EVT_MASK_LE_DIRECT_ADV_REPORT         BT_EVT_BIT(10)
+#define BT_EVT_MASK_LE_PHY_UPDATE_COMPLETE       BT_EVT_BIT(11)
+#define BT_EVT_MASK_LE_EXT_ADVERTISING_REPORT    BT_EVT_BIT(12)
+#define BT_EVT_MASK_LE_PER_ADV_SYNC_ESTABLISHED  BT_EVT_BIT(13)
+#define BT_EVT_MASK_LE_PER_ADVERTISING_REPORT    BT_EVT_BIT(14)
+#define BT_EVT_MASK_LE_PER_ADV_SYNC_LOST         BT_EVT_BIT(15)
+#define BT_EVT_MASK_LE_SCAN_TIMEOUT              BT_EVT_BIT(16)
+#define BT_EVT_MASK_LE_ADV_SET_TERMINATED        BT_EVT_BIT(17)
+#define BT_EVT_MASK_LE_SCAN_REQ_RECEIVED         BT_EVT_BIT(18)
+#define BT_EVT_MASK_LE_CHAN_SEL_ALGO             BT_EVT_BIT(19)
+#define BT_EVT_MASK_LE_CIS_ESTABLISHED           BT_EVT_BIT(24)
+#define BT_EVT_MASK_LE_CIS_REQ                   BT_EVT_BIT(25)
+#define BT_EVT_MASK_LE_BIG_COMPLETE              BT_EVT_BIT(26)
+#define BT_EVT_MASK_LE_BIG_TERMINATED            BT_EVT_BIT(27)
+#define BT_EVT_MASK_LE_BIG_SYNC_ESTABLISHED      BT_EVT_BIT(28)
+#define BT_EVT_MASK_LE_BIG_SYNC_LOST             BT_EVT_BIT(29)
+#define BT_EVT_MASK_LE_REQ_PEER_SCA_COMPLETE     BT_EVT_BIT(30)
+#define BT_EVT_MASK_LE_PATH_LOSS_THRESHOLD       BT_EVT_BIT(31)
+#define BT_EVT_MASK_LE_TRANSMIT_POWER_REPORTING  BT_EVT_BIT(32)
+#define BT_EVT_MASK_LE_BIGINFO_ADV_REPORT        BT_EVT_BIT(33)
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _YC11XX_HCI_H_ */
Index: ModuleDemo/26_BOOT/bt_demo/CM0/User/hci/yc11xx_hci_err.h
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/hci/yc11xx_hci_err.h	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/hci/yc11xx_hci_err.h	(working copy)
@@ -0,0 +1,92 @@
+/** @file
+ *  @brief Bluetooth Host Control Interface status codes.
+ */
+
+/*
+ * Copyright (c) 2019 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _YC11XX_HCI_ERR_H_
+#define _YC11XX_HCI_ERR_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** HCI Error Codes, BT Core Spec v5.2 [Vol 1, Part F]. */
+#define BT_HCI_ERR_SUCCESS                      0x00
+#define BT_HCI_ERR_UNKNOWN_CMD                  0x01
+#define BT_HCI_ERR_UNKNOWN_CONN_ID              0x02
+#define BT_HCI_ERR_HW_FAILURE                   0x03
+#define BT_HCI_ERR_PAGE_TIMEOUT                 0x04
+#define BT_HCI_ERR_AUTH_FAIL                    0x05
+#define BT_HCI_ERR_PIN_OR_KEY_MISSING           0x06
+#define BT_HCI_ERR_MEM_CAPACITY_EXCEEDED        0x07
+#define BT_HCI_ERR_CONN_TIMEOUT                 0x08
+#define BT_HCI_ERR_CONN_LIMIT_EXCEEDED          0x09
+#define BT_HCI_ERR_SYNC_CONN_LIMIT_EXCEEDED     0x0a
+#define BT_HCI_ERR_CONN_ALREADY_EXISTS          0x0b
+#define BT_HCI_ERR_CMD_DISALLOWED               0x0c
+#define BT_HCI_ERR_INSUFFICIENT_RESOURCES       0x0d
+#define BT_HCI_ERR_INSUFFICIENT_SECURITY        0x0e
+#define BT_HCI_ERR_BD_ADDR_UNACCEPTABLE         0x0f
+#define BT_HCI_ERR_CONN_ACCEPT_TIMEOUT          0x10
+#define BT_HCI_ERR_UNSUPP_FEATURE_PARAM_VAL     0x11
+#define BT_HCI_ERR_INVALID_PARAM                0x12
+#define BT_HCI_ERR_REMOTE_USER_TERM_CONN        0x13
+#define BT_HCI_ERR_REMOTE_LOW_RESOURCES         0x14
+#define BT_HCI_ERR_REMOTE_POWER_OFF             0x15
+#define BT_HCI_ERR_LOCALHOST_TERM_CONN          0x16
+#define BT_HCI_ERR_REPEATED_ATTEMPTS            0x17
+#define BT_HCI_ERR_PAIRING_NOT_ALLOWED          0x18
+#define BT_HCI_ERR_UNKNOWN_LMP_PDU              0x19
+#define BT_HCI_ERR_UNSUPP_REMOTE_FEATURE        0x1a
+#define BT_HCI_ERR_SCO_OFFSET_REJECTED          0x1b
+#define BT_HCI_ERR_SCO_INTERVAL_REJECTED        0x1c
+#define BT_HCI_ERR_SCO_AIR_MODE_REJECTED        0x1d
+#define BT_HCI_ERR_INVALID_LL_PARAM             0x1e
+#define BT_HCI_ERR_UNSPECIFIED                  0x1f
+#define BT_HCI_ERR_UNSUPP_LL_PARAM_VAL          0x20
+#define BT_HCI_ERR_ROLE_CHANGE_NOT_ALLOWED      0x21
+#define BT_HCI_ERR_LL_RESP_TIMEOUT              0x22
+#define BT_HCI_ERR_LL_PROC_COLLISION            0x23
+#define BT_HCI_ERR_LMP_PDU_NOT_ALLOWED          0x24
+#define BT_HCI_ERR_ENC_MODE_NOT_ACCEPTABLE      0x25
+#define BT_HCI_ERR_LINK_KEY_CANNOT_BE_CHANGED   0x26
+#define BT_HCI_ERR_REQUESTED_QOS_NOT_SUPPORTED  0x27
+#define BT_HCI_ERR_INSTANT_PASSED               0x28
+#define BT_HCI_ERR_PAIRING_NOT_SUPPORTED        0x29
+#define BT_HCI_ERR_DIFF_TRANS_COLLISION         0x2a
+#define BT_HCI_ERR_QOS_UNACCEPTABLE_PARAM       0x2c
+#define BT_HCI_ERR_QOS_REJECTED                 0x2d
+#define BT_HCI_ERR_CHAN_ASSESS_NOT_SUPPORTED    0x2e
+#define BT_HCI_ERR_INSUFF_SECURITY              0x2f
+#define BT_HCI_ERR_PARAM_OUT_OF_MANDATORY_RANGE 0x30
+#define BT_HCI_ERR_ROLE_SWITCH_PENDING          0x32
+#define BT_HCI_ERR_RESERVED_SLOT_VIOLATION      0x34
+#define BT_HCI_ERR_ROLE_SWITCH_FAILED           0x35
+#define BT_HCI_ERR_EXT_INQ_RESP_TOO_LARGE       0x36
+#define BT_HCI_ERR_SIMPLE_PAIR_NOT_SUPP_BY_HOST 0x37
+#define BT_HCI_ERR_HOST_BUSY_PAIRING            0x38
+#define BT_HCI_ERR_CONN_REJECTED_DUE_TO_NO_CHAN 0x39
+#define BT_HCI_ERR_CONTROLLER_BUSY              0x3a
+#define BT_HCI_ERR_UNACCEPT_CONN_PARAM          0x3b
+#define BT_HCI_ERR_ADV_TIMEOUT                  0x3c
+#define BT_HCI_ERR_TERM_DUE_TO_MIC_FAIL         0x3d
+#define BT_HCI_ERR_CONN_FAIL_TO_ESTAB           0x3e
+#define BT_HCI_ERR_MAC_CONN_FAILED              0x3f
+#define BT_HCI_ERR_CLOCK_ADJUST_REJECTED        0x40
+#define BT_HCI_ERR_SUBMAP_NOT_DEFINED           0x41
+#define BT_HCI_ERR_UNKNOWN_ADV_IDENTIFIER       0x42
+#define BT_HCI_ERR_LIMIT_REACHED                0x43
+#define BT_HCI_ERR_OP_CANCELLED_BY_HOST         0x44
+#define BT_HCI_ERR_PACKET_TOO_LONG              0x45
+
+#define BT_HCI_ERR_AUTHENTICATION_FAIL __DEPRECATED_MACRO BT_HCI_ERR_AUTH_FAIL
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _YC11XX_HCI_ERR_H_ */
Index: ModuleDemo/26_BOOT/bt_demo/CM0/User/main.c
===================================================================
--- /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/main.c	(nonexistent)
+++ /YC1121E/SoftCode/1121EB/branch/HciDongle_MinZhan/ModuleDemo/26_BOOT/bt_demo/CM0/User/main.c	(working copy)
@@ -0,0 +1,186 @@
+#include <stdarg.h>
+#include "yc11xx.h"
+#include "type.h"
+//#include "yc11xx_uart.h"
+#include "yc11xx_gpio.h"
+#include "btreg.h"
+#include "yc_debug.h"
+#include "ipc.h"
+#include "Drv_bt.h"
+#include "nvic.h"
+#include "yc11xx_wdt.h"
+#include "yc_drv_common.h"
+#include "yc11xx_h4.h"
+
+
+tIPCHandleCb gTIPCHandleCb[IPC_TYPE_NUM]=
+{
+	0,
+	IpcDefaultCallBack,//cmd
+	Bt_EvtCallBack,//evt
+	IpcDefaultCallBack,//hid
+	//Bt_SPPCallBack,//spp
+	IpcDefaultCallBack,
+	IpcDefaultCallBack,//ble
+	IpcDefaultCallBack,//24g
+	IpcDefaultCallBack,//mesh
+	IpcDefaultCallBack,//mesh
+	IpcDefaultCallBack,//mesh
+	Bt_DataBufferCallBack,//a2dp
+	IpcDefaultCallBack,//hfp
+	IpcDefaultCallBack,//tws
+};
+WDT_InitTypeDef  gWdtInit =
+{
+	.WDTx =WDT2,
+	.mode =RESET_MODE,
+	.setload =WDT_timer_1_5s,
+
+};
+#if 0
+int main(void)
+{
+	*(volatile byte*)(reg_map_m0(0x1f000)) = 0x1c;//Enable cm0 debug
+	SYS_TimerInit(CLOCK_48M_multiple);
+	IPC_init(&gTIPCHandleCb);
+	
+//	GPIO_SetGpioMultFunction(GPIO_19,0x3f);
+//	while(1);
+	
+	DEBUG_INIT();
+	DEBUG_LOG(LOG_LEVEL_CORE, "IPC" ,"Bt_EvtCallBack: 0x%04X", LOG_POINT_9010, gBRState.topState);
+
+#ifdef FUNCTION_WATCH_DOG
+	WDT_Start(&gWdtInit);
+#endif
+	h4_init();
+
+	while (1)
+	{
+#ifdef FUNCTION_WATCH_DOG
+		WDT_Kick();
+#endif
+		//For respin log print
+		DEBUG_POLLING_PRINT();
+
+		switch (HREAD(IPC_MCU_STATE))
+		{
+			case IPC_MCU_STATE_RUNNING:
+				//always first init bt
+				IPC_HandleRxPacket();
+			
+				//boot test
+				if(HREAD(0x4ff0))
+				{
+					HWRITE(0x4ff0,0);
+				//	HWRITE24BIT(mem_app_flash_address,0x6003);
+					IPC_TxControlCmd(BT_CMD_LOADCODE);
+				}
+				
+				
+				
+				//Bt_watchdog();
+				if (gBRState.topState != BR_POWER_OFF)
+				{
+					SYS_timerPolling();
+
+					h4_polling_rx();
+				}
+				Lpm_unLockLpm(M0_LPM_FLAG);
+				break;
+			case IPC_MCU_STATE_LMP:
+				if (IPC_IsTxBuffEmpty()
+					&& DEBUG_LOG_BUFFER_IS_EMPTY())
+				{
+					OS_ENTER_CRITICAL();
+					Bt_ActionBeforeLpm();
+					HWRITE(IPC_MCU_STATE,IPC_MCU_STATE_STOP);
+				}
+				else
+				{
+					HWRITE(IPC_MCU_STATE,IPC_MCU_STATE_RUNNING);
+				}
+				break;
+			case IPC_MCU_STATE_HIBERNATE:
+				OS_ENTER_CRITICAL();
+				Bt_ActionBeforeHibernate();
+				HWRITE(IPC_MCU_STATE,IPC_MCU_STATE_STOP);
+				break;
+			case IPC_MCU_STATE_STOP:
+				break;
+		}
+		//hw_delay();
+	};
+}
+#else
+
+void app_load(uint32_t  app_addr)
+{
+	HWRITE(mem_app_flash_address,((app_addr>>16)&0xff));
+	HWRITE(mem_app_flash_address+1,((app_addr>>8)&0xff));
+	HWRITE(mem_app_flash_address+2,(app_addr&0xff));
+	IPC_TxControlCmd(BT_CMD_LOADCODE);
+}
+
+int main(void)
+{
+	*(volatile byte*)(reg_map_m0(0x1f000)) = 0x1c;//Enable cm0 debug
+	SYS_TimerInit(CLOCK_48M_multiple);
+	IPC_init(&gTIPCHandleCb);
+#ifdef FUNCTION_WATCH_DOG
+	WDT_Start(&gWdtInit);
+#endif	
+	while (1)
+	{
+#ifdef FUNCTION_WATCH_DOG
+		WDT_Kick();
+#endif
+		IPC_HandleRxPacket();
+
+
+		SYS_delay_ms(5000);
+		//boot test
+		app_load(0x6003);
+		while(1);
+	}		
+}
+#endif
+
+
+
+void SCO_NVIC_Config(void)
+{
+	NVIC_SetPriority(timer6_handler_IRQn, 0);
+	NVIC_EnableIRQ(timer6_handler_IRQn);
+}
+
+void SCO_NVIC_DeConfig(void)
+{
+	NVIC_SetPriority(timer6_handler_IRQn, 0);
+	NVIC_DisableIRQ(timer6_handler_IRQn);
+}
+
+
+
+
+void TIMER6_IRQHandler(void)
+{
+//	Bt_SCODataProcess();
+}
+
+
+/**
+  * @brief  Systick interrupt service function.
+  * @param  None
+  * @retval None
+  */
+void SysTick_Handler(void)
+{
+	SYStick_handle();
+}
+
+void _assert_handler(const char* file, int line,const char* func)
+{
+	while(1);
+}
+