Index: SCI7816_EMV_L1/prj/GCC/c.bat =================================================================== --- /public/yc3122/trunk/SDK/ModuleDemo/SCI/SCI7816_EMV_L1/prj/GCC/c.bat (nonexistent) +++ /public/yc3122/trunk/SDK/ModuleDemo/SCI/SCI7816_EMV_L1/prj/GCC/c.bat (working copy) @@ -0,0 +1,242 @@ +cls +@echo off + +call:get_project_path ModuleDemo PROJ_PATH +echo PROJ_PATH %PROJ_PATH% + +make clean +make PROJECT_PATH=%PROJ_PATH% + +rem call %PROJ_PATH%ConfigFiles/util/d.bat %now_path%output/out.hex %now_path%output/flash.dat + +goto:eof + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +::------------------------------------------ +::---------------func:get_project_path------- +::------------------------------------------ +:get_project_path +setlocal +set now_path=%~dp0 +set "find_str=%1" + +call:getstrlocation %now_path% %find_str% location +call:get_backslash_location %now_path% %location% backslash_location +call:gen_relative_path %backslash_location% PROJ_PATH + +(endlocal + set %2=%PROJ_PATH% +) +goto:eof +::---------------end:func------------------- + + +::------------------------------------------ +::---------------func:getstrlocation------- +::------------------------------------------ +:getstrlocation +setlocal +set "bstr=%1" +set "cstr=%2" +set %3=0 +set "num=0" +set /a "len_bstr=0" +set /a "len_cstr=0" + +call:getstrlen %bstr% len_bstr +call:getstrlen %cstr% len_cstr + +:getstrlocation_next +set /a len_remain=len_bstr-num +if %len_remain% lss %len_cstr% ( +echo "cann't get str location" +set /a num =0 +goto getstrlocation_last +) +call:get_fix_len_str %bstr% len_cstr compar_str +if not %compar_str%==%cstr% ( +set /a num+=1 +set "bstr=%bstr:~1%" +goto getstrlocation_next +) + +:getstrlocation_last +(endlocal + set %3=%num% +) +goto:eof +::---------------end:func------------------- + + +::------------------------------------------ +::---------------func:get_fix_len_str------- +::------------------------------------------ +:get_fix_len_str +setlocal +set "getstr=%NULL%" +set str=%1 +set /a len=%2 +set num=0 +:get_fix_len_str_loop +set getstr=%getstr%%str:~0,1% +set /a num+=1 +set str=%str:~1% +if %num% lss %len% goto get_fix_len_str_loop +(endlocal + set %3=%getstr% +) +goto:eof +::---------------end:func------------------- + + + + +::------------------------------------------ +::---------------func:getstrlen------------- +::------------------------------------------ +:getstrlen +setlocal +set str=%1 +set %2=0 +set /a "num=0" + +:getstrlen_next +if "%str%"=="" goto getstrlen_last + +if not "%str%"=="" ( +set /a num+=1 +set "str=%str:~1%" +goto getstrlen_next +) + +:getstrlen_last +(endlocal + set /a "%2=%num%" +) +goto:eof +::---------------end:func------------------- + + + +::--------------------------------------------- +::---------------func:get_backslash_location -- +::--------------------------------------------- +:get_backslash_location +setlocal +set "str=%1" +set "len=%2" +set /a "num=0" +set /a "backslash_num=0" +set /a "str_len=0" +call:getstrlen %str% str_len +set /a len=str_len-len + +rem echo "str" %str% +rem echo "str_len" %str_len% +rem echo "len" %len% + +:get_backslash_location_loop +if "%str:~-1%"=="\" ( +set /a backslash_num+=1 +) +set /a num+=1 +set str=%str:~0,-1% + +rem echo "str" %str% +rem echo "num" %num% + +if %num% lss %len% goto get_backslash_location_loop + +echo backslash_num: %backslash_num% + +(endlocal + set /a %3=%backslash_num% +) +goto:eof +::---------------end:func------------------- + +::--------------------------------------------- +::---------------func:get_backslash_location -- +::--------------------------------------------- +:gen_relative_path +setlocal +set /a "num=0" +set /a "times=%1" +set "str=%NULL%" +set single_str=../ + +rem echo num %num% +rem echo times %times% +rem echo str %str% +rem echo single_str %single_str% + +:gen_relative_path_loop +set str=%str%%single_str% +set /a num+=1 +if %num% lss %times% goto gen_relative_path_loop + +(endlocal + set "%2=%str%" + echo %str% +) +goto:eof + + + +::------------------------------------------ +::---------------func:getcharlocation------- +::------------------------------------------ +:getcharlocation +setlocal +set "str=%1" +set "ch=%2" +set %3=0 +set /a "num=0" + +:getcharnext +if "%str%"=="" ( +set /a num=0 +goto getcharlast +) + +if not "%str%"=="" ( +set /a num+=1 +if "%str:~0,1%"=="%ch%" goto getcharlast +set "str=%str:~1%" +goto getcharnext +) +:getcharlast +(endlocal +set %3=%num% +) +goto:eof +::---------------end:func------------------- Index: SCI7816_EMV_L1/prj/GCC/m.bat =================================================================== --- /public/yc3122/trunk/SDK/ModuleDemo/SCI/SCI7816_EMV_L1/prj/GCC/m.bat (nonexistent) +++ /public/yc3122/trunk/SDK/ModuleDemo/SCI/SCI7816_EMV_L1/prj/GCC/m.bat (working copy) @@ -0,0 +1,241 @@ +@echo off +set now_path=%~dp0 +call:get_project_path ModuleDemo PROJ_PATH +echo PROJ_PATH %PROJ_PATH% + +make clean +make PROJECT_PATH=%PROJ_PATH% + +call %PROJ_PATH%ConfigFiles/util/d.bat %now_path%output/out.hex %now_path%output/flash.dat + +goto:eof + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +::------------------------------------------ +::---------------func:get_project_path------- +::------------------------------------------ +:get_project_path +setlocal +set now_path=%~dp0 +set "find_str=%1" + +call:getstrlocation %now_path% %find_str% location +call:get_backslash_location %now_path% %location% backslash_location +call:gen_relative_path %backslash_location% PROJ_PATH + +(endlocal + set %2=%PROJ_PATH% +) +goto:eof +::---------------end:func------------------- + + +::------------------------------------------ +::---------------func:getstrlocation------- +::------------------------------------------ +:getstrlocation +setlocal +set "bstr=%1" +set "cstr=%2" +set %3=0 +set "num=0" +set /a "len_bstr=0" +set /a "len_cstr=0" + +call:getstrlen %bstr% len_bstr +call:getstrlen %cstr% len_cstr + +:getstrlocation_next +set /a len_remain=len_bstr-num +if %len_remain% lss %len_cstr% ( +echo "cann't get str location" +set /a num =0 +goto getstrlocation_last +) +call:get_fix_len_str %bstr% len_cstr compar_str +if not %compar_str%==%cstr% ( +set /a num+=1 +set "bstr=%bstr:~1%" +goto getstrlocation_next +) + +:getstrlocation_last +(endlocal + set %3=%num% +) +goto:eof +::---------------end:func------------------- + + +::------------------------------------------ +::---------------func:get_fix_len_str------- +::------------------------------------------ +:get_fix_len_str +setlocal +set "getstr=%NULL%" +set str=%1 +set /a len=%2 +set num=0 +:get_fix_len_str_loop +set getstr=%getstr%%str:~0,1% +set /a num+=1 +set str=%str:~1% +if %num% lss %len% goto get_fix_len_str_loop +(endlocal + set %3=%getstr% +) +goto:eof +::---------------end:func------------------- + + + + +::------------------------------------------ +::---------------func:getstrlen------------- +::------------------------------------------ +:getstrlen +setlocal +set str=%1 +set %2=0 +set /a "num=0" + +:getstrlen_next +if "%str%"=="" goto getstrlen_last + +if not "%str%"=="" ( +set /a num+=1 +set "str=%str:~1%" +goto getstrlen_next +) + +:getstrlen_last +(endlocal + set /a "%2=%num%" +) +goto:eof +::---------------end:func------------------- + + + +::--------------------------------------------- +::---------------func:get_backslash_location -- +::--------------------------------------------- +:get_backslash_location +setlocal +set "str=%1" +set "len=%2" +set /a "num=0" +set /a "backslash_num=0" +set /a "str_len=0" +call:getstrlen %str% str_len +set /a len=str_len-len + +rem echo "str" %str% +rem echo "str_len" %str_len% +rem echo "len" %len% + +:get_backslash_location_loop +if "%str:~-1%"=="\" ( +set /a backslash_num+=1 +) +set /a num+=1 +set str=%str:~0,-1% + +rem echo "str" %str% +rem echo "num" %num% + +if %num% lss %len% goto get_backslash_location_loop + +echo backslash_num: %backslash_num% + +(endlocal + set /a %3=%backslash_num% +) +goto:eof +::---------------end:func------------------- + +::--------------------------------------------- +::---------------func:get_backslash_location -- +::--------------------------------------------- +:gen_relative_path +setlocal +set /a "num=0" +set /a "times=%1" +set "str=%NULL%" +set single_str=../ + +rem echo num %num% +rem echo times %times% +rem echo str %str% +rem echo single_str %single_str% + +:gen_relative_path_loop +set str=%str%%single_str% +set /a num+=1 +if %num% lss %times% goto gen_relative_path_loop + +(endlocal + set "%2=%str%" + echo %str% +) +goto:eof + + + +::------------------------------------------ +::---------------func:getcharlocation------- +::------------------------------------------ +:getcharlocation +setlocal +set "str=%1" +set "ch=%2" +set %3=0 +set /a "num=0" + +:getcharnext +if "%str%"=="" ( +set /a num=0 +goto getcharlast +) + +if not "%str%"=="" ( +set /a num+=1 +if "%str:~0,1%"=="%ch%" goto getcharlast +set "str=%str:~1%" +goto getcharnext +) +:getcharlast +(endlocal +set %3=%num% +) +goto:eof +::---------------end:func------------------- Index: SCI7816_EMV_L1/prj/GCC/makefile =================================================================== --- /public/yc3122/trunk/SDK/ModuleDemo/SCI/SCI7816_EMV_L1/prj/GCC/makefile (nonexistent) +++ /public/yc3122/trunk/SDK/ModuleDemo/SCI/SCI7816_EMV_L1/prj/GCC/makefile (working copy) @@ -0,0 +1,245 @@ +ifeq ($(OS),Windows_NT) +DIR := C:/gcc-arm-none-eabi-7-2018-q2-update-win32 +else +DIR = /usr/gcc-arm-none-eabi-7-2018-q2-update +endif + +ARCH = $(DIR)/bin/arm-none-eabi +GCC = $(ARCH)-gcc +LD = $(ARCH)-gcc +AS = $(ARCH)-as +OBJCOPY = $(ARCH)-objcopy +OBJDUMP = "$(ARCH)-objdump" + +PROJECT_PATH = ../../../../../ + +LIB_PATH = $(PROJECT_PATH)Libraries +USER_PATH = ../../user +UTIL_PATH = $(PROJECT_PATH)ConfigFiles/util + +all : output/out.hex + +f : output/out.hex + +CORE_OBJS = $(LIB_PATH)/CMSIS/Device/YICHIP/YC3122/Source/Templates/gcc/startup_yc3122 \ + $(LIB_PATH)/CMSIS/Device/YICHIP/YC3122/Source/Templates/system_yc3122 \ + $(LIB_PATH)/core/system \ + $(LIB_PATH)/sdk/yc_uart \ + $(LIB_PATH)/sdk/yc_gpio \ + $(LIB_PATH)/sdk/yc_sysctrl \ + $(LIB_PATH)/sdk/yc_timer \ + $(LIB_PATH)/sdk/yc_bpu \ + $(LIB_PATH)/sdk/yc_otp \ + $(LIB_PATH)/sdk/yc_7816_emv_L1/yc_7816 \ + $(LIB_PATH)/sdk/yc_7816_emv_L1/yc_7816_T0 \ + $(LIB_PATH)/sdk/yc_7816_emv_L1/yc_7816_T1 \ + + +USER_OBJS = $(USER_PATH)/main \ + +OBJS = $(CORE_OBJS) $(USER_OBJS) + +INC_DIR = -I $(USER_PATH)/ \ + -I $(LIB_PATH)/CMSIS/Include \ + -I $(LIB_PATH)/CMSIS/Device/YICHIP/YC3122/Include \ + -I $(LIB_PATH)/core \ + -I $(LIB_PATH)/sdk \ + -I $(LIB_PATH)/sdk/yc_7816_emv_L1 \ + + +DEF = -D__USE_YC_M0__ +CFLAG = -mthumb -mcpu=cortex-m0 -c -g -Os $(INC_DIR) $(DEF) -fno-toplevel-reorder -ffunction-sections -fdata-sections +LDFLAG = $(USER_LIB) $(INC_DIR) -lm -lc -lgcc -nostartfiles -T output/ld.script -Wl,-Map=output/memmap -L "$(DIR)/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m" -L "$(DIR)/arm-none-eabi/lib/thumb/v6-m" + +define ldscript = +/* Linker script to configure memory regions. + * Need modifying for a specific board. + * FLASH.ORIGIN: starting address of flash + * FLASH.LENGTH: length of flash + * RAM.ORIGIN: starting address of RAM bank 0 + * RAM.LENGTH: length of RAM bank 0 + */ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x1000000, LENGTH = 0x80000 /* 512K */ + RAM (rwx) : ORIGIN = 0x20004, LENGTH = 0x1FFFC /* 128K */ +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + *flash_start*.o + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > FLASH + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + + . = ALIGN(4); + __exidx_start = .; + + __etext = .; + + .data : AT (__etext) + { + __data_start__ = .; + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > RAM + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM + + .heap (COPY): + { + __end__ = .; + PROVIDE(end = .); + *(.heap*) + __HeapLimit = .; + } > RAM + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + *(.stack*) + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") +} +endef + +output/out.hex : output/out + $(OBJCOPY) -O ihex $^ $@ + +output/out : $(addprefix output/, $(addsuffix .o, $(OBJS))) + $(file >output/ld.script, $(ldscript)) + $(LD) $(addprefix output/obj/,$(addsuffix .o, $(notdir $(OBJS)))) -o $@ $(LDFLAG) + $(OBJDUMP) -S $@ > output/disasm + +debug : + echo $(addprefix output/, $(addsuffix .o, $(notdir $(OBJS)))) + echo $(AS) + echo $(LIB_PATH) + echo $(PROJECT_PATH) + +$(OBJ): output/%.o + +output/%.o : %.c + echo $< + $(GCC) $< -o output/obj/$(notdir $@) $(CFLAG) + +output/%.o : %.s + $(AS) $^ -o output/obj/$(notdir $@) -mthumb -mcpu=cortex-m0 + +clean : +ifeq ($(OS),Windows_NT) + del /Q output\*.* + del /Q output\obj\*.* +else + rm -rf output/* + rm -rf output/obj/* +endif Index: SCI7816_EMV_L1/prj/GCC/output/disasm =================================================================== --- /public/yc3122/trunk/SDK/ModuleDemo/SCI/SCI7816_EMV_L1/prj/GCC/output/disasm (nonexistent) +++ /public/yc3122/trunk/SDK/ModuleDemo/SCI/SCI7816_EMV_L1/prj/GCC/output/disasm (working copy) @@ -0,0 +1,18951 @@ + +output/out: file format elf32-littlearm + + +Disassembly of section .text: + +01000000 : + 1000000: 00030000 .word 0x00030000 + 1000004: 010000cd .word 0x010000cd + 1000008: 00000000 .word 0x00000000 + 100000c: 01000107 .word 0x01000107 + ... + 100002c: 01000107 .word 0x01000107 + ... + 1000038: 01000107 .word 0x01000107 + 100003c: 01000107 .word 0x01000107 + 1000040: 01000107 .word 0x01000107 + 1000044: 01000107 .word 0x01000107 + 1000048: 01000107 .word 0x01000107 + 100004c: 01000107 .word 0x01000107 + 1000050: 01000107 .word 0x01000107 + 1000054: 01000107 .word 0x01000107 + 1000058: 01000107 .word 0x01000107 + 100005c: 01000107 .word 0x01000107 + 1000060: 01000107 .word 0x01000107 + 1000064: 01000107 .word 0x01000107 + 1000068: 01000107 .word 0x01000107 + 100006c: 01000107 .word 0x01000107 + 1000070: 01000107 .word 0x01000107 + 1000074: 01006415 .word 0x01006415 + 1000078: 01006425 .word 0x01006425 + 100007c: 01000107 .word 0x01000107 + 1000080: 01000107 .word 0x01000107 + 1000084: 010063ad .word 0x010063ad + 1000088: 010063dd .word 0x010063dd + 100008c: 01000107 .word 0x01000107 + 1000090: 01000107 .word 0x01000107 + 1000094: 01000107 .word 0x01000107 + 1000098: 01000107 .word 0x01000107 + 100009c: 01000107 .word 0x01000107 + 10000a0: 01000107 .word 0x01000107 + 10000a4: 01000107 .word 0x01000107 + 10000a8: 01000107 .word 0x01000107 + 10000ac: 01000107 .word 0x01000107 + 10000b0: 01000107 .word 0x01000107 + 10000b4: 01000107 .word 0x01000107 + 10000b8: 01000107 .word 0x01000107 + 10000bc: 01000107 .word 0x01000107 + +010000c0 : + 10000c0: 4911 ldr r1, [pc, #68] ; (1000108 ) + 10000c2: 5840 ldr r0, [r0, r1] + 10000c4: 4700 bx r0 + 10000c6: 46c0 nop ; (mov r8, r8) + 10000c8: 46c0 nop ; (mov r8, r8) + 10000ca: 46c0 nop ; (mov r8, r8) + +010000cc : + 10000cc: 480f ldr r0, [pc, #60] ; (100010c ) + 10000ce: 4780 blx r0 + 10000d0: 480f ldr r0, [pc, #60] ; (1000110 ) + 10000d2: 4700 bx r0 + +010000d4 : + 10000d4: 490f ldr r1, [pc, #60] ; (1000114 ) + 10000d6: 4a10 ldr r2, [pc, #64] ; (1000118 ) + 10000d8: 4b10 ldr r3, [pc, #64] ; (100011c ) + 10000da: 1a9b subs r3, r3, r2 + 10000dc: dd03 ble.n 10000e6 + 10000de: 3b04 subs r3, #4 + 10000e0: 58c8 ldr r0, [r1, r3] + 10000e2: 50d0 str r0, [r2, r3] + 10000e4: dcfb bgt.n 10000de + 10000e6: 490e ldr r1, [pc, #56] ; (1000120 ) + 10000e8: 4a0e ldr r2, [pc, #56] ; (1000124 ) + 10000ea: 2000 movs r0, #0 + 10000ec: 1a52 subs r2, r2, r1 + 10000ee: dd02 ble.n 10000f6 + 10000f0: 3a04 subs r2, #4 + 10000f2: 5088 str r0, [r1, r2] + 10000f4: dcfc bgt.n 10000f0 + 10000f6: 480c ldr r0, [pc, #48] ; (1000128 ) + 10000f8: 4b0c ldr r3, [pc, #48] ; (100012c ) + 10000fa: f006 f869 bl 10061d0
+ +010000fe : + 10000fe: 3801 subs r0, #1 + 1000100: d1fd bne.n 10000fe + 1000102: 46c0 nop ; (mov r8, r8) + 1000104: 4770 bx lr + +01000106 : + 1000106: e7fe b.n 1000106 + 1000108: 01000200 .word 0x01000200 + 100010c: 01000141 .word 0x01000141 + 1000110: 010000d5 .word 0x010000d5 + 1000114: 010071c0 .word 0x010071c0 + 1000118: 00020004 .word 0x00020004 + 100011c: 00020014 .word 0x00020014 + 1000120: 00020014 .word 0x00020014 + 1000124: 00021f1c .word 0x00021f1c + 1000128: 00012345 .word 0x00012345 + 100012c: 00001111 .word 0x00001111 + +01000130 : +{ +/* ToDo: add code to calculate the system frequency based upon the current + register settings. + This function can be used to retrieve the system core clock frequeny + after user changed register sittings. */ + SystemCoreClock = __SYSTEM_CLOCK; + 1000130: 4b01 ldr r3, [pc, #4] ; (1000138 ) + 1000132: 4a02 ldr r2, [pc, #8] ; (100013c ) + 1000134: 601a str r2, [r3, #0] +} + 1000136: 4770 bx lr + 1000138: 00020004 .word 0x00020004 + 100013c: 02dc6c00 .word 0x02dc6c00 + +01000140 : +{ + /* ToDo: add code to initialize the system + do not use global variables because this function is called before + reaching pre-main. RW section maybe overwritten afterwards. */ + +} + 1000140: 4770 bx lr + ... + +01000144 : +void print_char(int data) +{ + + volatile int *ptr; + ptr = (volatile int *)0xE0300; + *ptr = data; + 1000144: 4b01 ldr r3, [pc, #4] ; (100014c ) + 1000146: 6018 str r0, [r3, #0] +} + 1000148: 4770 bx lr + 100014a: 46c0 nop ; (mov r8, r8) + 100014c: 000e0300 .word 0x000e0300 + +01000150 : + +void printfsend(uint8_t *buf, int len) +{ + 1000150: 000a movs r2, r1 + uint8_t printbuf[256]; + for (int i = 0; i < len; i++) + 1000152: 2300 movs r3, #0 +{ + 1000154: b510 push {r4, lr} + 1000156: b0c0 sub sp, #256 ; 0x100 + for (int i = 0; i < len; i++) + 1000158: 4293 cmp r3, r2 + 100015a: db06 blt.n 100016a +#ifdef SIM_PLATFORM + print_char(buf[i]); +#endif + } +#ifndef SIM_PLATFORM + UART_SendBuf(PrintPort_Struct.PrintUart, printbuf, len); + 100015c: 4b05 ldr r3, [pc, #20] ; (1000174 ) + 100015e: 4669 mov r1, sp + 1000160: 6818 ldr r0, [r3, #0] + 1000162: f000 fb7d bl 1000860 +#endif +} + 1000166: b040 add sp, #256 ; 0x100 + 1000168: bd10 pop {r4, pc} + printbuf[i] = buf[i]; + 100016a: 466c mov r4, sp + 100016c: 5cc1 ldrb r1, [r0, r3] + 100016e: 54e1 strb r1, [r4, r3] + for (int i = 0; i < len; i++) + 1000170: 3301 adds r3, #1 + 1000172: e7f1 b.n 1000158 + 1000174: 00020008 .word 0x00020008 + +01000178 : + +void MyPrintf(char *format, ...) +{ + 1000178: b40f push {r0, r1, r2, r3} + static const int8_t *const g_pcHex1 = "0123456789abcdef"; + static const int8_t *const g_pcHex2 = "0123456789ABCDEF"; + + uint32_t ulIdx = 0, ulValue = 0, ulPos = 0, ulCount = 0, ulBase = 0, ulNeg = 0; + 100017a: 2100 movs r1, #0 +{ + 100017c: b5f0 push {r4, r5, r6, r7, lr} + 100017e: b08d sub sp, #52 ; 0x34 + 1000180: ac12 add r4, sp, #72 ; 0x48 + 1000182: cc08 ldmia r4!, {r3} + int8_t *pcStr = NULL, pcBuf[16] = {0}, cFill = 0; + 1000184: 2210 movs r2, #16 + 1000186: a808 add r0, sp, #32 +{ + 1000188: 9302 str r3, [sp, #8] + uint32_t ulIdx = 0, ulValue = 0, ulPos = 0, ulCount = 0, ulBase = 0, ulNeg = 0; + 100018a: 9106 str r1, [sp, #24] + int8_t *pcStr = NULL, pcBuf[16] = {0}, cFill = 0; + 100018c: f006 f990 bl 10064b0 + char HexFormat; + va_list vaArgP; + + va_start(vaArgP, format); + 1000190: 9407 str r4, [sp, #28] + + while (*format) + 1000192: 9b02 ldr r3, [sp, #8] + 1000194: 781b ldrb r3, [r3, #0] + 1000196: 2b00 cmp r3, #0 + 1000198: d100 bne.n 100019c + 100019a: e0da b.n 1000352 + 100019c: 9b02 ldr r3, [sp, #8] + 100019e: 9a02 ldr r2, [sp, #8] + { + /* Find the first non-% character, or the end of the string. */ + for (ulIdx = 0; (format[ulIdx] != '%') && (format[ulIdx] != '\0'); ulIdx++) + 10001a0: 001c movs r4, r3 + 10001a2: 1a99 subs r1, r3, r2 + 10001a4: 781a ldrb r2, [r3, #0] + 10001a6: 2a25 cmp r2, #37 ; 0x25 + 10001a8: d002 beq.n 10001b0 + 10001aa: 3301 adds r3, #1 + 10001ac: 2a00 cmp r2, #0 + 10001ae: d1f6 bne.n 100019e + {} + + /* Write this portion of the string. */ + if (ulIdx > 0) + 10001b0: 2900 cmp r1, #0 + 10001b2: d002 beq.n 10001ba + { + printfsend((uint8_t *)format, ulIdx); + 10001b4: 9802 ldr r0, [sp, #8] + 10001b6: f7ff ffcb bl 1000150 + } + + format += ulIdx; + + if (*format == '%') + 10001ba: 7823 ldrb r3, [r4, #0] + 10001bc: 9402 str r4, [sp, #8] + 10001be: 2b25 cmp r3, #37 ; 0x25 + 10001c0: d1e7 bne.n 1000192 + { + format++; + 10001c2: 1c60 adds r0, r4, #1 + if ((format[-1] == '0') && (ulCount == 0)) + { + cFill = '0'; + } + + ulCount *= 10; + 10001c4: 220a movs r2, #10 + ulCount = 0; + 10001c6: 2400 movs r4, #0 + cFill = ' '; + 10001c8: 3b05 subs r3, #5 + 10001ca: 9303 str r3, [sp, #12] + switch (*format++) + 10001cc: 1c43 adds r3, r0, #1 + 10001ce: 9302 str r3, [sp, #8] + 10001d0: 7803 ldrb r3, [r0, #0] + 10001d2: 2b63 cmp r3, #99 ; 0x63 + 10001d4: d033 beq.n 100023e + 10001d6: d814 bhi.n 1000202 + 10001d8: 2b39 cmp r3, #57 ; 0x39 + 10001da: d807 bhi.n 10001ec + 10001dc: 2b30 cmp r3, #48 ; 0x30 + 10001de: d223 bcs.n 1000228 + break; + } + + case '%': + { + printfsend((uint8_t *)format - 1, 1); + 10001e0: 2101 movs r1, #1 + switch (*format++) + 10001e2: 2b25 cmp r3, #37 ; 0x25 + 10001e4: d032 beq.n 100024c + break; + } + + default: + { + printfsend((uint8_t *)"ERROR", 5); + 10001e6: 2105 movs r1, #5 + 10001e8: 485c ldr r0, [pc, #368] ; (100035c ) + 10001ea: e02f b.n 100024c + switch (*format++) + 10001ec: 2b58 cmp r3, #88 ; 0x58 + 10001ee: d1fa bne.n 10001e6 + ulValue = va_arg(vaArgP, unsigned long); + 10001f0: 9a07 ldr r2, [sp, #28] + 10001f2: 1d11 adds r1, r2, #4 + 10001f4: 6812 ldr r2, [r2, #0] + 10001f6: 9107 str r1, [sp, #28] + 10001f8: 9206 str r2, [sp, #24] + HexFormat = 'x'; + 10001fa: 9304 str r3, [sp, #16] + ulNeg = 0; + 10001fc: 2600 movs r6, #0 + ulBase = 16; + 10001fe: 2710 movs r7, #16 + 1000200: e034 b.n 100026c + switch (*format++) + 1000202: 2b73 cmp r3, #115 ; 0x73 + 1000204: d06c beq.n 10002e0 + 1000206: d80a bhi.n 100021e + 1000208: 2b64 cmp r3, #100 ; 0x64 + 100020a: d022 beq.n 1000252 + 100020c: 2b70 cmp r3, #112 ; 0x70 + 100020e: d1ea bne.n 10001e6 + ulValue = va_arg(vaArgP, unsigned long); + 1000210: 9b07 ldr r3, [sp, #28] + 1000212: 1d1a adds r2, r3, #4 + 1000214: 681b ldr r3, [r3, #0] + 1000216: 9207 str r2, [sp, #28] + 1000218: 9306 str r3, [sp, #24] + HexFormat = 'x'; + 100021a: 2378 movs r3, #120 ; 0x78 + 100021c: e7ed b.n 10001fa + switch (*format++) + 100021e: 2b75 cmp r3, #117 ; 0x75 + 1000220: d079 beq.n 1000316 + 1000222: 2b78 cmp r3, #120 ; 0x78 + 1000224: d0f4 beq.n 1000210 + 1000226: e7de b.n 10001e6 + if ((format[-1] == '0') && (ulCount == 0)) + 1000228: 2b30 cmp r3, #48 ; 0x30 + 100022a: d103 bne.n 1000234 + 100022c: 2c00 cmp r4, #0 + 100022e: d101 bne.n 1000234 + cFill = '0'; + 1000230: 2130 movs r1, #48 ; 0x30 + 1000232: 9103 str r1, [sp, #12] + ulCount *= 10; + 1000234: 4354 muls r4, r2 + 1000236: 3c30 subs r4, #48 ; 0x30 + ulCount += format[-1] - '0'; + 1000238: 191c adds r4, r3, r4 + switch (*format++) + 100023a: 9802 ldr r0, [sp, #8] + goto again; + 100023c: e7c6 b.n 10001cc + printfsend((uint8_t *)&ulValue, 1); + 100023e: 2101 movs r1, #1 + ulValue = va_arg(vaArgP, unsigned long); + 1000240: 9b07 ldr r3, [sp, #28] + printfsend((uint8_t *)&ulValue, 1); + 1000242: a806 add r0, sp, #24 + ulValue = va_arg(vaArgP, unsigned long); + 1000244: 1d1a adds r2, r3, #4 + 1000246: 681b ldr r3, [r3, #0] + 1000248: 9207 str r2, [sp, #28] + 100024a: 9306 str r3, [sp, #24] + printfsend((uint8_t *)"ERROR", 5); + 100024c: f7ff ff80 bl 1000150 + break; + 1000250: e79f b.n 1000192 + ulValue = va_arg(vaArgP, unsigned long); + 1000252: 9b07 ldr r3, [sp, #28] + 1000254: 1d1a adds r2, r3, #4 + 1000256: 681b ldr r3, [r3, #0] + 1000258: 9207 str r2, [sp, #28] + if ((long)ulValue < 0) + 100025a: 2b00 cmp r3, #0 + 100025c: db02 blt.n 1000264 + ulValue = va_arg(vaArgP, unsigned long); + 100025e: 9306 str r3, [sp, #24] + ulNeg = 0; + 1000260: 2600 movs r6, #0 + 1000262: e002 b.n 100026a + ulNeg = 1; + 1000264: 2601 movs r6, #1 + ulValue = -(long)ulValue; + 1000266: 425b negs r3, r3 + 1000268: 9306 str r3, [sp, #24] + ulBase = 10; + 100026a: 270a movs r7, #10 + (((ulIdx * ulBase) <= ulValue) && + 100026c: 9b06 ldr r3, [sp, #24] + 100026e: 9305 str r3, [sp, #20] + for (ulIdx = 1; + 1000270: 2301 movs r3, #1 + 1000272: 9301 str r3, [sp, #4] + (((ulIdx * ulBase) <= ulValue) && + 1000274: 9d01 ldr r5, [sp, #4] + for (ulIdx = 1; + 1000276: 9b05 ldr r3, [sp, #20] + (((ulIdx * ulBase) <= ulValue) && + 1000278: 437d muls r5, r7 + for (ulIdx = 1; + 100027a: 429d cmp r5, r3 + 100027c: d806 bhi.n 100028c + (((ulIdx * ulBase) / ulBase) == ulIdx)); + 100027e: 0039 movs r1, r7 + 1000280: 0028 movs r0, r5 + 1000282: f006 f977 bl 1006574 <__udivsi3> + (((ulIdx * ulBase) <= ulValue) && + 1000286: 9b01 ldr r3, [sp, #4] + 1000288: 4298 cmp r0, r3 + 100028a: d049 beq.n 1000320 + 100028c: 2500 movs r5, #0 + if (ulNeg) + 100028e: 42ae cmp r6, r5 + 1000290: d008 beq.n 10002a4 + if (ulNeg && (cFill == '0')) + 1000292: 9b03 ldr r3, [sp, #12] + ulCount--; + 1000294: 3c01 subs r4, #1 + if (ulNeg && (cFill == '0')) + 1000296: 2b30 cmp r3, #48 ; 0x30 + 1000298: d104 bne.n 10002a4 + pcBuf[ulPos++] = '-'; + 100029a: 222d movs r2, #45 ; 0x2d + 100029c: 0035 movs r5, r6 + ulNeg = 0; + 100029e: 2600 movs r6, #0 + pcBuf[ulPos++] = '-'; + 10002a0: ab08 add r3, sp, #32 + 10002a2: 701a strb r2, [r3, #0] + if ((ulCount > 1) && (ulCount < 16)) + 10002a4: 1ea3 subs r3, r4, #2 + 10002a6: 2b0d cmp r3, #13 + 10002a8: d80a bhi.n 10002c0 + for (ulCount--; ulCount; ulCount--) + 10002aa: 1e63 subs r3, r4, #1 + 10002ac: 192d adds r5, r5, r4 + pcBuf[ulPos++] = cFill; + 10002ae: a908 add r1, sp, #32 + 10002b0: 1aea subs r2, r5, r3 + 10002b2: 9803 ldr r0, [sp, #12] + 10002b4: 3a01 subs r2, #1 + for (ulCount--; ulCount; ulCount--) + 10002b6: 3b01 subs r3, #1 + pcBuf[ulPos++] = cFill; + 10002b8: 5488 strb r0, [r1, r2] + for (ulCount--; ulCount; ulCount--) + 10002ba: 2b00 cmp r3, #0 + 10002bc: d1f8 bne.n 10002b0 + 10002be: 3d01 subs r5, #1 + if (ulNeg) + 10002c0: 2e00 cmp r6, #0 + 10002c2: d005 beq.n 10002d0 + pcBuf[ulPos++] = '-'; + 10002c4: 2108 movs r1, #8 + 10002c6: 232d movs r3, #45 ; 0x2d + 10002c8: aa06 add r2, sp, #24 + 10002ca: 1852 adds r2, r2, r1 + 10002cc: 5553 strb r3, [r2, r5] + 10002ce: 3501 adds r5, #1 + pcBuf[ulPos++] = g_pcHex1[(ulValue / ulIdx) % ulBase];//x + 10002d0: 4e23 ldr r6, [pc, #140] ; (1000360 ) + 10002d2: ac08 add r4, sp, #32 + for (; ulIdx; ulIdx /= ulBase) + 10002d4: 9b01 ldr r3, [sp, #4] + 10002d6: 2b00 cmp r3, #0 + 10002d8: d125 bne.n 1000326 + printfsend((uint8_t *)pcBuf, ulPos); + 10002da: 0029 movs r1, r5 + 10002dc: a808 add r0, sp, #32 + 10002de: e7b5 b.n 100024c + pcStr = (int8_t *)va_arg(vaArgP, char *); + 10002e0: 9b07 ldr r3, [sp, #28] + 10002e2: 6818 ldr r0, [r3, #0] + 10002e4: 1d1a adds r2, r3, #4 + for (ulIdx = 0; pcStr[ulIdx] != '\0'; ulIdx++) + 10002e6: 0003 movs r3, r0 + pcStr = (int8_t *)va_arg(vaArgP, char *); + 10002e8: 9207 str r2, [sp, #28] + 10002ea: 1a1d subs r5, r3, r0 + 10002ec: 3301 adds r3, #1 + for (ulIdx = 0; pcStr[ulIdx] != '\0'; ulIdx++) + 10002ee: 1e5a subs r2, r3, #1 + 10002f0: 7812 ldrb r2, [r2, #0] + 10002f2: b252 sxtb r2, r2 + 10002f4: 2a00 cmp r2, #0 + 10002f6: d1f8 bne.n 10002ea + printfsend((uint8_t *)pcStr, ulIdx); + 10002f8: 0029 movs r1, r5 + 10002fa: f7ff ff29 bl 1000150 + if (ulCount > ulIdx) + 10002fe: 42ac cmp r4, r5 + 1000300: d800 bhi.n 1000304 + 1000302: e746 b.n 1000192 + ulCount -= ulIdx; + 1000304: 1b64 subs r4, r4, r5 + while (ulCount--) + 1000306: 3c01 subs r4, #1 + 1000308: d200 bcs.n 100030c + 100030a: e742 b.n 1000192 + printfsend((uint8_t *)" ", 1); + 100030c: 2101 movs r1, #1 + 100030e: 4815 ldr r0, [pc, #84] ; (1000364 ) + 1000310: f7ff ff1e bl 1000150 + 1000314: e7f7 b.n 1000306 + ulValue = va_arg(vaArgP, unsigned long); + 1000316: 9b07 ldr r3, [sp, #28] + 1000318: 1d1a adds r2, r3, #4 + 100031a: 9207 str r2, [sp, #28] + 100031c: 681b ldr r3, [r3, #0] + 100031e: e79e b.n 100025e + ulIdx *= ulBase, ulCount--) + 1000320: 3c01 subs r4, #1 + 1000322: 9501 str r5, [sp, #4] + 1000324: e7a6 b.n 1000274 + 1000326: 9901 ldr r1, [sp, #4] + 1000328: 9805 ldr r0, [sp, #20] + 100032a: f006 f923 bl 1006574 <__udivsi3> + 100032e: 0039 movs r1, r7 + 1000330: f006 f9a6 bl 1006680 <__aeabi_uidivmod> + if (HexFormat == 'x') + 1000334: 9b04 ldr r3, [sp, #16] + 1000336: 2b78 cmp r3, #120 ; 0x78 + 1000338: d108 bne.n 100034c + pcBuf[ulPos++] = g_pcHex1[(ulValue / ulIdx) % ulBase];//x + 100033a: 5c73 ldrb r3, [r6, r1] + pcBuf[ulPos++] = g_pcHex2[(ulValue / ulIdx) % ulBase];//X + 100033c: 5563 strb r3, [r4, r5] + for (; ulIdx; ulIdx /= ulBase) + 100033e: 9801 ldr r0, [sp, #4] + 1000340: 0039 movs r1, r7 + 1000342: f006 f917 bl 1006574 <__udivsi3> + 1000346: 3501 adds r5, #1 + 1000348: 9001 str r0, [sp, #4] + 100034a: e7c3 b.n 10002d4 + pcBuf[ulPos++] = g_pcHex2[(ulValue / ulIdx) % ulBase];//X + 100034c: 4b06 ldr r3, [pc, #24] ; (1000368 ) + 100034e: 5c5b ldrb r3, [r3, r1] + 1000350: e7f4 b.n 100033c + } + }/* switch */ + }/* if */ + }/* while */ + va_end(vaArgP); +} + 1000352: b00d add sp, #52 ; 0x34 + 1000354: bcf0 pop {r4, r5, r6, r7} + 1000356: bc08 pop {r3} + 1000358: b004 add sp, #16 + 100035a: 4718 bx r3 + 100035c: 01006882 .word 0x01006882 + 1000360: 01006860 .word 0x01006860 + 1000364: 010068c8 .word 0x010068c8 + 1000368: 01006871 .word 0x01006871 + +0100036c : + +void printv(uint8_t *buf, uint32_t len, char *s) +{ + 100036c: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 100036e: 0005 movs r5, r0 + 1000370: 000c movs r4, r1 + uint32_t i = 0; + uint32_t n = 0; + MyPrintf("\r\n%s:", s); + 1000372: 480f ldr r0, [pc, #60] ; (10003b0 ) + 1000374: 0011 movs r1, r2 + 1000376: f7ff feff bl 1000178 + uint32_t n = 0; + 100037a: 2600 movs r6, #0 + 100037c: 192b adds r3, r5, r4 + for (i = 0; i < len; i++) + { + if (i % 16 == 0) + 100037e: 270f movs r7, #15 + for (i = 0; i < len; i++) + 1000380: 002c movs r4, r5 + 1000382: 9301 str r3, [sp, #4] + 1000384: 9a01 ldr r2, [sp, #4] + 1000386: 1b63 subs r3, r4, r5 + 1000388: 4294 cmp r4, r2 + 100038a: d103 bne.n 1000394 + n += 16; + } + MyPrintf("%02x ", buf[i]); + + } + MyPrintf("\r\n"); + 100038c: 4809 ldr r0, [pc, #36] ; (10003b4 ) + 100038e: f7ff fef3 bl 1000178 +} + 1000392: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} + if (i % 16 == 0) + 1000394: 423b tst r3, r7 + 1000396: d104 bne.n 10003a2 + MyPrintf("\r\n%08x:", n); + 1000398: 0031 movs r1, r6 + 100039a: 4807 ldr r0, [pc, #28] ; (10003b8 ) + 100039c: f7ff feec bl 1000178 + n += 16; + 10003a0: 3610 adds r6, #16 + MyPrintf("%02x ", buf[i]); + 10003a2: 7821 ldrb r1, [r4, #0] + 10003a4: 4805 ldr r0, [pc, #20] ; (10003bc ) + 10003a6: f7ff fee7 bl 1000178 + 10003aa: 3401 adds r4, #1 + 10003ac: e7ea b.n 1000384 + 10003ae: 46c0 nop ; (mov r8, r8) + 10003b0: 01006888 .word 0x01006888 + 10003b4: 01007194 .word 0x01007194 + 10003b8: 0100688e .word 0x0100688e + 10003bc: 01006896 .word 0x01006896 + +010003c0 : + NVIC_SetPriority((IRQn_Type)(UART0_IRQn + print_irq),1); +} + +void PrintPort_Set(UART_TypeDef *UARTx) +{ + PrintPort_Struct.PrintUart = UARTx; + 10003c0: 4b06 ldr r3, [pc, #24] ; (10003dc ) + + if(UARTx == MUART1) + 10003c2: 4a07 ldr r2, [pc, #28] ; (10003e0 ) + PrintPort_Struct.PrintUart = UARTx; + 10003c4: 6018 str r0, [r3, #0] + if(UARTx == MUART1) + 10003c6: 4290 cmp r0, r2 + 10003c8: d106 bne.n 10003d8 + { + PrintPort_Struct.PrintRX_Port = UART1RX_PORT; + 10003ca: 2200 movs r2, #0 + PrintPort_Struct.PrintRX_Pin = UART1RX_IO_PIN; + 10003cc: 2101 movs r1, #1 + PrintPort_Struct.PrintRX_Port = UART1RX_PORT; + 10003ce: 711a strb r2, [r3, #4] + PrintPort_Struct.PrintTX_Port = UART1TX_PORT; + 10003d0: 721a strb r2, [r3, #8] + PrintPort_Struct.PrintTX_Pin = UART1TX_IO_PIN; + 10003d2: 3202 adds r2, #2 + PrintPort_Struct.PrintRX_Pin = UART1RX_IO_PIN; + 10003d4: 80d9 strh r1, [r3, #6] + PrintPort_Struct.PrintTX_Pin = UART1TX_IO_PIN; + 10003d6: 815a strh r2, [r3, #10] + } +} + 10003d8: 4770 bx lr + 10003da: 46c0 nop ; (mov r8, r8) + 10003dc: 00020008 .word 0x00020008 + 10003e0: 000f8c1c .word 0x000f8c1c + +010003e4 : + UART_InitStruct.BaudRate = PRINT_BAUD; //Configure serial port baud rate, the baud rate defaults to 128000. + 10003e4: 23e1 movs r3, #225 ; 0xe1 + +void Board_Init(void) +{ + 10003e6: b530 push {r4, r5, lr} + 10003e8: b085 sub sp, #20 + UART_InitStruct.BaudRate = PRINT_BAUD; //Configure serial port baud rate, the baud rate defaults to 128000. + 10003ea: ad01 add r5, sp, #4 + 10003ec: 031b lsls r3, r3, #12 + 10003ee: 60ab str r3, [r5, #8] + UART_InitStruct.RxMode = MODE_RX_ENABLE; + 10003f0: 2301 movs r3, #1 + 10003f2: 9301 str r3, [sp, #4] + UART_InitStruct.StopBits = STOPBITS_1; + 10003f4: 2300 movs r3, #0 + if (PrintPort_Struct.PrintUart == MUART0) + 10003f6: 4c3a ldr r4, [pc, #232] ; (10004e0 ) + UART_InitStruct.StopBits = STOPBITS_1; + 10003f8: 80ab strh r3, [r5, #4] + UART_InitStruct.SmartCard = SMARTCARD_DISABLE; + 10003fa: 71ab strb r3, [r5, #6] + if (PrintPort_Struct.PrintUart == MUART0) + 10003fc: 4a39 ldr r2, [pc, #228] ; (10004e4 ) + 10003fe: 6823 ldr r3, [r4, #0] + 1000400: 4293 cmp r3, r2 + 1000402: d135 bne.n 1000470 + GPIO_Config(PrintPort_Struct.PrintRX_Port, PrintPort_Struct.PrintRX_Pin, UART0_RXD); + 1000404: 88e1 ldrh r1, [r4, #6] + 1000406: 7920 ldrb r0, [r4, #4] + 1000408: 2209 movs r2, #9 + 100040a: f000 fc1d bl 1000c48 + GPIO_Config(PrintPort_Struct.PrintTX_Port, PrintPort_Struct.PrintTX_Pin, UART0_TXD); + 100040e: 2208 movs r2, #8 + 1000410: 8961 ldrh r1, [r4, #10] + 1000412: 7a20 ldrb r0, [r4, #8] + GPIO_Config(PrintPort_Struct.PrintTX_Port, PrintPort_Struct.PrintTX_Pin, UART3_TXD); + 1000414: f000 fc18 bl 1000c48 + UART_Init(PrintPort_Struct.PrintUart, &UART_InitStruct); + 1000418: 0029 movs r1, r5 + 100041a: 6820 ldr r0, [r4, #0] + 100041c: f000 f8a2 bl 1000564 + uint8_t print_irq = (PrintPort_Struct.PrintUart - MUART0) / (MUART1 - MUART0); + 1000420: 210f movs r1, #15 + 1000422: 4b31 ldr r3, [pc, #196] ; (10004e8 ) + 1000424: 6822 ldr r2, [r4, #0] + 1000426: 18d2 adds r2, r2, r3 + 1000428: 17d3 asrs r3, r2, #31 + 100042a: 1110 asrs r0, r2, #4 + 100042c: 400b ands r3, r1 + 100042e: 181b adds r3, r3, r0 + 1000430: 111b asrs r3, r3, #4 + NVIC_EnableIRQ((IRQn_Type)(UART0_IRQn + print_irq)); + 1000432: 3308 adds r3, #8 + 1000434: b2db uxtb r3, r3 + 1000436: b25a sxtb r2, r3 + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + 1000438: 2a00 cmp r2, #0 + 100043a: db3d blt.n 10004b8 + { + NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 100043c: 201f movs r0, #31 + 100043e: 390e subs r1, #14 + 1000440: 4018 ands r0, r3 + 1000442: 4081 lsls r1, r0 + 1000444: 4829 ldr r0, [pc, #164] ; (10004ec ) + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + 1000446: 24c0 movs r4, #192 ; 0xc0 + NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 1000448: 6001 str r1, [r0, #0] + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + 100044a: 2103 movs r1, #3 + 100044c: 400b ands r3, r1 + 100044e: 408b lsls r3, r1 + 1000450: 31fc adds r1, #252 ; 0xfc + 1000452: 4099 lsls r1, r3 + 1000454: 0892 lsrs r2, r2, #2 + 1000456: 0092 lsls r2, r2, #2 + 1000458: 1812 adds r2, r2, r0 + 100045a: 00a4 lsls r4, r4, #2 + 100045c: 5910 ldr r0, [r2, r4] + 100045e: 4388 bics r0, r1 + 1000460: 0001 movs r1, r0 + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 1000462: 2040 movs r0, #64 ; 0x40 + 1000464: 4098 lsls r0, r3 + 1000466: 0003 movs r3, r0 + NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + 1000468: 430b orrs r3, r1 + 100046a: 5113 str r3, [r2, r4] + +#endif + + /*print init*/ + PrintPort_Init(); +} + 100046c: b005 add sp, #20 + 100046e: bd30 pop {r4, r5, pc} + else if (PrintPort_Struct.PrintUart == MUART1) + 1000470: 4a1f ldr r2, [pc, #124] ; (10004f0 ) + 1000472: 4293 cmp r3, r2 + 1000474: d108 bne.n 1000488 + GPIO_Config(PrintPort_Struct.PrintRX_Port, PrintPort_Struct.PrintRX_Pin, UART1_RXD); + 1000476: 88e1 ldrh r1, [r4, #6] + 1000478: 7920 ldrb r0, [r4, #4] + 100047a: 220d movs r2, #13 + 100047c: f000 fbe4 bl 1000c48 + GPIO_Config(PrintPort_Struct.PrintTX_Port, PrintPort_Struct.PrintTX_Pin, UART1_TXD); + 1000480: 8961 ldrh r1, [r4, #10] + 1000482: 7a20 ldrb r0, [r4, #8] + 1000484: 220c movs r2, #12 + 1000486: e7c5 b.n 1000414 + else if (PrintPort_Struct.PrintUart == MUART2) + 1000488: 4a1a ldr r2, [pc, #104] ; (10004f4 ) + 100048a: 4293 cmp r3, r2 + 100048c: d108 bne.n 10004a0 + GPIO_Config(PrintPort_Struct.PrintRX_Port, PrintPort_Struct.PrintRX_Pin, UART2_RXD); + 100048e: 88e1 ldrh r1, [r4, #6] + 1000490: 7920 ldrb r0, [r4, #4] + 1000492: 2225 movs r2, #37 ; 0x25 + 1000494: f000 fbd8 bl 1000c48 + GPIO_Config(PrintPort_Struct.PrintTX_Port, PrintPort_Struct.PrintTX_Pin, UART2_TXD); + 1000498: 8961 ldrh r1, [r4, #10] + 100049a: 7a20 ldrb r0, [r4, #8] + 100049c: 2224 movs r2, #36 ; 0x24 + 100049e: e7b9 b.n 1000414 + else if (PrintPort_Struct.PrintUart == MUART3) + 10004a0: 4a15 ldr r2, [pc, #84] ; (10004f8 ) + 10004a2: 4293 cmp r3, r2 + 10004a4: d1b8 bne.n 1000418 + GPIO_Config(PrintPort_Struct.PrintRX_Port, PrintPort_Struct.PrintRX_Pin, UART3_RXD); + 10004a6: 88e1 ldrh r1, [r4, #6] + 10004a8: 7920 ldrb r0, [r4, #4] + 10004aa: 2235 movs r2, #53 ; 0x35 + 10004ac: f000 fbcc bl 1000c48 + GPIO_Config(PrintPort_Struct.PrintTX_Port, PrintPort_Struct.PrintTX_Pin, UART3_TXD); + 10004b0: 8961 ldrh r1, [r4, #10] + 10004b2: 7a20 ldrb r0, [r4, #8] + 10004b4: 2235 movs r2, #53 ; 0x35 + 10004b6: e7ad b.n 1000414 + } + else + { + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + 10004b8: 2003 movs r0, #3 + 10004ba: 4019 ands r1, r3 + 10004bc: 4003 ands r3, r0 + 10004be: 4083 lsls r3, r0 + 10004c0: 000a movs r2, r1 + 10004c2: 30fc adds r0, #252 ; 0xfc + 10004c4: 4098 lsls r0, r3 + 10004c6: 3a08 subs r2, #8 + 10004c8: 490c ldr r1, [pc, #48] ; (10004fc ) + 10004ca: 0892 lsrs r2, r2, #2 + 10004cc: 0092 lsls r2, r2, #2 + 10004ce: 1852 adds r2, r2, r1 + 10004d0: 69d1 ldr r1, [r2, #28] + 10004d2: 4381 bics r1, r0 + (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 10004d4: 2040 movs r0, #64 ; 0x40 + 10004d6: 4098 lsls r0, r3 + 10004d8: 0003 movs r3, r0 + SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | + 10004da: 430b orrs r3, r1 + 10004dc: 61d3 str r3, [r2, #28] + 10004de: e7c5 b.n 100046c + 10004e0: 00020008 .word 0x00020008 + 10004e4: 000f8b1c .word 0x000f8b1c + 10004e8: fff074e4 .word 0xfff074e4 + 10004ec: e000e100 .word 0xe000e100 + 10004f0: 000f8c1c .word 0x000f8c1c + 10004f4: 000f8d1c .word 0x000f8d1c + 10004f8: 000f8e1c .word 0x000f8e1c + 10004fc: e000ed00 .word 0xe000ed00 + +01000500 <_assert_handler>: + +void _assert_handler(const char *file, int line, const char *func) +{ + 1000500: 0013 movs r3, r2 +#if defined (SDK_DEBUG) + if(PRINTPORT->CTRL.bit.RX_EN == MODE_RX_ENABLE) /*check printuart is init*/ + 1000502: 4a05 ldr r2, [pc, #20] ; (1000518 <_assert_handler+0x18>) +{ + 1000504: b510 push {r4, lr} + if(PRINTPORT->CTRL.bit.RX_EN == MODE_RX_ENABLE) /*check printuart is init*/ + 1000506: 7812 ldrb r2, [r2, #0] + 1000508: 07d2 lsls r2, r2, #31 + 100050a: d504 bpl.n 1000516 <_assert_handler+0x16> + { + MyPrintf("Assert trigger at file: %s line:%d func: %s\n ", file, line, func); + 100050c: 000a movs r2, r1 + 100050e: 0001 movs r1, r0 + 1000510: 4802 ldr r0, [pc, #8] ; (100051c <_assert_handler+0x1c>) + 1000512: f7ff fe31 bl 1000178 + 1000516: e7fe b.n 1000516 <_assert_handler+0x16> + 1000518: 000f8b1c .word 0x000f8b1c + 100051c: 0100689c .word 0x0100689c + +01000520 : + * MUART0, MUART1, MUART2 or MUART3. + * @retval None + */ +void UART_DeInit(UART_TypeDef *UARTx) +{ + _ASSERT(IS_UART(UARTx)); + 1000520: 4b0a ldr r3, [pc, #40] ; (100054c ) +{ + 1000522: b510 push {r4, lr} + 1000524: 0004 movs r4, r0 + _ASSERT(IS_UART(UARTx)); + 1000526: 4298 cmp r0, r3 + 1000528: d00d beq.n 1000546 + 100052a: 4b09 ldr r3, [pc, #36] ; (1000550 ) + 100052c: 4298 cmp r0, r3 + 100052e: d00a beq.n 1000546 + 1000530: 4b08 ldr r3, [pc, #32] ; (1000554 ) + 1000532: 4298 cmp r0, r3 + 1000534: d007 beq.n 1000546 + 1000536: 4b08 ldr r3, [pc, #32] ; (1000558 ) + 1000538: 4298 cmp r0, r3 + 100053a: d004 beq.n 1000546 + 100053c: 4a07 ldr r2, [pc, #28] ; (100055c ) + 100053e: 213b movs r1, #59 ; 0x3b + 1000540: 4807 ldr r0, [pc, #28] ; (1000560 ) + 1000542: f7ff ffdd bl 1000500 <_assert_handler> + UARTx->CTRL.reg = 0; + 1000546: 2300 movs r3, #0 + 1000548: 7023 strb r3, [r4, #0] +} + 100054a: bd10 pop {r4, pc} + 100054c: 000f8b1c .word 0x000f8b1c + 1000550: 000f8c1c .word 0x000f8c1c + 1000554: 000f8d1c .word 0x000f8d1c + 1000558: 000f8e1c .word 0x000f8e1c + 100055c: 0100691c .word 0x0100691c + 1000560: 010068e4 .word 0x010068e4 + +01000564 : + * MUART0, MUART1, MUART2 or MUART3. + * @param UART_InitStruct: pointer to a UART_InitTypeDef structure that + * contains the configuration information. + */ +void UART_Init(UART_TypeDef *UARTx, UART_InitTypeDef *UART_InitStruct) +{ + 1000564: b5f0 push {r4, r5, r6, r7, lr} + DMA_TypeDef *DMAx = NULL; + uint8_t *uartx_DMA_buf = NULL; + uint32_t temp_baudrate = 0; + + _ASSERT(IS_UART(UARTx)); + 1000566: 4b77 ldr r3, [pc, #476] ; (1000744 ) +{ + 1000568: b087 sub sp, #28 + 100056a: 0004 movs r4, r0 + 100056c: 000d movs r5, r1 + _ASSERT(IS_UART(UARTx)); + 100056e: 4298 cmp r0, r3 + 1000570: d00d beq.n 100058e + 1000572: 4b75 ldr r3, [pc, #468] ; (1000748 ) + 1000574: 4298 cmp r0, r3 + 1000576: d00a beq.n 100058e + 1000578: 4b74 ldr r3, [pc, #464] ; (100074c ) + 100057a: 4298 cmp r0, r3 + 100057c: d007 beq.n 100058e + 100057e: 4b74 ldr r3, [pc, #464] ; (1000750 ) + 1000580: 4298 cmp r0, r3 + 1000582: d004 beq.n 100058e + 1000584: 4a73 ldr r2, [pc, #460] ; (1000754 ) + 1000586: 214f movs r1, #79 ; 0x4f + 1000588: 4873 ldr r0, [pc, #460] ; (1000758 ) + 100058a: f7ff ffb9 bl 1000500 <_assert_handler> + _ASSERT(IS_UART_RX_MODE(UART_InitStruct->RxMode)); + 100058e: 782b ldrb r3, [r5, #0] + 1000590: 2b01 cmp r3, #1 + 1000592: d904 bls.n 100059e + 1000594: 4a6f ldr r2, [pc, #444] ; (1000754 ) + 1000596: 2150 movs r1, #80 ; 0x50 + 1000598: 486f ldr r0, [pc, #444] ; (1000758 ) + 100059a: f7ff ffb1 bl 1000500 <_assert_handler> + _ASSERT(IS_UART_PARITY(UART_InitStruct->Parity)); + 100059e: 786b ldrb r3, [r5, #1] + 10005a0: 2b01 cmp r3, #1 + 10005a2: d904 bls.n 10005ae + 10005a4: 4a6b ldr r2, [pc, #428] ; (1000754 ) + 10005a6: 2151 movs r1, #81 ; 0x51 + 10005a8: 486b ldr r0, [pc, #428] ; (1000758 ) + 10005aa: f7ff ffa9 bl 1000500 <_assert_handler> + _ASSERT(IS_UART_WORD_LENGTH(UART_InitStruct->DataBits)); + 10005ae: 78ab ldrb r3, [r5, #2] + 10005b0: 2b01 cmp r3, #1 + 10005b2: d904 bls.n 10005be + 10005b4: 4a67 ldr r2, [pc, #412] ; (1000754 ) + 10005b6: 2152 movs r1, #82 ; 0x52 + 10005b8: 4867 ldr r0, [pc, #412] ; (1000758 ) + 10005ba: f7ff ffa1 bl 1000500 <_assert_handler> + _ASSERT(IS_UART_STOPBITS(UART_InitStruct->StopBits)); + 10005be: 78eb ldrb r3, [r5, #3] + 10005c0: 2b01 cmp r3, #1 + 10005c2: d904 bls.n 10005ce + 10005c4: 4a63 ldr r2, [pc, #396] ; (1000754 ) + 10005c6: 2153 movs r1, #83 ; 0x53 + 10005c8: 4863 ldr r0, [pc, #396] ; (1000758 ) + 10005ca: f7ff ff99 bl 1000500 <_assert_handler> + _ASSERT(IS_UART_FLOW_CTRL(UART_InitStruct->FlowCtrl)); + 10005ce: 792b ldrb r3, [r5, #4] + 10005d0: 2b01 cmp r3, #1 + 10005d2: d904 bls.n 10005de + 10005d4: 4a5f ldr r2, [pc, #380] ; (1000754 ) + 10005d6: 2154 movs r1, #84 ; 0x54 + 10005d8: 485f ldr r0, [pc, #380] ; (1000758 ) + 10005da: f7ff ff91 bl 1000500 <_assert_handler> + _ASSERT(IS_UART_SMART_CARD(UART_InitStruct->SmartCard)); + 10005de: 796b ldrb r3, [r5, #5] + 10005e0: 2b01 cmp r3, #1 + 10005e2: d904 bls.n 10005ee + 10005e4: 4a5b ldr r2, [pc, #364] ; (1000754 ) + 10005e6: 2155 movs r1, #85 ; 0x55 + 10005e8: 485b ldr r0, [pc, #364] ; (1000758 ) + 10005ea: f7ff ff89 bl 1000500 <_assert_handler> + _ASSERT(IS_UART_COMM_MODE(UART_InitStruct->CommMode)); + 10005ee: 79ab ldrb r3, [r5, #6] + 10005f0: 2b01 cmp r3, #1 + 10005f2: d904 bls.n 10005fe + 10005f4: 4a57 ldr r2, [pc, #348] ; (1000754 ) + 10005f6: 2156 movs r1, #86 ; 0x56 + 10005f8: 4857 ldr r0, [pc, #348] ; (1000758 ) + 10005fa: f7ff ff81 bl 1000500 <_assert_handler> + _ASSERT(IS_UART_BAUDRATE(UART_InitStruct->BaudRate)); + 10005fe: 4a57 ldr r2, [pc, #348] ; (100075c ) + 1000600: 68ab ldr r3, [r5, #8] + 1000602: 189b adds r3, r3, r2 + 1000604: 4a56 ldr r2, [pc, #344] ; (1000760 ) + 1000606: 4293 cmp r3, r2 + 1000608: d904 bls.n 1000614 + 100060a: 4a52 ldr r2, [pc, #328] ; (1000754 ) + 100060c: 2157 movs r1, #87 ; 0x57 + 100060e: 4852 ldr r0, [pc, #328] ; (1000758 ) + 1000610: f7ff ff76 bl 1000500 <_assert_handler> + + DMAx = (DMA_TypeDef *)((uint32_t)UARTx - sizeof(DMA_TypeDef)); + 1000614: 0026 movs r6, r4 + _ASSERT(IS_UART(UARTx)); + 1000616: 4b4b ldr r3, [pc, #300] ; (1000744 ) + DMAx = (DMA_TypeDef *)((uint32_t)UARTx - sizeof(DMA_TypeDef)); + 1000618: 3e1c subs r6, #28 + _ASSERT(IS_UART(UARTx)); + 100061a: 429c cmp r4, r3 + 100061c: d00d beq.n 100063a + 100061e: 4b4a ldr r3, [pc, #296] ; (1000748 ) + 1000620: 429c cmp r4, r3 + 1000622: d00a beq.n 100063a + 1000624: 4b49 ldr r3, [pc, #292] ; (100074c ) + 1000626: 429c cmp r4, r3 + 1000628: d007 beq.n 100063a + 100062a: 4b49 ldr r3, [pc, #292] ; (1000750 ) + 100062c: 429c cmp r4, r3 + 100062e: d004 beq.n 100063a + 1000630: 4a4c ldr r2, [pc, #304] ; (1000764 ) + 1000632: 2124 movs r1, #36 ; 0x24 + 1000634: 4848 ldr r0, [pc, #288] ; (1000758 ) + 1000636: f7ff ff63 bl 1000500 <_assert_handler> + uint8_t *buffers[] = {uart0_DMA_buf, uart1_DMA_buf, uart2_DMA_buf, uart3_DMA_buf}; + 100063a: ab02 add r3, sp, #8 + 100063c: 469c mov ip, r3 + 100063e: 4661 mov r1, ip + 1000640: 4b49 ldr r3, [pc, #292] ; (1000768 ) + 1000642: cb85 ldmia r3!, {r0, r2, r7} + 1000644: c185 stmia r1!, {r0, r2, r7} + 1000646: 681b ldr r3, [r3, #0] + 1000648: 600b str r3, [r1, #0] + if ((void *)UARTs[i] == (void *)UARTx) + 100064a: 4b3e ldr r3, [pc, #248] ; (1000744 ) + 100064c: 429c cmp r4, r3 + 100064e: d100 bne.n 1000652 + 1000650: e072 b.n 1000738 + 1000652: 4b3d ldr r3, [pc, #244] ; (1000748 ) + 1000654: 429c cmp r4, r3 + 1000656: d100 bne.n 100065a + 1000658: e070 b.n 100073c + 100065a: 4b3c ldr r3, [pc, #240] ; (100074c ) + 100065c: 429c cmp r4, r3 + 100065e: d100 bne.n 1000662 + 1000660: e06e b.n 1000740 + 1000662: 4b3b ldr r3, [pc, #236] ; (1000750 ) + return NULL; + 1000664: 2700 movs r7, #0 + if ((void *)UARTs[i] == (void *)UARTx) + 1000666: 429c cmp r4, r3 + 1000668: d103 bne.n 1000672 + for (int i = 0; i < sizeof(UARTs) / sizeof(UARTs[0]); i++) + 100066a: 2303 movs r3, #3 + return buffers[i]; + 100066c: 4662 mov r2, ip + 100066e: 009b lsls r3, r3, #2 + 1000670: 58d7 ldr r7, [r2, r3] + uartx_DMA_buf = UART_Buffer_Select(UARTx); + temp_baudrate = (48000000 / UART_InitStruct->BaudRate); + 1000672: 68a9 ldr r1, [r5, #8] + 1000674: 483d ldr r0, [pc, #244] ; (100076c ) + 1000676: f005 ff7d bl 1006574 <__udivsi3> + 100067a: 9001 str r0, [sp, #4] + + UART_DeInit(UARTx); + 100067c: 0020 movs r0, r4 + 100067e: f7ff ff4f bl 1000520 + DMAx->DEST_ADDR.reg = (uint32_t)uartx_DMA_buf; + DMAx->LEN_LOW.bit.RX_LEN_L = uart_DMA_buf_len; + 1000682: 2280 movs r2, #128 ; 0x80 + DMAx->DEST_ADDR.reg = (uint32_t)uartx_DMA_buf; + 1000684: 6077 str r7, [r6, #4] + DMAx->LEN_LOW.bit.RX_LEN_L = uart_DMA_buf_len; + 1000686: 68b3 ldr r3, [r6, #8] + 1000688: 00d2 lsls r2, r2, #3 + 100068a: 0c1b lsrs r3, r3, #16 + 100068c: 041b lsls r3, r3, #16 + 100068e: 4313 orrs r3, r2 + 1000690: 60b3 str r3, [r6, #8] + DMAx->CTRL.bit.LOOPBACK = 1; + 1000692: 2301 movs r3, #1 + 1000694: 68f2 ldr r2, [r6, #12] + DMAx->CTRL.bit.RESET = 1; + DMAx->CTRL.bit.RESET = 0; + + UARTx->CTRL.bit.RX_EN = UART_InitStruct->RxMode; + UARTx->CTRL.bit.PARITY = UART_InitStruct->Parity; + 1000696: 2002 movs r0, #2 + DMAx->CTRL.bit.LOOPBACK = 1; + 1000698: 431a orrs r2, r3 + 100069a: 60f2 str r2, [r6, #12] + DMAx->CTRL.bit.RESET = 1; + 100069c: 2280 movs r2, #128 ; 0x80 + 100069e: 68f1 ldr r1, [r6, #12] + 10006a0: 0592 lsls r2, r2, #22 + 10006a2: 430a orrs r2, r1 + 10006a4: 60f2 str r2, [r6, #12] + DMAx->CTRL.bit.RESET = 0; + 10006a6: 68f2 ldr r2, [r6, #12] + 10006a8: 4931 ldr r1, [pc, #196] ; (1000770 ) + 10006aa: 400a ands r2, r1 + 10006ac: 60f2 str r2, [r6, #12] + UARTx->CTRL.bit.RX_EN = UART_InitStruct->RxMode; + 10006ae: 7822 ldrb r2, [r4, #0] + 10006b0: 7829 ldrb r1, [r5, #0] + 10006b2: 439a bics r2, r3 + 10006b4: 4019 ands r1, r3 + 10006b6: 430a orrs r2, r1 + 10006b8: 7022 strb r2, [r4, #0] + UARTx->CTRL.bit.PARITY = UART_InitStruct->Parity; + 10006ba: 7869 ldrb r1, [r5, #1] + 10006bc: 7822 ldrb r2, [r4, #0] + 10006be: 4019 ands r1, r3 + 10006c0: 4099 lsls r1, r3 + 10006c2: 4382 bics r2, r0 + 10006c4: 430a orrs r2, r1 + 10006c6: 7022 strb r2, [r4, #0] + UARTx->CTRL.bit.DATA_BITS = UART_InitStruct->DataBits; + 10006c8: 78a9 ldrb r1, [r5, #2] + 10006ca: 7822 ldrb r2, [r4, #0] + 10006cc: 4019 ands r1, r3 + 10006ce: 4081 lsls r1, r0 + 10006d0: 1800 adds r0, r0, r0 + 10006d2: 4382 bics r2, r0 + 10006d4: 430a orrs r2, r1 + 10006d6: 7022 strb r2, [r4, #0] + UARTx->CTRL.bit.STOP_BITS = UART_InitStruct->StopBits; + 10006d8: 78e9 ldrb r1, [r5, #3] + 10006da: 7822 ldrb r2, [r4, #0] + 10006dc: 4019 ands r1, r3 + 10006de: 3004 adds r0, #4 + 10006e0: 00c9 lsls r1, r1, #3 + 10006e2: 4382 bics r2, r0 + 10006e4: 430a orrs r2, r1 + 10006e6: 7022 strb r2, [r4, #0] + UARTx->CTRL.bit.FLOW_CTRL = UART_InitStruct->FlowCtrl; + 10006e8: 7929 ldrb r1, [r5, #4] + 10006ea: 7822 ldrb r2, [r4, #0] + 10006ec: 4019 ands r1, r3 + 10006ee: 3008 adds r0, #8 + 10006f0: 0109 lsls r1, r1, #4 + 10006f2: 4382 bics r2, r0 + 10006f4: 430a orrs r2, r1 + 10006f6: 7022 strb r2, [r4, #0] + UARTx->CTRL.bit.SMART_CARD = UART_InitStruct->SmartCard; + 10006f8: 7969 ldrb r1, [r5, #5] + 10006fa: 7822 ldrb r2, [r4, #0] + 10006fc: 4019 ands r1, r3 + 10006fe: 3010 adds r0, #16 + 1000700: 0149 lsls r1, r1, #5 + 1000702: 4382 bics r2, r0 + 1000704: 430a orrs r2, r1 + 1000706: 7022 strb r2, [r4, #0] + UARTx->CTRL.bit.HDX_EN = UART_InitStruct->CommMode; + 1000708: 79a9 ldrb r1, [r5, #6] + 100070a: 7822 ldrb r2, [r4, #0] + 100070c: 4019 ands r1, r3 + 100070e: 333f adds r3, #63 ; 0x3f + 1000710: 439a bics r2, r3 + 1000712: 0013 movs r3, r2 + 1000714: 0189 lsls r1, r1, #6 + 1000716: 430b orrs r3, r1 + 1000718: 7023 strb r3, [r4, #0] + UARTx->CTRL.bit.RESET_BAUD = ENABLE; + 100071a: 2380 movs r3, #128 ; 0x80 + 100071c: 7822 ldrb r2, [r4, #0] + 100071e: 425b negs r3, r3 + 1000720: 4313 orrs r3, r2 + 1000722: 7023 strb r3, [r4, #0] + UARTx->BAUD.bit.BAUD_RATE = temp_baudrate; + 1000724: 8863 ldrh r3, [r4, #2] + 1000726: 9a01 ldr r2, [sp, #4] + 1000728: 0bdb lsrs r3, r3, #15 + 100072a: 0452 lsls r2, r2, #17 + 100072c: 0c52 lsrs r2, r2, #17 + 100072e: 03db lsls r3, r3, #15 + 1000730: 4313 orrs r3, r2 + 1000732: 8063 strh r3, [r4, #2] +} + 1000734: b007 add sp, #28 + 1000736: bdf0 pop {r4, r5, r6, r7, pc} + for (int i = 0; i < sizeof(UARTs) / sizeof(UARTs[0]); i++) + 1000738: 2300 movs r3, #0 + 100073a: e797 b.n 100066c + 100073c: 2301 movs r3, #1 + 100073e: e795 b.n 100066c + 1000740: 2302 movs r3, #2 + 1000742: e793 b.n 100066c + 1000744: 000f8b1c .word 0x000f8b1c + 1000748: 000f8c1c .word 0x000f8c1c + 100074c: 000f8d1c .word 0x000f8d1c + 1000750: 000f8e1c .word 0x000f8e1c + 1000754: 01006928 .word 0x01006928 + 1000758: 010068e4 .word 0x010068e4 + 100075c: fffffa47 .word 0xfffffa47 + 1000760: 0044a467 .word 0x0044a467 + 1000764: 01006932 .word 0x01006932 + 1000768: 0100690c .word 0x0100690c + 100076c: 02dc6c00 .word 0x02dc6c00 + 1000770: dfffffff .word 0xdfffffff + +01000774 : + * which will be initialized. + * @retval None + */ +void UART_StructInit(UART_InitTypeDef *UART_InitStruct) +{ + UART_InitStruct->BaudRate = 9600; + 1000774: 2396 movs r3, #150 ; 0x96 + 1000776: 019b lsls r3, r3, #6 + 1000778: 6083 str r3, [r0, #8] + UART_InitStruct->RxMode = MODE_RX_ENABLE; + 100077a: 2301 movs r3, #1 + 100077c: 6003 str r3, [r0, #0] + UART_InitStruct->Parity = PARITY_NONE; + UART_InitStruct->DataBits = DATABITS_8B; + UART_InitStruct->StopBits = STOPBITS_1; + 100077e: 2300 movs r3, #0 + 1000780: 8083 strh r3, [r0, #4] + UART_InitStruct->FlowCtrl = FLOWCTRL_NONE; + UART_InitStruct->SmartCard = SMARTCARD_DISABLE; + 1000782: 7183 strb r3, [r0, #6] + UART_InitStruct->CommMode = MODE_DUPLEX; +} + 1000784: 4770 bx lr + ... + +01000788 : + * @param NewState: new state of the specified UART interrupt + * This parameter can be ENABLE or DISABLE + */ +void UART_ITConfig(UART_TypeDef *UARTx, uint32_t UART_IT, FunctionalState NewState) +{ + _ASSERT(IS_UART(UARTx)); + 1000788: 4b15 ldr r3, [pc, #84] ; (10007e0 ) +{ + 100078a: b570 push {r4, r5, r6, lr} + 100078c: 0004 movs r4, r0 + 100078e: 000e movs r6, r1 + 1000790: 0015 movs r5, r2 + _ASSERT(IS_UART(UARTx)); + 1000792: 4298 cmp r0, r3 + 1000794: d00d beq.n 10007b2 + 1000796: 4b13 ldr r3, [pc, #76] ; (10007e4 ) + 1000798: 4298 cmp r0, r3 + 100079a: d00a beq.n 10007b2 + 100079c: 4b12 ldr r3, [pc, #72] ; (10007e8 ) + 100079e: 4298 cmp r0, r3 + 10007a0: d007 beq.n 10007b2 + 10007a2: 4b12 ldr r3, [pc, #72] ; (10007ec ) + 10007a4: 4298 cmp r0, r3 + 10007a6: d004 beq.n 10007b2 + 10007a8: 4a11 ldr r2, [pc, #68] ; (10007f0 ) + 10007aa: 2191 movs r1, #145 ; 0x91 + 10007ac: 4811 ldr r0, [pc, #68] ; (10007f4 ) + 10007ae: f7ff fea7 bl 1000500 <_assert_handler> + _ASSERT(IS_UART_IT(UART_IT)); + 10007b2: 1e73 subs r3, r6, #1 + 10007b4: 2b01 cmp r3, #1 + 10007b6: d905 bls.n 10007c4 + 10007b8: 4a0d ldr r2, [pc, #52] ; (10007f0 ) + 10007ba: 2192 movs r1, #146 ; 0x92 + 10007bc: 480d ldr r0, [pc, #52] ; (10007f4 ) + 10007be: f7ff fe9f bl 1000500 <_assert_handler> + } + else if (UART_IT == UART_IT_RX) + { + UARTx->RX_INT_LEN.bit.VAL = NewState; + } +} + 10007c2: bd70 pop {r4, r5, r6, pc} + if (UART_IT == UART_IT_TX) + 10007c4: 2e01 cmp r6, #1 + 10007c6: d107 bne.n 10007d8 + UARTx->BAUD.bit.TX_INT_EN = NewState; + 10007c8: 8862 ldrh r2, [r4, #2] + 10007ca: 4035 ands r5, r6 + 10007cc: 0452 lsls r2, r2, #17 + 10007ce: 03ed lsls r5, r5, #15 + 10007d0: 0c52 lsrs r2, r2, #17 + 10007d2: 432a orrs r2, r5 + 10007d4: 8062 strh r2, [r4, #2] + 10007d6: e7f4 b.n 10007c2 + else if (UART_IT == UART_IT_RX) + 10007d8: 2e02 cmp r6, #2 + 10007da: d1f2 bne.n 10007c2 + UARTx->RX_INT_LEN.bit.VAL = NewState; + 10007dc: 7065 strb r5, [r4, #1] +} + 10007de: e7f0 b.n 10007c2 + 10007e0: 000f8b1c .word 0x000f8b1c + 10007e4: 000f8c1c .word 0x000f8c1c + 10007e8: 000f8d1c .word 0x000f8d1c + 10007ec: 000f8e1c .word 0x000f8e1c + 10007f0: 01006945 .word 0x01006945 + 10007f4: 010068e4 .word 0x010068e4 + +010007f8 : + * MUART0, MUART1, MUART2 or MUART3. + * @retval None + */ +void UART_SendData(UART_TypeDef *UARTx, uint8_t Data) +{ + _ASSERT(IS_UART(UARTx)); + 10007f8: 4b13 ldr r3, [pc, #76] ; (1000848 ) +{ + 10007fa: b537 push {r0, r1, r2, r4, r5, lr} + 10007fc: 0004 movs r4, r0 + 10007fe: 000d movs r5, r1 + _ASSERT(IS_UART(UARTx)); + 1000800: 4298 cmp r0, r3 + 1000802: d00d beq.n 1000820 + 1000804: 4b11 ldr r3, [pc, #68] ; (100084c ) + 1000806: 4298 cmp r0, r3 + 1000808: d00a beq.n 1000820 + 100080a: 4b11 ldr r3, [pc, #68] ; (1000850 ) + 100080c: 4298 cmp r0, r3 + 100080e: d007 beq.n 1000820 + 1000810: 4b10 ldr r3, [pc, #64] ; (1000854 ) + 1000812: 4298 cmp r0, r3 + 1000814: d004 beq.n 1000820 + 1000816: 4a10 ldr r2, [pc, #64] ; (1000858 ) + 1000818: 21a8 movs r1, #168 ; 0xa8 + 100081a: 4810 ldr r0, [pc, #64] ; (100085c ) + 100081c: f7ff fe70 bl 1000500 <_assert_handler> + + volatile uint8_t buf[1]; + + buf[0] = Data; + DMA_TypeDef *DMAx = (DMA_TypeDef *)((uint32_t)UARTx - sizeof(DMA_TypeDef)); + 1000820: 3c1c subs r4, #28 + buf[0] = Data; + 1000822: ab01 add r3, sp, #4 + 1000824: 701d strb r5, [r3, #0] + DMAx->SRC_ADDR.reg = (uint32_t)buf; + 1000826: 6023 str r3, [r4, #0] + DMAx->LEN_LOW.bit.TX_LEN_L = 1; + 1000828: 2380 movs r3, #128 ; 0x80 + 100082a: 68a2 ldr r2, [r4, #8] + 100082c: 025b lsls r3, r3, #9 + 100082e: b292 uxth r2, r2 + 1000830: 4313 orrs r3, r2 + 1000832: 60a3 str r3, [r4, #8] + DMAx->CTRL.bit.START = 1; + 1000834: 2380 movs r3, #128 ; 0x80 + 1000836: 68e2 ldr r2, [r4, #12] + 1000838: 061b lsls r3, r3, #24 + 100083a: 4313 orrs r3, r2 + 100083c: 60e3 str r3, [r4, #12] + + while (DMAx->STATUS.bit.DONE != 1); + 100083e: 6923 ldr r3, [r4, #16] + 1000840: 07db lsls r3, r3, #31 + 1000842: d5fc bpl.n 100083e +} + 1000844: bd37 pop {r0, r1, r2, r4, r5, pc} + 1000846: 46c0 nop ; (mov r8, r8) + 1000848: 000f8b1c .word 0x000f8b1c + 100084c: 000f8c1c .word 0x000f8c1c + 1000850: 000f8d1c .word 0x000f8d1c + 1000854: 000f8e1c .word 0x000f8e1c + 1000858: 01006953 .word 0x01006953 + 100085c: 010068e4 .word 0x010068e4 + +01000860 : + * @param len: the buf length + * @retval None + */ +void UART_SendBuf(UART_TypeDef *UARTx, uint8_t *buf, uint32_t len) +{ + _ASSERT(IS_UART(UARTx)); + 1000860: 4b1d ldr r3, [pc, #116] ; (10008d8 ) +{ + 1000862: b570 push {r4, r5, r6, lr} + 1000864: 0005 movs r5, r0 + 1000866: 000e movs r6, r1 + 1000868: 0014 movs r4, r2 + _ASSERT(IS_UART(UARTx)); + 100086a: 4298 cmp r0, r3 + 100086c: d00d beq.n 100088a + 100086e: 4b1b ldr r3, [pc, #108] ; (10008dc ) + 1000870: 4298 cmp r0, r3 + 1000872: d00a beq.n 100088a + 1000874: 4b1a ldr r3, [pc, #104] ; (10008e0 ) + 1000876: 4298 cmp r0, r3 + 1000878: d007 beq.n 100088a + 100087a: 4b1a ldr r3, [pc, #104] ; (10008e4 ) + 100087c: 4298 cmp r0, r3 + 100087e: d004 beq.n 100088a + 1000880: 4a19 ldr r2, [pc, #100] ; (10008e8 ) + 1000882: 21c1 movs r1, #193 ; 0xc1 + 1000884: 4819 ldr r0, [pc, #100] ; (10008ec ) + 1000886: f7ff fe3b bl 1000500 <_assert_handler> + _ASSERT(NULL != buf); + 100088a: 2e00 cmp r6, #0 + 100088c: d104 bne.n 1000898 + 100088e: 4a16 ldr r2, [pc, #88] ; (10008e8 ) + 1000890: 21c2 movs r1, #194 ; 0xc2 + 1000892: 4816 ldr r0, [pc, #88] ; (10008ec ) + 1000894: f7ff fe34 bl 1000500 <_assert_handler> + _ASSERT(len < 0xfffff); + 1000898: 4b15 ldr r3, [pc, #84] ; (10008f0 ) + 100089a: 429c cmp r4, r3 + 100089c: d904 bls.n 10008a8 + 100089e: 4a12 ldr r2, [pc, #72] ; (10008e8 ) + 10008a0: 21c3 movs r1, #195 ; 0xc3 + 10008a2: 4812 ldr r0, [pc, #72] ; (10008ec ) + 10008a4: f7ff fe2c bl 1000500 <_assert_handler> + + DMA_TypeDef *DMAx = (DMA_TypeDef *)((uint32_t)UARTx - sizeof(DMA_TypeDef)); + 10008a8: 3d1c subs r5, #28 + DMAx->SRC_ADDR.reg = (uint32_t)buf; + 10008aa: 602e str r6, [r5, #0] + DMAx->LEN_LOW.bit.TX_LEN_L = len & 0xffff; + 10008ac: 68ab ldr r3, [r5, #8] + 10008ae: 0422 lsls r2, r4, #16 + 10008b0: b29b uxth r3, r3 + 10008b2: 4313 orrs r3, r2 + 10008b4: 60ab str r3, [r5, #8] + DMAx->CTRL.bit.TX_LEN_H = len >> 16; + 10008b6: 68eb ldr r3, [r5, #12] + 10008b8: 4a0e ldr r2, [pc, #56] ; (10008f4 ) + 10008ba: 0324 lsls r4, r4, #12 + 10008bc: 0f24 lsrs r4, r4, #28 + 10008be: 4013 ands r3, r2 + 10008c0: 0324 lsls r4, r4, #12 + 10008c2: 431c orrs r4, r3 + DMAx->CTRL.bit.START = 1; + 10008c4: 2380 movs r3, #128 ; 0x80 + DMAx->CTRL.bit.TX_LEN_H = len >> 16; + 10008c6: 60ec str r4, [r5, #12] + DMAx->CTRL.bit.START = 1; + 10008c8: 68ea ldr r2, [r5, #12] + 10008ca: 061b lsls r3, r3, #24 + 10008cc: 4313 orrs r3, r2 + 10008ce: 60eb str r3, [r5, #12] + + while (DMAx->STATUS.bit.DONE != 1); + 10008d0: 692b ldr r3, [r5, #16] + 10008d2: 07db lsls r3, r3, #31 + 10008d4: d5fc bpl.n 10008d0 +} + 10008d6: bd70 pop {r4, r5, r6, pc} + 10008d8: 000f8b1c .word 0x000f8b1c + 10008dc: 000f8c1c .word 0x000f8c1c + 10008e0: 000f8d1c .word 0x000f8d1c + 10008e4: 000f8e1c .word 0x000f8e1c + 10008e8: 01006961 .word 0x01006961 + 10008ec: 010068e4 .word 0x010068e4 + 10008f0: 000ffffe .word 0x000ffffe + 10008f4: ffff0fff .word 0xffff0fff + +010008f8 : + * MUART0, MUART1, MUART2 or MUART3. + * @retval An one byte received data. + */ +uint8_t UART_ReceiveData(UART_TypeDef *UARTx) +{ + _ASSERT(IS_UART(UARTx)); + 10008f8: 4b0a ldr r3, [pc, #40] ; (1000924 ) +{ + 10008fa: b510 push {r4, lr} + 10008fc: 0004 movs r4, r0 + _ASSERT(IS_UART(UARTx)); + 10008fe: 4298 cmp r0, r3 + 1000900: d00d beq.n 100091e + 1000902: 4b09 ldr r3, [pc, #36] ; (1000928 ) + 1000904: 4298 cmp r0, r3 + 1000906: d00a beq.n 100091e + 1000908: 4b08 ldr r3, [pc, #32] ; (100092c ) + 100090a: 4298 cmp r0, r3 + 100090c: d007 beq.n 100091e + 100090e: 4b08 ldr r3, [pc, #32] ; (1000930 ) + 1000910: 4298 cmp r0, r3 + 1000912: d004 beq.n 100091e + 1000914: 4a07 ldr r2, [pc, #28] ; (1000934 ) + 1000916: 21d8 movs r1, #216 ; 0xd8 + 1000918: 4807 ldr r0, [pc, #28] ; (1000938 ) + 100091a: f7ff fdf1 bl 1000500 <_assert_handler> + + return UARTx->RX_DATA.bit.VAL; + 100091e: 7a20 ldrb r0, [r4, #8] + 1000920: b2c0 uxtb r0, r0 + +} + 1000922: bd10 pop {r4, pc} + 1000924: 000f8b1c .word 0x000f8b1c + 1000928: 000f8c1c .word 0x000f8c1c + 100092c: 000f8d1c .word 0x000f8d1c + 1000930: 000f8e1c .word 0x000f8e1c + 1000934: 0100696e .word 0x0100696e + 1000938: 010068e4 .word 0x010068e4 + +0100093c : + * @param len: the buf length, which size should be less than 20 bit (len < 0xfffff) + * @retval The length of received data before return. + */ +uint32_t UART_ReceiveBuf(UART_TypeDef *UARTx, uint8_t *buf, uint32_t len) +{ + _ASSERT(IS_UART(UARTx)); + 100093c: 4b1a ldr r3, [pc, #104] ; (10009a8 ) +{ + 100093e: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 1000940: 0004 movs r4, r0 + 1000942: 000e movs r6, r1 + 1000944: 0015 movs r5, r2 + _ASSERT(IS_UART(UARTx)); + 1000946: 4298 cmp r0, r3 + 1000948: d00d beq.n 1000966 + 100094a: 4b18 ldr r3, [pc, #96] ; (10009ac ) + 100094c: 4298 cmp r0, r3 + 100094e: d00a beq.n 1000966 + 1000950: 4b17 ldr r3, [pc, #92] ; (10009b0 ) + 1000952: 4298 cmp r0, r3 + 1000954: d007 beq.n 1000966 + 1000956: 4b17 ldr r3, [pc, #92] ; (10009b4 ) + 1000958: 4298 cmp r0, r3 + 100095a: d004 beq.n 1000966 + 100095c: 4a16 ldr r2, [pc, #88] ; (10009b8 ) + 100095e: 21ea movs r1, #234 ; 0xea + 1000960: 4816 ldr r0, [pc, #88] ; (10009bc ) + 1000962: f7ff fdcd bl 1000500 <_assert_handler> + _ASSERT(NULL != buf); + 1000966: 2e00 cmp r6, #0 + 1000968: d104 bne.n 1000974 + 100096a: 4a13 ldr r2, [pc, #76] ; (10009b8 ) + 100096c: 21eb movs r1, #235 ; 0xeb + 100096e: 4813 ldr r0, [pc, #76] ; (10009bc ) + 1000970: f7ff fdc6 bl 1000500 <_assert_handler> + _ASSERT(len < 0xfffff); + 1000974: 4b12 ldr r3, [pc, #72] ; (10009c0 ) + 1000976: 429d cmp r5, r3 + 1000978: d904 bls.n 1000984 + 100097a: 4a0f ldr r2, [pc, #60] ; (10009b8 ) + 100097c: 21ec movs r1, #236 ; 0xec + 100097e: 480f ldr r0, [pc, #60] ; (10009bc ) + 1000980: f7ff fdbe bl 1000500 <_assert_handler> + 1000984: 1973 adds r3, r6, r5 +{ + 1000986: 0035 movs r5, r6 + 1000988: 9301 str r3, [sp, #4] + + uint32_t rcv_len = 0; + while ((UART_ReceiveDataLen(UARTx) > 0) && (rcv_len < len)) + 100098a: 0020 movs r0, r4 + 100098c: 1baf subs r7, r5, r6 + 100098e: f000 f925 bl 1000bdc + 1000992: 2800 cmp r0, #0 + 1000994: d002 beq.n 100099c + 1000996: 9b01 ldr r3, [sp, #4] + 1000998: 42ab cmp r3, r5 + 100099a: d101 bne.n 10009a0 + { + buf[rcv_len++] = UARTx->RX_DATA.bit.VAL; + } + + return rcv_len; +} + 100099c: 0038 movs r0, r7 + 100099e: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} + buf[rcv_len++] = UARTx->RX_DATA.bit.VAL; + 10009a0: 7a23 ldrb r3, [r4, #8] + 10009a2: 702b strb r3, [r5, #0] + 10009a4: 3501 adds r5, #1 + 10009a6: e7f0 b.n 100098a + 10009a8: 000f8b1c .word 0x000f8b1c + 10009ac: 000f8c1c .word 0x000f8c1c + 10009b0: 000f8d1c .word 0x000f8d1c + 10009b4: 000f8e1c .word 0x000f8e1c + 10009b8: 0100697f .word 0x0100697f + 10009bc: 010068e4 .word 0x010068e4 + 10009c0: 000ffffe .word 0x000ffffe + +010009c4 : + * @param NewState: ENABLE or DISABLE auto flow control + * @retval None + */ +void UART_AutoFlowCtrlCmd(UART_TypeDef *UARTx, FunctionalState NewState) +{ + _ASSERT(IS_UART(UARTx)); + 10009c4: 4b0e ldr r3, [pc, #56] ; (1000a00 ) +{ + 10009c6: b570 push {r4, r5, r6, lr} + 10009c8: 0004 movs r4, r0 + 10009ca: 000d movs r5, r1 + _ASSERT(IS_UART(UARTx)); + 10009cc: 4298 cmp r0, r3 + 10009ce: d00e beq.n 10009ee + 10009d0: 4b0c ldr r3, [pc, #48] ; (1000a04 ) + 10009d2: 4298 cmp r0, r3 + 10009d4: d00b beq.n 10009ee + 10009d6: 4b0c ldr r3, [pc, #48] ; (1000a08 ) + 10009d8: 4298 cmp r0, r3 + 10009da: d008 beq.n 10009ee + 10009dc: 4b0b ldr r3, [pc, #44] ; (1000a0c ) + 10009de: 4298 cmp r0, r3 + 10009e0: d005 beq.n 10009ee + 10009e2: 2181 movs r1, #129 ; 0x81 + 10009e4: 4a0a ldr r2, [pc, #40] ; (1000a10 ) + 10009e6: 0049 lsls r1, r1, #1 + 10009e8: 480a ldr r0, [pc, #40] ; (1000a14 ) + 10009ea: f7ff fd89 bl 1000500 <_assert_handler> + + UARTx->CTRL.bit.FLOW_CTRL = NewState; + 10009ee: 2301 movs r3, #1 + 10009f0: 7821 ldrb r1, [r4, #0] + 10009f2: 401d ands r5, r3 + 10009f4: 330f adds r3, #15 + 10009f6: 012d lsls r5, r5, #4 + 10009f8: 4399 bics r1, r3 + 10009fa: 4329 orrs r1, r5 + 10009fc: 7021 strb r1, [r4, #0] +} + 10009fe: bd70 pop {r4, r5, r6, pc} + 1000a00: 000f8b1c .word 0x000f8b1c + 1000a04: 000f8c1c .word 0x000f8c1c + 1000a08: 000f8d1c .word 0x000f8d1c + 1000a0c: 000f8e1c .word 0x000f8e1c + 1000a10: 0100698f .word 0x0100698f + 1000a14: 010068e4 .word 0x010068e4 + +01000a18 : + * MUART0, MUART1, MUART2 or MUART3. + * @retval IT Identity + */ +uint8_t UART_GetITIdentity(UART_TypeDef *UARTx) +{ + _ASSERT(IS_UART(UARTx)); + 1000a18: 4b0e ldr r3, [pc, #56] ; (1000a54 ) +{ + 1000a1a: b510 push {r4, lr} + 1000a1c: 0004 movs r4, r0 + _ASSERT(IS_UART(UARTx)); + 1000a1e: 4298 cmp r0, r3 + 1000a20: d00e beq.n 1000a40 + 1000a22: 4b0d ldr r3, [pc, #52] ; (1000a58 ) + 1000a24: 4298 cmp r0, r3 + 1000a26: d00b beq.n 1000a40 + 1000a28: 4b0c ldr r3, [pc, #48] ; (1000a5c ) + 1000a2a: 4298 cmp r0, r3 + 1000a2c: d008 beq.n 1000a40 + 1000a2e: 4b0c ldr r3, [pc, #48] ; (1000a60 ) + 1000a30: 4298 cmp r0, r3 + 1000a32: d005 beq.n 1000a40 + 1000a34: 2112 movs r1, #18 + 1000a36: 4a0b ldr r2, [pc, #44] ; (1000a64 ) + 1000a38: 31ff adds r1, #255 ; 0xff + 1000a3a: 480b ldr r0, [pc, #44] ; (1000a68 ) + 1000a3c: f7ff fd60 bl 1000500 <_assert_handler> + + return (0 || (UARTx->BAUD.bit.TX_INT_EN) || (UARTx->RX_INT_LEN.bit.VAL)); + 1000a40: 8863 ldrh r3, [r4, #2] + 1000a42: 2001 movs r0, #1 + 1000a44: 0bdb lsrs r3, r3, #15 + 1000a46: d102 bne.n 1000a4e + 1000a48: 7860 ldrb r0, [r4, #1] + 1000a4a: 1e43 subs r3, r0, #1 + 1000a4c: 4198 sbcs r0, r3 + 1000a4e: b2c0 uxtb r0, r0 +} + 1000a50: bd10 pop {r4, pc} + 1000a52: 46c0 nop ; (mov r8, r8) + 1000a54: 000f8b1c .word 0x000f8b1c + 1000a58: 000f8c1c .word 0x000f8c1c + 1000a5c: 000f8d1c .word 0x000f8d1c + 1000a60: 000f8e1c .word 0x000f8e1c + 1000a64: 010069a4 .word 0x010069a4 + 1000a68: 010068e4 .word 0x010068e4 + +01000a6c : + * @retval TRUE: Rx fifo is full. + * FALSE: Rx fifo is not full + */ +Boolean UART_IsRXFIFOFull(UART_TypeDef *UARTx) +{ + _ASSERT(IS_UART(UARTx)); + 1000a6c: 4b0b ldr r3, [pc, #44] ; (1000a9c ) +{ + 1000a6e: b510 push {r4, lr} + 1000a70: 0004 movs r4, r0 + _ASSERT(IS_UART(UARTx)); + 1000a72: 4298 cmp r0, r3 + 1000a74: d00e beq.n 1000a94 + 1000a76: 4b0a ldr r3, [pc, #40] ; (1000aa0 ) + 1000a78: 4298 cmp r0, r3 + 1000a7a: d00b beq.n 1000a94 + 1000a7c: 4b09 ldr r3, [pc, #36] ; (1000aa4 ) + 1000a7e: 4298 cmp r0, r3 + 1000a80: d008 beq.n 1000a94 + 1000a82: 4b09 ldr r3, [pc, #36] ; (1000aa8 ) + 1000a84: 4298 cmp r0, r3 + 1000a86: d005 beq.n 1000a94 + 1000a88: 2122 movs r1, #34 ; 0x22 + 1000a8a: 4a08 ldr r2, [pc, #32] ; (1000aac ) + 1000a8c: 31ff adds r1, #255 ; 0xff + 1000a8e: 4808 ldr r0, [pc, #32] ; (1000ab0 ) + 1000a90: f7ff fd36 bl 1000500 <_assert_handler> + + return (Boolean)(UARTx->STATUS.bit.RX_FULL); + 1000a94: 68e0 ldr r0, [r4, #12] + 1000a96: 0780 lsls r0, r0, #30 + 1000a98: 0fc0 lsrs r0, r0, #31 +} + 1000a9a: bd10 pop {r4, pc} + 1000a9c: 000f8b1c .word 0x000f8b1c + 1000aa0: 000f8c1c .word 0x000f8c1c + 1000aa4: 000f8d1c .word 0x000f8d1c + 1000aa8: 000f8e1c .word 0x000f8e1c + 1000aac: 010069b7 .word 0x010069b7 + 1000ab0: 010068e4 .word 0x010068e4 + +01000ab4 : + * @retval TRUE: Rx fifo is not empty. + * FALSE: Rx fifo is empty + */ +Boolean UART_IsRXFIFONotEmpty(UART_TypeDef *UARTx) +{ + _ASSERT(IS_UART(UARTx)); + 1000ab4: 4b0c ldr r3, [pc, #48] ; (1000ae8 ) +{ + 1000ab6: b510 push {r4, lr} + 1000ab8: 0004 movs r4, r0 + _ASSERT(IS_UART(UARTx)); + 1000aba: 4298 cmp r0, r3 + 1000abc: d00e beq.n 1000adc + 1000abe: 4b0b ldr r3, [pc, #44] ; (1000aec ) + 1000ac0: 4298 cmp r0, r3 + 1000ac2: d00b beq.n 1000adc + 1000ac4: 4b0a ldr r3, [pc, #40] ; (1000af0 ) + 1000ac6: 4298 cmp r0, r3 + 1000ac8: d008 beq.n 1000adc + 1000aca: 4b0a ldr r3, [pc, #40] ; (1000af4 ) + 1000acc: 4298 cmp r0, r3 + 1000ace: d005 beq.n 1000adc + 1000ad0: 2132 movs r1, #50 ; 0x32 + 1000ad2: 4a09 ldr r2, [pc, #36] ; (1000af8 ) + 1000ad4: 31ff adds r1, #255 ; 0xff + 1000ad6: 4809 ldr r0, [pc, #36] ; (1000afc ) + 1000ad8: f7ff fd12 bl 1000500 <_assert_handler> + + return (Boolean)(!(UARTx->STATUS.bit.RX_EMPTY)); + 1000adc: 2301 movs r3, #1 + 1000ade: 68e0 ldr r0, [r4, #12] + 1000ae0: 07c0 lsls r0, r0, #31 + 1000ae2: 0fc0 lsrs r0, r0, #31 + 1000ae4: 4058 eors r0, r3 +} + 1000ae6: bd10 pop {r4, pc} + 1000ae8: 000f8b1c .word 0x000f8b1c + 1000aec: 000f8c1c .word 0x000f8c1c + 1000af0: 000f8d1c .word 0x000f8d1c + 1000af4: 000f8e1c .word 0x000f8e1c + 1000af8: 010069c9 .word 0x010069c9 + 1000afc: 010068e4 .word 0x010068e4 + +01000b00 : + * @retval TRUE: UARTx is busy. + * FALSE: UARTx is not busy. + */ +Boolean UART_IsBusy(UART_TypeDef *UARTx) +{ + _ASSERT(IS_UART(UARTx)); + 1000b00: 4b0c ldr r3, [pc, #48] ; (1000b34 ) +{ + 1000b02: b510 push {r4, lr} + 1000b04: 0004 movs r4, r0 + _ASSERT(IS_UART(UARTx)); + 1000b06: 4298 cmp r0, r3 + 1000b08: d00e beq.n 1000b28 + 1000b0a: 4b0b ldr r3, [pc, #44] ; (1000b38 ) + 1000b0c: 4298 cmp r0, r3 + 1000b0e: d00b beq.n 1000b28 + 1000b10: 4b0a ldr r3, [pc, #40] ; (1000b3c ) + 1000b12: 4298 cmp r0, r3 + 1000b14: d008 beq.n 1000b28 + 1000b16: 4b0a ldr r3, [pc, #40] ; (1000b40 ) + 1000b18: 4298 cmp r0, r3 + 1000b1a: d005 beq.n 1000b28 + 1000b1c: 2142 movs r1, #66 ; 0x42 + 1000b1e: 4a09 ldr r2, [pc, #36] ; (1000b44 ) + 1000b20: 31ff adds r1, #255 ; 0xff + 1000b22: 4809 ldr r0, [pc, #36] ; (1000b48 ) + 1000b24: f7ff fcec bl 1000500 <_assert_handler> + + return (Boolean)(!(UARTx->STATUS.bit.RX_EMPTY)); + 1000b28: 2301 movs r3, #1 + 1000b2a: 68e0 ldr r0, [r4, #12] + 1000b2c: 07c0 lsls r0, r0, #31 + 1000b2e: 0fc0 lsrs r0, r0, #31 + 1000b30: 4058 eors r0, r3 +} + 1000b32: bd10 pop {r4, pc} + 1000b34: 000f8b1c .word 0x000f8b1c + 1000b38: 000f8c1c .word 0x000f8c1c + 1000b3c: 000f8d1c .word 0x000f8d1c + 1000b40: 000f8e1c .word 0x000f8e1c + 1000b44: 010069df .word 0x010069df + 1000b48: 010068e4 .word 0x010068e4 + +01000b4c : + * @param timeout: 0x00~0xff + * @retval None + */ +void UART_SetITTimeout(UART_TypeDef *UARTx, uint16_t timeout) +{ + _ASSERT(IS_UART(UARTx)); + 1000b4c: 4b0b ldr r3, [pc, #44] ; (1000b7c ) +{ + 1000b4e: b570 push {r4, r5, r6, lr} + 1000b50: 0004 movs r4, r0 + 1000b52: 000d movs r5, r1 + _ASSERT(IS_UART(UARTx)); + 1000b54: 4298 cmp r0, r3 + 1000b56: d00e beq.n 1000b76 + 1000b58: 4b09 ldr r3, [pc, #36] ; (1000b80 ) + 1000b5a: 4298 cmp r0, r3 + 1000b5c: d00b beq.n 1000b76 + 1000b5e: 4b09 ldr r3, [pc, #36] ; (1000b84 ) + 1000b60: 4298 cmp r0, r3 + 1000b62: d008 beq.n 1000b76 + 1000b64: 4b08 ldr r3, [pc, #32] ; (1000b88 ) + 1000b66: 4298 cmp r0, r3 + 1000b68: d005 beq.n 1000b76 + 1000b6a: 2152 movs r1, #82 ; 0x52 + 1000b6c: 4a07 ldr r2, [pc, #28] ; (1000b8c ) + 1000b6e: 31ff adds r1, #255 ; 0xff + 1000b70: 4807 ldr r0, [pc, #28] ; (1000b90 ) + 1000b72: f7ff fcc5 bl 1000500 <_assert_handler> + + UARTx->TIMEOUT_INT.reg = timeout; + 1000b76: 80a5 strh r5, [r4, #4] +} + 1000b78: bd70 pop {r4, r5, r6, pc} + 1000b7a: 46c0 nop ; (mov r8, r8) + 1000b7c: 000f8b1c .word 0x000f8b1c + 1000b80: 000f8c1c .word 0x000f8c1c + 1000b84: 000f8d1c .word 0x000f8d1c + 1000b88: 000f8e1c .word 0x000f8e1c + 1000b8c: 010069eb .word 0x010069eb + 1000b90: 010068e4 .word 0x010068e4 + +01000b94 : + * @param Bcnt: if the number of receive datas greater than Bcnt,interrupt trigger + * @retval None + */ +void UART_SetRxITNum(UART_TypeDef *UARTx, uint8_t Bcnt) +{ + _ASSERT(IS_UART(UARTx)); + 1000b94: 4b0b ldr r3, [pc, #44] ; (1000bc4 ) +{ + 1000b96: b570 push {r4, r5, r6, lr} + 1000b98: 0004 movs r4, r0 + 1000b9a: 000d movs r5, r1 + _ASSERT(IS_UART(UARTx)); + 1000b9c: 4298 cmp r0, r3 + 1000b9e: d00e beq.n 1000bbe + 1000ba0: 4b09 ldr r3, [pc, #36] ; (1000bc8 ) + 1000ba2: 4298 cmp r0, r3 + 1000ba4: d00b beq.n 1000bbe + 1000ba6: 4b09 ldr r3, [pc, #36] ; (1000bcc ) + 1000ba8: 4298 cmp r0, r3 + 1000baa: d008 beq.n 1000bbe + 1000bac: 4b08 ldr r3, [pc, #32] ; (1000bd0 ) + 1000bae: 4298 cmp r0, r3 + 1000bb0: d005 beq.n 1000bbe + 1000bb2: 2162 movs r1, #98 ; 0x62 + 1000bb4: 4a07 ldr r2, [pc, #28] ; (1000bd4 ) + 1000bb6: 31ff adds r1, #255 ; 0xff + 1000bb8: 4807 ldr r0, [pc, #28] ; (1000bd8 ) + 1000bba: f7ff fca1 bl 1000500 <_assert_handler> + + UARTx->RX_INT_LEN.reg = Bcnt; + 1000bbe: 7065 strb r5, [r4, #1] +} + 1000bc0: bd70 pop {r4, r5, r6, pc} + 1000bc2: 46c0 nop ; (mov r8, r8) + 1000bc4: 000f8b1c .word 0x000f8b1c + 1000bc8: 000f8c1c .word 0x000f8c1c + 1000bcc: 000f8d1c .word 0x000f8d1c + 1000bd0: 000f8e1c .word 0x000f8e1c + 1000bd4: 010069fd .word 0x010069fd + 1000bd8: 010068e4 .word 0x010068e4 + +01000bdc : + * MUART0, MUART1, MUART2 or MUART3. + * @retval Data len + */ +uint32_t UART_ReceiveDataLen(UART_TypeDef *UARTx) +{ + _ASSERT(IS_UART(UARTx)); + 1000bdc: 4b0d ldr r3, [pc, #52] ; (1000c14 ) +{ + 1000bde: b510 push {r4, lr} + 1000be0: 0004 movs r4, r0 + _ASSERT(IS_UART(UARTx)); + 1000be2: 4298 cmp r0, r3 + 1000be4: d00e beq.n 1000c04 + 1000be6: 4b0c ldr r3, [pc, #48] ; (1000c18 ) + 1000be8: 4298 cmp r0, r3 + 1000bea: d00b beq.n 1000c04 + 1000bec: 4b0b ldr r3, [pc, #44] ; (1000c1c ) + 1000bee: 4298 cmp r0, r3 + 1000bf0: d008 beq.n 1000c04 + 1000bf2: 4b0b ldr r3, [pc, #44] ; (1000c20 ) + 1000bf4: 4298 cmp r0, r3 + 1000bf6: d005 beq.n 1000c04 + 1000bf8: 21b8 movs r1, #184 ; 0xb8 + 1000bfa: 4a0a ldr r2, [pc, #40] ; (1000c24 ) + 1000bfc: 0049 lsls r1, r1, #1 + 1000bfe: 480a ldr r0, [pc, #40] ; (1000c28 ) + 1000c00: f7ff fc7e bl 1000500 <_assert_handler> + + return (UARTx->STATUS.bit.RX_ITEMS_H << 16) + UARTx->STATUS.bit.RX_ITEMS_L; + 1000c04: 68e0 ldr r0, [r4, #12] + 1000c06: 68e3 ldr r3, [r4, #12] + 1000c08: 0400 lsls r0, r0, #16 + 1000c0a: 0f00 lsrs r0, r0, #28 + 1000c0c: 0c1b lsrs r3, r3, #16 + 1000c0e: 0400 lsls r0, r0, #16 + 1000c10: 18c0 adds r0, r0, r3 +} + 1000c12: bd10 pop {r4, pc} + 1000c14: 000f8b1c .word 0x000f8b1c + 1000c18: 000f8c1c .word 0x000f8c1c + 1000c1c: 000f8d1c .word 0x000f8d1c + 1000c20: 000f8e1c .word 0x000f8e1c + 1000c24: 01006a0d .word 0x01006a0d + 1000c28: 010068e4 .word 0x010068e4 + +01000c2c : + 4u, 0u, 1u, 0u, 2u, 0u, 1u, 0u, 3u, 0u, 1u, 0u, 2u, 0u, 1u, 0u /* 0xF0 to 0xFF */ +}; + +uint8_t UnMap(uint16_t x) +{ + uint8_t lx = x; + 1000c2c: b2c2 uxtb r2, r0 + 1000c2e: 4b05 ldr r3, [pc, #20] ; (1000c44 ) + uint8_t hx = x >> 8; + if(lx) + 1000c30: 2a00 cmp r2, #0 + 1000c32: d001 beq.n 1000c38 + { + return UnMapTb[lx]; + 1000c34: 5c98 ldrb r0, [r3, r2] + } + else + { + return UnMapTb[hx] + 8; + } +} + 1000c36: 4770 bx lr + return UnMapTb[hx] + 8; + 1000c38: 0a00 lsrs r0, r0, #8 + 1000c3a: 5c18 ldrb r0, [r3, r0] + 1000c3c: 3008 adds r0, #8 + 1000c3e: b2c0 uxtb r0, r0 + 1000c40: e7f9 b.n 1000c36 + 1000c42: 46c0 nop ; (mov r8, r8) + 1000c44: 01006a21 .word 0x01006a21 + +01000c48 : + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_15)(Only one can be configured at a time) + * @param function:gpio function + * @retval none + */ +void GPIO_Config(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin, GPIO_FUN_TYPEDEF function) +{ + 1000c48: b570 push {r4, r5, r6, lr} + 1000c4a: 0005 movs r5, r0 + 1000c4c: 000c movs r4, r1 + 1000c4e: 0016 movs r6, r2 + _ASSERT(IS_GPIO_PORT(GPIOx)); + 1000c50: 2804 cmp r0, #4 + 1000c52: d904 bls.n 1000c5e + 1000c54: 4a1e ldr r2, [pc, #120] ; (1000cd0 ) + 1000c56: 2139 movs r1, #57 ; 0x39 + 1000c58: 481e ldr r0, [pc, #120] ; (1000cd4 ) + 1000c5a: f7ff fc51 bl 1000500 <_assert_handler> + _ASSERT(IS_GPIO_PIN_SINGLE(GPIO_Pin)); + 1000c5e: 1e63 subs r3, r4, #1 + 1000c60: 2b01 cmp r3, #1 + 1000c62: d92c bls.n 1000cbe + 1000c64: 2204 movs r2, #4 + 1000c66: 1f23 subs r3, r4, #4 + 1000c68: 4393 bics r3, r2 + 1000c6a: b29b uxth r3, r3 + 1000c6c: 2b00 cmp r3, #0 + 1000c6e: d026 beq.n 1000cbe + 1000c70: 0023 movs r3, r4 + 1000c72: 320c adds r2, #12 + 1000c74: 3b10 subs r3, #16 + 1000c76: 4393 bics r3, r2 + 1000c78: b29b uxth r3, r3 + 1000c7a: 2b00 cmp r3, #0 + 1000c7c: d01f beq.n 1000cbe + 1000c7e: 0023 movs r3, r4 + 1000c80: 3230 adds r2, #48 ; 0x30 + 1000c82: 3b40 subs r3, #64 ; 0x40 + 1000c84: 4393 bics r3, r2 + 1000c86: b29b uxth r3, r3 + 1000c88: 2b00 cmp r3, #0 + 1000c8a: d018 beq.n 1000cbe + 1000c8c: 1e63 subs r3, r4, #1 + 1000c8e: 4a12 ldr r2, [pc, #72] ; (1000cd8 ) + 1000c90: 3bff subs r3, #255 ; 0xff + 1000c92: 4213 tst r3, r2 + 1000c94: d013 beq.n 1000cbe + 1000c96: 4b11 ldr r3, [pc, #68] ; (1000cdc ) + 1000c98: 4a11 ldr r2, [pc, #68] ; (1000ce0 ) + 1000c9a: 18e3 adds r3, r4, r3 + 1000c9c: 4213 tst r3, r2 + 1000c9e: d00e beq.n 1000cbe + 1000ca0: 4b10 ldr r3, [pc, #64] ; (1000ce4 ) + 1000ca2: 4a11 ldr r2, [pc, #68] ; (1000ce8 ) + 1000ca4: 18e3 adds r3, r4, r3 + 1000ca6: 4213 tst r3, r2 + 1000ca8: d009 beq.n 1000cbe + 1000caa: 4b10 ldr r3, [pc, #64] ; (1000cec ) + 1000cac: 4a10 ldr r2, [pc, #64] ; (1000cf0 ) + 1000cae: 18e3 adds r3, r4, r3 + 1000cb0: 4213 tst r3, r2 + 1000cb2: d004 beq.n 1000cbe + 1000cb4: 4a06 ldr r2, [pc, #24] ; (1000cd0 ) + 1000cb6: 213a movs r1, #58 ; 0x3a + 1000cb8: 4806 ldr r0, [pc, #24] ; (1000cd4 ) + 1000cba: f7ff fc21 bl 1000500 <_assert_handler> + _ASSERT(IS_GPIO_FUN(function)); + + MGPIO->CTRL.reg[GPIO_GetNum(GPIOx, GPIO_Pin)] = function; + 1000cbe: 0020 movs r0, r4 + 1000cc0: f7ff ffb4 bl 1000c2c + 1000cc4: 012d lsls r5, r5, #4 + 1000cc6: 4b0b ldr r3, [pc, #44] ; (1000cf4 ) + 1000cc8: 1828 adds r0, r5, r0 + 1000cca: 541e strb r6, [r3, r0] +} + 1000ccc: bd70 pop {r4, r5, r6, pc} + 1000cce: 46c0 nop ; (mov r8, r8) + 1000cd0: 01006b48 .word 0x01006b48 + 1000cd4: 01006b21 .word 0x01006b21 + 1000cd8: 0000feff .word 0x0000feff + 1000cdc: fffffc00 .word 0xfffffc00 + 1000ce0: 0000fbff .word 0x0000fbff + 1000ce4: fffff000 .word 0xfffff000 + 1000ce8: 0000efff .word 0x0000efff + 1000cec: ffffc000 .word 0xffffc000 + 1000cf0: 0000bfff .word 0x0000bfff + 1000cf4: 000f8700 .word 0x000f8700 + +01000cf8 : + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * @param GPIO_InitStruct:GPIO_InitStruct + * @retval none + */ +void GPIO_Init(GPIO_TypeDef GPIOx, GPIO_InitTypeDef* GPIO_InitStruct) +{ + 1000cf8: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 1000cfa: 0004 movs r4, r0 + 1000cfc: 000d movs r5, r1 + _ASSERT(IS_GPIO_PORT(GPIOx)); + 1000cfe: 2804 cmp r0, #4 + 1000d00: d904 bls.n 1000d0c + 1000d02: 4a17 ldr r2, [pc, #92] ; (1000d60 ) + 1000d04: 2149 movs r1, #73 ; 0x49 + 1000d06: 4817 ldr r0, [pc, #92] ; (1000d64 ) + 1000d08: f7ff fbfa bl 1000500 <_assert_handler> + _ASSERT(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin)); + 1000d0c: 882b ldrh r3, [r5, #0] + 1000d0e: 2b00 cmp r3, #0 + 1000d10: d104 bne.n 1000d1c + 1000d12: 4a13 ldr r2, [pc, #76] ; (1000d60 ) + 1000d14: 214a movs r1, #74 ; 0x4a + 1000d16: 4813 ldr r0, [pc, #76] ; (1000d64 ) + 1000d18: f7ff fbf2 bl 1000500 <_assert_handler> + _ASSERT(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode)); + 1000d1c: 78ab ldrb r3, [r5, #2] + 1000d1e: 2b03 cmp r3, #3 + 1000d20: d904 bls.n 1000d2c + 1000d22: 4a0f ldr r2, [pc, #60] ; (1000d60 ) + 1000d24: 214b movs r1, #75 ; 0x4b + 1000d26: 480f ldr r0, [pc, #60] ; (1000d64 ) + 1000d28: f7ff fbea bl 1000500 <_assert_handler> + + for(uint8_t i = 0; i < GPIO_PIN_NUM; i++) + { + if(GPIO_InitStruct->GPIO_Pin & (BIT0<CTRL.reg[GPIO_GetNum(GPIOx, (BIT0<GPIO_Mode << 6; + 1000d32: 0123 lsls r3, r4, #4 + 1000d34: 2400 movs r4, #0 + 1000d36: 4f0c ldr r7, [pc, #48] ; (1000d68 ) + 1000d38: 9301 str r3, [sp, #4] + if(GPIO_InitStruct->GPIO_Pin & (BIT0< + MGPIO->CTRL.reg[GPIO_GetNum(GPIOx, (BIT0<GPIO_Mode << 6; + 1000d42: 0030 movs r0, r6 + 1000d44: 40a0 lsls r0, r4 + 1000d46: b280 uxth r0, r0 + 1000d48: f7ff ff70 bl 1000c2c + 1000d4c: 9b01 ldr r3, [sp, #4] + 1000d4e: 18c0 adds r0, r0, r3 + 1000d50: 78ab ldrb r3, [r5, #2] + 1000d52: 019b lsls r3, r3, #6 + 1000d54: b2db uxtb r3, r3 + 1000d56: 543b strb r3, [r7, r0] + 1000d58: 3401 adds r4, #1 + for(uint8_t i = 0; i < GPIO_PIN_NUM; i++) + 1000d5a: 2c10 cmp r4, #16 + 1000d5c: d1ed bne.n 1000d3a + } + } +} + 1000d5e: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} + 1000d60: 01006b54 .word 0x01006b54 + 1000d64: 01006b21 .word 0x01006b21 + 1000d68: 000f8700 .word 0x000f8700 + +01000d6c : + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_7) + * @param NewState: new state of the port pin Pull Up.(ENABLE or DISABLE) + * @retval none + */ +void GPIO_PullUpCmd(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin, FunctionalState NewState) +{ + 1000d6c: b5f8 push {r3, r4, r5, r6, r7, lr} + 1000d6e: 0005 movs r5, r0 + 1000d70: 000e movs r6, r1 + 1000d72: 0014 movs r4, r2 + _ASSERT(IS_GPIO_PORT(GPIOx)); + 1000d74: 2804 cmp r0, #4 + 1000d76: d904 bls.n 1000d82 + 1000d78: 4a1d ldr r2, [pc, #116] ; (1000df0 ) + 1000d7a: 2160 movs r1, #96 ; 0x60 + 1000d7c: 481d ldr r0, [pc, #116] ; (1000df4 ) + 1000d7e: f7ff fbbf bl 1000500 <_assert_handler> + _ASSERT(IS_GPIO_PIN(GPIO_Pin)); + 1000d82: 2e00 cmp r6, #0 + 1000d84: d104 bne.n 1000d90 + 1000d86: 4a1a ldr r2, [pc, #104] ; (1000df0 ) + 1000d88: 2161 movs r1, #97 ; 0x61 + 1000d8a: 481a ldr r0, [pc, #104] ; (1000df4 ) + 1000d8c: f7ff fbb8 bl 1000500 <_assert_handler> + _ASSERT(IS_FUNCTIONAL_STATE(NewState)); + 1000d90: 2c01 cmp r4, #1 + 1000d92: d905 bls.n 1000da0 + 1000d94: 4a16 ldr r2, [pc, #88] ; (1000df0 ) + 1000d96: 2162 movs r1, #98 ; 0x62 + 1000d98: 4816 ldr r0, [pc, #88] ; (1000df4 ) + 1000d9a: f7ff fbb1 bl 1000500 <_assert_handler> + for(i = 0; iCTRL.bit[GPIO_GetNum(GPIOx, (GPIO_Pin_TypeDef)(BIT0 << i))].MODE = GPIO_Mode_IN_FLOATING; + } + } +} + 1000d9e: bdf8 pop {r3, r4, r5, r6, r7, pc} + if (ENABLE == NewState) + 1000da0: 2c01 cmp r4, #1 + 1000da2: d112 bne.n 1000dca + MGPIO->CTRL.bit[GPIO_GetNum(GPIOx,(GPIO_Pin_TypeDef)(BIT0 << i))].MODE = GPIO_Mode_IPU; + 1000da4: 2600 movs r6, #0 + 1000da6: 4f14 ldr r7, [pc, #80] ; (1000df8 ) + 1000da8: 012d lsls r5, r5, #4 + 1000daa: 0020 movs r0, r4 + 1000dac: 40b0 lsls r0, r6 + 1000dae: b280 uxth r0, r0 + 1000db0: f7ff ff3c bl 1000c2c + 1000db4: 223f movs r2, #63 ; 0x3f + 1000db6: 1940 adds r0, r0, r5 + 1000db8: 5c3b ldrb r3, [r7, r0] + 1000dba: 3601 adds r6, #1 + 1000dbc: 4013 ands r3, r2 + 1000dbe: 3201 adds r2, #1 + 1000dc0: 4313 orrs r3, r2 + 1000dc2: 543b strb r3, [r7, r0] + for(i = 0; i + 1000dc8: e7e9 b.n 1000d9e + else if (DISABLE == NewState) + 1000dca: 2c00 cmp r4, #0 + 1000dcc: d1e7 bne.n 1000d9e + MGPIO->CTRL.bit[GPIO_GetNum(GPIOx, (GPIO_Pin_TypeDef)(BIT0 << i))].MODE = GPIO_Mode_IN_FLOATING; + 1000dce: 2701 movs r7, #1 + 1000dd0: 4e09 ldr r6, [pc, #36] ; (1000df8 ) + 1000dd2: 012d lsls r5, r5, #4 + 1000dd4: 0038 movs r0, r7 + 1000dd6: 40a0 lsls r0, r4 + 1000dd8: b280 uxth r0, r0 + 1000dda: f7ff ff27 bl 1000c2c + 1000dde: 223f movs r2, #63 ; 0x3f + 1000de0: 1940 adds r0, r0, r5 + 1000de2: 5c33 ldrb r3, [r6, r0] + 1000de4: 3401 adds r4, #1 + 1000de6: 4013 ands r3, r2 + 1000de8: 5433 strb r3, [r6, r0] + for(i = 0; i + 1000dee: e7d6 b.n 1000d9e + 1000df0: 01006b5e .word 0x01006b5e + 1000df4: 01006b21 .word 0x01006b21 + 1000df8: 000f8700 .word 0x000f8700 + +01000dfc : + * @brief Reads the GPIO input data for 2byte. + * @param GPIOx_IN: where x can be (GPIOA_IN...GPIOF_IN) to select the GPIO group. + * @retval GPIO input data. + */ +uint16_t GPIO_ReadInputData(GPIO_TypeDef GPIOx) +{ + 1000dfc: b510 push {r4, lr} + 1000dfe: 0004 movs r4, r0 + _ASSERT(IS_GPIO_PORT(GPIOx)); + 1000e00: 2804 cmp r0, #4 + 1000e02: d904 bls.n 1000e0e + 1000e04: 4a05 ldr r2, [pc, #20] ; (1000e1c ) + 1000e06: 217d movs r1, #125 ; 0x7d + 1000e08: 4805 ldr r0, [pc, #20] ; (1000e20 ) + 1000e0a: f7ff fb79 bl 1000500 <_assert_handler> + + return MGPIO->IN_LEVEL.reg[GPIOx]; + 1000e0e: 4b05 ldr r3, [pc, #20] ; (1000e24 ) + 1000e10: 3468 adds r4, #104 ; 0x68 + 1000e12: 0064 lsls r4, r4, #1 + 1000e14: 5ae0 ldrh r0, [r4, r3] + 1000e16: b280 uxth r0, r0 +} + 1000e18: bd10 pop {r4, pc} + 1000e1a: 46c0 nop ; (mov r8, r8) + 1000e1c: 01006b6d .word 0x01006b6d + 1000e20: 01006b21 .word 0x01006b21 + 1000e24: 000f8700 .word 0x000f8700 + +01000e28 : + * @param GPIOx_IN: where x can be (GPIOA_IN...GPIOF_IN) to select the GPIO group. + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_15) + * @retval The input bit + */ +uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin) +{ + 1000e28: b570 push {r4, r5, r6, lr} + 1000e2a: 0005 movs r5, r0 + 1000e2c: 000c movs r4, r1 + _ASSERT(IS_GPIO_PORT(GPIOx)); + 1000e2e: 2804 cmp r0, #4 + 1000e30: d904 bls.n 1000e3c + 1000e32: 4a1f ldr r2, [pc, #124] ; (1000eb0 ) + 1000e34: 218b movs r1, #139 ; 0x8b + 1000e36: 481f ldr r0, [pc, #124] ; (1000eb4 ) + 1000e38: f7ff fb62 bl 1000500 <_assert_handler> + _ASSERT(IS_GPIO_PIN_SINGLE(GPIO_Pin)); + 1000e3c: 1e63 subs r3, r4, #1 + 1000e3e: 2b01 cmp r3, #1 + 1000e40: d92c bls.n 1000e9c + 1000e42: 2204 movs r2, #4 + 1000e44: 1f23 subs r3, r4, #4 + 1000e46: 4393 bics r3, r2 + 1000e48: b29b uxth r3, r3 + 1000e4a: 2b00 cmp r3, #0 + 1000e4c: d026 beq.n 1000e9c + 1000e4e: 0023 movs r3, r4 + 1000e50: 320c adds r2, #12 + 1000e52: 3b10 subs r3, #16 + 1000e54: 4393 bics r3, r2 + 1000e56: b29b uxth r3, r3 + 1000e58: 2b00 cmp r3, #0 + 1000e5a: d01f beq.n 1000e9c + 1000e5c: 0023 movs r3, r4 + 1000e5e: 3230 adds r2, #48 ; 0x30 + 1000e60: 3b40 subs r3, #64 ; 0x40 + 1000e62: 4393 bics r3, r2 + 1000e64: b29b uxth r3, r3 + 1000e66: 2b00 cmp r3, #0 + 1000e68: d018 beq.n 1000e9c + 1000e6a: 1e63 subs r3, r4, #1 + 1000e6c: 4a12 ldr r2, [pc, #72] ; (1000eb8 ) + 1000e6e: 3bff subs r3, #255 ; 0xff + 1000e70: 4213 tst r3, r2 + 1000e72: d013 beq.n 1000e9c + 1000e74: 4b11 ldr r3, [pc, #68] ; (1000ebc ) + 1000e76: 4a12 ldr r2, [pc, #72] ; (1000ec0 ) + 1000e78: 18e3 adds r3, r4, r3 + 1000e7a: 4213 tst r3, r2 + 1000e7c: d00e beq.n 1000e9c + 1000e7e: 4b11 ldr r3, [pc, #68] ; (1000ec4 ) + 1000e80: 4a11 ldr r2, [pc, #68] ; (1000ec8 ) + 1000e82: 18e3 adds r3, r4, r3 + 1000e84: 4213 tst r3, r2 + 1000e86: d009 beq.n 1000e9c + 1000e88: 4b10 ldr r3, [pc, #64] ; (1000ecc ) + 1000e8a: 4a11 ldr r2, [pc, #68] ; (1000ed0 ) + 1000e8c: 18e3 adds r3, r4, r3 + 1000e8e: 4213 tst r3, r2 + 1000e90: d004 beq.n 1000e9c + 1000e92: 4a07 ldr r2, [pc, #28] ; (1000eb0 ) + 1000e94: 218c movs r1, #140 ; 0x8c + 1000e96: 4807 ldr r0, [pc, #28] ; (1000eb4 ) + 1000e98: f7ff fb32 bl 1000500 <_assert_handler> + + if (((MGPIO->IN_LEVEL.reg[GPIOx]) & GPIO_Pin) != (uint32_t)Bit_RESET) + 1000e9c: 4b0d ldr r3, [pc, #52] ; (1000ed4 ) + 1000e9e: 3568 adds r5, #104 ; 0x68 + 1000ea0: 006d lsls r5, r5, #1 + 1000ea2: 5ae8 ldrh r0, [r5, r3] + 1000ea4: 4004 ands r4, r0 + 1000ea6: 1e60 subs r0, r4, #1 + 1000ea8: 4184 sbcs r4, r0 + 1000eaa: b2e0 uxtb r0, r4 + { + return (uint8_t)Bit_SET; + } + return (uint8_t)Bit_RESET; +} + 1000eac: bd70 pop {r4, r5, r6, pc} + 1000eae: 46c0 nop ; (mov r8, r8) + 1000eb0: 01006b80 .word 0x01006b80 + 1000eb4: 01006b21 .word 0x01006b21 + 1000eb8: 0000feff .word 0x0000feff + 1000ebc: fffffc00 .word 0xfffffc00 + 1000ec0: 0000fbff .word 0x0000fbff + 1000ec4: fffff000 .word 0xfffff000 + 1000ec8: 0000efff .word 0x0000efff + 1000ecc: ffffc000 .word 0xffffc000 + 1000ed0: 0000bfff .word 0x0000bfff + 1000ed4: 000f8700 .word 0x000f8700 + +01000ed8 : + * @brief Reads the GPIO output data(status) for byte. + * @param GPIOx: where x can be (GPIOA...GPIOE) to select the GPIO group. + * @retval GPIO output data(status). + */ +uint16_t GPIO_ReadOutputData(GPIO_TypeDef GPIOx) +{ + 1000ed8: b510 push {r4, lr} + 1000eda: 0004 movs r4, r0 + _ASSERT(IS_GPIO_PORT(GPIOx)); + 1000edc: 2804 cmp r0, #4 + 1000ede: d904 bls.n 1000eea + 1000ee0: 4a05 ldr r2, [pc, #20] ; (1000ef8 ) + 1000ee2: 219d movs r1, #157 ; 0x9d + 1000ee4: 4805 ldr r0, [pc, #20] ; (1000efc ) + 1000ee6: f7ff fb0b bl 1000500 <_assert_handler> + + return MGPIO->IN_LEVEL.reg[GPIOx]; + 1000eea: 4b05 ldr r3, [pc, #20] ; (1000f00 ) + 1000eec: 3468 adds r4, #104 ; 0x68 + 1000eee: 0064 lsls r4, r4, #1 + 1000ef0: 5ae0 ldrh r0, [r4, r3] + 1000ef2: b280 uxth r0, r0 +} + 1000ef4: bd10 pop {r4, pc} + 1000ef6: 46c0 nop ; (mov r8, r8) + 1000ef8: 01006b96 .word 0x01006b96 + 1000efc: 01006b21 .word 0x01006b21 + 1000f00: 000f8700 .word 0x000f8700 + +01000f04 : + * @param GPIOx: where x can be (GPIOA...GPIOF) to select the GPIO group. + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_15) + * @retval The output status + */ +uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin) +{ + 1000f04: b570 push {r4, r5, r6, lr} + 1000f06: 0005 movs r5, r0 + 1000f08: 000c movs r4, r1 + _ASSERT(IS_GPIO_PORT(GPIOx)); + 1000f0a: 2804 cmp r0, #4 + 1000f0c: d904 bls.n 1000f18 + 1000f0e: 4a1f ldr r2, [pc, #124] ; (1000f8c ) + 1000f10: 21ab movs r1, #171 ; 0xab + 1000f12: 481f ldr r0, [pc, #124] ; (1000f90 ) + 1000f14: f7ff faf4 bl 1000500 <_assert_handler> + _ASSERT(IS_GPIO_PIN_SINGLE(GPIO_Pin)); + 1000f18: 1e63 subs r3, r4, #1 + 1000f1a: 2b01 cmp r3, #1 + 1000f1c: d92c bls.n 1000f78 + 1000f1e: 2204 movs r2, #4 + 1000f20: 1f23 subs r3, r4, #4 + 1000f22: 4393 bics r3, r2 + 1000f24: b29b uxth r3, r3 + 1000f26: 2b00 cmp r3, #0 + 1000f28: d026 beq.n 1000f78 + 1000f2a: 0023 movs r3, r4 + 1000f2c: 320c adds r2, #12 + 1000f2e: 3b10 subs r3, #16 + 1000f30: 4393 bics r3, r2 + 1000f32: b29b uxth r3, r3 + 1000f34: 2b00 cmp r3, #0 + 1000f36: d01f beq.n 1000f78 + 1000f38: 0023 movs r3, r4 + 1000f3a: 3230 adds r2, #48 ; 0x30 + 1000f3c: 3b40 subs r3, #64 ; 0x40 + 1000f3e: 4393 bics r3, r2 + 1000f40: b29b uxth r3, r3 + 1000f42: 2b00 cmp r3, #0 + 1000f44: d018 beq.n 1000f78 + 1000f46: 1e63 subs r3, r4, #1 + 1000f48: 4a12 ldr r2, [pc, #72] ; (1000f94 ) + 1000f4a: 3bff subs r3, #255 ; 0xff + 1000f4c: 4213 tst r3, r2 + 1000f4e: d013 beq.n 1000f78 + 1000f50: 4b11 ldr r3, [pc, #68] ; (1000f98 ) + 1000f52: 4a12 ldr r2, [pc, #72] ; (1000f9c ) + 1000f54: 18e3 adds r3, r4, r3 + 1000f56: 4213 tst r3, r2 + 1000f58: d00e beq.n 1000f78 + 1000f5a: 4b11 ldr r3, [pc, #68] ; (1000fa0 ) + 1000f5c: 4a11 ldr r2, [pc, #68] ; (1000fa4 ) + 1000f5e: 18e3 adds r3, r4, r3 + 1000f60: 4213 tst r3, r2 + 1000f62: d009 beq.n 1000f78 + 1000f64: 4b10 ldr r3, [pc, #64] ; (1000fa8 ) + 1000f66: 4a11 ldr r2, [pc, #68] ; (1000fac ) + 1000f68: 18e3 adds r3, r4, r3 + 1000f6a: 4213 tst r3, r2 + 1000f6c: d004 beq.n 1000f78 + 1000f6e: 4a07 ldr r2, [pc, #28] ; (1000f8c ) + 1000f70: 21ac movs r1, #172 ; 0xac + 1000f72: 4807 ldr r0, [pc, #28] ; (1000f90 ) + 1000f74: f7ff fac4 bl 1000500 <_assert_handler> + + if (((MGPIO->IN_LEVEL.reg[GPIOx]) & GPIO_Pin) != (uint32_t)Bit_RESET) + 1000f78: 4b0d ldr r3, [pc, #52] ; (1000fb0 ) + 1000f7a: 3568 adds r5, #104 ; 0x68 + 1000f7c: 006d lsls r5, r5, #1 + 1000f7e: 5ae8 ldrh r0, [r5, r3] + 1000f80: 4004 ands r4, r0 + 1000f82: 1e60 subs r0, r4, #1 + 1000f84: 4184 sbcs r4, r0 + 1000f86: b2e0 uxtb r0, r4 + { + return (uint8_t)Bit_SET; + } + return (uint8_t)Bit_RESET; +} + 1000f88: bd70 pop {r4, r5, r6, pc} + 1000f8a: 46c0 nop ; (mov r8, r8) + 1000f8c: 01006baa .word 0x01006baa + 1000f90: 01006b21 .word 0x01006b21 + 1000f94: 0000feff .word 0x0000feff + 1000f98: fffffc00 .word 0xfffffc00 + 1000f9c: 0000fbff .word 0x0000fbff + 1000fa0: fffff000 .word 0xfffff000 + 1000fa4: 0000efff .word 0x0000efff + 1000fa8: ffffc000 .word 0xffffc000 + 1000fac: 0000bfff .word 0x0000bfff + 1000fb0: 000f8700 .word 0x000f8700 + +01000fb4 : + * @param GPIOx: where x can be (GPIOA...GPIOE) to select the GPIO group. + * @param GPIO_Pin: select the pin to reset.(GPIO_Pin_0...GPIO_Pin_15) + * @retval none + */ +void GPIO_ResetBit(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin) +{ + 1000fb4: b570 push {r4, r5, r6, lr} + 1000fb6: 0005 movs r5, r0 + 1000fb8: 000c movs r4, r1 + _ASSERT(IS_GPIO_PORT(GPIOx)); + 1000fba: 2804 cmp r0, #4 + 1000fbc: d904 bls.n 1000fc8 + 1000fbe: 4a1f ldr r2, [pc, #124] ; (100103c ) + 1000fc0: 21be movs r1, #190 ; 0xbe + 1000fc2: 481f ldr r0, [pc, #124] ; (1001040 ) + 1000fc4: f7ff fa9c bl 1000500 <_assert_handler> + _ASSERT(IS_GPIO_PIN_SINGLE(GPIO_Pin)); + 1000fc8: 1e63 subs r3, r4, #1 + 1000fca: 2b01 cmp r3, #1 + 1000fcc: d92c bls.n 1001028 + 1000fce: 2204 movs r2, #4 + 1000fd0: 1f23 subs r3, r4, #4 + 1000fd2: 4393 bics r3, r2 + 1000fd4: b29b uxth r3, r3 + 1000fd6: 2b00 cmp r3, #0 + 1000fd8: d026 beq.n 1001028 + 1000fda: 0023 movs r3, r4 + 1000fdc: 320c adds r2, #12 + 1000fde: 3b10 subs r3, #16 + 1000fe0: 4393 bics r3, r2 + 1000fe2: b29b uxth r3, r3 + 1000fe4: 2b00 cmp r3, #0 + 1000fe6: d01f beq.n 1001028 + 1000fe8: 0023 movs r3, r4 + 1000fea: 3230 adds r2, #48 ; 0x30 + 1000fec: 3b40 subs r3, #64 ; 0x40 + 1000fee: 4393 bics r3, r2 + 1000ff0: b29b uxth r3, r3 + 1000ff2: 2b00 cmp r3, #0 + 1000ff4: d018 beq.n 1001028 + 1000ff6: 1e63 subs r3, r4, #1 + 1000ff8: 4a12 ldr r2, [pc, #72] ; (1001044 ) + 1000ffa: 3bff subs r3, #255 ; 0xff + 1000ffc: 4213 tst r3, r2 + 1000ffe: d013 beq.n 1001028 + 1001000: 4b11 ldr r3, [pc, #68] ; (1001048 ) + 1001002: 4a12 ldr r2, [pc, #72] ; (100104c ) + 1001004: 18e3 adds r3, r4, r3 + 1001006: 4213 tst r3, r2 + 1001008: d00e beq.n 1001028 + 100100a: 4b11 ldr r3, [pc, #68] ; (1001050 ) + 100100c: 4a11 ldr r2, [pc, #68] ; (1001054 ) + 100100e: 18e3 adds r3, r4, r3 + 1001010: 4213 tst r3, r2 + 1001012: d009 beq.n 1001028 + 1001014: 4b10 ldr r3, [pc, #64] ; (1001058 ) + 1001016: 4a11 ldr r2, [pc, #68] ; (100105c ) + 1001018: 18e3 adds r3, r4, r3 + 100101a: 4213 tst r3, r2 + 100101c: d004 beq.n 1001028 + 100101e: 4a07 ldr r2, [pc, #28] ; (100103c ) + 1001020: 21bf movs r1, #191 ; 0xbf + 1001022: 4807 ldr r0, [pc, #28] ; (1001040 ) + 1001024: f7ff fa6c bl 1000500 <_assert_handler> + MGPIO->CTRL.reg[GPIO_GetNum(GPIOx, GPIO_Pin)] = OUTPUT_LOW; + 1001028: 0020 movs r0, r4 + 100102a: f7ff fdff bl 1000c2c + 100102e: 223e movs r2, #62 ; 0x3e + 1001030: 012d lsls r5, r5, #4 + 1001032: 4b0b ldr r3, [pc, #44] ; (1001060 ) + 1001034: 1828 adds r0, r5, r0 + 1001036: 541a strb r2, [r3, r0] +} + 1001038: bd70 pop {r4, r5, r6, pc} + 100103a: 46c0 nop ; (mov r8, r8) + 100103c: 01006bc1 .word 0x01006bc1 + 1001040: 01006b21 .word 0x01006b21 + 1001044: 0000feff .word 0x0000feff + 1001048: fffffc00 .word 0xfffffc00 + 100104c: 0000fbff .word 0x0000fbff + 1001050: fffff000 .word 0xfffff000 + 1001054: 0000efff .word 0x0000efff + 1001058: ffffc000 .word 0xffffc000 + 100105c: 0000bfff .word 0x0000bfff + 1001060: 000f8700 .word 0x000f8700 + +01001064 : + * @param GPIOx: where x can be (GPIOA...GPIOE) to select the GPIO group. + * @param GPIO_Pin: select the pin to reset.(GPIO_Pin_0...GPIO_Pin_15) + * @retval none + */ +void GPIO_ResetBits(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin) +{ + 1001064: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 1001066: 0004 movs r4, r0 + 1001068: 000d movs r5, r1 + _ASSERT(IS_GPIO_PORT(GPIOx)); + 100106a: 2804 cmp r0, #4 + 100106c: d904 bls.n 1001078 + 100106e: 4a11 ldr r2, [pc, #68] ; (10010b4 ) + 1001070: 21cb movs r1, #203 ; 0xcb + 1001072: 4811 ldr r0, [pc, #68] ; (10010b8 ) + 1001074: f7ff fa44 bl 1000500 <_assert_handler> + _ASSERT(IS_GPIO_PIN(GPIO_Pin)); + 1001078: 2d00 cmp r5, #0 + 100107a: d104 bne.n 1001086 + 100107c: 4a0d ldr r2, [pc, #52] ; (10010b4 ) + 100107e: 21cc movs r1, #204 ; 0xcc + 1001080: 480d ldr r0, [pc, #52] ; (10010b8 ) + 1001082: f7ff fa3d bl 1000500 <_assert_handler> + for(uint8_t i = 0; i < GPIO_PIN_NUM; i++) + { + if(GPIO_Pin & (BIT0<CTRL.reg[GPIO_GetNum(GPIOx, (BIT0<CTRL.reg[GPIO_GetNum(GPIOx, (BIT0< + MGPIO->CTRL.reg[GPIO_GetNum(GPIOx, (BIT0< + 10010a2: 9b01 ldr r3, [sp, #4] + 10010a4: 18c0 adds r0, r0, r3 + 10010a6: 4b05 ldr r3, [pc, #20] ; (10010bc ) + 10010a8: 541f strb r7, [r3, r0] + 10010aa: 3401 adds r4, #1 + for(uint8_t i = 0; i < GPIO_PIN_NUM; i++) + 10010ac: 2c10 cmp r4, #16 + 10010ae: d1ef bne.n 1001090 + } + } +} + 10010b0: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} + 10010b2: 46c0 nop ; (mov r8, r8) + 10010b4: 01006bcf .word 0x01006bcf + 10010b8: 01006b21 .word 0x01006b21 + 10010bc: 000f8700 .word 0x000f8700 + +010010c0 : + * @param GPIOx: where x can be (GPIOA...GPIOE) to select the GPIO group. + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_15) + * @retval none + */ +void GPIO_SetBit(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin) +{ + 10010c0: b570 push {r4, r5, r6, lr} + 10010c2: 0005 movs r5, r0 + 10010c4: 000c movs r4, r1 + _ASSERT(IS_GPIO_PORT(GPIOx)); + 10010c6: 2804 cmp r0, #4 + 10010c8: d904 bls.n 10010d4 + 10010ca: 4a1f ldr r2, [pc, #124] ; (1001148 ) + 10010cc: 21df movs r1, #223 ; 0xdf + 10010ce: 481f ldr r0, [pc, #124] ; (100114c ) + 10010d0: f7ff fa16 bl 1000500 <_assert_handler> + _ASSERT(IS_GPIO_PIN_SINGLE(GPIO_Pin)); + 10010d4: 1e63 subs r3, r4, #1 + 10010d6: 2b01 cmp r3, #1 + 10010d8: d92c bls.n 1001134 + 10010da: 2204 movs r2, #4 + 10010dc: 1f23 subs r3, r4, #4 + 10010de: 4393 bics r3, r2 + 10010e0: b29b uxth r3, r3 + 10010e2: 2b00 cmp r3, #0 + 10010e4: d026 beq.n 1001134 + 10010e6: 0023 movs r3, r4 + 10010e8: 320c adds r2, #12 + 10010ea: 3b10 subs r3, #16 + 10010ec: 4393 bics r3, r2 + 10010ee: b29b uxth r3, r3 + 10010f0: 2b00 cmp r3, #0 + 10010f2: d01f beq.n 1001134 + 10010f4: 0023 movs r3, r4 + 10010f6: 3230 adds r2, #48 ; 0x30 + 10010f8: 3b40 subs r3, #64 ; 0x40 + 10010fa: 4393 bics r3, r2 + 10010fc: b29b uxth r3, r3 + 10010fe: 2b00 cmp r3, #0 + 1001100: d018 beq.n 1001134 + 1001102: 1e63 subs r3, r4, #1 + 1001104: 4a12 ldr r2, [pc, #72] ; (1001150 ) + 1001106: 3bff subs r3, #255 ; 0xff + 1001108: 4213 tst r3, r2 + 100110a: d013 beq.n 1001134 + 100110c: 4b11 ldr r3, [pc, #68] ; (1001154 ) + 100110e: 4a12 ldr r2, [pc, #72] ; (1001158 ) + 1001110: 18e3 adds r3, r4, r3 + 1001112: 4213 tst r3, r2 + 1001114: d00e beq.n 1001134 + 1001116: 4b11 ldr r3, [pc, #68] ; (100115c ) + 1001118: 4a11 ldr r2, [pc, #68] ; (1001160 ) + 100111a: 18e3 adds r3, r4, r3 + 100111c: 4213 tst r3, r2 + 100111e: d009 beq.n 1001134 + 1001120: 4b10 ldr r3, [pc, #64] ; (1001164 ) + 1001122: 4a11 ldr r2, [pc, #68] ; (1001168 ) + 1001124: 18e3 adds r3, r4, r3 + 1001126: 4213 tst r3, r2 + 1001128: d004 beq.n 1001134 + 100112a: 4a07 ldr r2, [pc, #28] ; (1001148 ) + 100112c: 21e0 movs r1, #224 ; 0xe0 + 100112e: 4807 ldr r0, [pc, #28] ; (100114c ) + 1001130: f7ff f9e6 bl 1000500 <_assert_handler> + MGPIO->CTRL.reg[GPIO_GetNum(GPIOx, GPIO_Pin)] = OUTPUT_HIGH; + 1001134: 0020 movs r0, r4 + 1001136: f7ff fd79 bl 1000c2c + 100113a: 223f movs r2, #63 ; 0x3f + 100113c: 012d lsls r5, r5, #4 + 100113e: 4b0b ldr r3, [pc, #44] ; (100116c ) + 1001140: 1828 adds r0, r5, r0 + 1001142: 541a strb r2, [r3, r0] +} + 1001144: bd70 pop {r4, r5, r6, pc} + 1001146: 46c0 nop ; (mov r8, r8) + 1001148: 01006bde .word 0x01006bde + 100114c: 01006b21 .word 0x01006b21 + 1001150: 0000feff .word 0x0000feff + 1001154: fffffc00 .word 0xfffffc00 + 1001158: 0000fbff .word 0x0000fbff + 100115c: fffff000 .word 0xfffff000 + 1001160: 0000efff .word 0x0000efff + 1001164: ffffc000 .word 0xffffc000 + 1001168: 0000bfff .word 0x0000bfff + 100116c: 000f8700 .word 0x000f8700 + +01001170 : + * @param GPIOx: where x can be (GPIOA...GPIOE) to select the GPIO group. + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_15) + * @retval none + */ +void GPIO_SetBits(GPIO_TypeDef GPIOx, uint16_t GPIO_Pin) +{ + 1001170: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 1001172: 0004 movs r4, r0 + 1001174: 000d movs r5, r1 + _ASSERT(IS_GPIO_PORT(GPIOx)); + 1001176: 2804 cmp r0, #4 + 1001178: d904 bls.n 1001184 + 100117a: 4a11 ldr r2, [pc, #68] ; (10011c0 ) + 100117c: 21ed movs r1, #237 ; 0xed + 100117e: 4811 ldr r0, [pc, #68] ; (10011c4 ) + 1001180: f7ff f9be bl 1000500 <_assert_handler> + _ASSERT(IS_GPIO_PIN(GPIO_Pin)); + 1001184: 2d00 cmp r5, #0 + 1001186: d104 bne.n 1001192 + 1001188: 4a0d ldr r2, [pc, #52] ; (10011c0 ) + 100118a: 21ee movs r1, #238 ; 0xee + 100118c: 480d ldr r0, [pc, #52] ; (10011c4 ) + 100118e: f7ff f9b7 bl 1000500 <_assert_handler> + for(uint8_t i = 0; i < GPIO_PIN_NUM; i++) + { + if(GPIO_Pin & (BIT0<CTRL.reg[GPIO_GetNum(GPIOx, (BIT0<CTRL.reg[GPIO_GetNum(GPIOx, (BIT0< + MGPIO->CTRL.reg[GPIO_GetNum(GPIOx, (BIT0< + 10011ae: 9b01 ldr r3, [sp, #4] + 10011b0: 18c0 adds r0, r0, r3 + 10011b2: 4b05 ldr r3, [pc, #20] ; (10011c8 ) + 10011b4: 541f strb r7, [r3, r0] + 10011b6: 3401 adds r4, #1 + for(uint8_t i = 0; i < GPIO_PIN_NUM; i++) + 10011b8: 2c10 cmp r4, #16 + 10011ba: d1ef bne.n 100119c + } + } +} + 10011bc: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} + 10011be: 46c0 nop ; (mov r8, r8) + 10011c0: 01006bea .word 0x01006bea + 10011c4: 01006b21 .word 0x01006b21 + 10011c8: 000f8700 .word 0x000f8700 + +010011cc : + * @param GPIOx: where x can be (GPIOA...GPIOE) to select the GPIO group. + * @param value: select the value to read.(0 or 1) + * @retval none + */ +void GPIO_Write(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin) +{ + 10011cc: b570 push {r4, r5, r6, lr} + 10011ce: 0005 movs r5, r0 + 10011d0: 000c movs r4, r1 + _ASSERT(IS_GPIO_PORT(GPIOx)); + 10011d2: 2804 cmp r0, #4 + 10011d4: d905 bls.n 10011e2 + 10011d6: 2102 movs r1, #2 + 10011d8: 4a0b ldr r2, [pc, #44] ; (1001208 ) + 10011da: 31ff adds r1, #255 ; 0xff + 10011dc: 480b ldr r0, [pc, #44] ; (100120c ) + 10011de: f7ff f98f bl 1000500 <_assert_handler> + _ASSERT(IS_GPIO_PIN(GPIO_Pin)); + 10011e2: 2c00 cmp r4, #0 + 10011e4: d105 bne.n 10011f2 + 10011e6: 2181 movs r1, #129 ; 0x81 + 10011e8: 4a07 ldr r2, [pc, #28] ; (1001208 ) + 10011ea: 0049 lsls r1, r1, #1 + 10011ec: 4807 ldr r0, [pc, #28] ; (100120c ) + 10011ee: f7ff f987 bl 1000500 <_assert_handler> + GPIO_SetBits(GPIOx, GPIO_Pin); + 10011f2: 0028 movs r0, r5 + 10011f4: 0021 movs r1, r4 + 10011f6: f7ff ffbb bl 1001170 + GPIO_ResetBits(GPIOx, (GPIO_Pin_TypeDef)(~GPIO_Pin)); + 10011fa: 43e1 mvns r1, r4 + 10011fc: 0028 movs r0, r5 + 10011fe: b289 uxth r1, r1 + 1001200: f7ff ff30 bl 1001064 +} + 1001204: bd70 pop {r4, r5, r6, pc} + 1001206: 46c0 nop ; (mov r8, r8) + 1001208: 01006bf7 .word 0x01006bf7 + 100120c: 01006b21 .word 0x01006b21 + +01001210 : + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_15) + * @param BitVal: select the value to read.(0 or 1) + * @retval none + */ +void GPIO_WriteBit(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin, BitAction BitVal) +{ + 1001210: b570 push {r4, r5, r6, lr} + 1001212: 0005 movs r5, r0 + 1001214: 000c movs r4, r1 + 1001216: 0016 movs r6, r2 + _ASSERT(IS_GPIO_PORT(GPIOx)); + 1001218: 2804 cmp r0, #4 + 100121a: d905 bls.n 1001228 + 100121c: 2112 movs r1, #18 + 100121e: 4a22 ldr r2, [pc, #136] ; (10012a8 ) + 1001220: 31ff adds r1, #255 ; 0xff + 1001222: 4822 ldr r0, [pc, #136] ; (10012ac ) + 1001224: f7ff f96c bl 1000500 <_assert_handler> + _ASSERT(IS_GPIO_PIN_SINGLE(GPIO_Pin)); + 1001228: 1e63 subs r3, r4, #1 + 100122a: 2b01 cmp r3, #1 + 100122c: d92d bls.n 100128a + 100122e: 2204 movs r2, #4 + 1001230: 1f23 subs r3, r4, #4 + 1001232: 4393 bics r3, r2 + 1001234: b29b uxth r3, r3 + 1001236: 2b00 cmp r3, #0 + 1001238: d027 beq.n 100128a + 100123a: 0023 movs r3, r4 + 100123c: 320c adds r2, #12 + 100123e: 3b10 subs r3, #16 + 1001240: 4393 bics r3, r2 + 1001242: b29b uxth r3, r3 + 1001244: 2b00 cmp r3, #0 + 1001246: d020 beq.n 100128a + 1001248: 0023 movs r3, r4 + 100124a: 3230 adds r2, #48 ; 0x30 + 100124c: 3b40 subs r3, #64 ; 0x40 + 100124e: 4393 bics r3, r2 + 1001250: b29b uxth r3, r3 + 1001252: 2b00 cmp r3, #0 + 1001254: d019 beq.n 100128a + 1001256: 1e63 subs r3, r4, #1 + 1001258: 4a15 ldr r2, [pc, #84] ; (10012b0 ) + 100125a: 3bff subs r3, #255 ; 0xff + 100125c: 4213 tst r3, r2 + 100125e: d014 beq.n 100128a + 1001260: 4b14 ldr r3, [pc, #80] ; (10012b4 ) + 1001262: 4a15 ldr r2, [pc, #84] ; (10012b8 ) + 1001264: 18e3 adds r3, r4, r3 + 1001266: 4213 tst r3, r2 + 1001268: d00f beq.n 100128a + 100126a: 4b14 ldr r3, [pc, #80] ; (10012bc ) + 100126c: 4a14 ldr r2, [pc, #80] ; (10012c0 ) + 100126e: 18e3 adds r3, r4, r3 + 1001270: 4213 tst r3, r2 + 1001272: d00a beq.n 100128a + 1001274: 4b13 ldr r3, [pc, #76] ; (10012c4 ) + 1001276: 4a14 ldr r2, [pc, #80] ; (10012c8 ) + 1001278: 18e3 adds r3, r4, r3 + 100127a: 4213 tst r3, r2 + 100127c: d005 beq.n 100128a + 100127e: 2189 movs r1, #137 ; 0x89 + 1001280: 4a09 ldr r2, [pc, #36] ; (10012a8 ) + 1001282: 0049 lsls r1, r1, #1 + 1001284: 4809 ldr r0, [pc, #36] ; (10012ac ) + 1001286: f7ff f93b bl 1000500 <_assert_handler> + + if (BitVal == Bit_SET) + 100128a: 2e01 cmp r6, #1 + 100128c: d104 bne.n 1001298 + GPIO_SetBit(GPIOx, GPIO_Pin); + 100128e: 0021 movs r1, r4 + 1001290: 0028 movs r0, r5 + 1001292: f7ff ff15 bl 10010c0 + else if (BitVal == Bit_RESET) + GPIO_ResetBit(GPIOx, GPIO_Pin); +} + 1001296: bd70 pop {r4, r5, r6, pc} + else if (BitVal == Bit_RESET) + 1001298: 2e00 cmp r6, #0 + 100129a: d1fc bne.n 1001296 + GPIO_ResetBit(GPIOx, GPIO_Pin); + 100129c: 0021 movs r1, r4 + 100129e: 0028 movs r0, r5 + 10012a0: f7ff fe88 bl 1000fb4 +} + 10012a4: e7f7 b.n 1001296 + 10012a6: 46c0 nop ; (mov r8, r8) + 10012a8: 01006c02 .word 0x01006c02 + 10012ac: 01006b21 .word 0x01006b21 + 10012b0: 0000feff .word 0x0000feff + 10012b4: fffffc00 .word 0xfffffc00 + 10012b8: 0000fbff .word 0x0000fbff + 10012bc: fffff000 .word 0xfffff000 + 10012c0: 0000efff .word 0x0000efff + 10012c4: ffffc000 .word 0xffffc000 + 10012c8: 0000bfff .word 0x0000bfff + +010012cc : + * @param GPIO_Pin: select the pin to read.(GPIO_Pin_0...GPIO_Pin_15) + * @param Drvtype: select the value to set DRV value.(0x00....0x11) + * @retval none + */ +void GPIO_ODSet(GPIO_OD_TypeDef GPIOx_OD, GPIO_ODTypeDef GPIO_OD_Set) +{ + 10012cc: b570 push {r4, r5, r6, lr} + 10012ce: 0005 movs r5, r0 + 10012d0: 000c movs r4, r1 + _ASSERT(IS_GPIO_OD(GPIOx_OD)); + 10012d2: 2807 cmp r0, #7 + 10012d4: d905 bls.n 10012e2 + 10012d6: 2126 movs r1, #38 ; 0x26 + 10012d8: 4a09 ldr r2, [pc, #36] ; (1001300 ) + 10012da: 31ff adds r1, #255 ; 0xff + 10012dc: 4809 ldr r0, [pc, #36] ; (1001304 ) + 10012de: f7ff f90f bl 1000500 <_assert_handler> + _ASSERT(IS_GPIO_MODE_OUT(GPIO_OD_Set)); + 10012e2: 2c01 cmp r4, #1 + 10012e4: d905 bls.n 10012f2 + 10012e6: 2193 movs r1, #147 ; 0x93 + 10012e8: 4a05 ldr r2, [pc, #20] ; (1001300 ) + 10012ea: 0049 lsls r1, r1, #1 + 10012ec: 4805 ldr r0, [pc, #20] ; (1001304 ) + 10012ee: f7ff f907 bl 1000500 <_assert_handler> + + (MGPIO->OD_CTRL.reg) |= (GPIO_OD_Set << GPIOx_OD); + 10012f2: 40ac lsls r4, r5 + 10012f4: 4b04 ldr r3, [pc, #16] ; (1001308 ) + 10012f6: 781a ldrb r2, [r3, #0] + 10012f8: 4314 orrs r4, r2 + 10012fa: b2e4 uxtb r4, r4 + 10012fc: 701c strb r4, [r3, #0] +} + 10012fe: bd70 pop {r4, r5, r6, pc} + 1001300: 01006c10 .word 0x01006c10 + 1001304: 01006b21 .word 0x01006b21 + 1001308: 000f87e0 .word 0x000f87e0 + +0100130c : + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SYSCTRL_AHBPeriphClockCmd(uint32_t SYSCTRL_AHBPeriph, FunctionalState NewState) +{ + _ASSERT(IS_SYSCTRL_AHB_PERIPH(SYSCTRL_AHBPeriph)); + 100130c: 4b0a ldr r3, [pc, #40] ; (1001338 ) +{ + 100130e: b570 push {r4, r5, r6, lr} + 1001310: 0004 movs r4, r0 + 1001312: 000d movs r5, r1 + _ASSERT(IS_SYSCTRL_AHB_PERIPH(SYSCTRL_AHBPeriph)); + 1001314: 4218 tst r0, r3 + 1001316: d104 bne.n 1001322 + 1001318: 4a08 ldr r2, [pc, #32] ; (100133c ) + 100131a: 2131 movs r1, #49 ; 0x31 + 100131c: 4808 ldr r0, [pc, #32] ; (1001340 ) + 100131e: f7ff f8ef bl 1000500 <_assert_handler> + 1001322: 4b08 ldr r3, [pc, #32] ; (1001344 ) + + if (DISABLE == NewState) + { + MRCC->CLK_EN.reg |= SYSCTRL_AHBPeriph; + 1001324: 68da ldr r2, [r3, #12] + if (DISABLE == NewState) + 1001326: 2d00 cmp r5, #0 + 1001328: d102 bne.n 1001330 + MRCC->CLK_EN.reg |= SYSCTRL_AHBPeriph; + 100132a: 4314 orrs r4, r2 + 100132c: 60dc str r4, [r3, #12] + } + else + { + MRCC->CLK_EN.reg &= ~SYSCTRL_AHBPeriph; + } +} + 100132e: bd70 pop {r4, r5, r6, pc} + MRCC->CLK_EN.reg &= ~SYSCTRL_AHBPeriph; + 1001330: 43a2 bics r2, r4 + 1001332: 60da str r2, [r3, #12] +} + 1001334: e7fb b.n 100132e + 1001336: 46c0 nop ; (mov r8, r8) + 1001338: 01ffcfcc .word 0x01ffcfcc + 100133c: 01006c64 .word 0x01006c64 + 1001340: 01006c1b .word 0x01006c1b + 1001344: 000f8400 .word 0x000f8400 + +01001348 : + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SYSCTRL_APBPeriphClockCmd(uint32_t SYSCTRL_APBPeriph, FunctionalState NewState) +{ + _ASSERT(IS_SYSCTRL_APB_PERIPH(SYSCTRL_APBPeriph)); + 1001348: 4b0a ldr r3, [pc, #40] ; (1001374 ) +{ + 100134a: b570 push {r4, r5, r6, lr} + 100134c: 0004 movs r4, r0 + 100134e: 000d movs r5, r1 + _ASSERT(IS_SYSCTRL_APB_PERIPH(SYSCTRL_APBPeriph)); + 1001350: 4218 tst r0, r3 + 1001352: d104 bne.n 100135e + 1001354: 4a08 ldr r2, [pc, #32] ; (1001378 ) + 1001356: 214d movs r1, #77 ; 0x4d + 1001358: 4808 ldr r0, [pc, #32] ; (100137c ) + 100135a: f7ff f8d1 bl 1000500 <_assert_handler> + 100135e: 4b08 ldr r3, [pc, #32] ; (1001380 ) + + if (DISABLE == NewState) + { + MRCC->CLK_EN.reg |= SYSCTRL_APBPeriph; + 1001360: 68da ldr r2, [r3, #12] + if (DISABLE == NewState) + 1001362: 2d00 cmp r5, #0 + 1001364: d102 bne.n 100136c + MRCC->CLK_EN.reg |= SYSCTRL_APBPeriph; + 1001366: 4314 orrs r4, r2 + 1001368: 60dc str r4, [r3, #12] + } + else + { + MRCC->CLK_EN.reg &= ~SYSCTRL_APBPeriph; + } +} + 100136a: bd70 pop {r4, r5, r6, pc} + MRCC->CLK_EN.reg &= ~SYSCTRL_APBPeriph; + 100136c: 43a2 bics r2, r4 + 100136e: 60da str r2, [r3, #12] +} + 1001370: e7fb b.n 100136a + 1001372: 46c0 nop ; (mov r8, r8) + 1001374: 00003030 .word 0x00003030 + 1001378: 01006c7e .word 0x01006c7e + 100137c: 01006c1b .word 0x01006c1b + 1001380: 000f8400 .word 0x000f8400 + +01001384 : + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SYSCTRL_RVPeriphClockCmd(uint32_t SYSCTRL_RVPeriph, FunctionalState NewState) +{ + _ASSERT(IS_SYSCTRL_RV_PERIPH(SYSCTRL_RVPeriph)); + 1001384: 4b0a ldr r3, [pc, #40] ; (10013b0 ) +{ + 1001386: b570 push {r4, r5, r6, lr} + 1001388: 0004 movs r4, r0 + 100138a: 000d movs r5, r1 + _ASSERT(IS_SYSCTRL_RV_PERIPH(SYSCTRL_RVPeriph)); + 100138c: 4218 tst r0, r3 + 100138e: d104 bne.n 100139a + 1001390: 4a08 ldr r2, [pc, #32] ; (10013b4 ) + 1001392: 2169 movs r1, #105 ; 0x69 + 1001394: 4808 ldr r0, [pc, #32] ; (10013b8 ) + 1001396: f7ff f8b3 bl 1000500 <_assert_handler> + 100139a: 4b08 ldr r3, [pc, #32] ; (10013bc ) + + if (DISABLE == NewState) + { + MRCC->CLK_EN.reg |= SYSCTRL_RVPeriph; + 100139c: 68da ldr r2, [r3, #12] + if (DISABLE == NewState) + 100139e: 2d00 cmp r5, #0 + 10013a0: d102 bne.n 10013a8 + MRCC->CLK_EN.reg |= SYSCTRL_RVPeriph; + 10013a2: 4314 orrs r4, r2 + 10013a4: 60dc str r4, [r3, #12] + } + else + { + MRCC->CLK_EN.reg &= ~SYSCTRL_RVPeriph; + } +} + 10013a6: bd70 pop {r4, r5, r6, pc} + MRCC->CLK_EN.reg &= ~SYSCTRL_RVPeriph; + 10013a8: 43a2 bics r2, r4 + 10013aa: 60da str r2, [r3, #12] +} + 10013ac: e7fb b.n 10013a6 + 10013ae: 46c0 nop ; (mov r8, r8) + 10013b0: 00003030 .word 0x00003030 + 10013b4: 01006c98 .word 0x01006c98 + 10013b8: 01006c1b .word 0x01006c1b + 10013bc: 000f8400 .word 0x000f8400 + +010013c0 : + * @param NewState: new state of the specified peripheral clock. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SYSCTRL_RC48MPeriphClockCmd(FunctionalState NewState) +{ + 10013c0: 4b06 ldr r3, [pc, #24] ; (10013dc ) + if (DISABLE == NewState) + 10013c2: 2800 cmp r0, #0 + 10013c4: d105 bne.n 10013d2 + { + MRCC->CLK_EN.reg |= SYSCTRL_RC48MMPeriph; + 10013c6: 2280 movs r2, #128 ; 0x80 + 10013c8: 68d9 ldr r1, [r3, #12] + 10013ca: 0592 lsls r2, r2, #22 + 10013cc: 430a orrs r2, r1 + } + else + { + MRCC->CLK_EN.reg &= ~SYSCTRL_RC48MMPeriph; + 10013ce: 60da str r2, [r3, #12] + } +} + 10013d0: 4770 bx lr + MRCC->CLK_EN.reg &= ~SYSCTRL_RC48MMPeriph; + 10013d2: 68da ldr r2, [r3, #12] + 10013d4: 4902 ldr r1, [pc, #8] ; (10013e0 ) + 10013d6: 400a ands r2, r1 + 10013d8: e7f9 b.n 10013ce + 10013da: 46c0 nop ; (mov r8, r8) + 10013dc: 000f8400 .word 0x000f8400 + 10013e0: dfffffff .word 0xdfffffff + +010013e4 : + * This parameter can be: RC192_48M, HSI48M or HSE48M. + * @retval None + */ +void SYSCTRL_HCLKPeriphSelect(uint32_t Periph, HCLK_Select Select) +{ + _ASSERT(IS_SYSCTRL_AHB_PERIPH(Periph)); + 10013e4: 4b14 ldr r3, [pc, #80] ; (1001438 ) +{ + 10013e6: b570 push {r4, r5, r6, lr} + 10013e8: 0005 movs r5, r0 + 10013ea: 000c movs r4, r1 + _ASSERT(IS_SYSCTRL_AHB_PERIPH(Periph)); + 10013ec: 4218 tst r0, r3 + 10013ee: d104 bne.n 10013fa + 10013f0: 4a12 ldr r2, [pc, #72] ; (100143c ) + 10013f2: 2196 movs r1, #150 ; 0x96 + 10013f4: 4812 ldr r0, [pc, #72] ; (1001440 ) + 10013f6: f7ff f883 bl 1000500 <_assert_handler> + _ASSERT(IS_SYSCTRL_HCLK_SELECT(Select)); + 10013fa: 2c02 cmp r4, #2 + 10013fc: d904 bls.n 1001408 + 10013fe: 4a0f ldr r2, [pc, #60] ; (100143c ) + 1001400: 2197 movs r1, #151 ; 0x97 + 1001402: 480f ldr r0, [pc, #60] ; (1001440 ) + 1001404: f7ff f87c bl 1000500 <_assert_handler> + + if (SYSCTRL_AHBPeriph_UART == Periph) + 1001408: 2380 movs r3, #128 ; 0x80 + 100140a: 021b lsls r3, r3, #8 + 100140c: 429d cmp r5, r3 + 100140e: d109 bne.n 1001424 + { + MRCC->HCLK_CTRL.bit.UART_SEL = Select; + 1001410: 2303 movs r3, #3 + 1001412: 4a0c ldr r2, [pc, #48] ; (1001444 ) + 1001414: 4023 ands r3, r4 + 1001416: 8814 ldrh r4, [r2, #0] + 1001418: 039b lsls r3, r3, #14 + 100141a: 04a4 lsls r4, r4, #18 + 100141c: 0ca4 lsrs r4, r4, #18 + } + else if (SYSCTRL_AHBPeriph_USB == Periph) + { + MRCC->HCLK_CTRL.bit.USB_SEL = Select; + 100141e: 431c orrs r4, r3 + 1001420: 8014 strh r4, [r2, #0] + } +} + 1001422: bd70 pop {r4, r5, r6, pc} + else if (SYSCTRL_AHBPeriph_USB == Periph) + 1001424: 2d40 cmp r5, #64 ; 0x40 + 1001426: d1fc bne.n 1001422 + MRCC->HCLK_CTRL.bit.USB_SEL = Select; + 1001428: 2303 movs r3, #3 + 100142a: 4a06 ldr r2, [pc, #24] ; (1001444 ) + 100142c: 401c ands r4, r3 + 100142e: 4906 ldr r1, [pc, #24] ; (1001448 ) + 1001430: 8813 ldrh r3, [r2, #0] + 1001432: 0324 lsls r4, r4, #12 + 1001434: 400b ands r3, r1 + 1001436: e7f2 b.n 100141e + 1001438: 01ffcfcc .word 0x01ffcfcc + 100143c: 01006cb1 .word 0x01006cb1 + 1001440: 01006c1b .word 0x01006c1b + 1001444: 000f8400 .word 0x000f8400 + 1001448: ffffcfff .word 0xffffcfff + +0100144c : + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SYSCTRL_MCUClkRandCmd(FunctionalState NewState) +{ + MRCC->MCU_CLK.bit.RAND_EN = NewState; + 100144c: 2201 movs r2, #1 + 100144e: 4002 ands r2, r0 + 1001450: 2020 movs r0, #32 + 1001452: 4904 ldr r1, [pc, #16] ; (1001464 ) + 1001454: 0152 lsls r2, r2, #5 + 1001456: 690b ldr r3, [r1, #16] + 1001458: 4383 bics r3, r0 + 100145a: 0018 movs r0, r3 + 100145c: 4310 orrs r0, r2 + 100145e: 6108 str r0, [r1, #16] +} + 1001460: 4770 bx lr + 1001462: 46c0 nop ; (mov r8, r8) + 1001464: 000f8400 .word 0x000f8400 + +01001468 : + * @param randmask: 0x0~0xf + * @retval None + */ +void SYSCTRL_MCUClkRandMask(uint8_t randmask) +{ + _ASSERT(IS_SYSCTRL_MCU_RANDMASK(randmask)); + 1001468: 230f movs r3, #15 + 100146a: 0002 movs r2, r0 +{ + 100146c: b510 push {r4, lr} + _ASSERT(IS_SYSCTRL_MCU_RANDMASK(randmask)); + 100146e: 439a bics r2, r3 +{ + 1001470: 0004 movs r4, r0 + _ASSERT(IS_SYSCTRL_MCU_RANDMASK(randmask)); + 1001472: 2a00 cmp r2, #0 + 1001474: d004 beq.n 1001480 + 1001476: 4a07 ldr r2, [pc, #28] ; (1001494 ) + 1001478: 21b7 movs r1, #183 ; 0xb7 + 100147a: 4807 ldr r0, [pc, #28] ; (1001498 ) + 100147c: f7ff f840 bl 1000500 <_assert_handler> + + MRCC->MCU_CLK.bit.RAND_MASK = randmask; + 1001480: 210f movs r1, #15 + 1001482: 4a06 ldr r2, [pc, #24] ; (100149c ) + 1001484: 400c ands r4, r1 + 1001486: 6913 ldr r3, [r2, #16] + 1001488: 4905 ldr r1, [pc, #20] ; (10014a0 ) + 100148a: 0624 lsls r4, r4, #24 + 100148c: 400b ands r3, r1 + 100148e: 431c orrs r4, r3 + 1001490: 6114 str r4, [r2, #16] +} + 1001492: bd10 pop {r4, pc} + 1001494: 01006cca .word 0x01006cca + 1001498: 01006c1b .word 0x01006c1b + 100149c: 000f8400 .word 0x000f8400 + 10014a0: f0ffffff .word 0xf0ffffff + +010014a4 : + * @arg PLL_HSE + * @param PLLChanel: + * @retval None + */ +void SYSCTRL_PLLFreqConfig(uint8_t PllSource,uint8_t PllFreq) +{ + 10014a4: 4b08 ldr r3, [pc, #32] ; (10014c8 ) + 10014a6: 2204 movs r2, #4 + if(PllSource == PLL_HSE) + 10014a8: 2805 cmp r0, #5 + 10014aa: d106 bne.n 10014ba + { + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_RSTN = RESET; + 10014ac: 6899 ldr r1, [r3, #8] + 10014ae: 4391 bics r1, r2 + 10014b0: 6099 str r1, [r3, #8] + + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_RSTN = SET; + 10014b2: 6899 ldr r1, [r3, #8] + 10014b4: 430a orrs r2, r1 + 10014b6: 609a str r2, [r3, #8] + { + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_RSTN = RESET; + + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_RSTN = SET; + } +} + 10014b8: 4770 bx lr + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_RSTN = RESET; + 10014ba: 6959 ldr r1, [r3, #20] + 10014bc: 4391 bics r1, r2 + 10014be: 6159 str r1, [r3, #20] + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_RSTN = SET; + 10014c0: 6959 ldr r1, [r3, #20] + 10014c2: 430a orrs r2, r1 + 10014c4: 615a str r2, [r3, #20] +} + 10014c6: e7f7 b.n 10014b8 + 10014c8: 000fb210 .word 0x000fb210 + +010014cc : + * @brief pll input frequency config + * @param OscFreq: input osc clk freq + * @retval None + */ +void SYSCTRL_PLLCrystalConfig(SYSCTRL_PLLCrystal_TypeDef Mode,uint32_t OscFreq) +{ + 10014cc: b570 push {r4, r5, r6, lr} + 10014ce: 000c movs r4, r1 + 10014d0: 0005 movs r5, r0 + uint8_t BBpllDivrInt = 0; + uint32_t BBpllDivrFrac = 0; + uint32_t BBpllFreq = CLOCK_FRE_384M; + /*open xtal*/ + BPU_Init(); + 10014d2: f001 fbb1 bl 1002c38 + MLPM ->OSC_XTAL.bit.OSC_XTAL_EN = SET; + 10014d6: 2280 movs r2, #128 ; 0x80 + 10014d8: 4b1f ldr r3, [pc, #124] ; (1001558 ) + 10014da: 01d2 lsls r2, r2, #7 + 10014dc: 8899 ldrh r1, [r3, #4] + 10014de: 430a orrs r2, r1 + 10014e0: 809a strh r2, [r3, #4] + MLPM ->OSC_XTAL.bit.OSC_XTAL_EN_REG = SET; + 10014e2: 2280 movs r2, #128 ; 0x80 + 10014e4: 8899 ldrh r1, [r3, #4] + 10014e6: 0192 lsls r2, r2, #6 + 10014e8: 430a orrs r2, r1 + 10014ea: 809a strh r2, [r3, #4] + + if(Mode == XTAL_MODE) + { + MLPM ->OSC_XTAL.bit.OSC_XTAL_REF_MODE_EN = RESET; + 10014ec: 8899 ldrh r1, [r3, #4] + 10014ee: 2201 movs r2, #1 + if(Mode == XTAL_MODE) + 10014f0: 2d00 cmp r5, #0 + 10014f2: d12d bne.n 1001550 + MLPM ->OSC_XTAL.bit.OSC_XTAL_REF_MODE_EN = RESET; + 10014f4: 4391 bics r1, r2 + 10014f6: 8099 strh r1, [r3, #4] + { + MLPM ->OSC_XTAL.bit.OSC_XTAL_REF_MODE_EN = SET; + } + + BBpllDivrInt = BBpllFreq/OscFreq; + OscFreq /= CLOCK_FRE_BASE; + 10014f8: 4918 ldr r1, [pc, #96] ; (100155c ) + 10014fa: 0020 movs r0, r4 + 10014fc: f005 f83a bl 1006574 <__udivsi3> + 1001500: 0001 movs r1, r0 + BBpllDivrFrac = BBpllFreq / OscFreq; + 1001502: 4817 ldr r0, [pc, #92] ; (1001560 ) + 1001504: f005 f836 bl 1006574 <__udivsi3> + BBpllDivrFrac %= CLOCK_FRE_BASE; + 1001508: 4914 ldr r1, [pc, #80] ; (100155c ) + 100150a: f005 f8b9 bl 1006680 <__aeabi_uidivmod> + BBpllDivrInt = BBpllFreq/OscFreq; + 100150e: 4814 ldr r0, [pc, #80] ; (1001560 ) + BBpllDivrFrac %= CLOCK_FRE_BASE; + 1001510: 000d movs r5, r1 + BBpllDivrInt = BBpllFreq/OscFreq; + 1001512: 0021 movs r1, r4 + 1001514: f005 f82e bl 1006574 <__udivsi3> + BBpllDivrFrac /= 10000; + ANA_BBPLL->BBPLL1_CTRL2.bit.BBPLL1_DIVR_INT = BBpllDivrInt; + 1001518: 223f movs r2, #63 ; 0x3f + 100151a: 4c12 ldr r4, [pc, #72] ; (1001564 ) + 100151c: 4002 ands r2, r0 + 100151e: 68a3 ldr r3, [r4, #8] + 1001520: 4811 ldr r0, [pc, #68] ; (1001568 ) + 1001522: 0412 lsls r2, r2, #16 + 1001524: 4018 ands r0, r3 + 1001526: 4310 orrs r0, r2 + 1001528: 60a0 str r0, [r4, #8] + BBpllDivrFrac /= 10000; + 100152a: 4910 ldr r1, [pc, #64] ; (100156c ) + 100152c: 0028 movs r0, r5 + 100152e: f005 f821 bl 1006574 <__udivsi3> + // ANA_BBPLL->BBPLL1_CTRL1.bit.BBPLL1_DIVR_FRAC = BBpllDivrFrac; + ANA_BBPLL->BBPLL1_CTRL1.bit.BBPLL1_DIVR_FRAC = BBpllDivrFrac*(1 << 24)/100; + 1001532: 2164 movs r1, #100 ; 0x64 + 1001534: 0600 lsls r0, r0, #24 + 1001536: f005 f81d bl 1006574 <__udivsi3> + 100153a: 6863 ldr r3, [r4, #4] + 100153c: 0200 lsls r0, r0, #8 + 100153e: 0a02 lsrs r2, r0, #8 + 1001540: 0e18 lsrs r0, r3, #24 + 1001542: 0600 lsls r0, r0, #24 + 1001544: 4310 orrs r0, r2 + 1001546: 6060 str r0, [r4, #4] + delay_us(5); + 1001548: 2005 movs r0, #5 + 100154a: f001 f979 bl 1002840 +} + 100154e: bd70 pop {r4, r5, r6, pc} + MLPM ->OSC_XTAL.bit.OSC_XTAL_REF_MODE_EN = SET; + 1001550: 430a orrs r2, r1 + 1001552: 809a strh r2, [r3, #4] + 1001554: e7d0 b.n 10014f8 + 1001556: 46c0 nop ; (mov r8, r8) + 1001558: 000fa800 .word 0x000fa800 + 100155c: 000f4240 .word 0x000f4240 + 1001560: 16e36000 .word 0x16e36000 + 1001564: 000fb210 .word 0x000fb210 + 1001568: ffc0ffff .word 0xffc0ffff + 100156c: 00002710 .word 0x00002710 + +01001570 : + * @param PLLChanel: + * @arg pll channel input selection for SYSCTRL_PLLChannel_TypeDef. + * @retval None + */ +void SYSCTRL_PLLOpen(uint8_t PllSource,uint8_t PLLChannel) +{ + 1001570: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 1001572: 0007 movs r7, r0 + 1001574: 000e movs r6, r1 + _ASSERT(IS_SYSCTRL_PLL_SEL(PllSource)); + 1001576: 28aa cmp r0, #170 ; 0xaa + 1001578: d009 beq.n 100158e + 100157a: 280a cmp r0, #10 + 100157c: d007 beq.n 100158e + 100157e: 2805 cmp r0, #5 + 1001580: d005 beq.n 100158e + 1001582: 210a movs r1, #10 + 1001584: 4a50 ldr r2, [pc, #320] ; (10016c8 ) + 1001586: 31ff adds r1, #255 ; 0xff + 1001588: 4850 ldr r0, [pc, #320] ; (10016cc ) + 100158a: f7fe ffb9 bl 1000500 <_assert_handler> + + /*default config dpll1 hse input dpll2 hsi rc input*/ + ANA_BBPLL ->BBPLL_CTRL.bit.BBPLL_CKIN_SEL = RESET; + 100158e: 4c50 ldr r4, [pc, #320] ; (10016d0 ) + 1001590: 4a50 ldr r2, [pc, #320] ; (10016d4 ) + 1001592: 69a3 ldr r3, [r4, #24] + + /*Bpll Ldo enable*/ + ANA_LDO_CLK ->LDO_CTRL.bit.LDO_HVSEL = RESET; + 1001594: 4d50 ldr r5, [pc, #320] ; (10016d8 ) + ANA_BBPLL ->BBPLL_CTRL.bit.BBPLL_CKIN_SEL = RESET; + 1001596: 4013 ands r3, r2 + 1001598: 61a3 str r3, [r4, #24] + ANA_LDO_CLK ->LDO_CTRL.bit.LDO_HVSEL = RESET; + 100159a: 682b ldr r3, [r5, #0] + 100159c: 4a4f ldr r2, [pc, #316] ; (10016dc ) + 100159e: 4013 ands r3, r2 + 10015a0: 602b str r3, [r5, #0] + ANA_LDO_CLK ->LDO_CTRL.bit.LDO_IBLOAD_SEL = SET; + 10015a2: 2380 movs r3, #128 ; 0x80 + 10015a4: 682a ldr r2, [r5, #0] + 10015a6: 025b lsls r3, r3, #9 + 10015a8: 4313 orrs r3, r2 + 10015aa: 602b str r3, [r5, #0] + 10015ac: 2301 movs r3, #1 + 10015ae: 4033 ands r3, r6 + 10015b0: 9301 str r3, [sp, #4] + + if(PllSource == PLL_HSE) + 10015b2: 2f05 cmp r7, #5 + 10015b4: d151 bne.n 100165a + { + /*open xtal*/ + BPU_Init(); + 10015b6: f001 fb3f bl 1002c38 + MLPM ->OSC_XTAL.bit.OSC_XTAL_EN = SET; + 10015ba: 2180 movs r1, #128 ; 0x80 + 10015bc: 4b48 ldr r3, [pc, #288] ; (10016e0 ) + 10015be: 01c9 lsls r1, r1, #7 + 10015c0: 889a ldrh r2, [r3, #4] + MLPM ->OSC_XTAL.bit.OSC_XTAL_EN_REG = SET; + + ANA_LDO_CLK ->LDO_CTRL.bit.LDO_EN_BBPLL1 = SET; + delay_us(5); + 10015c2: 0038 movs r0, r7 + MLPM ->OSC_XTAL.bit.OSC_XTAL_EN = SET; + 10015c4: 430a orrs r2, r1 + 10015c6: 809a strh r2, [r3, #4] + MLPM ->OSC_XTAL.bit.OSC_XTAL_EN_REG = SET; + 10015c8: 2280 movs r2, #128 ; 0x80 + 10015ca: 8899 ldrh r1, [r3, #4] + 10015cc: 0192 lsls r2, r2, #6 + 10015ce: 430a orrs r2, r1 + 10015d0: 809a strh r2, [r3, #4] + ANA_LDO_CLK ->LDO_CTRL.bit.LDO_EN_BBPLL1 = SET; + 10015d2: 2380 movs r3, #128 ; 0x80 + 10015d4: 682a ldr r2, [r5, #0] + 10015d6: 031b lsls r3, r3, #12 + 10015d8: 4313 orrs r3, r2 + 10015da: 602b str r3, [r5, #0] + delay_us(5); + 10015dc: f001 f930 bl 1002840 + + /*dpll1 block en */ + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_EN_CLKGEN = SET; + 10015e0: 2380 movs r3, #128 ; 0x80 + 10015e2: 68a2 ldr r2, [r4, #8] + 10015e4: 021b lsls r3, r3, #8 + 10015e6: 4313 orrs r3, r2 + 10015e8: 60a3 str r3, [r4, #8] + if(PLLChannel & PLL_CHANNEL_48MHz) + 10015ea: 9b01 ldr r3, [sp, #4] + 10015ec: 2b00 cmp r3, #0 + 10015ee: d004 beq.n 10015fa + { + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_EN_CLKGEN_48M = SET; + 10015f0: 2180 movs r1, #128 ; 0x80 + 10015f2: 68a3 ldr r3, [r4, #8] + 10015f4: 01c9 lsls r1, r1, #7 + 10015f6: 430b orrs r3, r1 + 10015f8: 60a3 str r3, [r4, #8] + } + if(PLLChannel & PLL_CHANNEL_192MHz) + 10015fa: 07b3 lsls r3, r6, #30 + 10015fc: d504 bpl.n 1001608 + { + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_EN_CLKGEN_192M = SET; + 10015fe: 2380 movs r3, #128 ; 0x80 + 1001600: 68a2 ldr r2, [r4, #8] + 1001602: 019b lsls r3, r3, #6 + 1001604: 4313 orrs r3, r2 + 1001606: 60a3 str r3, [r4, #8] + } + if(PLLChannel & PLL_CHANNEL_256MHz) + 1001608: 0773 lsls r3, r6, #29 + 100160a: d504 bpl.n 1001616 + { + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_EN_CLKGEN_256M = SET; + 100160c: 2380 movs r3, #128 ; 0x80 + 100160e: 68a2 ldr r2, [r4, #8] + 1001610: 015b lsls r3, r3, #5 + 1001612: 4313 orrs r3, r2 + 1001614: 60a3 str r3, [r4, #8] + } + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_EN_CLKGEN_CK48M_DIV2 = RESET; + 1001616: 68a3 ldr r3, [r4, #8] + 1001618: 4a32 ldr r2, [pc, #200] ; (10016e4 ) + 100161a: 4013 ands r3, r2 + 100161c: 60a3 str r3, [r4, #8] + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_EN_LOOPDIV = SET; + 100161e: 2380 movs r3, #128 ; 0x80 + 1001620: 68a2 ldr r2, [r4, #8] + 1001622: 00db lsls r3, r3, #3 + 1001624: 4313 orrs r3, r2 + 1001626: 60a3 str r3, [r4, #8] + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_EN_PFDCP = SET; + 1001628: 2380 movs r3, #128 ; 0x80 + 100162a: 68a2 ldr r2, [r4, #8] + 100162c: 009b lsls r3, r3, #2 + 100162e: 4313 orrs r3, r2 + 1001630: 60a3 str r3, [r4, #8] + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_EN_VCO = SET; + 1001632: 2380 movs r3, #128 ; 0x80 + 1001634: 68a2 ldr r2, [r4, #8] + 1001636: 005b lsls r3, r3, #1 + 1001638: 4313 orrs r3, r2 + 100163a: 60a3 str r3, [r4, #8] + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_LOOPDIV = SET; + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_PFDCP = SET; + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_VCO = SET; + } + + delay_us(5); + 100163c: 2005 movs r0, #5 + 100163e: f001 f8ff bl 1002840 + ANA_LDO_CLK ->LDO_CTRL.bit.LDO_IBLOAD_SEL = RESET; + 1001642: 682b ldr r3, [r5, #0] + 1001644: 4a28 ldr r2, [pc, #160] ; (10016e8 ) + 1001646: 4013 ands r3, r2 + 1001648: 602b str r3, [r5, #0] + + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_RSTN = SET; + 100164a: 2304 movs r3, #4 + 100164c: 68a2 ldr r2, [r4, #8] + 100164e: 431a orrs r2, r3 + 1001650: 60a2 str r2, [r4, #8] + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_RSTN = SET; + 1001652: 6962 ldr r2, [r4, #20] + 1001654: 4313 orrs r3, r2 + 1001656: 6163 str r3, [r4, #20] +} + 1001658: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} + ANA_LDO_CLK ->LDO_CTRL.bit.LDO_EN_BBPLL2 = SET; + 100165a: 2380 movs r3, #128 ; 0x80 + 100165c: 682a ldr r2, [r5, #0] + 100165e: 02db lsls r3, r3, #11 + 1001660: 4313 orrs r3, r2 + 1001662: 602b str r3, [r5, #0] + delay_us(5); + 1001664: 2005 movs r0, #5 + 1001666: f001 f8eb bl 1002840 + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_CLKGEN = SET; + 100166a: 2380 movs r3, #128 ; 0x80 + 100166c: 6962 ldr r2, [r4, #20] + 100166e: 021b lsls r3, r3, #8 + 1001670: 4313 orrs r3, r2 + 1001672: 6163 str r3, [r4, #20] + if(PLLChannel & PLL_CHANNEL_48MHz) + 1001674: 9b01 ldr r3, [sp, #4] + 1001676: 2b00 cmp r3, #0 + 1001678: d004 beq.n 1001684 + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_CLKGEN_48M = SET; + 100167a: 2380 movs r3, #128 ; 0x80 + 100167c: 6962 ldr r2, [r4, #20] + 100167e: 01db lsls r3, r3, #7 + 1001680: 4313 orrs r3, r2 + 1001682: 6163 str r3, [r4, #20] + if(PLLChannel & PLL_CHANNEL_192MHz) + 1001684: 07b3 lsls r3, r6, #30 + 1001686: d504 bpl.n 1001692 + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_CLKGEN_192M = SET; + 1001688: 2380 movs r3, #128 ; 0x80 + 100168a: 6962 ldr r2, [r4, #20] + 100168c: 019b lsls r3, r3, #6 + 100168e: 4313 orrs r3, r2 + 1001690: 6163 str r3, [r4, #20] + if(PLLChannel & PLL_CHANNEL_256MHz) + 1001692: 0773 lsls r3, r6, #29 + 1001694: d504 bpl.n 10016a0 + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_CLKGEN_256M = SET; + 1001696: 2380 movs r3, #128 ; 0x80 + 1001698: 6962 ldr r2, [r4, #20] + 100169a: 015b lsls r3, r3, #5 + 100169c: 4313 orrs r3, r2 + 100169e: 6163 str r3, [r4, #20] + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_CLKGEN_CK48M_DIV2 = RESET; + 10016a0: 6963 ldr r3, [r4, #20] + 10016a2: 4a10 ldr r2, [pc, #64] ; (10016e4 ) + 10016a4: 4013 ands r3, r2 + 10016a6: 6163 str r3, [r4, #20] + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_LOOPDIV = SET; + 10016a8: 2380 movs r3, #128 ; 0x80 + 10016aa: 6962 ldr r2, [r4, #20] + 10016ac: 00db lsls r3, r3, #3 + 10016ae: 4313 orrs r3, r2 + 10016b0: 6163 str r3, [r4, #20] + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_PFDCP = SET; + 10016b2: 2380 movs r3, #128 ; 0x80 + 10016b4: 6962 ldr r2, [r4, #20] + 10016b6: 009b lsls r3, r3, #2 + 10016b8: 4313 orrs r3, r2 + 10016ba: 6163 str r3, [r4, #20] + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_VCO = SET; + 10016bc: 2380 movs r3, #128 ; 0x80 + 10016be: 6962 ldr r2, [r4, #20] + 10016c0: 005b lsls r3, r3, #1 + 10016c2: 4313 orrs r3, r2 + 10016c4: 6163 str r3, [r4, #20] + 10016c6: e7b9 b.n 100163c + 10016c8: 01006ce1 .word 0x01006ce1 + 10016cc: 01006c1b .word 0x01006c1b + 10016d0: 000fb210 .word 0x000fb210 + 10016d4: ffcfffff .word 0xffcfffff + 10016d8: 000fb200 .word 0x000fb200 + 10016dc: fffdffff .word 0xfffdffff + 10016e0: 000fa800 .word 0x000fa800 + 10016e4: fffff7ff .word 0xfffff7ff + 10016e8: fffeffff .word 0xfffeffff + +010016ec : + * @param PLLChanel: + * @arg pll channel input selection for SYSCTRL_PLLChannel_TypeDef. + * @retval None + */ +void SYSCTRL_PLLClose(uint8_t PllSource,uint8_t PLLChannel) +{ + 10016ec: 2301 movs r3, #1 + 10016ee: 400b ands r3, r1 + if(PllSource == PLL_HSE) + 10016f0: 2805 cmp r0, #5 + 10016f2: d115 bne.n 1001720 + { + if(PLLChannel & PLL_CHANNEL_48MHz) + 10016f4: 2b00 cmp r3, #0 + 10016f6: d004 beq.n 1001702 + { + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_EN_CLKGEN_48M = RESET; + 10016f8: 4a14 ldr r2, [pc, #80] ; (100174c ) + 10016fa: 4815 ldr r0, [pc, #84] ; (1001750 ) + 10016fc: 6893 ldr r3, [r2, #8] + 10016fe: 4003 ands r3, r0 + 1001700: 6093 str r3, [r2, #8] + } + if(PLLChannel & PLL_CHANNEL_192MHz) + 1001702: 078b lsls r3, r1, #30 + 1001704: d504 bpl.n 1001710 + { + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_EN_CLKGEN_192M = RESET; + 1001706: 4a11 ldr r2, [pc, #68] ; (100174c ) + 1001708: 4812 ldr r0, [pc, #72] ; (1001754 ) + 100170a: 6893 ldr r3, [r2, #8] + 100170c: 4003 ands r3, r0 + 100170e: 6093 str r3, [r2, #8] + } + if(PLLChannel & PLL_CHANNEL_256MHz) + 1001710: 074b lsls r3, r1, #29 + 1001712: d504 bpl.n 100171e + { + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_EN_CLKGEN_256M = RESET; + 1001714: 4a0d ldr r2, [pc, #52] ; (100174c ) + 1001716: 4910 ldr r1, [pc, #64] ; (1001758 ) + 1001718: 6893 ldr r3, [r2, #8] + 100171a: 400b ands r3, r1 + 100171c: 6093 str r3, [r2, #8] + { + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_CLKGEN_256M = RESET; + } + } + +} + 100171e: 4770 bx lr + if(PLLChannel & PLL_CHANNEL_48MHz) + 1001720: 2b00 cmp r3, #0 + 1001722: d004 beq.n 100172e + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_CLKGEN_48M = RESET; + 1001724: 4a09 ldr r2, [pc, #36] ; (100174c ) + 1001726: 480a ldr r0, [pc, #40] ; (1001750 ) + 1001728: 6953 ldr r3, [r2, #20] + 100172a: 4003 ands r3, r0 + 100172c: 6153 str r3, [r2, #20] + if(PLLChannel & PLL_CHANNEL_192MHz) + 100172e: 078b lsls r3, r1, #30 + 1001730: d504 bpl.n 100173c + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_CLKGEN_192M = RESET; + 1001732: 4a06 ldr r2, [pc, #24] ; (100174c ) + 1001734: 4807 ldr r0, [pc, #28] ; (1001754 ) + 1001736: 6953 ldr r3, [r2, #20] + 1001738: 4003 ands r3, r0 + 100173a: 6153 str r3, [r2, #20] + if(PLLChannel & PLL_CHANNEL_256MHz) + 100173c: 074b lsls r3, r1, #29 + 100173e: d5ee bpl.n 100171e + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_CLKGEN_256M = RESET; + 1001740: 4a02 ldr r2, [pc, #8] ; (100174c ) + 1001742: 4905 ldr r1, [pc, #20] ; (1001758 ) + 1001744: 6953 ldr r3, [r2, #20] + 1001746: 400b ands r3, r1 + 1001748: 6153 str r3, [r2, #20] +} + 100174a: e7e8 b.n 100171e + 100174c: 000fb210 .word 0x000fb210 + 1001750: ffffbfff .word 0xffffbfff + 1001754: ffffdfff .word 0xffffdfff + 1001758: ffffefff .word 0xffffefff + +0100175c : + * @arg PLL_HSI + * @arg PLL_HSE + * @retval None + */ +void SYSCTRL_PLLDeInit(uint8_t PllSource) +{ + 100175c: b570 push {r4, r5, r6, lr} + 100175e: 4b1b ldr r3, [pc, #108] ; (10017cc ) + 1001760: 4d1b ldr r5, [pc, #108] ; (10017d0 ) + 1001762: 4c1c ldr r4, [pc, #112] ; (10017d4 ) + 1001764: 4e1c ldr r6, [pc, #112] ; (10017d8 ) + 1001766: 4a1d ldr r2, [pc, #116] ; (10017dc ) + if(PllSource == PLL_HSE) + 1001768: 2805 cmp r0, #5 + 100176a: d11a bne.n 10017a2 + { + /*dpll1 block disable */ + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_EN_CLKGEN_48M = RESET; + 100176c: 6899 ldr r1, [r3, #8] + 100176e: 4029 ands r1, r5 + 1001770: 6099 str r1, [r3, #8] + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_EN_CLKGEN_192M = RESET; + 1001772: 6899 ldr r1, [r3, #8] + 1001774: 4021 ands r1, r4 + 1001776: 6099 str r1, [r3, #8] + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_EN_CLKGEN_256M = RESET; + 1001778: 6899 ldr r1, [r3, #8] + 100177a: 4031 ands r1, r6 + + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_RSTN = RESET; + 100177c: 2604 movs r6, #4 + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_EN_CLKGEN_256M = RESET; + 100177e: 6099 str r1, [r3, #8] + ANA_BBPLL ->BBPLL1_CTRL2.bit.BBPLL1_RSTN = RESET; + 1001780: 6899 ldr r1, [r3, #8] + 1001782: 43b1 bics r1, r6 + 1001784: 6099 str r1, [r3, #8] + + /*dpll1 ldo colse */ + ANA_LDO_CLK ->LDO_CTRL.bit.LDO_EN_BBPLL1 = RESET; + 1001786: 6813 ldr r3, [r2, #0] + 1001788: 4915 ldr r1, [pc, #84] ; (10017e0 ) + 100178a: 400b ands r3, r1 + 100178c: 6013 str r3, [r2, #0] + delay_us(5); + 100178e: f001 f857 bl 1002840 + /*close xtal*/ + MLPM ->OSC_XTAL.bit.OSC_XTAL_EN = RESET; + 1001792: 4b14 ldr r3, [pc, #80] ; (10017e4 ) + 1001794: 889a ldrh r2, [r3, #4] + 1001796: 4015 ands r5, r2 + 1001798: 809d strh r5, [r3, #4] + MLPM ->OSC_XTAL.bit.OSC_XTAL_EN_REG = RESET; + 100179a: 889a ldrh r2, [r3, #4] + 100179c: 4014 ands r4, r2 + 100179e: 809c strh r4, [r3, #4] + /*dpll1 ldo colse */ + ANA_LDO_CLK ->LDO_CTRL.bit.LDO_EN_BBPLL2 = RESET; + delay_us(5); + } + +} + 10017a0: bd70 pop {r4, r5, r6, pc} + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_CLKGEN_48M = RESET; + 10017a2: 6959 ldr r1, [r3, #20] + 10017a4: 400d ands r5, r1 + 10017a6: 615d str r5, [r3, #20] + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_CLKGEN_192M = RESET; + 10017a8: 6958 ldr r0, [r3, #20] + 10017aa: 4004 ands r4, r0 + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_RSTN = RESET; + 10017ac: 2004 movs r0, #4 + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_CLKGEN_192M = RESET; + 10017ae: 615c str r4, [r3, #20] + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_EN_CLKGEN_256M = RESET; + 10017b0: 6959 ldr r1, [r3, #20] + 10017b2: 4031 ands r1, r6 + 10017b4: 6159 str r1, [r3, #20] + ANA_BBPLL ->BBPLL2_CTRL2.bit.BBPLL2_RSTN = RESET; + 10017b6: 6959 ldr r1, [r3, #20] + 10017b8: 4381 bics r1, r0 + 10017ba: 6159 str r1, [r3, #20] + ANA_LDO_CLK ->LDO_CTRL.bit.LDO_EN_BBPLL2 = RESET; + 10017bc: 6813 ldr r3, [r2, #0] + 10017be: 490a ldr r1, [pc, #40] ; (10017e8 ) + delay_us(5); + 10017c0: 3001 adds r0, #1 + ANA_LDO_CLK ->LDO_CTRL.bit.LDO_EN_BBPLL2 = RESET; + 10017c2: 400b ands r3, r1 + 10017c4: 6013 str r3, [r2, #0] + delay_us(5); + 10017c6: f001 f83b bl 1002840 +} + 10017ca: e7e9 b.n 10017a0 + 10017cc: 000fb210 .word 0x000fb210 + 10017d0: ffffbfff .word 0xffffbfff + 10017d4: ffffdfff .word 0xffffdfff + 10017d8: ffffefff .word 0xffffefff + 10017dc: 000fb200 .word 0x000fb200 + 10017e0: fff7ffff .word 0xfff7ffff + 10017e4: 000fa800 .word 0x000fa800 + 10017e8: fffbffff .word 0xfffbffff + +010017ec : + * @arg PLL_HSI + * @arg PLL_HSE + * @retval pll frequency + */ +static uint32_t SYSCTRL_GetPllFreq(uint8_t PllSource,uint8_t PLLChannel) +{ + 10017ec: b510 push {r4, lr} + 10017ee: 000c movs r4, r1 + _ASSERT(IS_SYSCTRL_PLL_SEL(PllSource)); + 10017f0: 28aa cmp r0, #170 ; 0xaa + 10017f2: d009 beq.n 1001808 + 10017f4: 280a cmp r0, #10 + 10017f6: d007 beq.n 1001808 + 10017f8: 2805 cmp r0, #5 + 10017fa: d005 beq.n 1001808 + 10017fc: 21b6 movs r1, #182 ; 0xb6 + 10017fe: 4a08 ldr r2, [pc, #32] ; (1001820 ) + 1001800: 31ff adds r1, #255 ; 0xff + 1001802: 4808 ldr r0, [pc, #32] ; (1001824 ) + 1001804: f7fe fe7c bl 1000500 <_assert_handler> + } + } + else + { + /*HSI Pll freq getting*/ + if(PLLChannel == PLL_CHANNEL_192MHz) + 1001808: 2c02 cmp r4, #2 + 100180a: d101 bne.n 1001810 + { + return CLOCK_FRE_192M; + 100180c: 4806 ldr r0, [pc, #24] ; (1001828 ) + 100180e: e005 b.n 100181c + { + return CLOCK_FRE_256M; + } + } + + return Pll_Freq; + 1001810: 3c04 subs r4, #4 + 1001812: 4260 negs r0, r4 + 1001814: 4160 adcs r0, r4 + 1001816: 4c05 ldr r4, [pc, #20] ; (100182c ) + 1001818: 4240 negs r0, r0 + 100181a: 4020 ands r0, r4 +} + 100181c: bd10 pop {r4, pc} + 100181e: 46c0 nop ; (mov r8, r8) + 1001820: 01006e65 .word 0x01006e65 + 1001824: 01006c1b .word 0x01006c1b + 1001828: 0b71b000 .word 0x0b71b000 + 100182c: 0f424000 .word 0x0f424000 + +01001830 : + * @arg MCU_RC32K + * @param Clk_Div: SYSCTRL_CLK_Div_None...SYSCTRL_CLK_Div32. + * @retval None + */ +void SYSCTRL_MCUClkCtrl(uint8_t PllSource,SYSCLK_MCUSource_TypeDef Source, uint32_t Clk_Div) +{ + 1001830: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 1001832: 0007 movs r7, r0 + 1001834: 000e movs r6, r1 + 1001836: 9201 str r2, [sp, #4] + 1001838: 4c5b ldr r4, [pc, #364] ; (10019a8 ) + 100183a: 4d5c ldr r5, [pc, #368] ; (10019ac ) + IS_MCU_PLLSOURCE(PllSource,Source); + 100183c: 28aa cmp r0, #170 ; 0xaa + 100183e: d04c beq.n 10018da + 1001840: 1e4b subs r3, r1, #1 + 1001842: 2b02 cmp r3, #2 + 1001844: d904 bls.n 1001850 + 1001846: 4a5a ldr r2, [pc, #360] ; (10019b0 ) + 1001848: 495a ldr r1, [pc, #360] ; (10019b4 ) + 100184a: 485b ldr r0, [pc, #364] ; (10019b8 ) + 100184c: f7fe fe58 bl 1000500 <_assert_handler> + _ASSERT(IS_SYSCTRL_PLL_SEL(PllSource)); + 1001850: 2f0a cmp r7, #10 + 1001852: d105 bne.n 1001860 + MRCC->CLK_PLL_SEL.bit.MCU_PLL_SEL = PllSource; + 1001854: 4b59 ldr r3, [pc, #356] ; (10019bc ) + 1001856: 6a22 ldr r2, [r4, #32] + 1001858: 401a ands r2, r3 + 100185a: 23a0 movs r3, #160 ; 0xa0 + 100185c: 051b lsls r3, r3, #20 + 100185e: e048 b.n 10018f2 + _ASSERT(IS_SYSCTRL_PLL_SEL(PllSource)); + 1001860: 2f05 cmp r7, #5 + 1001862: d041 beq.n 10018e8 + 1001864: 21f0 movs r1, #240 ; 0xf0 + 1001866: 4a56 ldr r2, [pc, #344] ; (10019c0 ) + 1001868: 0049 lsls r1, r1, #1 + 100186a: 4853 ldr r0, [pc, #332] ; (10019b8 ) + 100186c: f7fe fe48 bl 1000500 <_assert_handler> + MRCC->CLK_PLL_SEL.bit.MCU_PLL_SEL = PllSource; + 1001870: 220f movs r2, #15 + 1001872: 6a23 ldr r3, [r4, #32] + 1001874: 403a ands r2, r7 + 1001876: 4f51 ldr r7, [pc, #324] ; (10019bc ) + 1001878: 0612 lsls r2, r2, #24 + 100187a: 401f ands r7, r3 + 100187c: 4317 orrs r7, r2 + 100187e: 6227 str r7, [r4, #32] + uint32_t source_freq; + GET_MCU_SOURCE_FREQ(Source,source_freq); + source_freq = Clk_Div == SYSCTRL_CLK_Div_None ? source_freq : source_freq/(Clk_Div + 2); + + /*set MCU high active*/ + BPU_Init(); + 1001880: f001 f9da bl 1002c38 + MLPM ->OSC_XTAL.bit.OSC_XTAL_EN = SET; + 1001884: 2380 movs r3, #128 ; 0x80 + 1001886: 88aa ldrh r2, [r5, #4] + 1001888: 01db lsls r3, r3, #7 + 100188a: 4313 orrs r3, r2 + 100188c: 80ab strh r3, [r5, #4] + MLPM ->OSC_XTAL.bit.OSC_XTAL_EN_REG = SET; + 100188e: 2380 movs r3, #128 ; 0x80 + 1001890: 88aa ldrh r2, [r5, #4] + 1001892: 019b lsls r3, r3, #6 + 1001894: 4313 orrs r3, r2 + 1001896: 80ab strh r3, [r5, #4] + 1001898: e044 b.n 1001924 + + /*pll freq config*/ + if(PllSource == PLL_HSI || PllSource == PLL_HSE) + { + uint8_t PLLChannel; + IS_MCU_PLLCHANNEL(Source,PLLChannel); + 100189a: 2104 movs r1, #4 + 100189c: e03f b.n 100191e + if(Source == MCU_RC32K) + 100189e: 2e04 cmp r6, #4 + 10018a0: d148 bne.n 1001934 + MRCC->MCU_CLK.bit.RC_32K = SET; + 10018a2: 6923 ldr r3, [r4, #16] + 10018a4: 4333 orrs r3, r6 + 10018a6: 6123 str r3, [r4, #16] + 10018a8: e044 b.n 1001934 + MRCC->MCU_CLK.bit.DIV_SEL = SET; + 10018aa: 6922 ldr r2, [r4, #16] + MRCC->MCU_CLK.bit.DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 10018ac: 20ff movs r0, #255 ; 0xff + MRCC->MCU_CLK.bit.DIV_SEL = SET; + 10018ae: 4313 orrs r3, r2 + 10018b0: 6123 str r3, [r4, #16] + MRCC->MCU_CLK.bit.DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 10018b2: 9b01 ldr r3, [sp, #4] + 10018b4: 9901 ldr r1, [sp, #4] + 10018b6: 085a lsrs r2, r3, #1 + 10018b8: 2301 movs r3, #1 + 10018ba: b2d2 uxtb r2, r2 + 10018bc: 400b ands r3, r1 + 10018be: 18d3 adds r3, r2, r3 + 10018c0: 6921 ldr r1, [r4, #16] + 10018c2: 4003 ands r3, r0 + 10018c4: 483f ldr r0, [pc, #252] ; (10019c4 ) + 10018c6: 041b lsls r3, r3, #16 + 10018c8: 4001 ands r1, r0 + 10018ca: 430b orrs r3, r1 + 10018cc: 6123 str r3, [r4, #16] + MRCC->MCU_CLK.bit.DIV_LO = Clk_Div >> 1; + 10018ce: 0211 lsls r1, r2, #8 + 10018d0: 6923 ldr r3, [r4, #16] + 10018d2: 4a3d ldr r2, [pc, #244] ; (10019c8 ) + 10018d4: 401a ands r2, r3 + 10018d6: 430a orrs r2, r1 + 10018d8: e049 b.n 100196e + MRCC->CLK_PLL_SEL.bit.MCU_PLL_SEL = PllSource; + 10018da: 27a0 movs r7, #160 ; 0xa0 + 10018dc: 6a23 ldr r3, [r4, #32] + 10018de: 4a37 ldr r2, [pc, #220] ; (10019bc ) + 10018e0: 053f lsls r7, r7, #20 + 10018e2: 4013 ands r3, r2 + 10018e4: 431f orrs r7, r3 + 10018e6: e7ca b.n 100187e + 10018e8: 4b34 ldr r3, [pc, #208] ; (10019bc ) + 10018ea: 6a22 ldr r2, [r4, #32] + 10018ec: 401a ands r2, r3 + 10018ee: 23a0 movs r3, #160 ; 0xa0 + 10018f0: 04db lsls r3, r3, #19 + 10018f2: 4313 orrs r3, r2 + 10018f4: 6223 str r3, [r4, #32] + BPU_Init(); + 10018f6: f001 f99f bl 1002c38 + MLPM ->OSC_XTAL.bit.OSC_XTAL_EN = SET; + 10018fa: 2380 movs r3, #128 ; 0x80 + 10018fc: 88aa ldrh r2, [r5, #4] + 10018fe: 01db lsls r3, r3, #7 + 1001900: 4313 orrs r3, r2 + 1001902: 80ab strh r3, [r5, #4] + MLPM ->OSC_XTAL.bit.OSC_XTAL_EN_REG = SET; + 1001904: 2380 movs r3, #128 ; 0x80 + 1001906: 88aa ldrh r2, [r5, #4] + 1001908: 019b lsls r3, r3, #6 + 100190a: 4313 orrs r3, r2 + 100190c: 80ab strh r3, [r5, #4] + IS_MCU_PLLCHANNEL(Source,PLLChannel); + 100190e: 2102 movs r1, #2 + 1001910: 2e01 cmp r6, #1 + 1001912: d004 beq.n 100191e + 1001914: 428e cmp r6, r1 + 1001916: d0c0 beq.n 100189a + 1001918: 2e03 cmp r6, #3 + 100191a: d100 bne.n 100191e + 100191c: 3901 subs r1, #1 + SYSCTRL_PLLOpen(PllSource,PLLChannel); + 100191e: 0038 movs r0, r7 + 1001920: f7ff fe26 bl 1001570 + _ASSERT(IS_SYSCTRL_MCUSOURCE_SEL(Source)); + 1001924: 2e04 cmp r6, #4 + 1001926: d9ba bls.n 100189e + 1001928: 21fa movs r1, #250 ; 0xfa + 100192a: 4a28 ldr r2, [pc, #160] ; (10019cc ) + 100192c: 0049 lsls r1, r1, #1 + 100192e: 4822 ldr r0, [pc, #136] ; (10019b8 ) + 1001930: f7fe fde6 bl 1000500 <_assert_handler> + MRCC->MCU_CLK.bit.SEL = Source; + 1001934: 2203 movs r2, #3 + 1001936: 6923 ldr r3, [r4, #16] + 1001938: 0031 movs r1, r6 + 100193a: 4393 bics r3, r2 + 100193c: 001e movs r6, r3 + _ASSERT(IS_SYSCTRL_CLK_DIV(Clk_Div)); + 100193e: 23e0 movs r3, #224 ; 0xe0 + MRCC->MCU_CLK.bit.SEL = Source; + 1001940: 4011 ands r1, r2 + 1001942: 430e orrs r6, r1 + 1001944: 6126 str r6, [r4, #16] + _ASSERT(IS_SYSCTRL_CLK_DIV(Clk_Div)); + 1001946: 9a01 ldr r2, [sp, #4] + 1001948: 421a tst r2, r3 + 100194a: d006 beq.n 100195a + 100194c: 2aff cmp r2, #255 ; 0xff + 100194e: d004 beq.n 100195a + 1001950: 4a1f ldr r2, [pc, #124] ; (10019d0 ) + 1001952: 4920 ldr r1, [pc, #128] ; (10019d4 ) + 1001954: 4818 ldr r0, [pc, #96] ; (10019b8 ) + 1001956: f7fe fdd3 bl 1000500 <_assert_handler> + MRCC->MCU_CLK.bit.DIV_EN = SET; + 100195a: 2308 movs r3, #8 + 100195c: 6922 ldr r2, [r4, #16] + 100195e: 4313 orrs r3, r2 + 1001960: 6123 str r3, [r4, #16] + if (SYSCTRL_CLK_Div_None == Clk_Div) + 1001962: 9a01 ldr r2, [sp, #4] + 1001964: 2310 movs r3, #16 + 1001966: 2aff cmp r2, #255 ; 0xff + 1001968: d19f bne.n 10018aa + MRCC->MCU_CLK.bit.DIV_SEL = RESET; + 100196a: 6922 ldr r2, [r4, #16] + 100196c: 439a bics r2, r3 + MRCC->MCU_CLK.bit.DIV_LO = Clk_Div >> 1; + 100196e: 6122 str r2, [r4, #16] + + /*set clk div*/ + SYSCTRL_MCUClkDiv(Clk_Div); + + /*set timer api clk(for delay_us\delay_ms)*/ + uint32_t clk = SYSCTRL_GetClocksFreq(MCU_FRE); + 1001970: 2000 movs r0, #0 + 1001972: f000 fbef bl 1002154 + MMCU->CURR_CLK.bit.MS_CLK = clk / CLOCk_FRE_1K ; + 1001976: 21fa movs r1, #250 ; 0xfa + 1001978: 24d0 movs r4, #208 ; 0xd0 + 100197a: 0089 lsls r1, r1, #2 + uint32_t clk = SYSCTRL_GetClocksFreq(MCU_FRE); + 100197c: 0005 movs r5, r0 + MMCU->CURR_CLK.bit.MS_CLK = clk / CLOCk_FRE_1K ; + 100197e: f004 fdf9 bl 1006574 <__udivsi3> + 1001982: 0324 lsls r4, r4, #12 + 1001984: 6a63 ldr r3, [r4, #36] ; 0x24 + 1001986: 0300 lsls r0, r0, #12 + 1001988: 0b02 lsrs r2, r0, #12 + 100198a: 0d18 lsrs r0, r3, #20 + 100198c: 0500 lsls r0, r0, #20 + 100198e: 4310 orrs r0, r2 + 1001990: 6260 str r0, [r4, #36] ; 0x24 + MMCU->CURR_CLK.bit.US_CLK = clk / CLOCk_FRE_1M; + 1001992: 4911 ldr r1, [pc, #68] ; (10019d8 ) + 1001994: 0028 movs r0, r5 + 1001996: f004 fded bl 1006574 <__udivsi3> + 100199a: 6a63 ldr r3, [r4, #36] ; 0x24 + 100199c: 0502 lsls r2, r0, #20 + 100199e: 0318 lsls r0, r3, #12 + 10019a0: 0b00 lsrs r0, r0, #12 + 10019a2: 4310 orrs r0, r2 + 10019a4: 6260 str r0, [r4, #36] ; 0x24 +} + 10019a6: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} + 10019a8: 000f8400 .word 0x000f8400 + 10019ac: 000fa800 .word 0x000fa800 + 10019b0: 01006cf1 .word 0x01006cf1 + 10019b4: 0000022d .word 0x0000022d + 10019b8: 01006c1b .word 0x01006c1b + 10019bc: f0ffffff .word 0xf0ffffff + 10019c0: 01006d04 .word 0x01006d04 + 10019c4: ff00ffff .word 0xff00ffff + 10019c8: ffff00ff .word 0xffff00ff + 10019cc: 01006d1c .word 0x01006d1c + 10019d0: 01006d37 .word 0x01006d37 + 10019d4: 00000207 .word 0x00000207 + 10019d8: 000f4240 .word 0x000f4240 + +010019dc : + * @arg PER1_PLL_OUT_FIXED + * @param Clk_Div: SYSCTRL_PER1_Div2...SYSCTRL_PER1_Div32. + * @retval None + */ +void SYSCTRL_PER1AhbClkCtrl(uint8_t PllSource, SYSCLK_PER1Source_TypeDef Source, uint32_t Clk_Div) +{ + 10019dc: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 10019de: 0006 movs r6, r0 + 10019e0: 000f movs r7, r1 + 10019e2: 0015 movs r5, r2 + _ASSERT(IS_SYSCTRL_PLL_SEL(PllSource)); + 10019e4: 28aa cmp r0, #170 ; 0xaa + 10019e6: d009 beq.n 10019fc + 10019e8: 280a cmp r0, #10 + 10019ea: d007 beq.n 10019fc + 10019ec: 2805 cmp r0, #5 + 10019ee: d005 beq.n 10019fc + 10019f0: 219c movs r1, #156 ; 0x9c + 10019f2: 4a2b ldr r2, [pc, #172] ; (1001aa0 ) + 10019f4: 0089 lsls r1, r1, #2 + 10019f6: 482b ldr r0, [pc, #172] ; (1001aa4 ) + 10019f8: f7fe fd82 bl 1000500 <_assert_handler> + _ASSERT(IS_SYSCTRL_PER1SOURCE_SEL(Source)); + 10019fc: 2f03 cmp r7, #3 + 10019fe: d904 bls.n 1001a0a + 1001a00: 4a27 ldr r2, [pc, #156] ; (1001aa0 ) + 1001a02: 4929 ldr r1, [pc, #164] ; (1001aa8 ) + 1001a04: 4827 ldr r0, [pc, #156] ; (1001aa4 ) + 1001a06: f7fe fd7b bl 1000500 <_assert_handler> + _ASSERT(IS_SYSCTRL_PER1_DIV(Clk_Div)); + 1001a0a: 23e0 movs r3, #224 ; 0xe0 + 1001a0c: 421d tst r5, r3 + 1001a0e: d004 beq.n 1001a1a + 1001a10: 4a23 ldr r2, [pc, #140] ; (1001aa0 ) + 1001a12: 4926 ldr r1, [pc, #152] ; (1001aac ) + 1001a14: 4823 ldr r0, [pc, #140] ; (1001aa4 ) + 1001a16: f7fe fd73 bl 1000500 <_assert_handler> + IS_PER1_PLLSOURCE(PllSource,Source); + 1001a1a: 2eaa cmp r6, #170 ; 0xaa + 1001a1c: d007 beq.n 1001a2e + 1001a1e: 1ebb subs r3, r7, #2 + 1001a20: 2b01 cmp r3, #1 + 1001a22: d904 bls.n 1001a2e + 1001a24: 4a1e ldr r2, [pc, #120] ; (1001aa0 ) + 1001a26: 4922 ldr r1, [pc, #136] ; (1001ab0 ) + 1001a28: 481e ldr r0, [pc, #120] ; (1001aa4 ) + 1001a2a: f7fe fd69 bl 1000500 <_assert_handler> + + /*pll source config*/ + MRCC->CLK_PLL_SEL.bit.AHB_PLL_SEL = PllSource; + 1001a2e: 220f movs r2, #15 + 1001a30: 4c20 ldr r4, [pc, #128] ; (1001ab4 ) + 1001a32: 4921 ldr r1, [pc, #132] ; (1001ab8 ) + 1001a34: 6a23 ldr r3, [r4, #32] + 1001a36: 4032 ands r2, r6 + 1001a38: 0212 lsls r2, r2, #8 + 1001a3a: 400b ands r3, r1 + 1001a3c: 4313 orrs r3, r2 + 1001a3e: 6223 str r3, [r4, #32] + 1001a40: 9101 str r1, [sp, #4] + + /*pll freq config*/ + if(PllSource == PLL_HSI || PllSource == PLL_HSE) + 1001a42: 2e0a cmp r6, #10 + 1001a44: d001 beq.n 1001a4a + 1001a46: 2e05 cmp r6, #5 + 1001a48: d106 bne.n 1001a58 + { + uint8_t PLLChannel = IS_PER1_PLLCHANNEL(Source); + 1001a4a: 1eb9 subs r1, r7, #2 + 1001a4c: 424b negs r3, r1 + 1001a4e: 4159 adcs r1, r3 + SYSCTRL_PLLOpen(PllSource,PLLChannel); + 1001a50: 0030 movs r0, r6 + uint8_t PLLChannel = IS_PER1_PLLCHANNEL(Source); + 1001a52: 3101 adds r1, #1 + SYSCTRL_PLLOpen(PllSource,PLLChannel); + 1001a54: f7ff fd8c bl 1001570 + } + + /*source select*/ + MRCC->PER1_CLK.bit.AHB_SEL = Source; + 1001a58: 2203 movs r2, #3 + 1001a5a: 6963 ldr r3, [r4, #20] + 1001a5c: 4017 ands r7, r2 + 1001a5e: 4393 bics r3, r2 + 1001a60: 431f orrs r7, r3 + 1001a62: 6167 str r7, [r4, #20] + 1001a64: 4a15 ldr r2, [pc, #84] ; (1001abc ) + + /*set clk div*/ + if (SYSCTRL_CLK_Div_None == Clk_Div) + 1001a66: 2dff cmp r5, #255 ; 0xff + 1001a68: d107 bne.n 1001a7a + { + MRCC->PER1_CLK.bit.AHB_DIV_HI = 0; + 1001a6a: 6965 ldr r5, [r4, #20] + 1001a6c: 402a ands r2, r5 + 1001a6e: 6162 str r2, [r4, #20] + MRCC->PER1_CLK.bit.AHB_DIV_LO = 0; + 1001a70: 6963 ldr r3, [r4, #20] + 1001a72: 9a01 ldr r2, [sp, #4] + 1001a74: 4013 ands r3, r2 + } + else + { + MRCC->PER1_CLK.bit.AHB_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + MRCC->PER1_CLK.bit.AHB_DIV_LO = Clk_Div >> 1; + 1001a76: 6163 str r3, [r4, #20] + } +} + 1001a78: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} + MRCC->PER1_CLK.bit.AHB_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 1001a7a: 2101 movs r1, #1 + 1001a7c: 086b lsrs r3, r5, #1 + 1001a7e: 400d ands r5, r1 + 1001a80: 6960 ldr r0, [r4, #20] + 1001a82: 310e adds r1, #14 + 1001a84: 18ed adds r5, r5, r3 + 1001a86: 400d ands r5, r1 + 1001a88: 4002 ands r2, r0 + 1001a8a: 032d lsls r5, r5, #12 + 1001a8c: 4315 orrs r5, r2 + 1001a8e: 6165 str r5, [r4, #20] + MRCC->PER1_CLK.bit.AHB_DIV_LO = Clk_Div >> 1; + 1001a90: 400b ands r3, r1 + 1001a92: 6962 ldr r2, [r4, #20] + 1001a94: 9901 ldr r1, [sp, #4] + 1001a96: 021b lsls r3, r3, #8 + 1001a98: 400a ands r2, r1 + 1001a9a: 4313 orrs r3, r2 + 1001a9c: e7eb b.n 1001a76 + 1001a9e: 46c0 nop ; (mov r8, r8) + 1001aa0: 01006d49 .word 0x01006d49 + 1001aa4: 01006c1b .word 0x01006c1b + 1001aa8: 00000271 .word 0x00000271 + 1001aac: 00000272 .word 0x00000272 + 1001ab0: 00000273 .word 0x00000273 + 1001ab4: 000f8400 .word 0x000f8400 + 1001ab8: fffff0ff .word 0xfffff0ff + 1001abc: ffff0fff .word 0xffff0fff + +01001ac0 : + * @arg PER1_PLL_OUT_FIXED + * @param Clk_Div: SYSCTRL_PER1_Div2...SYSCTRL_PER1_Div32. + * @retval None + */ +void SYSCTRL_PER1QspiClkCtrl(uint8_t PllSource,SYSCLK_PER1Source_TypeDef Source, uint32_t Clk_Div) +{ + 1001ac0: b5f8 push {r3, r4, r5, r6, r7, lr} + 1001ac2: 0007 movs r7, r0 + 1001ac4: 000e movs r6, r1 + 1001ac6: 0015 movs r5, r2 + _ASSERT(IS_SYSCTRL_PLL_SEL(PllSource)); + 1001ac8: 28aa cmp r0, #170 ; 0xaa + 1001aca: d009 beq.n 1001ae0 + 1001acc: 280a cmp r0, #10 + 1001ace: d007 beq.n 1001ae0 + 1001ad0: 2805 cmp r0, #5 + 1001ad2: d005 beq.n 1001ae0 + 1001ad4: 21a9 movs r1, #169 ; 0xa9 + 1001ad6: 4a2b ldr r2, [pc, #172] ; (1001b84 ) + 1001ad8: 0089 lsls r1, r1, #2 + 1001ada: 482b ldr r0, [pc, #172] ; (1001b88 ) + 1001adc: f7fe fd10 bl 1000500 <_assert_handler> + _ASSERT(IS_SYSCTRL_PER1SOURCE_SEL(Source)); + 1001ae0: 2e03 cmp r6, #3 + 1001ae2: d904 bls.n 1001aee + 1001ae4: 4a27 ldr r2, [pc, #156] ; (1001b84 ) + 1001ae6: 4929 ldr r1, [pc, #164] ; (1001b8c ) + 1001ae8: 4827 ldr r0, [pc, #156] ; (1001b88 ) + 1001aea: f7fe fd09 bl 1000500 <_assert_handler> + _ASSERT(IS_SYSCTRL_PER1_DIV(Clk_Div)); + 1001aee: 23e0 movs r3, #224 ; 0xe0 + 1001af0: 421d tst r5, r3 + 1001af2: d004 beq.n 1001afe + 1001af4: 4a23 ldr r2, [pc, #140] ; (1001b84 ) + 1001af6: 4926 ldr r1, [pc, #152] ; (1001b90 ) + 1001af8: 4823 ldr r0, [pc, #140] ; (1001b88 ) + 1001afa: f7fe fd01 bl 1000500 <_assert_handler> + IS_PER1_PLLSOURCE(PllSource,Source); + 1001afe: 2faa cmp r7, #170 ; 0xaa + 1001b00: d007 beq.n 1001b12 + 1001b02: 1eb3 subs r3, r6, #2 + 1001b04: 2b01 cmp r3, #1 + 1001b06: d904 bls.n 1001b12 + 1001b08: 4a1e ldr r2, [pc, #120] ; (1001b84 ) + 1001b0a: 4922 ldr r1, [pc, #136] ; (1001b94 ) + 1001b0c: 481e ldr r0, [pc, #120] ; (1001b88 ) + 1001b0e: f7fe fcf7 bl 1000500 <_assert_handler> + /*pll source config*/ + MRCC->CLK_PLL_SEL.bit.QSPI_PLL_SEL = PllSource; + 1001b12: 220f movs r2, #15 + 1001b14: 4c20 ldr r4, [pc, #128] ; (1001b98 ) + 1001b16: 4921 ldr r1, [pc, #132] ; (1001b9c ) + 1001b18: 6a23 ldr r3, [r4, #32] + 1001b1a: 403a ands r2, r7 + 1001b1c: 0412 lsls r2, r2, #16 + 1001b1e: 400b ands r3, r1 + 1001b20: 4313 orrs r3, r2 + 1001b22: 6223 str r3, [r4, #32] + + /*pll freq config*/ + if(PllSource == PLL_HSI || PllSource == PLL_HSE) + 1001b24: 2f0a cmp r7, #10 + 1001b26: d001 beq.n 1001b2c + 1001b28: 2f05 cmp r7, #5 + 1001b2a: d106 bne.n 1001b3a + { + uint8_t PLLChannel = IS_PER1_PLLCHANNEL(Source); + 1001b2c: 1eb1 subs r1, r6, #2 + 1001b2e: 424b negs r3, r1 + 1001b30: 4159 adcs r1, r3 + SYSCTRL_PLLOpen(PllSource,PLLChannel); + 1001b32: 0038 movs r0, r7 + uint8_t PLLChannel = IS_PER1_PLLCHANNEL(Source); + 1001b34: 3101 adds r1, #1 + SYSCTRL_PLLOpen(PllSource,PLLChannel); + 1001b36: f7ff fd1b bl 1001570 + } + + /*source select*/ + MRCC->PER1_CLK.bit.QSPI_SEL = Source; + 1001b3a: 2203 movs r2, #3 + 1001b3c: 6963 ldr r3, [r4, #20] + 1001b3e: 4016 ands r6, r2 + 1001b40: 4a17 ldr r2, [pc, #92] ; (1001ba0 ) + 1001b42: 0436 lsls r6, r6, #16 + 1001b44: 4013 ands r3, r2 + 1001b46: 431e orrs r6, r3 + 1001b48: 6166 str r6, [r4, #20] + 1001b4a: 4916 ldr r1, [pc, #88] ; (1001ba4 ) + + /*set clk div*/ + if (SYSCTRL_CLK_Div_None == Clk_Div) + 1001b4c: 2dff cmp r5, #255 ; 0xff + 1001b4e: d107 bne.n 1001b60 + { + MRCC->PER1_CLK.bit.QSPI_DIV_HI = 0; + 1001b50: 6963 ldr r3, [r4, #20] + 1001b52: 011b lsls r3, r3, #4 + 1001b54: 091b lsrs r3, r3, #4 + 1001b56: 6163 str r3, [r4, #20] + MRCC->PER1_CLK.bit.QSPI_DIV_LO = 0; + 1001b58: 6962 ldr r2, [r4, #20] + 1001b5a: 4011 ands r1, r2 + 1001b5c: 6161 str r1, [r4, #20] + else + { + MRCC->PER1_CLK.bit.QSPI_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + MRCC->PER1_CLK.bit.QSPI_DIV_LO = Clk_Div >> 1; + } +} + 1001b5e: bdf8 pop {r3, r4, r5, r6, r7, pc} + MRCC->PER1_CLK.bit.QSPI_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 1001b60: 2301 movs r3, #1 + MRCC->PER1_CLK.bit.QSPI_DIV_LO = Clk_Div >> 1; + 1001b62: 200f movs r0, #15 + MRCC->PER1_CLK.bit.QSPI_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 1001b64: 086a lsrs r2, r5, #1 + 1001b66: 401d ands r5, r3 + 1001b68: 6963 ldr r3, [r4, #20] + 1001b6a: 18ad adds r5, r5, r2 + 1001b6c: 011b lsls r3, r3, #4 + 1001b6e: 091b lsrs r3, r3, #4 + 1001b70: 072d lsls r5, r5, #28 + 1001b72: 431d orrs r5, r3 + 1001b74: 6165 str r5, [r4, #20] + MRCC->PER1_CLK.bit.QSPI_DIV_LO = Clk_Div >> 1; + 1001b76: 6963 ldr r3, [r4, #20] + 1001b78: 4002 ands r2, r0 + 1001b7a: 0612 lsls r2, r2, #24 + 1001b7c: 4019 ands r1, r3 + 1001b7e: 430a orrs r2, r1 + 1001b80: 6162 str r2, [r4, #20] +} + 1001b82: e7ec b.n 1001b5e + 1001b84: 01006d60 .word 0x01006d60 + 1001b88: 01006c1b .word 0x01006c1b + 1001b8c: 000002a5 .word 0x000002a5 + 1001b90: 000002a6 .word 0x000002a6 + 1001b94: 000002a7 .word 0x000002a7 + 1001b98: 000f8400 .word 0x000f8400 + 1001b9c: fff0ffff .word 0xfff0ffff + 1001ba0: fffcffff .word 0xfffcffff + 1001ba4: f0ffffff .word 0xf0ffffff + +01001ba8 : + * @arg PER2_PLL_OUT_MAX + * @param Clk_Div: SYSCTRL_CLK_Div_None...SYSCTRL_CLK_Div32. + * @retval None + */ +void SYSCTRL_PER2PsramClkCtrl(uint8_t PllSource, SYSCLK_PER2Source_TypeDef Source, uint32_t Clk_Div) +{ + 1001ba8: b5f8 push {r3, r4, r5, r6, r7, lr} + 1001baa: 0006 movs r6, r0 + 1001bac: 000f movs r7, r1 + 1001bae: 0015 movs r5, r2 + _ASSERT(IS_SYSCTRL_PLL_SEL(PllSource)); + 1001bb0: 28aa cmp r0, #170 ; 0xaa + 1001bb2: d008 beq.n 1001bc6 + 1001bb4: 280a cmp r0, #10 + 1001bb6: d006 beq.n 1001bc6 + 1001bb8: 2805 cmp r0, #5 + 1001bba: d004 beq.n 1001bc6 + 1001bbc: 4a2d ldr r2, [pc, #180] ; (1001c74 ) + 1001bbe: 492e ldr r1, [pc, #184] ; (1001c78 ) + 1001bc0: 482e ldr r0, [pc, #184] ; (1001c7c ) + 1001bc2: f7fe fc9d bl 1000500 <_assert_handler> + _ASSERT(IS_SYSCTRL_PER2SOURCE_SEL(Source)); + 1001bc6: 2f03 cmp r7, #3 + 1001bc8: d905 bls.n 1001bd6 + 1001bca: 21b6 movs r1, #182 ; 0xb6 + 1001bcc: 4a29 ldr r2, [pc, #164] ; (1001c74 ) + 1001bce: 0089 lsls r1, r1, #2 + 1001bd0: 482a ldr r0, [pc, #168] ; (1001c7c ) + 1001bd2: f7fe fc95 bl 1000500 <_assert_handler> + _ASSERT(IS_SYSCTRL_CLK_DIV(Clk_Div)); + 1001bd6: 23e0 movs r3, #224 ; 0xe0 + 1001bd8: 421d tst r5, r3 + 1001bda: d006 beq.n 1001bea + 1001bdc: 2dff cmp r5, #255 ; 0xff + 1001bde: d004 beq.n 1001bea + 1001be0: 4a24 ldr r2, [pc, #144] ; (1001c74 ) + 1001be2: 4927 ldr r1, [pc, #156] ; (1001c80 ) + 1001be4: 4825 ldr r0, [pc, #148] ; (1001c7c ) + 1001be6: f7fe fc8b bl 1000500 <_assert_handler> + IS_PER2_PLLSOURCE(PllSource,Source); + 1001bea: 2eaa cmp r6, #170 ; 0xaa + 1001bec: d007 beq.n 1001bfe + 1001bee: 1ebb subs r3, r7, #2 + 1001bf0: 2b01 cmp r3, #1 + 1001bf2: d904 bls.n 1001bfe + 1001bf4: 4a1f ldr r2, [pc, #124] ; (1001c74 ) + 1001bf6: 4923 ldr r1, [pc, #140] ; (1001c84 ) + 1001bf8: 4820 ldr r0, [pc, #128] ; (1001c7c ) + 1001bfa: f7fe fc81 bl 1000500 <_assert_handler> + /*pll source config*/ + MRCC->PER2_CLK.bit.PSRAM_PLL_SEL = PllSource; + 1001bfe: 2201 movs r2, #1 + 1001c00: 2108 movs r1, #8 + 1001c02: 4c21 ldr r4, [pc, #132] ; (1001c88 ) + 1001c04: 4032 ands r2, r6 + 1001c06: 69a3 ldr r3, [r4, #24] + 1001c08: 00d2 lsls r2, r2, #3 + 1001c0a: 438b bics r3, r1 + 1001c0c: 4313 orrs r3, r2 + 1001c0e: 61a3 str r3, [r4, #24] + + /*pll freq config*/ + if(PllSource == PLL_HSI || PllSource == PLL_HSE) + 1001c10: 2e0a cmp r6, #10 + 1001c12: d001 beq.n 1001c18 + 1001c14: 2e05 cmp r6, #5 + 1001c16: d106 bne.n 1001c26 + { + uint8_t PLLChannel = IS_PER2_PLLCHANNEL(Source); + 1001c18: 0039 movs r1, r7 + 1001c1a: 2f02 cmp r7, #2 + 1001c1c: d000 beq.n 1001c20 + 1001c1e: 2104 movs r1, #4 + SYSCTRL_PLLOpen(PllSource,PLLChannel); + 1001c20: 0030 movs r0, r6 + 1001c22: f7ff fca5 bl 1001570 + } + + /*source select*/ + MRCC->PER2_CLK.bit.PSRAM_SEL = Source; + 1001c26: 2203 movs r2, #3 + 1001c28: 69a3 ldr r3, [r4, #24] + 1001c2a: 4017 ands r7, r2 + 1001c2c: 4393 bics r3, r2 + 1001c2e: 431f orrs r7, r3 + + /*enable div en*/ + MRCC->PER2_CLK.bit.PSRAM_DIV_EN = SET; + 1001c30: 2320 movs r3, #32 + MRCC->PER2_CLK.bit.PSRAM_SEL = Source; + 1001c32: 61a7 str r7, [r4, #24] + MRCC->PER2_CLK.bit.PSRAM_DIV_EN = SET; + 1001c34: 69a2 ldr r2, [r4, #24] + 1001c36: 4313 orrs r3, r2 + 1001c38: 61a3 str r3, [r4, #24] + + /*set clk div*/ + if (SYSCTRL_CLK_Div_None == Clk_Div) + { + MRCC->PER2_CLK.bit.PSRAM_DIV_SEL = RESET; + 1001c3a: 69a2 ldr r2, [r4, #24] + 1001c3c: 2310 movs r3, #16 + if (SYSCTRL_CLK_Div_None == Clk_Div) + 1001c3e: 2dff cmp r5, #255 ; 0xff + 1001c40: d102 bne.n 1001c48 + MRCC->PER2_CLK.bit.PSRAM_DIV_SEL = RESET; + 1001c42: 439a bics r2, r3 + 1001c44: 61a2 str r2, [r4, #24] + { + MRCC->PER2_CLK.bit.PSRAM_DIV_SEL = SET; + MRCC->PER2_CLK.bit.PSRAM_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + MRCC->PER2_CLK.bit.PSRAM_DIV_LO = Clk_Div >> 1; + } +} + 1001c46: bdf8 pop {r3, r4, r5, r6, r7, pc} + MRCC->PER2_CLK.bit.PSRAM_DIV_SEL = SET; + 1001c48: 4313 orrs r3, r2 + MRCC->PER2_CLK.bit.PSRAM_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 1001c4a: 2201 movs r2, #1 + 1001c4c: 210f movs r1, #15 + MRCC->PER2_CLK.bit.PSRAM_DIV_SEL = SET; + 1001c4e: 61a3 str r3, [r4, #24] + MRCC->PER2_CLK.bit.PSRAM_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 1001c50: 086b lsrs r3, r5, #1 + 1001c52: 4015 ands r5, r2 + 1001c54: 18ed adds r5, r5, r3 + 1001c56: 69a2 ldr r2, [r4, #24] + 1001c58: 480c ldr r0, [pc, #48] ; (1001c8c ) + 1001c5a: 400d ands r5, r1 + 1001c5c: 4002 ands r2, r0 + 1001c5e: 032d lsls r5, r5, #12 + 1001c60: 4315 orrs r5, r2 + 1001c62: 61a5 str r5, [r4, #24] + MRCC->PER2_CLK.bit.PSRAM_DIV_LO = Clk_Div >> 1; + 1001c64: 69a2 ldr r2, [r4, #24] + 1001c66: 400b ands r3, r1 + 1001c68: 4909 ldr r1, [pc, #36] ; (1001c90 ) + 1001c6a: 021b lsls r3, r3, #8 + 1001c6c: 400a ands r2, r1 + 1001c6e: 4313 orrs r3, r2 + 1001c70: 61a3 str r3, [r4, #24] +} + 1001c72: e7e8 b.n 1001c46 + 1001c74: 01006d78 .word 0x01006d78 + 1001c78: 000002d7 .word 0x000002d7 + 1001c7c: 01006c1b .word 0x01006c1b + 1001c80: 000002d9 .word 0x000002d9 + 1001c84: 000002da .word 0x000002da + 1001c88: 000f8400 .word 0x000f8400 + 1001c8c: ffff0fff .word 0xffff0fff + 1001c90: fffff0ff .word 0xfffff0ff + +01001c94 : + * @arg PER2_PLL_OUT_MAX + * @param Clk_Div: SYSCTRL_CLK_Div_None...SYSCTRL_CLK_Div32. + * @retval None + */ +void SYSCTRL_PER2HspiClkCtrl(uint8_t PllSource, SYSCLK_PER2Source_TypeDef Source, uint32_t Clk_Div) +{ + 1001c94: b5f8 push {r3, r4, r5, r6, r7, lr} + 1001c96: 0007 movs r7, r0 + 1001c98: 000e movs r6, r1 + 1001c9a: 0015 movs r5, r2 + _ASSERT(IS_SYSCTRL_PLL_SEL(PllSource)); + 1001c9c: 28aa cmp r0, #170 ; 0xaa + 1001c9e: d008 beq.n 1001cb2 + 1001ca0: 280a cmp r0, #10 + 1001ca2: d006 beq.n 1001cb2 + 1001ca4: 2805 cmp r0, #5 + 1001ca6: d004 beq.n 1001cb2 + 1001ca8: 4a30 ldr r2, [pc, #192] ; (1001d6c ) + 1001caa: 4931 ldr r1, [pc, #196] ; (1001d70 ) + 1001cac: 4831 ldr r0, [pc, #196] ; (1001d74 ) + 1001cae: f7fe fc27 bl 1000500 <_assert_handler> + _ASSERT(IS_SYSCTRL_PER2SOURCE_SEL(Source)); + 1001cb2: 2e03 cmp r6, #3 + 1001cb4: d904 bls.n 1001cc0 + 1001cb6: 4a2d ldr r2, [pc, #180] ; (1001d6c ) + 1001cb8: 492f ldr r1, [pc, #188] ; (1001d78 ) + 1001cba: 482e ldr r0, [pc, #184] ; (1001d74 ) + 1001cbc: f7fe fc20 bl 1000500 <_assert_handler> + _ASSERT(IS_SYSCTRL_CLK_DIV(Clk_Div)); + 1001cc0: 23e0 movs r3, #224 ; 0xe0 + 1001cc2: 421d tst r5, r3 + 1001cc4: d006 beq.n 1001cd4 + 1001cc6: 2dff cmp r5, #255 ; 0xff + 1001cc8: d004 beq.n 1001cd4 + 1001cca: 4a28 ldr r2, [pc, #160] ; (1001d6c ) + 1001ccc: 492b ldr r1, [pc, #172] ; (1001d7c ) + 1001cce: 4829 ldr r0, [pc, #164] ; (1001d74 ) + 1001cd0: f7fe fc16 bl 1000500 <_assert_handler> + IS_PER2_PLLSOURCE(PllSource,Source); + 1001cd4: 2faa cmp r7, #170 ; 0xaa + 1001cd6: d008 beq.n 1001cea + 1001cd8: 1eb3 subs r3, r6, #2 + 1001cda: 2b01 cmp r3, #1 + 1001cdc: d905 bls.n 1001cea + 1001cde: 21c4 movs r1, #196 ; 0xc4 + 1001ce0: 4a22 ldr r2, [pc, #136] ; (1001d6c ) + 1001ce2: 0089 lsls r1, r1, #2 + 1001ce4: 4823 ldr r0, [pc, #140] ; (1001d74 ) + 1001ce6: f7fe fc0b bl 1000500 <_assert_handler> + /*pll source config*/ + MRCC->PER2_CLK.bit.HSPI_PLL_SEL = PllSource; + 1001cea: 2201 movs r2, #1 + 1001cec: 4c24 ldr r4, [pc, #144] ; (1001d80 ) + 1001cee: 4925 ldr r1, [pc, #148] ; (1001d84 ) + 1001cf0: 69a3 ldr r3, [r4, #24] + 1001cf2: 403a ands r2, r7 + 1001cf4: 04d2 lsls r2, r2, #19 + 1001cf6: 400b ands r3, r1 + 1001cf8: 4313 orrs r3, r2 + 1001cfa: 61a3 str r3, [r4, #24] + + /*pll freq config*/ + if(PllSource == PLL_HSI || PllSource == PLL_HSE) + 1001cfc: 2f0a cmp r7, #10 + 1001cfe: d001 beq.n 1001d04 + 1001d00: 2f05 cmp r7, #5 + 1001d02: d106 bne.n 1001d12 + { + uint8_t PLLChannel = IS_PER2_PLLCHANNEL(Source); + 1001d04: 0031 movs r1, r6 + 1001d06: 2e02 cmp r6, #2 + 1001d08: d000 beq.n 1001d0c + 1001d0a: 2104 movs r1, #4 + SYSCTRL_PLLOpen(PllSource,PLLChannel); + 1001d0c: 0038 movs r0, r7 + 1001d0e: f7ff fc2f bl 1001570 + } + + /*source select*/ + MRCC->PER2_CLK.bit.HSPI_SEL = Source; + 1001d12: 2203 movs r2, #3 + 1001d14: 69a3 ldr r3, [r4, #24] + 1001d16: 4016 ands r6, r2 + 1001d18: 4a1b ldr r2, [pc, #108] ; (1001d88 ) + 1001d1a: 0436 lsls r6, r6, #16 + 1001d1c: 4013 ands r3, r2 + 1001d1e: 431e orrs r6, r3 + + /*enable div en*/ + MRCC->PER2_CLK.bit.HSPI_DIV_EN = SET; + 1001d20: 2380 movs r3, #128 ; 0x80 + MRCC->PER2_CLK.bit.HSPI_SEL = Source; + 1001d22: 61a6 str r6, [r4, #24] + MRCC->PER2_CLK.bit.HSPI_DIV_EN = SET; + 1001d24: 69a2 ldr r2, [r4, #24] + 1001d26: 039b lsls r3, r3, #14 + 1001d28: 4313 orrs r3, r2 + 1001d2a: 61a3 str r3, [r4, #24] + + /*set clk div*/ + if (SYSCTRL_CLK_Div_None == Clk_Div) + 1001d2c: 2dff cmp r5, #255 ; 0xff + 1001d2e: d104 bne.n 1001d3a + { + MRCC->PER2_CLK.bit.HSPI_DIV_SEL = RESET; + 1001d30: 69a3 ldr r3, [r4, #24] + 1001d32: 4a16 ldr r2, [pc, #88] ; (1001d8c ) + 1001d34: 4013 ands r3, r2 + 1001d36: 61a3 str r3, [r4, #24] + { + MRCC->PER2_CLK.bit.HSPI_DIV_SEL = SET; + MRCC->PER2_CLK.bit.HSPI_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + MRCC->PER2_CLK.bit.HSPI_DIV_LO = Clk_Div >> 1; + } +} + 1001d38: bdf8 pop {r3, r4, r5, r6, r7, pc} + MRCC->PER2_CLK.bit.HSPI_DIV_SEL = SET; + 1001d3a: 2380 movs r3, #128 ; 0x80 + 1001d3c: 69a2 ldr r2, [r4, #24] + 1001d3e: 035b lsls r3, r3, #13 + 1001d40: 4313 orrs r3, r2 + 1001d42: 61a3 str r3, [r4, #24] + MRCC->PER2_CLK.bit.HSPI_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 1001d44: 2301 movs r3, #1 + MRCC->PER2_CLK.bit.HSPI_DIV_LO = Clk_Div >> 1; + 1001d46: 210f movs r1, #15 + MRCC->PER2_CLK.bit.HSPI_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 1001d48: 086a lsrs r2, r5, #1 + 1001d4a: 401d ands r5, r3 + 1001d4c: 69a3 ldr r3, [r4, #24] + 1001d4e: 18ad adds r5, r5, r2 + 1001d50: 011b lsls r3, r3, #4 + 1001d52: 091b lsrs r3, r3, #4 + 1001d54: 072d lsls r5, r5, #28 + 1001d56: 431d orrs r5, r3 + 1001d58: 61a5 str r5, [r4, #24] + MRCC->PER2_CLK.bit.HSPI_DIV_LO = Clk_Div >> 1; + 1001d5a: 69a3 ldr r3, [r4, #24] + 1001d5c: 400a ands r2, r1 + 1001d5e: 490c ldr r1, [pc, #48] ; (1001d90 ) + 1001d60: 0612 lsls r2, r2, #24 + 1001d62: 400b ands r3, r1 + 1001d64: 431a orrs r2, r3 + 1001d66: 61a2 str r2, [r4, #24] +} + 1001d68: e7e6 b.n 1001d38 + 1001d6a: 46c0 nop ; (mov r8, r8) + 1001d6c: 01006d91 .word 0x01006d91 + 1001d70: 0000030d .word 0x0000030d + 1001d74: 01006c1b .word 0x01006c1b + 1001d78: 0000030e .word 0x0000030e + 1001d7c: 0000030f .word 0x0000030f + 1001d80: 000f8400 .word 0x000f8400 + 1001d84: fff7ffff .word 0xfff7ffff + 1001d88: fffcffff .word 0xfffcffff + 1001d8c: ffefffff .word 0xffefffff + 1001d90: f0ffffff .word 0xf0ffffff + +01001d94 : + * @arg PLL_HSI_48M + * @arg PLL_HSE_48M + * @retval None + */ +static void SYSCTRL_EnableFixed48MConfig(PER3CLK_Source_TypeDef Source) +{ + 1001d94: b510 push {r4, lr} + 1001d96: 1e01 subs r1, r0, #0 + if(Source == RC48M) + 1001d98: d103 bne.n 1001da2 + { + SYSCTRL_RC48MPeriphClockCmd(ENABLE); + 1001d9a: 2001 movs r0, #1 + 1001d9c: f7ff fb10 bl 10013c0 + } + else + { + SYSCTRL_PLLOpen(PLL_HSE,PLL_CHANNEL_48MHz); + } +} + 1001da0: bd10 pop {r4, pc} + SYSCTRL_PLLOpen(PLL_HSI,PLL_CHANNEL_48MHz); + 1001da2: 200a movs r0, #10 + else if(Source == PLL_HSI_48M) + 1001da4: 2901 cmp r1, #1 + 1001da6: d001 beq.n 1001dac + SYSCTRL_PLLOpen(PLL_HSE,PLL_CHANNEL_48MHz); + 1001da8: 2101 movs r1, #1 + 1001daa: 2005 movs r0, #5 + 1001dac: f7ff fbe0 bl 1001570 +} + 1001db0: e7f6 b.n 1001da0 + ... + +01001db4 : + * @arg PLL_HSE_48M + * @param Clk_Div: SYSCTRL_PER3_Div2...SYSCTRL_CLK_Div8. + * @retval None + */ +void SYSCTRL_PER3IceClkCtrl(PER3CLK_Source_TypeDef Source, uint32_t Clk_Div) +{ + 1001db4: b570 push {r4, r5, r6, lr} + 1001db6: 0006 movs r6, r0 + 1001db8: 000c movs r4, r1 + _ASSERT(IS_PER3CTRL_SOURCE_SEL(Source)); + 1001dba: 2802 cmp r0, #2 + 1001dbc: d904 bls.n 1001dc8 + 1001dbe: 4a17 ldr r2, [pc, #92] ; (1001e1c ) + 1001dc0: 4917 ldr r1, [pc, #92] ; (1001e20 ) + 1001dc2: 4818 ldr r0, [pc, #96] ; (1001e24 ) + 1001dc4: f7fe fb9c bl 1000500 <_assert_handler> + _ASSERT(IS_SYSCTRL_PER3_DIV(Clk_Div)); + 1001dc8: 23f0 movs r3, #240 ; 0xf0 + 1001dca: 421c tst r4, r3 + 1001dcc: d004 beq.n 1001dd8 + 1001dce: 4a13 ldr r2, [pc, #76] ; (1001e1c ) + 1001dd0: 4915 ldr r1, [pc, #84] ; (1001e28 ) + 1001dd2: 4814 ldr r0, [pc, #80] ; (1001e24 ) + 1001dd4: f7fe fb94 bl 1000500 <_assert_handler> + + /*enable 48M source*/ + SYSCTRL_EnableFixed48MConfig(Source); + + /*source select*/ + MRCC->PER3_CLK.bit.ICE_SEL = Source; + 1001dd8: 2503 movs r5, #3 + SYSCTRL_EnableFixed48MConfig(Source); + 1001dda: 0030 movs r0, r6 + 1001ddc: f7ff ffda bl 1001d94 + + /*enable div en*/ + MRCC->PER3_CLK.bit.ICE_EN = SET; + 1001de0: 2208 movs r2, #8 + MRCC->PER3_CLK.bit.ICE_SEL = Source; + 1001de2: 4b12 ldr r3, [pc, #72] ; (1001e2c ) + 1001de4: 402e ands r6, r5 + 1001de6: 69d8 ldr r0, [r3, #28] + 1001de8: 43a8 bics r0, r5 + 1001dea: 4330 orrs r0, r6 + 1001dec: 61d8 str r0, [r3, #28] + MRCC->PER3_CLK.bit.ICE_EN = SET; + 1001dee: 69d9 ldr r1, [r3, #28] + + /*set clk div*/ + MRCC->PER3_CLK.bit.ICE_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 1001df0: 20c0 movs r0, #192 ; 0xc0 + MRCC->PER3_CLK.bit.ICE_EN = SET; + 1001df2: 430a orrs r2, r1 + MRCC->PER3_CLK.bit.ICE_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 1001df4: 2101 movs r1, #1 + MRCC->PER3_CLK.bit.ICE_EN = SET; + 1001df6: 61da str r2, [r3, #28] + MRCC->PER3_CLK.bit.ICE_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 1001df8: 0862 lsrs r2, r4, #1 + 1001dfa: 400c ands r4, r1 + 1001dfc: 18a4 adds r4, r4, r2 + 1001dfe: 69d9 ldr r1, [r3, #28] + 1001e00: 402c ands r4, r5 + 1001e02: 4381 bics r1, r0 + 1001e04: 01a4 lsls r4, r4, #6 + 1001e06: 430c orrs r4, r1 + 1001e08: 61dc str r4, [r3, #28] + MRCC->PER3_CLK.bit.ICE_DIV_LO = Clk_Div >> 1; + 1001e0a: 69d9 ldr r1, [r3, #28] + 1001e0c: 402a ands r2, r5 + 1001e0e: 3890 subs r0, #144 ; 0x90 + 1001e10: 4381 bics r1, r0 + 1001e12: 0112 lsls r2, r2, #4 + 1001e14: 430a orrs r2, r1 + 1001e16: 61da str r2, [r3, #28] +} + 1001e18: bd70 pop {r4, r5, r6, pc} + 1001e1a: 46c0 nop ; (mov r8, r8) + 1001e1c: 01006da9 .word 0x01006da9 + 1001e20: 00000356 .word 0x00000356 + 1001e24: 01006c1b .word 0x01006c1b + 1001e28: 00000357 .word 0x00000357 + 1001e2c: 000f8400 .word 0x000f8400 + +01001e30 : + * @arg PLL_HSE_48M + * @param Clk_Div: SYSCTRL_PER3_Div2...SYSCTRL_CLK_Div8. + * @retval None + */ +void SYSCTRL_PER3AdacClkCtrl(PER3CLK_Source_TypeDef Source, uint32_t Clk_Div) +{ + 1001e30: b570 push {r4, r5, r6, lr} + 1001e32: 0005 movs r5, r0 + 1001e34: 000c movs r4, r1 + _ASSERT(IS_PER3CTRL_SOURCE_SEL(Source)); + 1001e36: 2802 cmp r0, #2 + 1001e38: d904 bls.n 1001e44 + 1001e3a: 4a18 ldr r2, [pc, #96] ; (1001e9c ) + 1001e3c: 4918 ldr r1, [pc, #96] ; (1001ea0 ) + 1001e3e: 4819 ldr r0, [pc, #100] ; (1001ea4 ) + 1001e40: f7fe fb5e bl 1000500 <_assert_handler> + _ASSERT(IS_SYSCTRL_PER3_DIV(Clk_Div)); + 1001e44: 23f0 movs r3, #240 ; 0xf0 + 1001e46: 421c tst r4, r3 + 1001e48: d004 beq.n 1001e54 + 1001e4a: 4a14 ldr r2, [pc, #80] ; (1001e9c ) + 1001e4c: 4916 ldr r1, [pc, #88] ; (1001ea8 ) + 1001e4e: 4815 ldr r0, [pc, #84] ; (1001ea4 ) + 1001e50: f7fe fb56 bl 1000500 <_assert_handler> + + /*enable 48M source*/ + SYSCTRL_EnableFixed48MConfig(Source); + 1001e54: 0028 movs r0, r5 + 1001e56: f7ff ff9d bl 1001d94 + + /*source select*/ + MRCC->PER3_CLK.bit.ADAC_SEL = Source; + 1001e5a: 2203 movs r2, #3 + 1001e5c: 4b13 ldr r3, [pc, #76] ; (1001eac ) + 1001e5e: 4814 ldr r0, [pc, #80] ; (1001eb0 ) + 1001e60: 69d9 ldr r1, [r3, #28] + 1001e62: 4015 ands r5, r2 + 1001e64: 4001 ands r1, r0 + 1001e66: 022d lsls r5, r5, #8 + 1001e68: 430d orrs r5, r1 + + /*enable div en*/ + MRCC->PER3_CLK.bit.ADAC_EN = SET; + 1001e6a: 2180 movs r1, #128 ; 0x80 + MRCC->PER3_CLK.bit.ADAC_SEL = Source; + 1001e6c: 61dd str r5, [r3, #28] + MRCC->PER3_CLK.bit.ADAC_EN = SET; + 1001e6e: 69d8 ldr r0, [r3, #28] + 1001e70: 0109 lsls r1, r1, #4 + 1001e72: 4301 orrs r1, r0 + + /*set clk div*/ + MRCC->PER3_CLK.bit.ADAC_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 1001e74: 2001 movs r0, #1 + MRCC->PER3_CLK.bit.ADAC_EN = SET; + 1001e76: 61d9 str r1, [r3, #28] + MRCC->PER3_CLK.bit.ADAC_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 1001e78: 0861 lsrs r1, r4, #1 + 1001e7a: 4004 ands r4, r0 + 1001e7c: 4d0d ldr r5, [pc, #52] ; (1001eb4 ) + 1001e7e: 69d8 ldr r0, [r3, #28] + 1001e80: 1864 adds r4, r4, r1 + 1001e82: 4014 ands r4, r2 + 1001e84: 4028 ands r0, r5 + 1001e86: 03a4 lsls r4, r4, #14 + 1001e88: 4304 orrs r4, r0 + 1001e8a: 61dc str r4, [r3, #28] + MRCC->PER3_CLK.bit.ADAC_DIV_LO = Clk_Div >> 1; + 1001e8c: 69d8 ldr r0, [r3, #28] + 1001e8e: 4011 ands r1, r2 + 1001e90: 4a09 ldr r2, [pc, #36] ; (1001eb8 ) + 1001e92: 0309 lsls r1, r1, #12 + 1001e94: 4002 ands r2, r0 + 1001e96: 4311 orrs r1, r2 + 1001e98: 61d9 str r1, [r3, #28] +} + 1001e9a: bd70 pop {r4, r5, r6, pc} + 1001e9c: 01006dc0 .word 0x01006dc0 + 1001ea0: 00000375 .word 0x00000375 + 1001ea4: 01006c1b .word 0x01006c1b + 1001ea8: 00000376 .word 0x00000376 + 1001eac: 000f8400 .word 0x000f8400 + 1001eb0: fffffcff .word 0xfffffcff + 1001eb4: ffff3fff .word 0xffff3fff + 1001eb8: ffffcfff .word 0xffffcfff + +01001ebc : + * @arg PLL_HSE_48M + * @param Clk_Div: SYSCTRL_PER3_Div2...SYSCTRL_CLK_Div8. + * @retval None + */ +void SYSCTRL_PER3Gpio0ClkCtrl(PER3CLK_Source_TypeDef Source, uint32_t Clk_Div) +{ + 1001ebc: b570 push {r4, r5, r6, lr} + 1001ebe: 0005 movs r5, r0 + 1001ec0: 000c movs r4, r1 + _ASSERT(IS_PER3CTRL_SOURCE_SEL(Source)); + 1001ec2: 2802 cmp r0, #2 + 1001ec4: d905 bls.n 1001ed2 + 1001ec6: 21e5 movs r1, #229 ; 0xe5 + 1001ec8: 4a18 ldr r2, [pc, #96] ; (1001f2c ) + 1001eca: 0089 lsls r1, r1, #2 + 1001ecc: 4818 ldr r0, [pc, #96] ; (1001f30 ) + 1001ece: f7fe fb17 bl 1000500 <_assert_handler> + _ASSERT(IS_SYSCTRL_PER3_DIV(Clk_Div)); + 1001ed2: 23f0 movs r3, #240 ; 0xf0 + 1001ed4: 421c tst r4, r3 + 1001ed6: d004 beq.n 1001ee2 + 1001ed8: 4a14 ldr r2, [pc, #80] ; (1001f2c ) + 1001eda: 4916 ldr r1, [pc, #88] ; (1001f34 ) + 1001edc: 4814 ldr r0, [pc, #80] ; (1001f30 ) + 1001ede: f7fe fb0f bl 1000500 <_assert_handler> + + /*enable 48M source*/ + SYSCTRL_EnableFixed48MConfig(Source); + 1001ee2: 0028 movs r0, r5 + 1001ee4: f7ff ff56 bl 1001d94 + + /*source select*/ + MRCC->PER3_CLK.bit.GPIO0_SEL = Source; + 1001ee8: 2203 movs r2, #3 + 1001eea: 4b13 ldr r3, [pc, #76] ; (1001f38 ) + 1001eec: 4813 ldr r0, [pc, #76] ; (1001f3c ) + 1001eee: 69d9 ldr r1, [r3, #28] + 1001ef0: 4015 ands r5, r2 + 1001ef2: 4001 ands r1, r0 + 1001ef4: 042d lsls r5, r5, #16 + 1001ef6: 430d orrs r5, r1 + + /*enable div en*/ + MRCC->PER3_CLK.bit.GPIO0_EN = SET; + 1001ef8: 2180 movs r1, #128 ; 0x80 + MRCC->PER3_CLK.bit.GPIO0_SEL = Source; + 1001efa: 61dd str r5, [r3, #28] + MRCC->PER3_CLK.bit.GPIO0_EN = SET; + 1001efc: 69d8 ldr r0, [r3, #28] + 1001efe: 0309 lsls r1, r1, #12 + 1001f00: 4301 orrs r1, r0 + + /*set clk div*/ + MRCC->PER3_CLK.bit.GPIO0_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 1001f02: 2001 movs r0, #1 + MRCC->PER3_CLK.bit.GPIO0_EN = SET; + 1001f04: 61d9 str r1, [r3, #28] + MRCC->PER3_CLK.bit.GPIO0_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 1001f06: 0861 lsrs r1, r4, #1 + 1001f08: 4004 ands r4, r0 + 1001f0a: 4d0d ldr r5, [pc, #52] ; (1001f40 ) + 1001f0c: 69d8 ldr r0, [r3, #28] + 1001f0e: 1864 adds r4, r4, r1 + 1001f10: 4014 ands r4, r2 + 1001f12: 4028 ands r0, r5 + 1001f14: 05a4 lsls r4, r4, #22 + 1001f16: 4304 orrs r4, r0 + 1001f18: 61dc str r4, [r3, #28] + MRCC->PER3_CLK.bit.GPIO0_DIV_LO = Clk_Div >> 1; + 1001f1a: 69d8 ldr r0, [r3, #28] + 1001f1c: 4011 ands r1, r2 + 1001f1e: 4a09 ldr r2, [pc, #36] ; (1001f44 ) + 1001f20: 0509 lsls r1, r1, #20 + 1001f22: 4002 ands r2, r0 + 1001f24: 4311 orrs r1, r2 + 1001f26: 61d9 str r1, [r3, #28] +} + 1001f28: bd70 pop {r4, r5, r6, pc} + 1001f2a: 46c0 nop ; (mov r8, r8) + 1001f2c: 01006dd8 .word 0x01006dd8 + 1001f30: 01006c1b .word 0x01006c1b + 1001f34: 00000395 .word 0x00000395 + 1001f38: 000f8400 .word 0x000f8400 + 1001f3c: fffcffff .word 0xfffcffff + 1001f40: ff3fffff .word 0xff3fffff + 1001f44: ffcfffff .word 0xffcfffff + +01001f48 : + * @arg PLL_HSE_48M + * @param Clk_Div: SYSCTRL_PER3_Div2...SYSCTRL_PER3_Div8. + * @retval None + */ +void SYSCTRL_PER3Gpio1ClkCtrl(PER3CLK_Source_TypeDef Source, uint32_t Clk_Div) +{ + 1001f48: b570 push {r4, r5, r6, lr} + 1001f4a: 0005 movs r5, r0 + 1001f4c: 000c movs r4, r1 + _ASSERT(IS_PER3CTRL_SOURCE_SEL(Source)); + 1001f4e: 2802 cmp r0, #2 + 1001f50: d904 bls.n 1001f5c + 1001f52: 4a19 ldr r2, [pc, #100] ; (1001fb8 ) + 1001f54: 4919 ldr r1, [pc, #100] ; (1001fbc ) + 1001f56: 481a ldr r0, [pc, #104] ; (1001fc0 ) + 1001f58: f7fe fad2 bl 1000500 <_assert_handler> + _ASSERT(IS_SYSCTRL_PER3_DIV(Clk_Div)); + 1001f5c: 23f0 movs r3, #240 ; 0xf0 + 1001f5e: 421c tst r4, r3 + 1001f60: d005 beq.n 1001f6e + 1001f62: 21ed movs r1, #237 ; 0xed + 1001f64: 4a14 ldr r2, [pc, #80] ; (1001fb8 ) + 1001f66: 0089 lsls r1, r1, #2 + 1001f68: 4815 ldr r0, [pc, #84] ; (1001fc0 ) + 1001f6a: f7fe fac9 bl 1000500 <_assert_handler> + + /*enable 48M source*/ + SYSCTRL_EnableFixed48MConfig(Source); + 1001f6e: 0028 movs r0, r5 + 1001f70: f7ff ff10 bl 1001d94 + + /*source select*/ + MRCC->PER3_CLK.bit.GPIO1_SEL = Source; + 1001f74: 2103 movs r1, #3 + 1001f76: 4b13 ldr r3, [pc, #76] ; (1001fc4 ) + 1001f78: 4813 ldr r0, [pc, #76] ; (1001fc8 ) + 1001f7a: 69da ldr r2, [r3, #28] + 1001f7c: 400d ands r5, r1 + 1001f7e: 4002 ands r2, r0 + 1001f80: 062d lsls r5, r5, #24 + 1001f82: 4315 orrs r5, r2 + + /*enable div en*/ + MRCC->PER3_CLK.bit.GPIO1_EN = SET; + 1001f84: 2280 movs r2, #128 ; 0x80 + MRCC->PER3_CLK.bit.GPIO1_SEL = Source; + 1001f86: 61dd str r5, [r3, #28] + MRCC->PER3_CLK.bit.GPIO1_EN = SET; + 1001f88: 69d8 ldr r0, [r3, #28] + 1001f8a: 0512 lsls r2, r2, #20 + 1001f8c: 4302 orrs r2, r0 + + /*set clk div*/ + MRCC->PER3_CLK.bit.GPIO1_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 1001f8e: 2001 movs r0, #1 + MRCC->PER3_CLK.bit.GPIO1_EN = SET; + 1001f90: 61da str r2, [r3, #28] + MRCC->PER3_CLK.bit.GPIO1_DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 1001f92: 0862 lsrs r2, r4, #1 + 1001f94: 4004 ands r4, r0 + 1001f96: 69d8 ldr r0, [r3, #28] + 1001f98: 18a4 adds r4, r4, r2 + 1001f9a: 400c ands r4, r1 + 1001f9c: 0080 lsls r0, r0, #2 + 1001f9e: 0880 lsrs r0, r0, #2 + 1001fa0: 07a4 lsls r4, r4, #30 + 1001fa2: 4304 orrs r4, r0 + 1001fa4: 61dc str r4, [r3, #28] + MRCC->PER3_CLK.bit.GPIO1_DIV_LO = Clk_Div >> 1; + 1001fa6: 69d8 ldr r0, [r3, #28] + 1001fa8: 400a ands r2, r1 + 1001faa: 4908 ldr r1, [pc, #32] ; (1001fcc ) + 1001fac: 0712 lsls r2, r2, #28 + 1001fae: 4001 ands r1, r0 + 1001fb0: 430a orrs r2, r1 + 1001fb2: 61da str r2, [r3, #28] +} + 1001fb4: bd70 pop {r4, r5, r6, pc} + 1001fb6: 46c0 nop ; (mov r8, r8) + 1001fb8: 01006df1 .word 0x01006df1 + 1001fbc: 000003b3 .word 0x000003b3 + 1001fc0: 01006c1b .word 0x01006c1b + 1001fc4: 000f8400 .word 0x000f8400 + 1001fc8: fcffffff .word 0xfcffffff + 1001fcc: cfffffff .word 0xcfffffff + +01001fd0 : + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SYSCTRL_RSAClkRandCmd(FunctionalState NewState) +{ + MRCC->CLK_RSA.bit.RAND_EN = NewState; + 1001fd0: 2301 movs r3, #1 + 1001fd2: 2108 movs r1, #8 + 1001fd4: 4a03 ldr r2, [pc, #12] ; (1001fe4 ) + 1001fd6: 4003 ands r3, r0 + 1001fd8: 8d10 ldrh r0, [r2, #40] ; 0x28 + 1001fda: 00db lsls r3, r3, #3 + 1001fdc: 4388 bics r0, r1 + 1001fde: 4318 orrs r0, r3 + 1001fe0: 8510 strh r0, [r2, #40] ; 0x28 +} + 1001fe2: 4770 bx lr + 1001fe4: 000f8400 .word 0x000f8400 + +01001fe8 : + * @param randmask: 0x0~0xf + * @retval None + */ +void SYSCTRL_RSAClkRandMask(uint8_t randmask) +{ + _ASSERT(IS_SYSCTRL_RSA_RANDMASK(randmask)); + 1001fe8: 230f movs r3, #15 + 1001fea: 0002 movs r2, r0 +{ + 1001fec: b510 push {r4, lr} + _ASSERT(IS_SYSCTRL_RSA_RANDMASK(randmask)); + 1001fee: 439a bics r2, r3 +{ + 1001ff0: 0004 movs r4, r0 + _ASSERT(IS_SYSCTRL_RSA_RANDMASK(randmask)); + 1001ff2: 2a00 cmp r2, #0 + 1001ff4: d005 beq.n 1002002 + 1001ff6: 21f6 movs r1, #246 ; 0xf6 + 1001ff8: 4a07 ldr r2, [pc, #28] ; (1002018 ) + 1001ffa: 0089 lsls r1, r1, #2 + 1001ffc: 4807 ldr r0, [pc, #28] ; (100201c ) + 1001ffe: f7fe fa7f bl 1000500 <_assert_handler> + + MRCC->CLK_RSA.bit.RAND_MASK= randmask; + 1002002: 230f movs r3, #15 + 1002004: 21f0 movs r1, #240 ; 0xf0 + 1002006: 4a06 ldr r2, [pc, #24] ; (1002020 ) + 1002008: 401c ands r4, r3 + 100200a: 8d13 ldrh r3, [r2, #40] ; 0x28 + 100200c: 0124 lsls r4, r4, #4 + 100200e: 438b bics r3, r1 + 1002010: 431c orrs r4, r3 + 1002012: 8514 strh r4, [r2, #40] ; 0x28 +} + 1002014: bd10 pop {r4, pc} + 1002016: 46c0 nop ; (mov r8, r8) + 1002018: 01006e0a .word 0x01006e0a + 100201c: 01006c1b .word 0x01006c1b + 1002020: 000f8400 .word 0x000f8400 + +01002024 : + * @arg PER2_PLL_OUT_MAX + * @param Clk_Div: SYSCTRL_CLK_Div_None...SYSCTRL_CLK_Div32. + * @retval None + */ +void SYSCTRL_RSAClkCtrl(uint8_t PllSource, SYSCLK_PER2Source_TypeDef Source, uint32_t Clk_Div) +{ + 1002024: b5f8 push {r3, r4, r5, r6, r7, lr} + 1002026: 0006 movs r6, r0 + 1002028: 000f movs r7, r1 + 100202a: 0014 movs r4, r2 + _ASSERT(IS_SYSCTRL_PLL_SEL(PllSource)); + 100202c: 28aa cmp r0, #170 ; 0xaa + 100202e: d008 beq.n 1002042 + 1002030: 280a cmp r0, #10 + 1002032: d006 beq.n 1002042 + 1002034: 2805 cmp r0, #5 + 1002036: d004 beq.n 1002042 + 1002038: 4a26 ldr r2, [pc, #152] ; (10020d4 ) + 100203a: 4927 ldr r1, [pc, #156] ; (10020d8 ) + 100203c: 4827 ldr r0, [pc, #156] ; (10020dc ) + 100203e: f7fe fa5f bl 1000500 <_assert_handler> + _ASSERT(IS_SYSCTRL_PER2SOURCE_SEL(Source)); + 1002042: 2f03 cmp r7, #3 + 1002044: d905 bls.n 1002052 + 1002046: 21fd movs r1, #253 ; 0xfd + 1002048: 4a22 ldr r2, [pc, #136] ; (10020d4 ) + 100204a: 0089 lsls r1, r1, #2 + 100204c: 4823 ldr r0, [pc, #140] ; (10020dc ) + 100204e: f7fe fa57 bl 1000500 <_assert_handler> + _ASSERT(IS_SYSCTRL_CLK_DIV(Clk_Div)); + 1002052: 23e0 movs r3, #224 ; 0xe0 + 1002054: 421c tst r4, r3 + 1002056: d006 beq.n 1002066 + 1002058: 2cff cmp r4, #255 ; 0xff + 100205a: d004 beq.n 1002066 + 100205c: 4a1d ldr r2, [pc, #116] ; (10020d4 ) + 100205e: 4920 ldr r1, [pc, #128] ; (10020e0 ) + 1002060: 481e ldr r0, [pc, #120] ; (10020dc ) + 1002062: f7fe fa4d bl 1000500 <_assert_handler> + IS_PER2_PLLSOURCE(PllSource,Source); + 1002066: 2eaa cmp r6, #170 ; 0xaa + 1002068: d007 beq.n 100207a + 100206a: 1ebb subs r3, r7, #2 + 100206c: 2b01 cmp r3, #1 + 100206e: d904 bls.n 100207a + 1002070: 4a18 ldr r2, [pc, #96] ; (10020d4 ) + 1002072: 491c ldr r1, [pc, #112] ; (10020e4 ) + 1002074: 4819 ldr r0, [pc, #100] ; (10020dc ) + 1002076: f7fe fa43 bl 1000500 <_assert_handler> + + /*pll source config*/ + MRCC->CLK_PLL_SEL.bit.RSA_PLL_SEL = PllSource; + 100207a: 4d1b ldr r5, [pc, #108] ; (10020e8 ) + 100207c: 0732 lsls r2, r6, #28 + 100207e: 6a2b ldr r3, [r5, #32] + 1002080: 011b lsls r3, r3, #4 + 1002082: 091b lsrs r3, r3, #4 + 1002084: 4313 orrs r3, r2 + 1002086: 622b str r3, [r5, #32] + + /*pll freq config*/ + if(PllSource == PLL_HSI || PllSource == PLL_HSE) + 1002088: 2e0a cmp r6, #10 + 100208a: d001 beq.n 1002090 + 100208c: 2e05 cmp r6, #5 + 100208e: d106 bne.n 100209e + { + uint8_t PLLChannel = IS_PER2_PLLCHANNEL(Source); + 1002090: 0039 movs r1, r7 + 1002092: 2f02 cmp r7, #2 + 1002094: d000 beq.n 1002098 + 1002096: 2104 movs r1, #4 + SYSCTRL_PLLOpen(PllSource,PLLChannel); + 1002098: 0030 movs r0, r6 + 100209a: f7ff fa69 bl 1001570 + } + + /*source select*/ + MRCC->CLK_RSA.bit.SEL = Source; + 100209e: 2203 movs r2, #3 + 10020a0: 8d2b ldrh r3, [r5, #40] ; 0x28 + 10020a2: 4017 ands r7, r2 + 10020a4: 4393 bics r3, r2 + 10020a6: 431f orrs r7, r3 + + /*set clk div*/ + MRCC->CLK_RSA.bit.DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 10020a8: 2301 movs r3, #1 + 10020aa: 210f movs r1, #15 + MRCC->CLK_RSA.bit.SEL = Source; + 10020ac: 852f strh r7, [r5, #40] ; 0x28 + MRCC->CLK_RSA.bit.DIV_HI = (Clk_Div >> 1) + ((Clk_Div & 1) ? 1 : 0); + 10020ae: 0862 lsrs r2, r4, #1 + 10020b0: 401c ands r4, r3 + 10020b2: 8d2b ldrh r3, [r5, #40] ; 0x28 + 10020b4: 18a4 adds r4, r4, r2 + 10020b6: 400c ands r4, r1 + 10020b8: 051b lsls r3, r3, #20 + 10020ba: 0d1b lsrs r3, r3, #20 + 10020bc: 0324 lsls r4, r4, #12 + 10020be: 431c orrs r4, r3 + 10020c0: 852c strh r4, [r5, #40] ; 0x28 + MRCC->CLK_RSA.bit.DIV_LO = Clk_Div >> 1; + 10020c2: 400a ands r2, r1 + 10020c4: 4b09 ldr r3, [pc, #36] ; (10020ec ) + 10020c6: 8d29 ldrh r1, [r5, #40] ; 0x28 + 10020c8: 0212 lsls r2, r2, #8 + 10020ca: 4019 ands r1, r3 + 10020cc: 430a orrs r2, r1 + 10020ce: 852a strh r2, [r5, #40] ; 0x28 +} + 10020d0: bdf8 pop {r3, r4, r5, r6, r7, pc} + 10020d2: 46c0 nop ; (mov r8, r8) + 10020d4: 01006e21 .word 0x01006e21 + 10020d8: 000003f3 .word 0x000003f3 + 10020dc: 01006c1b .word 0x01006c1b + 10020e0: 000003f5 .word 0x000003f5 + 10020e4: 000003f6 .word 0x000003f6 + 10020e8: 000f8400 .word 0x000f8400 + 10020ec: fffff0ff .word 0xfffff0ff + +010020f0 : + * @method SYSCTRL_GetMcuClkFreq + * @brief Get MCU clock freq + * @retval MCU freq + */ +static uint32_t SYSCTRL_GetMcuClkFreq(void) +{ + 10020f0: b5f8 push {r3, r4, r5, r6, r7, lr} + ClocksFrePara->PllSource = MRCC->CLK_PLL_SEL.bit.MCU_PLL_SEL& 0x0f; + 10020f2: 4d15 ldr r5, [pc, #84] ; (1002148 ) + 10020f4: 6a28 ldr r0, [r5, #32] + ClocksFrePara->Source = MRCC->MCU_CLK.bit.SEL& 0x03; + 10020f6: 692b ldr r3, [r5, #16] + ClocksFrePara->divsel = MRCC->MCU_CLK.bit.DIV_SEL & 0x01; + 10020f8: 692f ldr r7, [r5, #16] + ClocksFrePara->div_hi = MRCC->MCU_CLK.bit.DIV_HI & 0xff; + 10020fa: 692c ldr r4, [r5, #16] + ClocksFrePara->div_lo = MRCC->MCU_CLK.bit.DIV_LO & 0xff; + 10020fc: 692e ldr r6, [r5, #16] + ClocksFrePara->PllSource = MRCC->CLK_PLL_SEL.bit.MCU_PLL_SEL& 0x0f; + 10020fe: 0100 lsls r0, r0, #4 + ClocksFrePara->Source = MRCC->MCU_CLK.bit.SEL& 0x03; + 1002100: 079b lsls r3, r3, #30 + ClocksFrePara->divsel = MRCC->MCU_CLK.bit.DIV_SEL & 0x01; + 1002102: 06ff lsls r7, r7, #27 + ClocksFrePara->div_hi = MRCC->MCU_CLK.bit.DIV_HI & 0xff; + 1002104: 0224 lsls r4, r4, #8 + ClocksFrePara->div_lo = MRCC->MCU_CLK.bit.DIV_LO & 0xff; + 1002106: 0436 lsls r6, r6, #16 + ClocksFrePara->PllSource = MRCC->CLK_PLL_SEL.bit.MCU_PLL_SEL& 0x0f; + 1002108: 0f00 lsrs r0, r0, #28 + ClocksFrePara->Source = MRCC->MCU_CLK.bit.SEL& 0x03; + 100210a: 0f9b lsrs r3, r3, #30 + ClocksFrePara->divsel = MRCC->MCU_CLK.bit.DIV_SEL & 0x01; + 100210c: 0fff lsrs r7, r7, #31 + ClocksFrePara->div_hi = MRCC->MCU_CLK.bit.DIV_HI & 0xff; + 100210e: 0e24 lsrs r4, r4, #24 + ClocksFrePara->div_lo = MRCC->MCU_CLK.bit.DIV_LO & 0xff; + 1002110: 0e36 lsrs r6, r6, #24 + switch(Clock_Para ->Source) + 1002112: 2b02 cmp r3, #2 + 1002114: d013 beq.n 100213e + 1002116: d814 bhi.n 1002142 + 1002118: 2b01 cmp r3, #1 + 100211a: d00c beq.n 1002136 + Clock_Freq = CLOCK_FRE_192M; + 100211c: 480b ldr r0, [pc, #44] ; (100214c ) + + SYSCTRL_GetClocksCorePara(MCU_FRE,&McuClocksFrePara); + + Mcu_Clk_Freq = SYSCTRL_GetMcuClocksSource(&McuClocksFrePara); + + if(McuClocksFrePara.divsel == SET) + 100211e: 2f01 cmp r7, #1 + 1002120: d103 bne.n 100212a + { + Mcu_Clk_Freq /= (McuClocksFrePara.div_hi + McuClocksFrePara.div_lo + 2); + 1002122: 19a4 adds r4, r4, r6 + 1002124: 1ca1 adds r1, r4, #2 + 1002126: f004 fa25 bl 1006574 <__udivsi3> + } + /*enable rc32k as clk cpu,ignore all other confings*/ + if(MRCC->MCU_CLK.bit.RC_32K == SET) + 100212a: 692b ldr r3, [r5, #16] + 100212c: 075b lsls r3, r3, #29 + 100212e: d501 bpl.n 1002134 + { + Mcu_Clk_Freq = CLOCK_FRE_32K; + 1002130: 20fa movs r0, #250 ; 0xfa + 1002132: 01c0 lsls r0, r0, #7 + } + + return Mcu_Clk_Freq; +} + 1002134: bdf8 pop {r3, r4, r5, r6, r7, pc} + Clock_Freq = SYSCTRL_GetPllFreq(Clock_Para->PllSource,PLL_CHANNEL_192MHz); + 1002136: 2102 movs r1, #2 + Clock_Freq = SYSCTRL_GetPllFreq(Clock_Para->PllSource,PLL_CHANNEL_256MHz); + 1002138: f7ff fb58 bl 10017ec + 100213c: e7ef b.n 100211e + 100213e: 2104 movs r1, #4 + 1002140: e7fa b.n 1002138 + Clock_Freq = CLOCK_FRE_48M; + 1002142: 4803 ldr r0, [pc, #12] ; (1002150 ) + 1002144: e7eb b.n 100211e + 1002146: 46c0 nop ; (mov r8, r8) + 1002148: 000f8400 .word 0x000f8400 + 100214c: 0b71b000 .word 0x0b71b000 + 1002150: 02dc6c00 .word 0x02dc6c00 + +01002154 : + * @brief Get clock exported freq + * @param Clocks_Types: clock exported types,input selection for SYSCTRL_ClocksFreParaTypeDef + * @retval freq + */ +uint32_t SYSCTRL_GetClocksFreq(SYSCTRL_Exported_Types Clocks_Types) +{ + 1002154: b537 push {r0, r1, r2, r4, r5, lr} + 1002156: 0005 movs r5, r0 + _ASSERT(IS_SYSCTRL_EXPORTED_TYPES(Clocks_Types)); + 1002158: 280a cmp r0, #10 + 100215a: d904 bls.n 1002166 + 100215c: 4a86 ldr r2, [pc, #536] ; (1002378 ) + 100215e: 4987 ldr r1, [pc, #540] ; (100237c ) + 1002160: 4887 ldr r0, [pc, #540] ; (1002380 ) + 1002162: f7fe f9cd bl 1000500 <_assert_handler> + memset(ClocksFrePara, 0xff, sizeof(SYSCTRL_ClocksFreParaTypeDef)); + 1002166: 2205 movs r2, #5 + 1002168: 21ff movs r1, #255 ; 0xff + 100216a: 4668 mov r0, sp + 100216c: f004 f9a0 bl 10064b0 + switch(Clocks_Types) + 1002170: 2d0a cmp r5, #10 + 1002172: d834 bhi.n 10021de + 1002174: 0028 movs r0, r5 + 1002176: 4b83 ldr r3, [pc, #524] ; (1002384 ) + 1002178: f004 f9f2 bl 1006560 <__gnu_thumb1_case_uqi> + 100217c: 48209506 .word 0x48209506 + 1002180: 7e7b6e5a .word 0x7e7b6e5a + 1002184: a48a .short 0xa48a + 1002186: 95 .byte 0x95 + 1002187: 00 .byte 0x00 + ClocksFrePara->PllSource = MRCC->CLK_PLL_SEL.bit.MCU_PLL_SEL& 0x0f; + 1002188: 4669 mov r1, sp + 100218a: 6a1a ldr r2, [r3, #32] + 100218c: 0112 lsls r2, r2, #4 + 100218e: 0f12 lsrs r2, r2, #28 + 1002190: 704a strb r2, [r1, #1] + ClocksFrePara->Source = MRCC->MCU_CLK.bit.SEL& 0x03; + 1002192: 691a ldr r2, [r3, #16] + 1002194: 0792 lsls r2, r2, #30 + 1002196: 0f92 lsrs r2, r2, #30 + 1002198: 700a strb r2, [r1, #0] + ClocksFrePara->divsel = MRCC->MCU_CLK.bit.DIV_SEL & 0x01; + 100219a: 691a ldr r2, [r3, #16] + 100219c: 06d2 lsls r2, r2, #27 + 100219e: 0fd2 lsrs r2, r2, #31 + 10021a0: 708a strb r2, [r1, #2] + ClocksFrePara->div_hi = MRCC->MCU_CLK.bit.DIV_HI & 0xff; + 10021a2: 691a ldr r2, [r3, #16] + 10021a4: 0212 lsls r2, r2, #8 + 10021a6: 0e12 lsrs r2, r2, #24 + 10021a8: 70ca strb r2, [r1, #3] + ClocksFrePara->div_lo = MRCC->MCU_CLK.bit.DIV_LO & 0xff; + 10021aa: 691b ldr r3, [r3, #16] + 10021ac: 041b lsls r3, r3, #16 + 10021ae: 0e1b lsrs r3, r3, #24 + 10021b0: 710b strb r3, [r1, #4] + /*get source clock*/ + + if(Clocks_Types == MCU_FRE) + { + /*get MCU clock freq*/ + Clock_Freq = SYSCTRL_GetMcuClkFreq(); + 10021b2: f7ff ff9d bl 10020f0 + + /*pclk : freq div after ahb clock*/ + + if(Clocks_Types == PCLK_FRE && MRCC->PCLK_CTRL.bit.DIV_EN == SET) + { + Clock_Freq /= (MRCC->PCLK_CTRL.bit.SEL + 1); + 10021b6: 0004 movs r4, r0 + } + + return Clock_Freq; +} + 10021b8: 0020 movs r0, r4 + 10021ba: bd3e pop {r1, r2, r3, r4, r5, pc} + ClocksFrePara->PllSource = MRCC->CLK_PLL_SEL.bit.QSPI_PLL_SEL& 0x0f; + 10021bc: 4669 mov r1, sp + 10021be: 6a1a ldr r2, [r3, #32] + 10021c0: 0312 lsls r2, r2, #12 + 10021c2: 0f12 lsrs r2, r2, #28 + 10021c4: 704a strb r2, [r1, #1] + ClocksFrePara->Source = MRCC->PER1_CLK.bit.QSPI_SEL& 0x03; + 10021c6: 695a ldr r2, [r3, #20] + 10021c8: 0392 lsls r2, r2, #14 + 10021ca: 0f92 lsrs r2, r2, #30 + 10021cc: 700a strb r2, [r1, #0] + ClocksFrePara->div_hi = MRCC->PER1_CLK.bit.QSPI_DIV_HI & 0x0f; + 10021ce: 695a ldr r2, [r3, #20] + 10021d0: 0f12 lsrs r2, r2, #28 + 10021d2: 70ca strb r2, [r1, #3] + ClocksFrePara->div_lo = MRCC->PER1_CLK.bit.QSPI_DIV_LO & 0x0f; + 10021d4: 695b ldr r3, [r3, #20] + 10021d6: 011b lsls r3, r3, #4 + 10021d8: 0f1b lsrs r3, r3, #28 + 10021da: 466a mov r2, sp + 10021dc: 7113 strb r3, [r2, #4] + else if(Clocks_Types == PER1_AHB_FRE || Clocks_Types == PER1_QSPI_FRE || Clocks_Types == PCLK_FRE) + 10021de: 1e6b subs r3, r5, #1 + 10021e0: 2b01 cmp r3, #1 + 10021e2: d902 bls.n 10021ea + 10021e4: 2d0a cmp r5, #10 + 10021e6: d000 beq.n 10021ea + 10021e8: e09e b.n 1002328 + _ASSERT(IS_SYSCTRL_PER1SOURCE_SEL(Clock_Para->Source)); + 10021ea: 466b mov r3, sp + 10021ec: 781b ldrb r3, [r3, #0] + 10021ee: 2b03 cmp r3, #3 + 10021f0: d904 bls.n 10021fc + 10021f2: 4a65 ldr r2, [pc, #404] ; (1002388 ) + 10021f4: 4965 ldr r1, [pc, #404] ; (100238c ) + 10021f6: 4862 ldr r0, [pc, #392] ; (1002380 ) + 10021f8: f7fe f982 bl 1000500 <_assert_handler> + switch(Clock_Para ->Source) + 10021fc: 466b mov r3, sp + 10021fe: 7818 ldrb r0, [r3, #0] + 1002200: 2803 cmp r0, #3 + 1002202: d86e bhi.n 10022e2 + 1002204: f004 f9ac bl 1006560 <__gnu_thumb1_case_uqi> + 1002208: b68a6cad .word 0xb68a6cad + ClocksFrePara->PllSource = MRCC->PER2_CLK.bit.HSPI_PLL_SEL & 0x0f; + 100220c: 4669 mov r1, sp + 100220e: 699a ldr r2, [r3, #24] + 1002210: 0312 lsls r2, r2, #12 + 1002212: 0fd2 lsrs r2, r2, #31 + 1002214: 704a strb r2, [r1, #1] + ClocksFrePara->Source = MRCC->PER2_CLK.bit.HSPI_SEL & 0x03; + 1002216: 699a ldr r2, [r3, #24] + 1002218: 0392 lsls r2, r2, #14 + 100221a: 0f92 lsrs r2, r2, #30 + 100221c: 700a strb r2, [r1, #0] + ClocksFrePara->divsel = MRCC->PER2_CLK.bit.HSPI_DIV_SEL & 0x01; + 100221e: 699a ldr r2, [r3, #24] + 1002220: 02d2 lsls r2, r2, #11 + 1002222: 0fd2 lsrs r2, r2, #31 + 1002224: 708a strb r2, [r1, #2] + ClocksFrePara->div_hi = MRCC->PER2_CLK.bit.HSPI_DIV_HI & 0x0f; + 1002226: 699a ldr r2, [r3, #24] + 1002228: 0f12 lsrs r2, r2, #28 + 100222a: 70ca strb r2, [r1, #3] + ClocksFrePara->div_lo = MRCC->PER2_CLK.bit.HSPI_DIV_LO & 0x0f; + 100222c: 699b ldr r3, [r3, #24] + 100222e: e7d2 b.n 10021d6 + ClocksFrePara->PllSource = MRCC->PER2_CLK.bit.PSRAM_PLL_SEL & 0x0f; + 1002230: 4669 mov r1, sp + 1002232: 699a ldr r2, [r3, #24] + 1002234: 0712 lsls r2, r2, #28 + 1002236: 0fd2 lsrs r2, r2, #31 + 1002238: 704a strb r2, [r1, #1] + ClocksFrePara->Source = MRCC->PER2_CLK.bit.PSRAM_SEL & 0x03; + 100223a: 699a ldr r2, [r3, #24] + 100223c: 0792 lsls r2, r2, #30 + 100223e: 0f92 lsrs r2, r2, #30 + 1002240: 700a strb r2, [r1, #0] + ClocksFrePara->divsel = MRCC->PER2_CLK.bit.PSRAM_DIV_SEL & 0x01; + 1002242: 699a ldr r2, [r3, #24] + 1002244: 06d2 lsls r2, r2, #27 + 1002246: 0fd2 lsrs r2, r2, #31 + 1002248: 708a strb r2, [r1, #2] + ClocksFrePara->div_hi = MRCC->PER2_CLK.bit.PSRAM_DIV_HI & 0x0f; + 100224a: 699a ldr r2, [r3, #24] + 100224c: 0412 lsls r2, r2, #16 + 100224e: 0f12 lsrs r2, r2, #28 + 1002250: 70ca strb r2, [r1, #3] + ClocksFrePara->div_lo = MRCC->PER2_CLK.bit.PSRAM_DIV_LO & 0x0f; + 1002252: 699b ldr r3, [r3, #24] + ClocksFrePara->div_lo = MRCC->CLK_RSA.bit.DIV_LO & 0x0f; + 1002254: 051b lsls r3, r3, #20 + 1002256: e7bf b.n 10021d8 + ClocksFrePara->Source = MRCC->PER3_CLK.bit.ICE_SEL & 0x03; + 1002258: 69da ldr r2, [r3, #28] + 100225a: 0792 lsls r2, r2, #30 + ClocksFrePara->Source = MRCC->PER3_CLK.bit.ADAC_SEL & 0x03; + 100225c: 4669 mov r1, sp + 100225e: 0f92 lsrs r2, r2, #30 + 1002260: 700a strb r2, [r1, #0] + ClocksFrePara->div_hi = MRCC->PER3_CLK.bit.ICE_DIV_HI & 0x03; + 1002262: 69da ldr r2, [r3, #28] + 1002264: 0612 lsls r2, r2, #24 + 1002266: 0f92 lsrs r2, r2, #30 + 1002268: 70ca strb r2, [r1, #3] + ClocksFrePara->div_lo = MRCC->PER3_CLK.bit.ICE_DIV_LO & 0x03; + 100226a: 69db ldr r3, [r3, #28] + 100226c: 069b lsls r3, r3, #26 + ClocksFrePara->div_lo = MRCC->PER3_CLK.bit.GPIO1_DIV_LO & 0x03; + 100226e: 0f9b lsrs r3, r3, #30 + 1002270: e7b3 b.n 10021da + ClocksFrePara->Source = MRCC->PER3_CLK.bit.ADAC_SEL & 0x03; + 1002272: 69da ldr r2, [r3, #28] + 1002274: 0592 lsls r2, r2, #22 + 1002276: e7f1 b.n 100225c + ClocksFrePara->Source = MRCC->PER3_CLK.bit.GPIO0_SEL & 0x03; + 1002278: 4669 mov r1, sp + 100227a: 69da ldr r2, [r3, #28] + 100227c: 0392 lsls r2, r2, #14 + 100227e: 0f92 lsrs r2, r2, #30 + 1002280: 700a strb r2, [r1, #0] + ClocksFrePara->div_hi = MRCC->PER3_CLK.bit.GPIO0_DIV_HI & 0x03; + 1002282: 69da ldr r2, [r3, #28] + 1002284: 0212 lsls r2, r2, #8 + 1002286: 0f92 lsrs r2, r2, #30 + 1002288: 70ca strb r2, [r1, #3] + ClocksFrePara->div_lo = MRCC->PER3_CLK.bit.GPIO0_DIV_LO & 0x03; + 100228a: 69db ldr r3, [r3, #28] + 100228c: 029b lsls r3, r3, #10 + 100228e: e7ee b.n 100226e + ClocksFrePara->Source = MRCC->PER3_CLK.bit.GPIO1_SEL & 0x03; + 1002290: 4669 mov r1, sp + 1002292: 69da ldr r2, [r3, #28] + 1002294: 0192 lsls r2, r2, #6 + 1002296: 0f92 lsrs r2, r2, #30 + 1002298: 700a strb r2, [r1, #0] + ClocksFrePara->div_hi = MRCC->PER3_CLK.bit.GPIO1_DIV_HI & 0x03; + 100229a: 69da ldr r2, [r3, #28] + 100229c: 0f92 lsrs r2, r2, #30 + 100229e: 70ca strb r2, [r1, #3] + ClocksFrePara->div_lo = MRCC->PER3_CLK.bit.GPIO1_DIV_LO & 0x03; + 10022a0: 69db ldr r3, [r3, #28] + 10022a2: 009b lsls r3, r3, #2 + 10022a4: e7e3 b.n 100226e + ClocksFrePara->PllSource = MRCC->CLK_PLL_SEL.bit.AHB_PLL_SEL& 0x0f; + 10022a6: 4669 mov r1, sp + 10022a8: 6a1a ldr r2, [r3, #32] + 10022aa: 0512 lsls r2, r2, #20 + 10022ac: 0f12 lsrs r2, r2, #28 + 10022ae: 704a strb r2, [r1, #1] + ClocksFrePara->Source = MRCC->PER1_CLK.bit.AHB_SEL& 0x03; + 10022b0: 695a ldr r2, [r3, #20] + 10022b2: 0792 lsls r2, r2, #30 + 10022b4: 0f92 lsrs r2, r2, #30 + 10022b6: 700a strb r2, [r1, #0] + ClocksFrePara->div_hi = MRCC->PER1_CLK.bit.AHB_DIV_HI & 0x0f; + 10022b8: 695a ldr r2, [r3, #20] + 10022ba: 0412 lsls r2, r2, #16 + 10022bc: 0f12 lsrs r2, r2, #28 + 10022be: 70ca strb r2, [r1, #3] + ClocksFrePara->div_lo = MRCC->PER1_CLK.bit.AHB_DIV_LO & 0x0f; + 10022c0: 695b ldr r3, [r3, #20] + 10022c2: e7c7 b.n 1002254 + ClocksFrePara->PllSource = MRCC->CLK_PLL_SEL.bit.RSA_PLL_SEL & 0x0f; + 10022c4: 4669 mov r1, sp + 10022c6: 6a1a ldr r2, [r3, #32] + 10022c8: 0f12 lsrs r2, r2, #28 + 10022ca: 704a strb r2, [r1, #1] + ClocksFrePara->Source = MRCC->CLK_RSA.bit.SEL & 0x03; + 10022cc: 6a9a ldr r2, [r3, #40] ; 0x28 + 10022ce: 0792 lsls r2, r2, #30 + 10022d0: 0f92 lsrs r2, r2, #30 + 10022d2: 700a strb r2, [r1, #0] + ClocksFrePara->div_hi = MRCC->CLK_RSA.bit.DIV_HI & 0x0f; + 10022d4: 6a9a ldr r2, [r3, #40] ; 0x28 + 10022d6: 0412 lsls r2, r2, #16 + 10022d8: 0f12 lsrs r2, r2, #28 + 10022da: 70ca strb r2, [r1, #3] + ClocksFrePara->div_lo = MRCC->CLK_RSA.bit.DIV_LO & 0x0f; + 10022dc: 6a9b ldr r3, [r3, #40] ; 0x28 + 10022de: e7b9 b.n 1002254 + Clock_Freq = CLOCK_FRE_192M; + 10022e0: 4c2b ldr r4, [pc, #172] ; (1002390 ) + if(ClocksFrePara.divsel != RESET) + 10022e2: 466b mov r3, sp + 10022e4: 789b ldrb r3, [r3, #2] + 10022e6: 2b00 cmp r3, #0 + 10022e8: d008 beq.n 10022fc + Clock_Freq /= (ClocksFrePara.div_hi + ClocksFrePara.div_lo + 2); + 10022ea: 466b mov r3, sp + 10022ec: 78d9 ldrb r1, [r3, #3] + 10022ee: 791b ldrb r3, [r3, #4] + 10022f0: 0020 movs r0, r4 + 10022f2: 18c9 adds r1, r1, r3 + 10022f4: 3102 adds r1, #2 + 10022f6: f004 f93d bl 1006574 <__udivsi3> + 10022fa: 0004 movs r4, r0 + if(Clocks_Types == PCLK_FRE && MRCC->PCLK_CTRL.bit.DIV_EN == SET) + 10022fc: 2d0a cmp r5, #10 + 10022fe: d000 beq.n 1002302 + 1002300: e75a b.n 10021b8 + 1002302: 4b20 ldr r3, [pc, #128] ; (1002384 ) + 1002304: 685a ldr r2, [r3, #4] + 1002306: 0752 lsls r2, r2, #29 + 1002308: d400 bmi.n 100230c + 100230a: e755 b.n 10021b8 + Clock_Freq /= (MRCC->PCLK_CTRL.bit.SEL + 1); + 100230c: 6859 ldr r1, [r3, #4] + 100230e: 0020 movs r0, r4 + 1002310: 0789 lsls r1, r1, #30 + 1002312: 0f89 lsrs r1, r1, #30 + 1002314: 3101 adds r1, #1 + 1002316: f004 f92d bl 1006574 <__udivsi3> + 100231a: e74c b.n 10021b6 + Clock_Freq = SYSCTRL_GetPllFreq(Clock_Para->PllSource,PLL_CHANNEL_192MHz); + 100231c: 466b mov r3, sp + 100231e: 2102 movs r1, #2 + 1002320: 7858 ldrb r0, [r3, #1] + Clock_Freq = SYSCTRL_GetPllFreq(Clock_Para->PllSource,PLL_CHANNEL_256MHz); + 1002322: f7ff fa63 bl 10017ec + 1002326: e01e b.n 1002366 + else if(Clocks_Types == PER2_HSPI_FRE || Clocks_Types == PER2_PSRAM_FRE || Clocks_Types == RSA_FRE) + 1002328: 1eeb subs r3, r5, #3 + 100232a: 2b01 cmp r3, #1 + 100232c: d901 bls.n 1002332 + 100232e: 2d09 cmp r5, #9 + 1002330: d120 bne.n 1002374 + _ASSERT(IS_SYSCTRL_PER2SOURCE_SEL(Clock_Para->Source)); + 1002332: 466b mov r3, sp + 1002334: 781b ldrb r3, [r3, #0] + 1002336: 2b03 cmp r3, #3 + 1002338: d904 bls.n 1002344 + 100233a: 4a16 ldr r2, [pc, #88] ; (1002394 ) + 100233c: 4916 ldr r1, [pc, #88] ; (1002398 ) + 100233e: 4810 ldr r0, [pc, #64] ; (1002380 ) + 1002340: f7fe f8de bl 1000500 <_assert_handler> + Clock_Para->PllSource = Clock_Para->PllSource == 1 ? PLL_HSE : PLL_HSI; + 1002344: 466b mov r3, sp + 1002346: 785a ldrb r2, [r3, #1] + 1002348: 2305 movs r3, #5 + 100234a: 2a01 cmp r2, #1 + 100234c: d000 beq.n 1002350 + 100234e: 18db adds r3, r3, r3 + 1002350: 466a mov r2, sp + switch(Clock_Para ->Source) + 1002352: 7810 ldrb r0, [r2, #0] + Clock_Para->PllSource = Clock_Para->PllSource == 1 ? PLL_HSE : PLL_HSI; + 1002354: 7053 strb r3, [r2, #1] + switch(Clock_Para ->Source) + 1002356: 2803 cmp r0, #3 + 1002358: d8c3 bhi.n 10022e2 + 100235a: f004 f8f7 bl 100654c <__gnu_thumb1_case_sqi> + 100235e: c102 .short 0xc102 + 1002360: 0906 .short 0x0906 + Clock_Freq = SYSCTRL_GetMcuClkFreq(); + 1002362: f7ff fec5 bl 10020f0 + Clock_Freq = SYSCTRL_GetPllFreq(Clock_Para->PllSource,PLL_CHANNEL_256MHz); + 1002366: 0004 movs r4, r0 + 1002368: e7bb b.n 10022e2 + Clock_Freq = SYSCTRL_GetPllFreq(Clock_Para->PllSource,PLL_CHANNEL_192MHz); + 100236a: 2102 movs r1, #2 + Clock_Freq = SYSCTRL_GetPllFreq(Clock_Para->PllSource,PLL_CHANNEL_256MHz); + 100236c: 0018 movs r0, r3 + 100236e: e7d8 b.n 1002322 + 1002370: 2104 movs r1, #4 + 1002372: e7fb b.n 100236c + Clock_Freq = CLOCK_FRE_48M; + 1002374: 4c09 ldr r4, [pc, #36] ; (100239c ) + 1002376: e7b4 b.n 10022e2 + 1002378: 01006e34 .word 0x01006e34 + 100237c: 000004d9 .word 0x000004d9 + 1002380: 01006c1b .word 0x01006c1b + 1002384: 000f8400 .word 0x000f8400 + 1002388: 01006e78 .word 0x01006e78 + 100238c: 0000049d .word 0x0000049d + 1002390: 0b71b000 .word 0x0b71b000 + 1002394: 01006e94 .word 0x01006e94 + 1002398: 000004ba .word 0x000004ba + 100239c: 02dc6c00 .word 0x02dc6c00 + +010023a0 : + * @param None + * @retval None + */ +void SYSCTRL_DeepSleep_flashPowerDown(void) +{ + ((void(*)(uint8_t cmd))(FUNC_QSPI_FLASH_CMD))(0xB9);//flash power down + 10023a0: 20b9 movs r0, #185 ; 0xb9 + 10023a2: 4b16 ldr r3, [pc, #88] ; (10023fc ) +{ + 10023a4: b510 push {r4, lr} + ((void(*)(uint8_t cmd))(FUNC_QSPI_FLASH_CMD))(0xB9);//flash power down + 10023a6: 4798 blx r3 + { + GPIO_CONFIG(i)=PULL_PU; + } + else if(GPIO_CONFIG(i)==(ICE|PULL_PU) || GPIO_CONFIG(i)==JTAG_SWCLK || GPIO_CONFIG(i)==JTAG_SWDIO) + { + GPIO_CONFIG(i)=ANALOG; + 10023a8: 21c0 movs r1, #192 ; 0xc0 + GPIO_CONFIG(i)=PULL_PU; + 10023aa: 2040 movs r0, #64 ; 0x40 + ((void(*)(uint8_t cmd))(FUNC_QSPI_FLASH_CMD))(0xB9);//flash power down + 10023ac: 4b14 ldr r3, [pc, #80] ; (1002400 ) + for (int i = 0; i < 80; i++) + 10023ae: 4a15 ldr r2, [pc, #84] ; (1002404 ) + if(GPIO_CONFIG(i)>=QSPI_NCS && GPIO_CONFIG(i)<=QSPI_IO3) + 10023b0: 781c ldrb r4, [r3, #0] + 10023b2: 2c01 cmp r4, #1 + 10023b4: d916 bls.n 10023e4 + 10023b6: 781c ldrb r4, [r3, #0] + 10023b8: 2c07 cmp r4, #7 + 10023ba: d813 bhi.n 10023e4 + GPIO_CONFIG(i)=PULL_PU; + 10023bc: 7018 strb r0, [r3, #0] + 10023be: 3301 adds r3, #1 + for (int i = 0; i < 80; i++) + 10023c0: 4293 cmp r3, r2 + 10023c2: d1f5 bne.n 10023b0 + } + } + + MLPM->GPIO_LATCH.bit.LATCH = ENABLE; + 10023c4: 2185 movs r1, #133 ; 0x85 + 10023c6: 2201 movs r2, #1 + 10023c8: 4b0f ldr r3, [pc, #60] ; (1002408 ) + 10023ca: 0089 lsls r1, r1, #2 + 10023cc: 5c58 ldrb r0, [r3, r1] + 10023ce: 4302 orrs r2, r0 + 10023d0: 545a strb r2, [r3, r1] + MLPM->DEEP_SLEEP.reg = 0x5a; + 10023d2: 2288 movs r2, #136 ; 0x88 + 10023d4: 39bb subs r1, #187 ; 0xbb + 10023d6: 0092 lsls r2, r2, #2 + 10023d8: 39ff subs r1, #255 ; 0xff + 10023da: 5099 str r1, [r3, r2] + ((void(*)(int))(FUNC_DELAY_MS_ADDR))(100); + 10023dc: 2064 movs r0, #100 ; 0x64 + 10023de: 4b0b ldr r3, [pc, #44] ; (100240c ) + 10023e0: 4798 blx r3 +} + 10023e2: bd10 pop {r4, pc} + else if(GPIO_CONFIG(i)==(ICE|PULL_PU) || GPIO_CONFIG(i)==JTAG_SWCLK || GPIO_CONFIG(i)==JTAG_SWDIO) + 10023e4: 781c ldrb r4, [r3, #0] + 10023e6: 2c79 cmp r4, #121 ; 0x79 + 10023e8: d005 beq.n 10023f6 + 10023ea: 781c ldrb r4, [r3, #0] + 10023ec: 2c3c cmp r4, #60 ; 0x3c + 10023ee: d002 beq.n 10023f6 + 10023f0: 781c ldrb r4, [r3, #0] + 10023f2: 2c3d cmp r4, #61 ; 0x3d + 10023f4: d1e3 bne.n 10023be + GPIO_CONFIG(i)=ANALOG; + 10023f6: 7019 strb r1, [r3, #0] + 10023f8: e7e1 b.n 10023be + 10023fa: 46c0 nop ; (mov r8, r8) + 10023fc: 000057ed .word 0x000057ed + 1002400: 000f8700 .word 0x000f8700 + 1002404: 000f8750 .word 0x000f8750 + 1002408: 000fa800 .word 0x000fa800 + 100240c: 00005059 .word 0x00005059 + +01002410 : + * @brief cpu enter standby mode + * @param None + * @retval None + */ +void SYSCTRL_DeepSleep(void) +{ + 1002410: b510 push {r4, lr} + LPM_AccessCode(ENABLE); + 1002412: f000 f9fd bl 1002810 + LPM_RegisterClk(ENABLE); + 1002416: f000 f9ef bl 10027f8 + + uint32_t flashPowerDown_addr=(uint32_t)SYSCTRL_DeepSleep_flashPowerDown; + ((void(*)(void*, void*))FUNC_PREFETCH)(((void*)flashPowerDown_addr), ((void*)(flashPowerDown_addr + 0x100))); + 100241a: 4804 ldr r0, [pc, #16] ; (100242c ) + 100241c: 4b04 ldr r3, [pc, #16] ; (1002430 ) + 100241e: 1c41 adds r1, r0, #1 + 1002420: 31ff adds r1, #255 ; 0xff + 1002422: 4798 blx r3 + SYSCTRL_DeepSleep_flashPowerDown(); + 1002424: f7ff ffbc bl 10023a0 +} + 1002428: bd10 pop {r4, pc} + 100242a: 46c0 nop ; (mov r8, r8) + 100242c: 010023a1 .word 0x010023a1 + 1002430: 00005389 .word 0x00005389 + +01002434 : + +static void lightsleep_enter(uint8_t dvdd) +{ + *(volatile uint8_t*)(0xfa801) = 0xc0|(dvdd&0x0f); // 1v out + 1002434: 230f movs r3, #15 + 1002436: 22c0 movs r2, #192 ; 0xc0 +{ + 1002438: b570 push {r4, r5, r6, lr} + *(volatile uint8_t*)(0xfa801) = 0xc0|(dvdd&0x0f); // 1v out + 100243a: 4003 ands r3, r0 + 100243c: 4c19 ldr r4, [pc, #100] ; (10024a4 ) + 100243e: 4313 orrs r3, r2 + 1002440: 7023 strb r3, [r4, #0] + MMCU->CTRL.bit.LTSLEEP_EN = ENABLE; + 1002442: 23d0 movs r3, #208 ; 0xd0 +{ + 1002444: 0001 movs r1, r0 + MMCU->CTRL.bit.LTSLEEP_EN = ENABLE; + 1002446: 2001 movs r0, #1 + 1002448: 031b lsls r3, r3, #12 + 100244a: 881a ldrh r2, [r3, #0] + 100244c: 4302 orrs r2, r0 + 100244e: 801a strh r2, [r3, #0] + MMCU->CTRL.bit.WFI_EN = ENABLE; + 1002450: 2204 movs r2, #4 + 1002452: 881d ldrh r5, [r3, #0] + 1002454: 432a orrs r2, r5 + 1002456: 801a strh r2, [r3, #0] + __asm("NOP"); + 1002458: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 100245a: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 100245c: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 100245e: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002460: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002462: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002464: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002466: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002468: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 100246a: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 100246c: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 100246e: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002470: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002472: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002474: 46c0 nop ; (mov r8, r8) + MMCU->CTRL.bit.LTSLEEP = ENABLE; + 1002476: 2202 movs r2, #2 + 1002478: 881d ldrh r5, [r3, #0] + 100247a: 432a orrs r2, r5 + 100247c: 801a strh r2, [r3, #0] + __asm("NOP"); + 100247e: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002480: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002482: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002484: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002486: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002488: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 100248a: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 100248c: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 100248e: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002490: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002492: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002494: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002496: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 1002498: 46c0 nop ; (mov r8, r8) + __asm("NOP"); + 100249a: 46c0 nop ; (mov r8, r8) + *(volatile uint8_t*)(0xfa801) = dvdd; + ((void(*)(int))(FUNC_DELAY_MS_ADDR))(1); + 100249c: 4b02 ldr r3, [pc, #8] ; (10024a8 ) + *(volatile uint8_t*)(0xfa801) = dvdd; + 100249e: 7021 strb r1, [r4, #0] + ((void(*)(int))(FUNC_DELAY_MS_ADDR))(1); + 10024a0: 4798 blx r3 +} + 10024a2: bd70 pop {r4, r5, r6, pc} + 10024a4: 000fa801 .word 0x000fa801 + 10024a8: 00005059 .word 0x00005059 + +010024ac : + * @brief cpu enter wfi + * @param None + * @retval None + */ +void SYSCTRL_LightSleep(SYSCTRL_LightSleepParaDef *Para) +{ + 10024ac: b5f8 push {r3, r4, r5, r6, r7, lr} + 10024ae: 0004 movs r4, r0 + LPM_AccessCode(ENABLE); + 10024b0: f000 f9ae bl 1002810 + LPM_RegisterClk(ENABLE); + 10024b4: f000 f9a0 bl 10027f8 + + /*step 1 close rng*/ + *(volatile uint32_t *)(0xfb260) = 0; + 10024b8: 2300 movs r3, #0 + 10024ba: 4925 ldr r1, [pc, #148] ; (1002550 ) + + /*step 2 close unused clk*/ + MRCC->CLK_EN.reg |= (Para->AHB_ClkDisable | Para->APB_ClkDisable); + 10024bc: 4a25 ldr r2, [pc, #148] ; (1002554 ) + *(volatile uint32_t *)(0xfb260) = 0; + 10024be: 600b str r3, [r1, #0] + MRCC->CLK_EN.reg |= (Para->AHB_ClkDisable | Para->APB_ClkDisable); + 10024c0: 6823 ldr r3, [r4, #0] + 10024c2: 6865 ldr r5, [r4, #4] + 10024c4: 68d0 ldr r0, [r2, #12] + 10024c6: 432b orrs r3, r5 + 10024c8: 4303 orrs r3, r0 + 10024ca: 0020 movs r0, r4 + { + for(uint8_t i = 0; i < 32; i++) + { + if(Para->PD_Unusedio[j] & (1 << i)) + { + *(volatile uint8_t*)(0xf8700+j*32+i) = PULL_PD; + 10024cc: 2680 movs r6, #128 ; 0x80 + 10024ce: 000c movs r4, r1 + } + if(Para->PU_Unusedio[j] & (1 << i)) + { + *(volatile uint8_t*)(0xf8700+j*32+i) = PULL_PU; + 10024d0: 2740 movs r7, #64 ; 0x40 + MRCC->CLK_EN.reg |= (Para->AHB_ClkDisable | Para->APB_ClkDisable); + 10024d2: 60d3 str r3, [r2, #12] + 10024d4: 4a20 ldr r2, [pc, #128] ; (1002558 ) + 10024d6: 3008 adds r0, #8 +{ + 10024d8: 2300 movs r3, #0 + if(Para->PD_Unusedio[j] & (1 << i)) + 10024da: 2101 movs r1, #1 + 10024dc: 4099 lsls r1, r3 + 10024de: 6805 ldr r5, [r0, #0] + 10024e0: 420d tst r5, r1 + 10024e2: d001 beq.n 10024e8 + 10024e4: 18d5 adds r5, r2, r3 + *(volatile uint8_t*)(0xf8700+j*32+i) = PULL_PD; + 10024e6: 702e strb r6, [r5, #0] + if(Para->PU_Unusedio[j] & (1 << i)) + 10024e8: 68c5 ldr r5, [r0, #12] + 10024ea: 420d tst r5, r1 + 10024ec: d001 beq.n 10024f2 + 10024ee: 18d1 adds r1, r2, r3 + *(volatile uint8_t*)(0xf8700+j*32+i) = PULL_PU; + 10024f0: 700f strb r7, [r1, #0] + 10024f2: 3301 adds r3, #1 + for(uint8_t i = 0; i < 32; i++) + 10024f4: 2b20 cmp r3, #32 + 10024f6: d1f0 bne.n 10024da + for(uint8_t j = 0; j < 3;j++) + 10024f8: 4b18 ldr r3, [pc, #96] ; (100255c ) + 10024fa: 3220 adds r2, #32 + 10024fc: 3004 adds r0, #4 + 10024fe: 429a cmp r2, r3 + 1002500: d1ea bne.n 10024d8 + \details Disables IRQ interrupts by setting the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__STATIC_FORCEINLINE void __disable_irq(void) +{ + __ASM volatile ("cpsid i" : : : "memory"); + 1002502: b672 cpsid i + } + } + } + /*step 4 lower dvdd*/ + __disable_irq(); + uint8_t dvdd = *(volatile uint8_t*)(0xfa801); + 1002504: 4b16 ldr r3, [pc, #88] ; (1002560 ) + uint32_t LightStart = (uint32_t)lightsleep_enter; + ((void(*)(void *, void *))FUNC_PREFETCH)(((void *)LightStart), ((void *)(LightStart + 0x200))); + 1002506: 4817 ldr r0, [pc, #92] ; (1002564 ) + uint8_t dvdd = *(volatile uint8_t*)(0xfa801); + 1002508: 781d ldrb r5, [r3, #0] + ((void(*)(void *, void *))FUNC_PREFETCH)(((void *)LightStart), ((void *)(LightStart + 0x200))); + 100250a: 2380 movs r3, #128 ; 0x80 + 100250c: 009b lsls r3, r3, #2 + 100250e: 18c1 adds r1, r0, r3 + uint8_t dvdd = *(volatile uint8_t*)(0xfa801); + 1002510: b2ed uxtb r5, r5 + ((void(*)(void *, void *))FUNC_PREFETCH)(((void *)LightStart), ((void *)(LightStart + 0x200))); + 1002512: 4b15 ldr r3, [pc, #84] ; (1002568 ) + 1002514: 4798 blx r3 + /*step 5 enter light sleep*/ + lightsleep_enter(dvdd); + 1002516: 0028 movs r0, r5 + 1002518: f7ff ff8c bl 1002434 + __ASM volatile ("cpsie i" : : : "memory"); + 100251c: b662 cpsie i + NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 100251e: 2280 movs r2, #128 ; 0x80 + 1002520: 4b12 ldr r3, [pc, #72] ; (100256c ) + 1002522: 0412 lsls r2, r2, #16 + 1002524: 67da str r2, [r3, #124] ; 0x7c + \details Acts as a special kind of Data Memory Barrier. + It completes when all explicit memory accesses before this instruction complete. + */ +__STATIC_FORCEINLINE void __DSB(void) +{ + __ASM volatile ("dsb 0xF":::"memory"); + 1002526: f3bf 8f4f dsb sy + __ASM volatile ("isb 0xF":::"memory"); + 100252a: f3bf 8f6f isb sy + __enable_irq(); + NVIC_DisableIRQ(TRNG_IRQn); + ANA_RNG->RNG_CTRL0.reg |= 0xFFC00000; + 100252e: 4b10 ldr r3, [pc, #64] ; (1002570 ) + 1002530: 6822 ldr r2, [r4, #0] + 1002532: 4313 orrs r3, r2 + ANA_RNG->RNG_CTRL1.reg = 0x87878787; + + MSYSCTRL->RNG_CTRL = 0; + 1002534: 2200 movs r2, #0 + ANA_RNG->RNG_CTRL0.reg |= 0xFFC00000; + 1002536: 6023 str r3, [r4, #0] + ANA_RNG->RNG_CTRL1.reg = 0x87878787; + 1002538: 4b0e ldr r3, [pc, #56] ; (1002574 ) + 100253a: 6063 str r3, [r4, #4] + MSYSCTRL->RNG_CTRL = 0; + 100253c: 4b0e ldr r3, [pc, #56] ; (1002578 ) + 100253e: 609a str r2, [r3, #8] + MSYSCTRL->RNG_CTRL = 0x667f; + 1002540: 4a0e ldr r2, [pc, #56] ; (100257c ) + 1002542: 609a str r2, [r3, #8] + + //rng generation enable + while ((MSYSCTRL->RNG_CTRL & (1 << 28)) == 0) + 1002544: 2280 movs r2, #128 ; 0x80 + 1002546: 0552 lsls r2, r2, #21 + 1002548: 6899 ldr r1, [r3, #8] + 100254a: 4211 tst r1, r2 + 100254c: d0fc beq.n 1002548 + { + + } +} + 100254e: bdf8 pop {r3, r4, r5, r6, r7, pc} + 1002550: 000fb260 .word 0x000fb260 + 1002554: 000f8400 .word 0x000f8400 + 1002558: 000f8700 .word 0x000f8700 + 100255c: 000f8760 .word 0x000f8760 + 1002560: 000fa801 .word 0x000fa801 + 1002564: 01002435 .word 0x01002435 + 1002568: 00005389 .word 0x00005389 + 100256c: e000e104 .word 0xe000e104 + 1002570: ffc00000 .word 0xffc00000 + 1002574: 87878787 .word 0x87878787 + 1002578: 000f8520 .word 0x000f8520 + 100257c: 0000667f .word 0x0000667f + +01002580 : + * @param WakeSource : bit0~bit31 corresponding 0~31 irq + * @param NewState : ENABLE ：enable wakeup sources + * @retval None + */ +void SYSCTRL_LightSleepWakeSrcIT(uint32_t WakeSource, FunctionalState NewState) +{ + 1002580: 23d0 movs r3, #208 ; 0xd0 + 1002582: 031b lsls r3, r3, #12 + if (DISABLE != NewState) + { + MMCU->WKUP_SRC.reg |= WakeSource; + 1002584: 685a ldr r2, [r3, #4] + if (DISABLE != NewState) + 1002586: 2900 cmp r1, #0 + 1002588: d002 beq.n 1002590 + MMCU->WKUP_SRC.reg |= WakeSource; + 100258a: 4310 orrs r0, r2 + 100258c: 6058 str r0, [r3, #4] + } + else + { + MMCU->WKUP_SRC.reg &= ~WakeSource; + } +} + 100258e: 4770 bx lr + MMCU->WKUP_SRC.reg &= ~WakeSource; + 1002590: 4382 bics r2, r0 + 1002592: 605a str r2, [r3, #4] +} + 1002594: e7fb b.n 100258e + ... + +01002598 : + * @param None + * @retval None + */ +static void SYSCTRL_DeepSleepGpioWake(SYSCTRL_DeepSleepWakeSrcParaDef *WakeSrcPara) +{ + MLPM->GPIO_WK_LEVEL.reg = WakeSrcPara->Gpio_WakeupLevel; + 1002598: 2284 movs r2, #132 ; 0x84 + 100259a: 7941 ldrb r1, [r0, #5] + 100259c: 4b15 ldr r3, [pc, #84] ; (10025f4 ) + 100259e: 0092 lsls r2, r2, #2 +{ + 10025a0: b530 push {r4, r5, lr} + MLPM->GPIO_WK_LEVEL.reg = WakeSrcPara->Gpio_WakeupLevel; + 10025a2: 5099 str r1, [r3, r2] + MLPM->GPIO_WKEN_W0.reg = WakeSrcPara ->Gpio_Pin0_Pin31; + 10025a4: 6884 ldr r4, [r0, #8] + 10025a6: 3a10 subs r2, #16 + 10025a8: 509c str r4, [r3, r2] + MLPM->GPIO_WKEN_W1.reg = WakeSrcPara ->Gpio_Pin32_Pin63; + 10025aa: 68c4 ldr r4, [r0, #12] + 10025ac: 3204 adds r2, #4 + 10025ae: 509c str r4, [r3, r2] + MLPM->GPIO_WKEN_W2.reg = WakeSrcPara ->Gpio_Pin64_Pin79; + 10025b0: 6904 ldr r4, [r0, #16] + 10025b2: 3204 adds r2, #4 + 10025b4: 509c str r4, [r3, r2] + + GPIO_FUN_TYPEDEF fun = WakeSrcPara->Gpio_WakeupLevel == HIGH_WAKEUP ? PULL_PD : PULL_PU; + 10025b6: 3a89 subs r2, #137 ; 0x89 + 10025b8: 3aff subs r2, #255 ; 0xff + 10025ba: 2900 cmp r1, #0 + 10025bc: d000 beq.n 10025c0 + 10025be: 3a40 subs r2, #64 ; 0x40 + + for(uint32_t i = 0; i < 32; i++) + 10025c0: 2300 movs r3, #0 + { + if(WakeSrcPara ->Gpio_Pin0_Pin31 & (1 << i)) + 10025c2: 2401 movs r4, #1 + 10025c4: 0021 movs r1, r4 + 10025c6: 4099 lsls r1, r3 + 10025c8: 6885 ldr r5, [r0, #8] + 10025ca: 420d tst r5, r1 + 10025cc: d002 beq.n 10025d4 + 10025ce: 4d0a ldr r5, [pc, #40] ; (10025f8 ) + 10025d0: 195d adds r5, r3, r5 + { + GPIO_CONFIG(i) = fun; + 10025d2: 702a strb r2, [r5, #0] + } + + if(WakeSrcPara ->Gpio_Pin32_Pin63 & (1 << i)) + 10025d4: 68c5 ldr r5, [r0, #12] + 10025d6: 420d tst r5, r1 + 10025d8: d002 beq.n 10025e0 + 10025da: 4d08 ldr r5, [pc, #32] ; (10025fc ) + 10025dc: 195d adds r5, r3, r5 + { + GPIO_CONFIG(i+32) = fun; + 10025de: 702a strb r2, [r5, #0] + } + + if(WakeSrcPara ->Gpio_Pin64_Pin79 & (1 << i)) + 10025e0: 6905 ldr r5, [r0, #16] + 10025e2: 420d tst r5, r1 + 10025e4: d002 beq.n 10025ec + 10025e6: 4906 ldr r1, [pc, #24] ; (1002600 ) + 10025e8: 1859 adds r1, r3, r1 + { + GPIO_CONFIG(i+64) = fun; + 10025ea: 700a strb r2, [r1, #0] + for(uint32_t i = 0; i < 32; i++) + 10025ec: 3301 adds r3, #1 + 10025ee: 2b20 cmp r3, #32 + 10025f0: d1e8 bne.n 10025c4 + } + } +} + 10025f2: bd30 pop {r4, r5, pc} + 10025f4: 000fa800 .word 0x000fa800 + 10025f8: 000f8700 .word 0x000f8700 + 10025fc: 000f8720 .word 0x000f8720 + 1002600: 000f8740 .word 0x000f8740 + +01002604 : + * @param None + * @retval None + */ +static void SYSCTRL_DeepSleepLseRtcWake(SYSCTRL_DeepSleepWakeSrcParaDef *WakeSrcPara) +{ + MLPM->WAKEUP_CTRL.bit.RTC_LSE = ENABLE; + 1002604: 2289 movs r2, #137 ; 0x89 + 1002606: 2304 movs r3, #4 + 1002608: 4902 ldr r1, [pc, #8] ; (1002614 ) + 100260a: 0092 lsls r2, r2, #2 + 100260c: 5c88 ldrb r0, [r1, r2] + 100260e: 4303 orrs r3, r0 + 1002610: 548b strb r3, [r1, r2] +} + 1002612: 4770 bx lr + 1002614: 000fa800 .word 0x000fa800 + +01002618 : + * @param None + * @retval None + */ +static void SYSCTRL_DeepSleepLsiRtcWake(SYSCTRL_DeepSleepWakeSrcParaDef *WakeSrcPara) +{ + MLPM->WAKEUP_CTRL.bit.RTC_LSI = ENABLE; + 1002618: 2289 movs r2, #137 ; 0x89 + 100261a: 2302 movs r3, #2 + 100261c: 4902 ldr r1, [pc, #8] ; (1002628 ) + 100261e: 0092 lsls r2, r2, #2 + 1002620: 5c88 ldrb r0, [r1, r2] + 1002622: 4303 orrs r3, r0 + 1002624: 548b strb r3, [r1, r2] +} + 1002626: 4770 bx lr + 1002628: 000fa800 .word 0x000fa800 + +0100262c : + * @param None + * @retval None + */ +static void SYSCTRL_DeepSleepSecWake(SYSCTRL_DeepSleepWakeSrcParaDef *WakeSrcPara) +{ + MLPM->WAKEUP_CTRL.bit.SEC_EN = ENABLE; + 100262c: 2289 movs r2, #137 ; 0x89 + 100262e: 2301 movs r3, #1 + 1002630: 4902 ldr r1, [pc, #8] ; (100263c ) + 1002632: 0092 lsls r2, r2, #2 + 1002634: 5c88 ldrb r0, [r1, r2] + 1002636: 4303 orrs r3, r0 + 1002638: 548b strb r3, [r1, r2] +} + 100263a: 4770 bx lr + 100263c: 000fa800 .word 0x000fa800 + +01002640 : + * @param None + * @retval None + */ +static void SYSCTRL_DeepSleepHChgrWake(SYSCTRL_DeepSleepWakeSrcParaDef *WakeSrcPara) +{ + MLPM->CHGR_EVENT_EN.bit.EVENT0 = ENABLE; + 1002640: 2390 movs r3, #144 ; 0x90 +{ + 1002642: b570 push {r4, r5, r6, lr} + 1002644: 0005 movs r5, r0 + MLPM->CHGR_EVENT_EN.bit.EVENT0 = ENABLE; + 1002646: 2001 movs r0, #1 + 1002648: 4c07 ldr r4, [pc, #28] ; (1002668 ) + 100264a: 009b lsls r3, r3, #2 + 100264c: 5ce2 ldrb r2, [r4, r3] + 100264e: 4302 orrs r2, r0 + 1002650: 54e2 strb r2, [r4, r3] + MLPM->CHGR_EVENT_EN.bit.EVENT1 = ENABLE; + 1002652: 2202 movs r2, #2 + 1002654: 5ce1 ldrb r1, [r4, r3] + 1002656: 430a orrs r2, r1 + 1002658: 54e2 strb r2, [r4, r3] + delay_ms(1); + 100265a: f000 f8eb bl 1002834 + MLPM->CHGR_WKUP_HI_EN.reg = WakeSrcPara->Chgr_HighWakeEvent; + 100265e: 2391 movs r3, #145 ; 0x91 + 1002660: 696a ldr r2, [r5, #20] + 1002662: 009b lsls r3, r3, #2 + 1002664: 50e2 str r2, [r4, r3] +} + 1002666: bd70 pop {r4, r5, r6, pc} + 1002668: 000fa800 .word 0x000fa800 + +0100266c : + * @param None + * @retval None + */ +static void SYSCTRL_DeepSleepLChgrWake(SYSCTRL_DeepSleepWakeSrcParaDef *WakeSrcPara) +{ + MLPM->CHGR_EVENT_EN.bit.EVENT0 = ENABLE; + 100266c: 2390 movs r3, #144 ; 0x90 +{ + 100266e: b570 push {r4, r5, r6, lr} + 1002670: 0005 movs r5, r0 + MLPM->CHGR_EVENT_EN.bit.EVENT0 = ENABLE; + 1002672: 2001 movs r0, #1 + 1002674: 4c07 ldr r4, [pc, #28] ; (1002694 ) + 1002676: 009b lsls r3, r3, #2 + 1002678: 5ce2 ldrb r2, [r4, r3] + 100267a: 4302 orrs r2, r0 + 100267c: 54e2 strb r2, [r4, r3] + MLPM->CHGR_EVENT_EN.bit.EVENT1 = ENABLE; + 100267e: 2202 movs r2, #2 + 1002680: 5ce1 ldrb r1, [r4, r3] + 1002682: 430a orrs r2, r1 + 1002684: 54e2 strb r2, [r4, r3] + delay_ms(1); + 1002686: f000 f8d5 bl 1002834 + MLPM->CHGR_WKUP_LO_EN.reg = WakeSrcPara->Chgr_LowWakeEvent; + 100268a: 2392 movs r3, #146 ; 0x92 + 100268c: 69aa ldr r2, [r5, #24] + 100268e: 009b lsls r3, r3, #2 + 1002690: 50e2 str r2, [r4, r3] +} + 1002692: bd70 pop {r4, r5, r6, pc} + 1002694: 000fa800 .word 0x000fa800 + +01002698 : + * @brief + * @param None + * @retval None + */ +static void SYSCTRL_DeepSleepPowerKeyWake(SYSCTRL_DeepSleepWakeSrcParaDef *WakeSrcPara) +{ + 1002698: 2380 movs r3, #128 ; 0x80 + if(WakeSrcPara->Powkey_WakeLevel) + 100269a: 7901 ldrb r1, [r0, #4] + 100269c: 4a05 ldr r2, [pc, #20] ; (10026b4 ) + 100269e: 015b lsls r3, r3, #5 + 10026a0: 2900 cmp r1, #0 + 10026a2: d005 beq.n 10026b0 + { + MLPM->CHGR_WKUP_LO_EN.bit.PWK = ENABLE; + 10026a4: 2192 movs r1, #146 ; 0x92 + } + else + { + MLPM->CHGR_WKUP_HI_EN.bit.PWK = ENABLE; + 10026a6: 0089 lsls r1, r1, #2 + 10026a8: 5a50 ldrh r0, [r2, r1] + 10026aa: 4303 orrs r3, r0 + 10026ac: 5253 strh r3, [r2, r1] + } +} + 10026ae: 4770 bx lr + MLPM->CHGR_WKUP_HI_EN.bit.PWK = ENABLE; + 10026b0: 2191 movs r1, #145 ; 0x91 + 10026b2: e7f8 b.n 10026a6 + 10026b4: 000fa800 .word 0x000fa800 + +010026b8 : + * @brief Set Deep sleep wakeup sources (interrupt wake up) + * @param WakeSrcPara : Reference SYSCTRL_DeepSleepWakeSrcParaDef description + * @retval None + */ +void SYSCTRL_DeepSleepWakeSrcIT(SYSCTRL_DeepSleepWakeSrcParaDef *WakeSrcPara) +{ + 10026b8: b5f8 push {r3, r4, r5, r6, r7, lr} + 10026ba: 0007 movs r7, r0 + LPM_AccessCode(ENABLE); + 10026bc: f000 f8a8 bl 1002810 + LPM_RegisterClk(ENABLE); + 10026c0: f000 f89a bl 10027f8 + MLPM->GPIO_WK_LEVEL.reg = 0; + 10026c4: 2384 movs r3, #132 ; 0x84 + 10026c6: 2500 movs r5, #0 + MLPM->WAKEUP_CTRL.bit.RTC_LSE = 0; + 10026c8: 2104 movs r1, #4 + MLPM->GPIO_WK_LEVEL.reg = 0; + 10026ca: 4c1f ldr r4, [pc, #124] ; (1002748 ) + 10026cc: 009b lsls r3, r3, #2 + 10026ce: 50e5 str r5, [r4, r3] + MLPM->GPIO_WKEN_W0.reg = 0; + 10026d0: 3b10 subs r3, #16 + 10026d2: 50e5 str r5, [r4, r3] + MLPM->GPIO_WKEN_W1.reg = 0; + 10026d4: 3304 adds r3, #4 + 10026d6: 50e5 str r5, [r4, r3] + MLPM->GPIO_WKEN_W2.reg = 0; + 10026d8: 3304 adds r3, #4 + 10026da: 50e5 str r5, [r4, r3] + MLPM->WAKEUP_CTRL.bit.RTC_LSE = 0; + 10026dc: 331c adds r3, #28 + 10026de: 5ce2 ldrb r2, [r4, r3] + MLPM->CHGR_WKUP_HI_EN.bit.PWK = 0; + 10026e0: 4e1a ldr r6, [pc, #104] ; (100274c ) + MLPM->WAKEUP_CTRL.bit.RTC_LSE = 0; + 10026e2: 438a bics r2, r1 + 10026e4: 54e2 strb r2, [r4, r3] + MLPM->WAKEUP_CTRL.bit.RTC_LSI = 0; + 10026e6: 5ce2 ldrb r2, [r4, r3] + 10026e8: 3902 subs r1, #2 + 10026ea: 438a bics r2, r1 + 10026ec: 54e2 strb r2, [r4, r3] + MLPM->CHGR_WKUP_HI_EN.bit.PWK = 0; + 10026ee: 2291 movs r2, #145 ; 0x91 + 10026f0: 0092 lsls r2, r2, #2 + 10026f2: 5aa0 ldrh r0, [r4, r2] + 10026f4: 4030 ands r0, r6 + 10026f6: 52a0 strh r0, [r4, r2] + MLPM->CHGR_WKUP_LO_EN.bit.PWK = 0; + 10026f8: 2092 movs r0, #146 ; 0x92 + 10026fa: 0080 lsls r0, r0, #2 + 10026fc: 5a22 ldrh r2, [r4, r0] + 10026fe: 4032 ands r2, r6 + MLPM->WAKEUP_CTRL.bit.SEC_EN = 0; + 1002700: 2601 movs r6, #1 + MLPM->CHGR_WKUP_LO_EN.bit.PWK = 0; + 1002702: 5222 strh r2, [r4, r0] + MLPM->WAKEUP_CTRL.bit.SEC_EN = 0; + 1002704: 5ce2 ldrb r2, [r4, r3] + delay_ms(1); + 1002706: 0030 movs r0, r6 + MLPM->WAKEUP_CTRL.bit.SEC_EN = 0; + 1002708: 43b2 bics r2, r6 + 100270a: 54e2 strb r2, [r4, r3] + MLPM->CHGR_EVENT_EN.bit.EVENT0 = 0; + 100270c: 331c adds r3, #28 + 100270e: 5ce2 ldrb r2, [r4, r3] + 1002710: 43b2 bics r2, r6 + 1002712: 54e2 strb r2, [r4, r3] + MLPM->CHGR_EVENT_EN.bit.EVENT1 = 0; + 1002714: 5ce2 ldrb r2, [r4, r3] + 1002716: 438a bics r2, r1 + 1002718: 54e2 strb r2, [r4, r3] + delay_ms(1); + 100271a: f000 f88b bl 1002834 + MLPM->CHGR_WKUP_LO_EN.reg = 0; + 100271e: 2092 movs r0, #146 ; 0x92 + MLPM->CHGR_WKUP_HI_EN.reg = 0; + 1002720: 2291 movs r2, #145 ; 0x91 + MLPM->CHGR_WKUP_LO_EN.reg = 0; + 1002722: 0080 lsls r0, r0, #2 + MLPM->CHGR_WKUP_HI_EN.reg = 0; + 1002724: 0092 lsls r2, r2, #2 + MLPM->CHGR_WKUP_LO_EN.reg = 0; + 1002726: 5025 str r5, [r4, r0] + MLPM->CHGR_WKUP_HI_EN.reg = 0; + 1002728: 50a5 str r5, [r4, r2] + + SYSCTRL_DeepSleepWakeDeInit(); + + for(uint8_t i = 0; i < sizeof(DeepSleepWakeSrc)/4; i++) + { + if(WakeSrcPara->SrcType & (1 << i)) + 100272a: 0033 movs r3, r6 + 100272c: 40ab lsls r3, r5 + 100272e: 683a ldr r2, [r7, #0] + 1002730: 421a tst r2, r3 + 1002732: d004 beq.n 100273e + { + DeepSleepWakeSrc[i](WakeSrcPara); + 1002734: 4a06 ldr r2, [pc, #24] ; (1002750 ) + 1002736: 00ab lsls r3, r5, #2 + 1002738: 58d3 ldr r3, [r2, r3] + 100273a: 0038 movs r0, r7 + 100273c: 4798 blx r3 + 100273e: 3501 adds r5, #1 + for(uint8_t i = 0; i < sizeof(DeepSleepWakeSrc)/4; i++) + 1002740: 2d07 cmp r5, #7 + 1002742: d1f2 bne.n 100272a + } + } +} + 1002744: bdf8 pop {r3, r4, r5, r6, r7, pc} + 1002746: 46c0 nop ; (mov r8, r8) + 1002748: 000fa800 .word 0x000fa800 + 100274c: ffffefff .word 0xffffefff + 1002750: 01006c48 .word 0x01006c48 + +01002754 : + * @brief Reset + * @param None + * @retval None + */ +void SYSCTRL_SoftReset(void) +{ + 1002754: b510 push {r4, lr} + LPM_AccessCode(ENABLE); + 1002756: f000 f85b bl 1002810 + LPM_RegisterClk(ENABLE); + 100275a: f000 f84d bl 10027f8 + MRSTGEN->RST_EN.bit.SOFT = ENABLE; + 100275e: 2201 movs r2, #1 + 1002760: 4b03 ldr r3, [pc, #12] ; (1002770 ) + 1002762: 6819 ldr r1, [r3, #0] + 1002764: 430a orrs r2, r1 + 1002766: 601a str r2, [r3, #0] + MRSTGEN->RESET.bit.RESET = 0x55; + 1002768: 7a1a ldrb r2, [r3, #8] + 100276a: 2255 movs r2, #85 ; 0x55 + 100276c: 721a strb r2, [r3, #8] + 100276e: e7fe b.n 100276e + 1002770: 000f8574 .word 0x000f8574 + +01002774 : + * @brief poweroff + * @param None + * @retval None + */ +void SYSCTRL_PowerOff(void) +{ + 1002774: b570 push {r4, r5, r6, lr} + __ASM volatile ("cpsid i" : : : "memory"); + 1002776: b672 cpsid i + __disable_irq(); + LPM_AccessCode(ENABLE); + 1002778: f000 f84a bl 1002810 + LPM_RegisterClk(ENABLE); + 100277c: f000 f83c bl 10027f8 + uint32_t PowerOffStart = (uint32_t)SYSCTRL_PowerOff; + ((void(*)(void *, void *))FUNC_PREFETCH)(((void *)PowerOffStart), ((void *)(PowerOffStart + 0x200))); + 1002780: 2380 movs r3, #128 ; 0x80 + 1002782: 4816 ldr r0, [pc, #88] ; (10027dc ) + 1002784: 009b lsls r3, r3, #2 + 1002786: 18c1 adds r1, r0, r3 + 1002788: 4b15 ldr r3, [pc, #84] ; (10027e0 ) + 100278a: 4798 blx r3 + MLPM->LDO_EXEN_CTRL.bit.GPIO = 0xaa; + 100278c: 2099 movs r0, #153 ; 0x99 + 100278e: 21aa movs r1, #170 ; 0xaa + 1002790: 4b14 ldr r3, [pc, #80] ; (10027e4 ) + 1002792: 0080 lsls r0, r0, #2 + 1002794: 581a ldr r2, [r3, r0] + 1002796: 0609 lsls r1, r1, #24 + 1002798: 0212 lsls r2, r2, #8 + 100279a: 0a12 lsrs r2, r2, #8 + 100279c: 430a orrs r2, r1 + 100279e: 501a str r2, [r3, r0] + *(volatile uint8_t*)(0xfa810) &= ~(1 << 5); //io fp + 10027a0: 2020 movs r0, #32 + 10027a2: 4911 ldr r1, [pc, #68] ; (10027e8 ) + if(ANA_CHGR->STATE.bit.CHGR_IN_DET_AON || MSYSCTRL->pwk_state.reg) + { + MRSTGEN->RST_EN.bit.SOFT = ENABLE; + MRSTGEN->RESET.bit.RESET = 0x55; + } + MLPM->PWK_CTRL.bit.LDO_OFF = ENABLE; + 10027a4: 2480 movs r4, #128 ; 0x80 + *(volatile uint8_t*)(0xfa810) &= ~(1 << 5); //io fp + 10027a6: 780a ldrb r2, [r1, #0] + MRSTGEN->RST_EN.bit.SOFT = ENABLE; + 10027a8: 2501 movs r5, #1 + *(volatile uint8_t*)(0xfa810) &= ~(1 << 5); //io fp + 10027aa: 4382 bics r2, r0 + MLPM->PWK_CTRL.bit.LDO_OFF = ENABLE; + 10027ac: 2098 movs r0, #152 ; 0x98 + MRSTGEN->RESET.bit.RESET = 0x55; + 10027ae: 2655 movs r6, #85 ; 0x55 + *(volatile uint8_t*)(0xfa810) &= ~(1 << 5); //io fp + 10027b0: 700a strb r2, [r1, #0] + MLPM->PWK_CTRL.bit.LDO_OFF = ENABLE; + 10027b2: 0080 lsls r0, r0, #2 + 10027b4: 0264 lsls r4, r4, #9 + if(ANA_CHGR->STATE.bit.CHGR_IN_DET_AON || MSYSCTRL->pwk_state.reg) + 10027b6: 4a0d ldr r2, [pc, #52] ; (10027ec ) + 10027b8: 6812 ldr r2, [r2, #0] + 10027ba: 0552 lsls r2, r2, #21 + 10027bc: d403 bmi.n 10027c6 + 10027be: 4a0c ldr r2, [pc, #48] ; (10027f0 ) + 10027c0: 6c12 ldr r2, [r2, #64] ; 0x40 + 10027c2: 2a00 cmp r2, #0 + 10027c4: d005 beq.n 10027d2 + MRSTGEN->RST_EN.bit.SOFT = ENABLE; + 10027c6: 4a0b ldr r2, [pc, #44] ; (10027f4 ) + 10027c8: 6811 ldr r1, [r2, #0] + 10027ca: 4329 orrs r1, r5 + 10027cc: 6011 str r1, [r2, #0] + MRSTGEN->RESET.bit.RESET = 0x55; + 10027ce: 7a11 ldrb r1, [r2, #8] + 10027d0: 7216 strb r6, [r2, #8] + MLPM->PWK_CTRL.bit.LDO_OFF = ENABLE; + 10027d2: 581a ldr r2, [r3, r0] + 10027d4: 4322 orrs r2, r4 + 10027d6: 501a str r2, [r3, r0] + if(ANA_CHGR->STATE.bit.CHGR_IN_DET_AON || MSYSCTRL->pwk_state.reg) + 10027d8: e7ed b.n 10027b6 + 10027da: 46c0 nop ; (mov r8, r8) + 10027dc: 01002775 .word 0x01002775 + 10027e0: 00005389 .word 0x00005389 + 10027e4: 000fa800 .word 0x000fa800 + 10027e8: 000fa810 .word 0x000fa810 + 10027ec: 000fb270 .word 0x000fb270 + 10027f0: 000f8520 .word 0x000f8520 + 10027f4: 000f8574 .word 0x000f8574 + +010027f8 : + * This parameter can be ENABLE or DISABLE + * @retval None + */ +__STATIC_INLINE void LPM_RegisterClk(FunctionalState status) +{ + if (MLPM->CLK_CTRL.reg == status) + 10027f8: 23a0 movs r3, #160 ; 0xa0 + 10027fa: 4a04 ldr r2, [pc, #16] ; (100280c ) + 10027fc: 009b lsls r3, r3, #2 + 10027fe: 58d1 ldr r1, [r2, r3] + 1002800: 2901 cmp r1, #1 + 1002802: d001 beq.n 1002808 + return; + + MLPM->CLK_CTRL.reg = status; + 1002804: 2101 movs r1, #1 + 1002806: 50d1 str r1, [r2, r3] +} + 1002808: 4770 bx lr + 100280a: 46c0 nop ; (mov r8, r8) + 100280c: 000fa800 .word 0x000fa800 + +01002810 : + MLPM->ACCESS_CODE.reg = ACCESSCODE1; + 1002810: 22a8 movs r2, #168 ; 0xa8 + 1002812: 2155 movs r1, #85 ; 0x55 + 1002814: 4b06 ldr r3, [pc, #24] ; (1002830 ) + 1002816: 0092 lsls r2, r2, #2 + 1002818: 5099 str r1, [r3, r2] + MLPM->ACCESS_CODE.reg = ACCESSCODE2; + 100281a: 1849 adds r1, r1, r1 + 100281c: 5099 str r1, [r3, r2] + MLPM->ACCESS_CODE.reg = ACCESSCODE3; + 100281e: 3993 subs r1, #147 ; 0x93 + 1002820: 5099 str r1, [r3, r2] + if (MLPM->ACCESS_EN.reg == status) + 1002822: 3204 adds r2, #4 + 1002824: 5899 ldr r1, [r3, r2] + 1002826: 2901 cmp r1, #1 + 1002828: d001 beq.n 100282e + MLPM->ACCESS_EN.reg = status; + 100282a: 2101 movs r1, #1 + 100282c: 5099 str r1, [r3, r2] +} + 100282e: 4770 bx lr + 1002830: 000fa800 .word 0x000fa800 + +01002834 : + * @param ms: time + * @retval none + */ + +void delay_ms(int ms) +{ + 1002834: b510 push {r4, lr} +#ifdef __USE_YC_M0__ + ((void(*)(int))(FUNC_DELAY_MS_ADDR))(ms); + 1002836: 4b01 ldr r3, [pc, #4] ; (100283c ) + 1002838: 4798 blx r3 +#else + volatile uint32_t i = 48000*ms; + while(i--); +#endif +} + 100283a: bd10 pop {r4, pc} + 100283c: 00005059 .word 0x00005059 + +01002840 : + * @param us: time + * @retval none + */ + +void delay_us(int us) +{ + 1002840: b510 push {r4, lr} +#ifdef __USE_YC_M0__ + ((void(*)(int))(FUNC_DELAY_US_ADDR))(us); + 1002842: 4b01 ldr r3, [pc, #4] ; (1002848 ) + 1002844: 4798 blx r3 +#else + volatile uint32_t i = 48*us; + while(i--); +#endif +} + 1002846: bd10 pop {r4, pc} + 1002848: 00005021 .word 0x00005021 + +0100284c : + * @param TIM_Init_Struct : TIM initializes the structure + * @retval none + */ +void TIM_Init(TIM_Module_TypeDef *TIMMx, TIM_InitTypeDef *TIM_Init_Struct) +{ + _ASSERT(IS_TIMER_NUM(TIM_Init_Struct->TIMx)); + 100284c: 780b ldrb r3, [r1, #0] +{ + 100284e: b570 push {r4, r5, r6, lr} + 1002850: 0004 movs r4, r0 + 1002852: 000d movs r5, r1 + _ASSERT(IS_TIMER_NUM(TIM_Init_Struct->TIMx)); + 1002854: 2b08 cmp r3, #8 + 1002856: d904 bls.n 1002862 + 1002858: 4a1d ldr r2, [pc, #116] ; (10028d0 ) + 100285a: 213a movs r1, #58 ; 0x3a + 100285c: 481d ldr r0, [pc, #116] ; (10028d4 ) + 100285e: f7fd fe4f bl 1000500 <_assert_handler> + _ASSERT(IS_TIMM(TIMMx)); + 1002862: 4b1d ldr r3, [pc, #116] ; (10028d8 ) + 1002864: 429c cmp r4, r3 + 1002866: d004 beq.n 1002872 + 1002868: 4a19 ldr r2, [pc, #100] ; (10028d0 ) + 100286a: 213b movs r1, #59 ; 0x3b + 100286c: 4819 ldr r0, [pc, #100] ; (10028d4 ) + 100286e: f7fd fe47 bl 1000500 <_assert_handler> + + TIM_Cmd(TIMMx, TIM_Init_Struct->TIMx, DISABLE); + 1002872: 7829 ldrb r1, [r5, #0] + 1002874: 2200 movs r2, #0 + 1002876: 0020 movs r0, r4 + 1002878: f000 f844 bl 1002904 + + TIMMx->PERIOD.reg[PCNT(TIM_Init_Struct->TIMx)] = TIM_Init_Struct->period; + 100287c: 782b ldrb r3, [r5, #0] + 100287e: 6869 ldr r1, [r5, #4] + 1002880: 00da lsls r2, r3, #3 + 1002882: 5111 str r1, [r2, r4] + 1002884: 786a ldrb r2, [r5, #1] + if (TIM_Init_Struct->TIMx < TIM8) + 1002886: 2b07 cmp r3, #7 + 1002888: d813 bhi.n 10028b2 + 100288a: 009b lsls r3, r3, #2 + { + if ((TIM_Init_Struct->Auto_Reload) == DISABLE) + { + TIMMx->CTRL1.reg |= (TIM_CTRL_MODE << TIM_Init_Struct->TIMx * 4); + 100288c: 6ca1 ldr r1, [r4, #72] ; 0x48 + if ((TIM_Init_Struct->Auto_Reload) == DISABLE) + 100288e: 2a00 cmp r2, #0 + 1002890: d109 bne.n 10028a6 + TIMMx->CTRL1.reg |= (TIM_CTRL_MODE << TIM_Init_Struct->TIMx * 4); + 1002892: 3204 adds r2, #4 + 1002894: 409a lsls r2, r3 + 1002896: 430a orrs r2, r1 + TIMMx->CTRL1.reg &= ~(TIM_CTRL_AUTO_RELOAD << TIM_Init_Struct->TIMx * 4); + 1002898: 2108 movs r1, #8 + 100289a: 4099 lsls r1, r3 + TIMMx->CTRL1.reg |= (TIM_CTRL_MODE << TIM_Init_Struct->TIMx * 4); + 100289c: 64a2 str r2, [r4, #72] ; 0x48 + TIMMx->CTRL1.reg &= ~(TIM_CTRL_AUTO_RELOAD << TIM_Init_Struct->TIMx * 4); + 100289e: 6ca2 ldr r2, [r4, #72] ; 0x48 + 10028a0: 438a bics r2, r1 + 10028a2: 64a2 str r2, [r4, #72] ; 0x48 + else + { + TIMMx->CTRL2.reg |= (TIM_CTRL_MODE | TIM_CTRL_AUTO_RELOAD); + } + } +} + 10028a4: bd70 pop {r4, r5, r6, pc} + TIMMx->CTRL1.reg |= ((TIM_CTRL_MODE | TIM_CTRL_AUTO_RELOAD) << TIM_Init_Struct->TIMx * 4); + 10028a6: 220c movs r2, #12 + 10028a8: 409a lsls r2, r3 + 10028aa: 0013 movs r3, r2 + 10028ac: 430b orrs r3, r1 + 10028ae: 64a3 str r3, [r4, #72] ; 0x48 + 10028b0: e7f8 b.n 10028a4 + if ((TIM_Init_Struct->Auto_Reload) == DISABLE) + 10028b2: 2a00 cmp r2, #0 + 10028b4: d108 bne.n 10028c8 + TIMMx->CTRL2.reg |= TIM_CTRL_MODE; + 10028b6: 2304 movs r3, #4 + 10028b8: 6ce2 ldr r2, [r4, #76] ; 0x4c + 10028ba: 4313 orrs r3, r2 + TIMMx->CTRL2.reg &= ~(TIM_CTRL_AUTO_RELOAD); + 10028bc: 2208 movs r2, #8 + TIMMx->CTRL2.reg |= TIM_CTRL_MODE; + 10028be: 64e3 str r3, [r4, #76] ; 0x4c + TIMMx->CTRL2.reg &= ~(TIM_CTRL_AUTO_RELOAD); + 10028c0: 6ce3 ldr r3, [r4, #76] ; 0x4c + 10028c2: 4393 bics r3, r2 + TIMMx->CTRL2.reg |= (TIM_CTRL_MODE | TIM_CTRL_AUTO_RELOAD); + 10028c4: 64e3 str r3, [r4, #76] ; 0x4c +} + 10028c6: e7ed b.n 10028a4 + TIMMx->CTRL2.reg |= (TIM_CTRL_MODE | TIM_CTRL_AUTO_RELOAD); + 10028c8: 230c movs r3, #12 + 10028ca: 6ce2 ldr r2, [r4, #76] ; 0x4c + 10028cc: 4313 orrs r3, r2 + 10028ce: e7f9 b.n 10028c4 + 10028d0: 01006ed8 .word 0x01006ed8 + 10028d4: 01006eb0 .word 0x01006eb0 + 10028d8: 000f0c00 .word 0x000f0c00 + +010028dc : + * @param TIMMx : the timer moudle selection + * @retval none + */ +void TIM_DeInit(TIM_Module_TypeDef *TIMMx) +{ + _ASSERT(IS_TIMM(TIMMx)); + 10028dc: 4b06 ldr r3, [pc, #24] ; (10028f8 ) +{ + 10028de: b510 push {r4, lr} + 10028e0: 0004 movs r4, r0 + _ASSERT(IS_TIMM(TIMMx)); + 10028e2: 4298 cmp r0, r3 + 10028e4: d004 beq.n 10028f0 + 10028e6: 4a05 ldr r2, [pc, #20] ; (10028fc ) + 10028e8: 2162 movs r1, #98 ; 0x62 + 10028ea: 4805 ldr r0, [pc, #20] ; (1002900 ) + 10028ec: f7fd fe08 bl 1000500 <_assert_handler> + + TIMMx->CTRL1.reg = 0; + 10028f0: 2300 movs r3, #0 + 10028f2: 64a3 str r3, [r4, #72] ; 0x48 + TIMMx->CTRL2.reg = 0; + 10028f4: 64e3 str r3, [r4, #76] ; 0x4c +} + 10028f6: bd10 pop {r4, pc} + 10028f8: 000f0c00 .word 0x000f0c00 + 10028fc: 01006ee1 .word 0x01006ee1 + 1002900: 01006eb0 .word 0x01006eb0 + +01002904 : + * @retval none + */ +void TIM_Cmd(TIM_Module_TypeDef *TIMMx, TIM_NumTypeDef TIMx, FunctionalState NewState) +{ + + _ASSERT(IS_TIMM(TIMMx)); + 1002904: 4b17 ldr r3, [pc, #92] ; (1002964 ) +{ + 1002906: b570 push {r4, r5, r6, lr} + 1002908: 0004 movs r4, r0 + 100290a: 000d movs r5, r1 + 100290c: 0016 movs r6, r2 + _ASSERT(IS_TIMM(TIMMx)); + 100290e: 4298 cmp r0, r3 + 1002910: d004 beq.n 100291c + 1002912: 4a15 ldr r2, [pc, #84] ; (1002968 ) + 1002914: 2173 movs r1, #115 ; 0x73 + 1002916: 4815 ldr r0, [pc, #84] ; (100296c ) + 1002918: f7fd fdf2 bl 1000500 <_assert_handler> + _ASSERT(IS_TIMER_NUM(TIMx)); + 100291c: 2d08 cmp r5, #8 + 100291e: d904 bls.n 100292a + 1002920: 4a11 ldr r2, [pc, #68] ; (1002968 ) + 1002922: 2174 movs r1, #116 ; 0x74 + 1002924: 4811 ldr r0, [pc, #68] ; (100296c ) + 1002926: f7fd fdeb bl 1000500 <_assert_handler> + + if (ENABLE == NewState) + 100292a: 2e01 cmp r6, #1 + 100292c: d10b bne.n 1002946 + { + if (TIMx < TIM8) + 100292e: 2d07 cmp r5, #7 + 1002930: d805 bhi.n 100293e + { + TIMMx->CTRL1.reg |= (TIM_CTRL_ENABLE << TIMx * 4); + 1002932: 00ad lsls r5, r5, #2 + 1002934: 40ae lsls r6, r5 + 1002936: 6ca3 ldr r3, [r4, #72] ; 0x48 + 1002938: 431e orrs r6, r3 + 100293a: 64a6 str r6, [r4, #72] ; 0x48 + else + { + TIMMx->CTRL2.reg &= ~(TIM_CTRL_ENABLE); + } + } +} + 100293c: bd70 pop {r4, r5, r6, pc} + TIMMx->CTRL2.reg |= (TIM_CTRL_ENABLE); + 100293e: 6ce3 ldr r3, [r4, #76] ; 0x4c + 1002940: 431e orrs r6, r3 + 1002942: 64e6 str r6, [r4, #76] ; 0x4c + 1002944: e7fa b.n 100293c + else if (DISABLE == NewState) + 1002946: 2e00 cmp r6, #0 + 1002948: d1f8 bne.n 100293c + 100294a: 2301 movs r3, #1 + if (TIMx < TIM8) + 100294c: 2d07 cmp r5, #7 + 100294e: d805 bhi.n 100295c + TIMMx->CTRL1.reg &= ~(TIM_CTRL_ENABLE << TIMx * 4); + 1002950: 00ad lsls r5, r5, #2 + 1002952: 40ab lsls r3, r5 + 1002954: 6ca2 ldr r2, [r4, #72] ; 0x48 + 1002956: 439a bics r2, r3 + 1002958: 64a2 str r2, [r4, #72] ; 0x48 + 100295a: e7ef b.n 100293c + TIMMx->CTRL2.reg &= ~(TIM_CTRL_ENABLE); + 100295c: 6ce2 ldr r2, [r4, #76] ; 0x4c + 100295e: 439a bics r2, r3 + 1002960: 64e2 str r2, [r4, #76] ; 0x4c +} + 1002962: e7eb b.n 100293c + 1002964: 000f0c00 .word 0x000f0c00 + 1002968: 01006eec .word 0x01006eec + 100296c: 01006eb0 .word 0x01006eb0 + +01002970 : + * @param TIM_Mode :TIM or PWM + * @retval none + */ +void TIM_ModeConfig(TIM_Module_TypeDef *TIMMx, TIM_NumTypeDef TIMx, TIM_ModeTypeDef TIM_Mode) +{ + _ASSERT(IS_TIMM(TIMMx)); + 1002970: 4b1a ldr r3, [pc, #104] ; (10029dc ) +{ + 1002972: b570 push {r4, r5, r6, lr} + 1002974: 0004 movs r4, r0 + 1002976: 000d movs r5, r1 + 1002978: 0016 movs r6, r2 + _ASSERT(IS_TIMM(TIMMx)); + 100297a: 4298 cmp r0, r3 + 100297c: d004 beq.n 1002988 + 100297e: 4a18 ldr r2, [pc, #96] ; (10029e0 ) + 1002980: 2198 movs r1, #152 ; 0x98 + 1002982: 4818 ldr r0, [pc, #96] ; (10029e4 ) + 1002984: f7fd fdbc bl 1000500 <_assert_handler> + _ASSERT(IS_TIMER_NUM(TIMx)); + 1002988: 2d08 cmp r5, #8 + 100298a: d904 bls.n 1002996 + 100298c: 4a14 ldr r2, [pc, #80] ; (10029e0 ) + 100298e: 2199 movs r1, #153 ; 0x99 + 1002990: 4814 ldr r0, [pc, #80] ; (10029e4 ) + 1002992: f7fd fdb5 bl 1000500 <_assert_handler> + _ASSERT(IS_TIM_MODE(TIM_Mode)); + 1002996: 2e01 cmp r6, #1 + 1002998: d90d bls.n 10029b6 + 100299a: 4a11 ldr r2, [pc, #68] ; (10029e0 ) + 100299c: 219a movs r1, #154 ; 0x9a + 100299e: 4811 ldr r0, [pc, #68] ; (10029e4 ) + 10029a0: f7fd fdae bl 1000500 <_assert_handler> + 10029a4: 2304 movs r3, #4 + TIMMx->CTRL2.reg |= (TIM_CTRL_MODE); + } + } + else + { + if (TIMx < TIM8) + 10029a6: 2d07 cmp r5, #7 + 10029a8: d814 bhi.n 10029d4 + { + TIMMx->CTRL1.reg &= ~(TIM_CTRL_MODE << TIMx * 4); + 10029aa: 00ad lsls r5, r5, #2 + 10029ac: 40ab lsls r3, r5 + 10029ae: 6ca2 ldr r2, [r4, #72] ; 0x48 + 10029b0: 439a bics r2, r3 + 10029b2: 64a2 str r2, [r4, #72] ; 0x48 + 10029b4: e009 b.n 10029ca + if (TIM_Mode == TIM_Mode_TIMER) + 10029b6: 2e01 cmp r6, #1 + 10029b8: d1f4 bne.n 10029a4 + 10029ba: 2304 movs r3, #4 + if (TIMx < TIM8) + 10029bc: 2d07 cmp r5, #7 + 10029be: d805 bhi.n 10029cc + TIMMx->CTRL1.reg |= (TIM_CTRL_MODE << TIMx * 4); + 10029c0: 00ad lsls r5, r5, #2 + 10029c2: 40ab lsls r3, r5 + 10029c4: 6ca2 ldr r2, [r4, #72] ; 0x48 + 10029c6: 4313 orrs r3, r2 + 10029c8: 64a3 str r3, [r4, #72] ; 0x48 + else + { + TIMMx->CTRL2.reg &= ~(TIM_CTRL_MODE); + } + } +} + 10029ca: bd70 pop {r4, r5, r6, pc} + TIMMx->CTRL2.reg |= (TIM_CTRL_MODE); + 10029cc: 6ce2 ldr r2, [r4, #76] ; 0x4c + 10029ce: 4313 orrs r3, r2 + 10029d0: 64e3 str r3, [r4, #76] ; 0x4c + 10029d2: e7fa b.n 10029ca + TIMMx->CTRL2.reg &= ~(TIM_CTRL_MODE); + 10029d4: 6ce2 ldr r2, [r4, #76] ; 0x4c + 10029d6: 439a bics r2, r3 + 10029d8: 64e2 str r2, [r4, #76] ; 0x4c +} + 10029da: e7f6 b.n 10029ca + 10029dc: 000f0c00 .word 0x000f0c00 + 10029e0: 01006ef4 .word 0x01006ef4 + 10029e4: 01006eb0 .word 0x01006eb0 + +010029e8 : + * @param TIMx : the timer number,TIM0-TIM8 + * @param Period : set period value + * @retval none + */ +void TIM_SetPeriod(TIM_Module_TypeDef *TIMMx, TIM_NumTypeDef TIMx, uint32_t Period) +{ + 10029e8: b570 push {r4, r5, r6, lr} + 10029ea: 0005 movs r5, r0 + 10029ec: 000c movs r4, r1 + 10029ee: 0016 movs r6, r2 + _ASSERT(IS_TIMER_NUM(TIMx)); + 10029f0: 2908 cmp r1, #8 + 10029f2: d904 bls.n 10029fe + 10029f4: 4a07 ldr r2, [pc, #28] ; (1002a14 ) + 10029f6: 21be movs r1, #190 ; 0xbe + 10029f8: 4807 ldr r0, [pc, #28] ; (1002a18 ) + 10029fa: f7fd fd81 bl 1000500 <_assert_handler> + _ASSERT(IS_TIMM(TIMMx)); + 10029fe: 4b07 ldr r3, [pc, #28] ; (1002a1c ) + 1002a00: 429d cmp r5, r3 + 1002a02: d004 beq.n 1002a0e + 1002a04: 4a03 ldr r2, [pc, #12] ; (1002a14 ) + 1002a06: 21bf movs r1, #191 ; 0xbf + 1002a08: 4803 ldr r0, [pc, #12] ; (1002a18 ) + 1002a0a: f7fd fd79 bl 1000500 <_assert_handler> + + TIMMx->PERIOD.reg[PCNT(TIMx)] = Period; + 1002a0e: 00e4 lsls r4, r4, #3 + 1002a10: 5166 str r6, [r4, r5] +} + 1002a12: bd70 pop {r4, r5, r6, pc} + 1002a14: 01006f03 .word 0x01006f03 + 1002a18: 01006eb0 .word 0x01006eb0 + 1002a1c: 000f0c00 .word 0x000f0c00 + +01002a20 : + * @param PWM_init_struct : PWM initializes the structure + * @retval none + */ +void TIM_PWMInit(TIM_Module_TypeDef *TIMMx, PWM_InitTypeDef *TIM_PWMInitStruct) +{ + _ASSERT(IS_TIMM(TIMMx)); + 1002a20: 4b22 ldr r3, [pc, #136] ; (1002aac ) +{ + 1002a22: b570 push {r4, r5, r6, lr} + 1002a24: 0004 movs r4, r0 + 1002a26: 000d movs r5, r1 + _ASSERT(IS_TIMM(TIMMx)); + 1002a28: 4298 cmp r0, r3 + 1002a2a: d004 beq.n 1002a36 + 1002a2c: 4a20 ldr r2, [pc, #128] ; (1002ab0 ) + 1002a2e: 21cd movs r1, #205 ; 0xcd + 1002a30: 4820 ldr r0, [pc, #128] ; (1002ab4 ) + 1002a32: f7fd fd65 bl 1000500 <_assert_handler> + _ASSERT(IS_TIMER_NUM(TIM_PWMInitStruct->TIMx)); + 1002a36: 782b ldrb r3, [r5, #0] + 1002a38: 2b08 cmp r3, #8 + 1002a3a: d904 bls.n 1002a46 + 1002a3c: 4a1c ldr r2, [pc, #112] ; (1002ab0 ) + 1002a3e: 21ce movs r1, #206 ; 0xce + 1002a40: 481c ldr r0, [pc, #112] ; (1002ab4 ) + 1002a42: f7fd fd5d bl 1000500 <_assert_handler> + + TIM_Cmd(MTIM, TIM_PWMInitStruct->TIMx, DISABLE); + 1002a46: 7829 ldrb r1, [r5, #0] + 1002a48: 2200 movs r2, #0 + 1002a4a: 4818 ldr r0, [pc, #96] ; (1002aac ) + 1002a4c: f7ff ff5a bl 1002904 + + TIMMx->PERIOD.reg[PCNT(TIM_PWMInitStruct->TIMx)] = TIM_PWMInitStruct->HighLevelPeriod; + 1002a50: 782a ldrb r2, [r5, #0] + 1002a52: 68a9 ldr r1, [r5, #8] + 1002a54: 00d3 lsls r3, r2, #3 + 1002a56: 18e3 adds r3, r4, r3 + 1002a58: 6019 str r1, [r3, #0] + TIMMx->PERIOD.reg[NCNT(TIM_PWMInitStruct->TIMx)] = TIM_PWMInitStruct->LowLevelPeriod; + 1002a5a: 6869 ldr r1, [r5, #4] + 1002a5c: 6059 str r1, [r3, #4] + + if (HIGH_LEVEL == TIM_PWMInitStruct->StartLevel) + 1002a5e: 7b29 ldrb r1, [r5, #12] + 1002a60: 2302 movs r3, #2 + 1002a62: 2901 cmp r1, #1 + 1002a64: d115 bne.n 1002a92 + { + if (TIM_PWMInitStruct->TIMx < TIM8) + 1002a66: 2a07 cmp r2, #7 + 1002a68: d80b bhi.n 1002a82 + { + TIMMx->CTRL1.reg |= (TIM_CTRL_START_LEVEL << TIM_PWMInitStruct->TIMx * 4); + 1002a6a: 0090 lsls r0, r2, #2 + 1002a6c: 4083 lsls r3, r0 + 1002a6e: 6ca1 ldr r1, [r4, #72] ; 0x48 + 1002a70: 430b orrs r3, r1 + 1002a72: 64a3 str r3, [r4, #72] ; 0x48 + } + } + + if (TIM_PWMInitStruct->TIMx < TIM8) + { + TIMMx->CTRL1.reg &= ~(TIM_CTRL_MODE << (TIM_PWMInitStruct->TIMx * 4)); + 1002a74: 2104 movs r1, #4 + 1002a76: 0092 lsls r2, r2, #2 + 1002a78: 4091 lsls r1, r2 + 1002a7a: 6ca3 ldr r3, [r4, #72] ; 0x48 + 1002a7c: 438b bics r3, r1 + 1002a7e: 64a3 str r3, [r4, #72] ; 0x48 + } + else + { + TIMMx->CTRL2.reg &= ~(TIM_CTRL_MODE); + } +} + 1002a80: bd70 pop {r4, r5, r6, pc} + TIMMx->CTRL2.reg |= (TIM_CTRL_START_LEVEL); + 1002a82: 6ce2 ldr r2, [r4, #76] ; 0x4c + 1002a84: 4313 orrs r3, r2 + 1002a86: 64e3 str r3, [r4, #76] ; 0x4c + TIMMx->CTRL2.reg &= ~(TIM_CTRL_MODE); + 1002a88: 2204 movs r2, #4 + 1002a8a: 6ce3 ldr r3, [r4, #76] ; 0x4c + 1002a8c: 4393 bics r3, r2 + 1002a8e: 64e3 str r3, [r4, #76] ; 0x4c + 1002a90: e7f6 b.n 1002a80 + if (TIM_PWMInitStruct->TIMx < TIM8) + 1002a92: 2a07 cmp r2, #7 + 1002a94: d805 bhi.n 1002aa2 + TIMMx->CTRL1.reg &= ~(TIM_CTRL_START_LEVEL << TIM_PWMInitStruct->TIMx * 4); + 1002a96: 0090 lsls r0, r2, #2 + 1002a98: 4083 lsls r3, r0 + 1002a9a: 6ca1 ldr r1, [r4, #72] ; 0x48 + 1002a9c: 4399 bics r1, r3 + 1002a9e: 64a1 str r1, [r4, #72] ; 0x48 + 1002aa0: e7e8 b.n 1002a74 + TIMMx->CTRL2.reg &= ~(TIM_CTRL_START_LEVEL); + 1002aa2: 6ce2 ldr r2, [r4, #76] ; 0x4c + 1002aa4: 439a bics r2, r3 + 1002aa6: 64e2 str r2, [r4, #76] ; 0x4c + 1002aa8: e7ee b.n 1002a88 + 1002aaa: 46c0 nop ; (mov r8, r8) + 1002aac: 000f0c00 .word 0x000f0c00 + 1002ab0: 01006f11 .word 0x01006f11 + 1002ab4: 01006eb0 .word 0x01006eb0 + +01002ab8 : + * @param LowLevelPeriod :the PWM low level Period(Reload value) + * @param HighLevelPeriod :the PWM high level Period(Reload value) + * @retval none + */ +void TIM_SetPWMPeriod(TIM_Module_TypeDef *TIMMx, TIM_NumTypeDef TIMx, uint32_t LowLevelPeriod, uint32_t HighLevelPeriod) +{ + 1002ab8: b5f8 push {r3, r4, r5, r6, r7, lr} + 1002aba: 001e movs r6, r3 + _ASSERT(IS_TIMM(TIMMx)); + 1002abc: 4b0c ldr r3, [pc, #48] ; (1002af0 ) +{ + 1002abe: 0004 movs r4, r0 + 1002ac0: 000f movs r7, r1 + 1002ac2: 0015 movs r5, r2 + _ASSERT(IS_TIMM(TIMMx)); + 1002ac4: 4298 cmp r0, r3 + 1002ac6: d005 beq.n 1002ad4 + 1002ac8: 2102 movs r1, #2 + 1002aca: 4a0a ldr r2, [pc, #40] ; (1002af4 ) + 1002acc: 31ff adds r1, #255 ; 0xff + 1002ace: 480a ldr r0, [pc, #40] ; (1002af8 ) + 1002ad0: f7fd fd16 bl 1000500 <_assert_handler> + _ASSERT(IS_TIMER_NUM(TIMx)); + 1002ad4: 2f08 cmp r7, #8 + 1002ad6: d905 bls.n 1002ae4 + 1002ad8: 2181 movs r1, #129 ; 0x81 + 1002ada: 4a06 ldr r2, [pc, #24] ; (1002af4 ) + 1002adc: 0049 lsls r1, r1, #1 + 1002ade: 4806 ldr r0, [pc, #24] ; (1002af8 ) + 1002ae0: f7fd fd0e bl 1000500 <_assert_handler> + 1002ae4: 00ff lsls r7, r7, #3 + 1002ae6: 19e4 adds r4, r4, r7 + + TIMMx->PERIOD.reg[PCNT(TIMx)] = HighLevelPeriod; + 1002ae8: 6026 str r6, [r4, #0] + TIMMx->PERIOD.reg[NCNT(TIMx)] = LowLevelPeriod; + 1002aea: 6065 str r5, [r4, #4] +} + 1002aec: bdf8 pop {r3, r4, r5, r6, r7, pc} + 1002aee: 46c0 nop ; (mov r8, r8) + 1002af0: 000f0c00 .word 0x000f0c00 + 1002af4: 01006f1d .word 0x01006f1d + 1002af8: 01006eb0 .word 0x01006eb0 + +01002afc : + * @param NewState :Fixed FunctionalState enumeration type + * @retval none + */ +void TIM_ITConfig(TIM_Module_TypeDef *TIMMx, TIM_NumTypeDef TIMx, FunctionalState NewState) +{ + _ASSERT(IS_TIMM(TIMMx)); + 1002afc: 4b17 ldr r3, [pc, #92] ; (1002b5c ) +{ + 1002afe: b570 push {r4, r5, r6, lr} + 1002b00: 0004 movs r4, r0 + 1002b02: 000e movs r6, r1 + 1002b04: 0015 movs r5, r2 + _ASSERT(IS_TIMM(TIMMx)); + 1002b06: 4298 cmp r0, r3 + 1002b08: d005 beq.n 1002b16 + 1002b0a: 2189 movs r1, #137 ; 0x89 + 1002b0c: 4a14 ldr r2, [pc, #80] ; (1002b60 ) + 1002b0e: 0049 lsls r1, r1, #1 + 1002b10: 4814 ldr r0, [pc, #80] ; (1002b64 ) + 1002b12: f7fd fcf5 bl 1000500 <_assert_handler> + _ASSERT(IS_TIMER_NUM(TIMx)); + 1002b16: 2e08 cmp r6, #8 + 1002b18: d905 bls.n 1002b26 + 1002b1a: 2114 movs r1, #20 + 1002b1c: 4a10 ldr r2, [pc, #64] ; (1002b60 ) + 1002b1e: 31ff adds r1, #255 ; 0xff + 1002b20: 4810 ldr r0, [pc, #64] ; (1002b64 ) + 1002b22: f7fd fced bl 1000500 <_assert_handler> + 1002b26: 2301 movs r3, #1 + 1002b28: 40b3 lsls r3, r6 + 1002b2a: 490f ldr r1, [pc, #60] ; (1002b68 ) + 1002b2c: b298 uxth r0, r3 + + if (NewState == ENABLE) + 1002b2e: 2d01 cmp r5, #1 + 1002b30: d10a bne.n 1002b48 + { + TIMMx->CTRL2.bit.IRQ_EN |= BIT(TIMx); + 1002b32: 6ce3 ldr r3, [r4, #76] ; 0x4c + 1002b34: 6ce2 ldr r2, [r4, #76] ; 0x4c + 1002b36: 04db lsls r3, r3, #19 + 1002b38: 0ddb lsrs r3, r3, #23 + 1002b3a: 4303 orrs r3, r0 + 1002b3c: 05db lsls r3, r3, #23 + 1002b3e: 0cdb lsrs r3, r3, #19 + 1002b40: 4011 ands r1, r2 + 1002b42: 430b orrs r3, r1 + 1002b44: 64e3 str r3, [r4, #76] ; 0x4c + } + else + { + TIMMx->CTRL2.bit.IRQ_EN &= ~(BIT(TIMx)); + } +} + 1002b46: bd70 pop {r4, r5, r6, pc} + TIMMx->CTRL2.bit.IRQ_EN &= ~(BIT(TIMx)); + 1002b48: 6ce2 ldr r2, [r4, #76] ; 0x4c + 1002b4a: 6ce3 ldr r3, [r4, #76] ; 0x4c + 1002b4c: 04d2 lsls r2, r2, #19 + 1002b4e: 0dd2 lsrs r2, r2, #23 + 1002b50: 4382 bics r2, r0 + 1002b52: 0112 lsls r2, r2, #4 + 1002b54: 4019 ands r1, r3 + 1002b56: 430a orrs r2, r1 + 1002b58: 64e2 str r2, [r4, #76] ; 0x4c +} + 1002b5a: e7f4 b.n 1002b46 + 1002b5c: 000f0c00 .word 0x000f0c00 + 1002b60: 01006f2e .word 0x01006f2e + 1002b64: 01006eb0 .word 0x01006eb0 + 1002b68: ffffe00f .word 0xffffe00f + +01002b6c : + * @param TIMx : the timer number of output PWM1(TIM0-TIM8) + * @retval none + */ +void TIM_ClearITPendingBit(TIM_Module_TypeDef *TIMMx, TIM_NumTypeDef TIMx) +{ + _ASSERT(IS_TIMM(TIMMx)); + 1002b6c: 4b12 ldr r3, [pc, #72] ; (1002bb8 ) +{ + 1002b6e: b570 push {r4, r5, r6, lr} + 1002b70: 0004 movs r4, r0 + 1002b72: 000d movs r5, r1 + _ASSERT(IS_TIMM(TIMMx)); + 1002b74: 4298 cmp r0, r3 + 1002b76: d005 beq.n 1002b84 + 1002b78: 2194 movs r1, #148 ; 0x94 + 1002b7a: 4a10 ldr r2, [pc, #64] ; (1002bbc ) + 1002b7c: 0049 lsls r1, r1, #1 + 1002b7e: 4810 ldr r0, [pc, #64] ; (1002bc0 ) + 1002b80: f7fd fcbe bl 1000500 <_assert_handler> + _ASSERT(IS_TIMER_NUM(TIMx)); + 1002b84: 2d08 cmp r5, #8 + 1002b86: d905 bls.n 1002b94 + 1002b88: 212a movs r1, #42 ; 0x2a + 1002b8a: 4a0c ldr r2, [pc, #48] ; (1002bbc ) + 1002b8c: 31ff adds r1, #255 ; 0xff + 1002b8e: 480c ldr r0, [pc, #48] ; (1002bc0 ) + 1002b90: f7fd fcb6 bl 1000500 <_assert_handler> + + TIMMx->CTRL2.bit.IRQ_CLR |= BIT(TIMx); + 1002b94: 2201 movs r2, #1 + 1002b96: 40aa lsls r2, r5 + 1002b98: 6ce3 ldr r3, [r4, #76] ; 0x4c + 1002b9a: 490a ldr r1, [pc, #40] ; (1002bc4 ) + 1002b9c: 029b lsls r3, r3, #10 + 1002b9e: 0ddb lsrs r3, r3, #23 + 1002ba0: 4313 orrs r3, r2 + 1002ba2: 6ce2 ldr r2, [r4, #76] ; 0x4c + 1002ba4: 05db lsls r3, r3, #23 + 1002ba6: 400a ands r2, r1 + 1002ba8: 0a9b lsrs r3, r3, #10 + 1002baa: 4313 orrs r3, r2 + 1002bac: 64e3 str r3, [r4, #76] ; 0x4c + TIMMx->CTRL2.bit.IRQ_CLR = 0; + 1002bae: 6ce3 ldr r3, [r4, #76] ; 0x4c + 1002bb0: 400b ands r3, r1 + 1002bb2: 64e3 str r3, [r4, #76] ; 0x4c +} + 1002bb4: bd70 pop {r4, r5, r6, pc} + 1002bb6: 46c0 nop ; (mov r8, r8) + 1002bb8: 000f0c00 .word 0x000f0c00 + 1002bbc: 01006f3b .word 0x01006f3b + 1002bc0: 01006eb0 .word 0x01006eb0 + 1002bc4: ffc01fff .word 0xffc01fff + +01002bc8 : + * @param TIMx : the timer number of output PWM1(TIM0-TIM8) + * @retval The new state of specific TIM IT_Flag(SET or RESET) + */ +ITStatus TIM_GetITStatus(TIM_Module_TypeDef *TIMMx, TIM_NumTypeDef TIMx) +{ + _ASSERT(IS_TIMM(TIMMx)); + 1002bc8: 4b0d ldr r3, [pc, #52] ; (1002c00 ) +{ + 1002bca: b570 push {r4, r5, r6, lr} + 1002bcc: 0005 movs r5, r0 + 1002bce: 000c movs r4, r1 + _ASSERT(IS_TIMM(TIMMx)); + 1002bd0: 4298 cmp r0, r3 + 1002bd2: d005 beq.n 1002be0 + 1002bd4: 219c movs r1, #156 ; 0x9c + 1002bd6: 4a0b ldr r2, [pc, #44] ; (1002c04 ) + 1002bd8: 0049 lsls r1, r1, #1 + 1002bda: 480b ldr r0, [pc, #44] ; (1002c08 ) + 1002bdc: f7fd fc90 bl 1000500 <_assert_handler> + _ASSERT(IS_TIMER_NUM(TIMx)); + 1002be0: 2c08 cmp r4, #8 + 1002be2: d905 bls.n 1002bf0 + 1002be4: 213a movs r1, #58 ; 0x3a + 1002be6: 4a07 ldr r2, [pc, #28] ; (1002c04 ) + 1002be8: 31ff adds r1, #255 ; 0xff + 1002bea: 4807 ldr r0, [pc, #28] ; (1002c08 ) + 1002bec: f7fd fc88 bl 1000500 <_assert_handler> + + if ((TIMMx->IRQ_NUM.bit.PWM_IRQ_PEND & BIT(TIMx)) != RESET) + 1002bf0: 6f68 ldr r0, [r5, #116] ; 0x74 + 1002bf2: 2301 movs r3, #1 + 1002bf4: 05c0 lsls r0, r0, #23 + 1002bf6: 0dc0 lsrs r0, r0, #23 + 1002bf8: 40e0 lsrs r0, r4 + { + return SET; + } + return RESET; +} + 1002bfa: 4018 ands r0, r3 + 1002bfc: bd70 pop {r4, r5, r6, pc} + 1002bfe: 46c0 nop ; (mov r8, r8) + 1002c00: 000f0c00 .word 0x000f0c00 + 1002c04: 01006f51 .word 0x01006f51 + 1002c08: 01006eb0 .word 0x01006eb0 + +01002c0c : + * @param TIMMx : the timer moudle selection + * @retval The new state of TIM IT_Flag + */ +uint32_t TIM_GetAllITStatus(TIM_Module_TypeDef *TIMMx) +{ + _ASSERT(IS_TIMM(TIMMx)); + 1002c0c: 4b07 ldr r3, [pc, #28] ; (1002c2c ) +{ + 1002c0e: b510 push {r4, lr} + 1002c10: 0004 movs r4, r0 + _ASSERT(IS_TIMM(TIMMx)); + 1002c12: 4298 cmp r0, r3 + 1002c14: d005 beq.n 1002c22 + 1002c16: 21a5 movs r1, #165 ; 0xa5 + 1002c18: 4a05 ldr r2, [pc, #20] ; (1002c30 ) + 1002c1a: 0049 lsls r1, r1, #1 + 1002c1c: 4805 ldr r0, [pc, #20] ; (1002c34 ) + 1002c1e: f7fd fc6f bl 1000500 <_assert_handler> + + return TIMMx->IRQ_NUM.bit.PWM_IRQ_PEND; + 1002c22: 6f60 ldr r0, [r4, #116] ; 0x74 + 1002c24: 05c0 lsls r0, r0, #23 + 1002c26: 0dc0 lsrs r0, r0, #23 +} + 1002c28: bd10 pop {r4, pc} + 1002c2a: 46c0 nop ; (mov r8, r8) + 1002c2c: 000f0c00 .word 0x000f0c00 + 1002c30: 01006f61 .word 0x01006f61 + 1002c34: 01006eb0 .word 0x01006eb0 + +01002c38 : + * @brief BPU module initializes the vector + * @param none + * @retval result of operation + */ +ErrorStatus BPU_Init(void) +{ + 1002c38: b510 push {r4, lr} + if (ENABLE == MSYSCTRL->LPM_BUSY_CFG.bit.LPM_EN) + 1002c3a: 4b0f ldr r3, [pc, #60] ; (1002c78 ) + if (RESET == BPU_IsReady()) + { + return ERROR; + 1002c3c: 2000 movs r0, #0 + if (ENABLE == MSYSCTRL->LPM_BUSY_CFG.bit.LPM_EN) + 1002c3e: 6a1a ldr r2, [r3, #32] + 1002c40: 0792 lsls r2, r2, #30 + 1002c42: 0fd2 lsrs r2, r2, #31 + 1002c44: 2a01 cmp r2, #1 + 1002c46: d116 bne.n 1002c76 + MLPM->ACCESS_CODE.reg = ACCESSCODE1; + 1002c48: 21a8 movs r1, #168 ; 0xa8 + 1002c4a: 4b0c ldr r3, [pc, #48] ; (1002c7c ) + 1002c4c: 0089 lsls r1, r1, #2 + 1002c4e: 3055 adds r0, #85 ; 0x55 + 1002c50: 5058 str r0, [r3, r1] + MLPM->ACCESS_CODE.reg = ACCESSCODE2; + 1002c52: 3055 adds r0, #85 ; 0x55 + 1002c54: 5058 str r0, [r3, r1] + MLPM->ACCESS_CODE.reg = ACCESSCODE3; + 1002c56: 3893 subs r0, #147 ; 0x93 + 1002c58: 5058 str r0, [r3, r1] + if (MLPM->ACCESS_EN.reg == status) + 1002c5a: 3104 adds r1, #4 + 1002c5c: 5858 ldr r0, [r3, r1] + 1002c5e: 2801 cmp r0, #1 + 1002c60: d000 beq.n 1002c64 + MLPM->ACCESS_EN.reg = status; + 1002c62: 505a str r2, [r3, r1] + if (MLPM->CLK_CTRL.reg == status) + 1002c64: 21a0 movs r1, #160 ; 0xa0 + 1002c66: 2201 movs r2, #1 + 1002c68: 0089 lsls r1, r1, #2 + 1002c6a: 585c ldr r4, [r3, r1] + } + + LPM_AccessCode(ENABLE); + LPM_RegisterClk(ENABLE); + + return SUCCESS; + 1002c6c: 0020 movs r0, r4 + 1002c6e: 4294 cmp r4, r2 + 1002c70: d001 beq.n 1002c76 + 1002c72: 0010 movs r0, r2 + MLPM->CLK_CTRL.reg = status; + 1002c74: 505a str r2, [r3, r1] +} + 1002c76: bd10 pop {r4, pc} + 1002c78: 000f8520 .word 0x000f8520 + 1002c7c: 000fa800 .word 0x000fa800 + +01002c80 : + if (ENABLE == MSYSCTRL->LPM_BUSY_CFG.bit.LPM_EN) + 1002c80: 4b05 ldr r3, [pc, #20] ; (1002c98 ) + */ +ErrorStatus BPU_Reset(void) +{ + if (RESET == BPU_IsReady()) + { + return ERROR; + 1002c82: 2000 movs r0, #0 + if (ENABLE == MSYSCTRL->LPM_BUSY_CFG.bit.LPM_EN) + 1002c84: 6a1b ldr r3, [r3, #32] + 1002c86: 079b lsls r3, r3, #30 + 1002c88: 0fdb lsrs r3, r3, #31 + 1002c8a: 2b01 cmp r3, #1 + 1002c8c: d102 bne.n 1002c94 + } + + MBPK->RST.reg = ENABLE; + + return SUCCESS; + 1002c8e: 0018 movs r0, r3 + MBPK->RST.reg = ENABLE; + 1002c90: 4a02 ldr r2, [pc, #8] ; (1002c9c ) + 1002c92: 67d3 str r3, [r2, #124] ; 0x7c +} + 1002c94: 4770 bx lr + 1002c96: 46c0 nop ; (mov r8, r8) + 1002c98: 000f8520 .word 0x000f8520 + 1002c9c: 000fac04 .word 0x000fac04 + +01002ca0 : + * This parameter can be ENABLE or DISABLE + * @retval None + */ +void BPU_ITCmd(FunctionalState NewState) +{ + MSECURE->IE.bit.IE = NewState; + 1002ca0: 2101 movs r1, #1 + 1002ca2: 4a06 ldr r2, [pc, #24] ; (1002cbc ) + 1002ca4: 4008 ands r0, r1 + 1002ca6: 6953 ldr r3, [r2, #20] + 1002ca8: 438b bics r3, r1 + 1002caa: 4303 orrs r3, r0 + MSECURE->IE.bit.CORE_IE = NewState; + 1002cac: 4088 lsls r0, r1 + MSECURE->IE.bit.IE = NewState; + 1002cae: 6153 str r3, [r2, #20] + MSECURE->IE.bit.CORE_IE = NewState; + 1002cb0: 6953 ldr r3, [r2, #20] + 1002cb2: 1849 adds r1, r1, r1 + 1002cb4: 438b bics r3, r1 + 1002cb6: 4318 orrs r0, r3 + 1002cb8: 6150 str r0, [r2, #20] +} + 1002cba: 4770 bx lr + 1002cbc: 000f85c0 .word 0x000f85c0 + +01002cc0 : + * @param key_len : length of user key + * @param key_offset : offset of the Data backup register + * @retval result of operation + */ +ErrorStatus BPK_WriteKey(uint32_t *buf, uint32_t key_len, uint32_t key_offset) +{ + 1002cc0: b570 push {r4, r5, r6, lr} + uint32_t index = 0; + + if (key_offset + key_len > BPK_KEY_NUM) + 1002cc2: 1854 adds r4, r2, r1 + { + return ERROR; + 1002cc4: 2300 movs r3, #0 + if (key_offset + key_len > BPK_KEY_NUM) + 1002cc6: 2c20 cmp r4, #32 + 1002cc8: d803 bhi.n 1002cd2 + } + + for (index = 0; index < key_len; index++) + { + MBPK->KEY[key_offset + index] = buf[index]; + 1002cca: 4d06 ldr r5, [pc, #24] ; (1002ce4 ) + for (index = 0; index < key_len; index++) + 1002ccc: 428b cmp r3, r1 + 1002cce: d102 bne.n 1002cd6 + } + + return SUCCESS; + 1002cd0: 2301 movs r3, #1 +} + 1002cd2: 0018 movs r0, r3 + 1002cd4: bd70 pop {r4, r5, r6, pc} + MBPK->KEY[key_offset + index] = buf[index]; + 1002cd6: 009e lsls r6, r3, #2 + 1002cd8: 189c adds r4, r3, r2 + 1002cda: 5986 ldr r6, [r0, r6] + 1002cdc: 00a4 lsls r4, r4, #2 + 1002cde: 5166 str r6, [r4, r5] + for (index = 0; index < key_len; index++) + 1002ce0: 3301 adds r3, #1 + 1002ce2: e7f3 b.n 1002ccc + 1002ce4: 000fac00 .word 0x000fac00 + +01002ce8 : + * @param key_len : length of user key + * @param key_offset : offset of the Data backup register + * @retval result of operation + */ +ErrorStatus BPK_ReadKey(uint32_t *buf, uint32_t key_len, uint32_t key_offset) +{ + 1002ce8: b570 push {r4, r5, r6, lr} + uint32_t index = 0; + + if (key_offset + key_len > BPK_KEY_NUM) + 1002cea: 1854 adds r4, r2, r1 + { + return ERROR; + 1002cec: 2300 movs r3, #0 + if (key_offset + key_len > BPK_KEY_NUM) + 1002cee: 2c20 cmp r4, #32 + 1002cf0: d803 bhi.n 1002cfa + } + + for (index = 0; index < key_len; index++) + { + buf[index] = MBPK->KEY[key_offset + index]; + 1002cf2: 4d06 ldr r5, [pc, #24] ; (1002d0c ) + for (index = 0; index < key_len; index++) + 1002cf4: 428b cmp r3, r1 + 1002cf6: d102 bne.n 1002cfe + } + + return SUCCESS; + 1002cf8: 2301 movs r3, #1 +} + 1002cfa: 0018 movs r0, r3 + 1002cfc: bd70 pop {r4, r5, r6, pc} + buf[index] = MBPK->KEY[key_offset + index]; + 1002cfe: 189c adds r4, r3, r2 + 1002d00: 00a4 lsls r4, r4, #2 + 1002d02: 5966 ldr r6, [r4, r5] + 1002d04: 009c lsls r4, r3, #2 + 1002d06: 5106 str r6, [r0, r4] + for (index = 0; index < key_len; index++) + 1002d08: 3301 adds r3, #1 + 1002d0a: e7f3 b.n 1002cf4 + 1002d0c: 000fac00 .word 0x000fac00 + +01002d10 : + * @arg BPK_KEY_REGION_3 + * @retval None + */ +void BPK_KeyClear(uint16_t bpk_key_region) +{ + _ASSERT(IS_BPK_KEY_REGION(bpk_key_region)); + 1002d10: 230f movs r3, #15 + 1002d12: 0002 movs r2, r0 +{ + 1002d14: b510 push {r4, lr} + _ASSERT(IS_BPK_KEY_REGION(bpk_key_region)); + 1002d16: 439a bics r2, r3 +{ + 1002d18: 0004 movs r4, r0 + _ASSERT(IS_BPK_KEY_REGION(bpk_key_region)); + 1002d1a: 2a00 cmp r2, #0 + 1002d1c: d101 bne.n 1002d22 + 1002d1e: 2800 cmp r0, #0 + 1002d20: d104 bne.n 1002d2c + 1002d22: 4a04 ldr r2, [pc, #16] ; (1002d34 ) + 1002d24: 218f movs r1, #143 ; 0x8f + 1002d26: 4804 ldr r0, [pc, #16] ; (1002d38 ) + 1002d28: f7fd fbea bl 1000500 <_assert_handler> + + MBPK->CLR.reg = bpk_key_region; + 1002d2c: 4b03 ldr r3, [pc, #12] ; (1002d3c ) + 1002d2e: 67dc str r4, [r3, #124] ; 0x7c +} + 1002d30: bd10 pop {r4, pc} + 1002d32: 46c0 nop ; (mov r8, r8) + 1002d34: 01006f9a .word 0x01006f9a + 1002d38: 01006f74 .word 0x01006f74 + 1002d3c: 000fac08 .word 0x000fac08 + +01002d40 : + * @param NewState: new state of the BPK alarm action + * This parameter can be ENABLE or DISABLE + * @retval None + */ +void BPK_AlterClearKey(FunctionalState NewState) +{ + 1002d40: b510 push {r4, lr} + 1002d42: 4c0c ldr r4, [pc, #48] ; (1002d74 ) + _ASSERT(IS_FUNCTIONAL_STATE(NewState)); + 1002d44: 2801 cmp r0, #1 + 1002d46: d90c bls.n 1002d62 + 1002d48: 4a0b ldr r2, [pc, #44] ; (1002d78 ) + 1002d4a: 219d movs r1, #157 ; 0x9d + 1002d4c: 480b ldr r0, [pc, #44] ; (1002d7c ) + 1002d4e: f7fd fbd7 bl 1000500 <_assert_handler> + + if(NewState != ENABLE) + { + MSEC->ALERT_ACTION.bit.CLEAR_KEY = 0x5; + 1002d52: 220f movs r2, #15 + 1002d54: 68e3 ldr r3, [r4, #12] + 1002d56: 4393 bics r3, r2 + 1002d58: 001a movs r2, r3 + 1002d5a: 2305 movs r3, #5 + } + else + { + MSEC->ALERT_ACTION.bit.CLEAR_KEY = 0xa; + 1002d5c: 4313 orrs r3, r2 + 1002d5e: 60e3 str r3, [r4, #12] + } +} + 1002d60: bd10 pop {r4, pc} + if(NewState != ENABLE) + 1002d62: 2801 cmp r0, #1 + 1002d64: d1f5 bne.n 1002d52 + MSEC->ALERT_ACTION.bit.CLEAR_KEY = 0xa; + 1002d66: 220f movs r2, #15 + 1002d68: 68e3 ldr r3, [r4, #12] + 1002d6a: 4393 bics r3, r2 + 1002d6c: 001a movs r2, r3 + 1002d6e: 230a movs r3, #10 + 1002d70: e7f4 b.n 1002d5c + 1002d72: 46c0 nop ; (mov r8, r8) + 1002d74: 000fae00 .word 0x000fae00 + 1002d78: 01006fa7 .word 0x01006fa7 + 1002d7c: 01006f74 .word 0x01006f74 + +01002d80 : + * This parameter can be ENABLE or DISABLE + * @retval None + */ +void BPK_KeyWriteLock(uint16_t bpk_key_region, FunctionalState status) +{ + _ASSERT(IS_BPK_KEY_REGION(bpk_key_region)); + 1002d80: 230f movs r3, #15 + 1002d82: 0002 movs r2, r0 +{ + 1002d84: b570 push {r4, r5, r6, lr} + _ASSERT(IS_BPK_KEY_REGION(bpk_key_region)); + 1002d86: 439a bics r2, r3 +{ + 1002d88: 0004 movs r4, r0 + 1002d8a: 000d movs r5, r1 + _ASSERT(IS_BPK_KEY_REGION(bpk_key_region)); + 1002d8c: 2a00 cmp r2, #0 + 1002d8e: d101 bne.n 1002d94 + 1002d90: 2800 cmp r0, #0 + 1002d92: d104 bne.n 1002d9e + 1002d94: 4a0e ldr r2, [pc, #56] ; (1002dd0 ) + 1002d96: 21b8 movs r1, #184 ; 0xb8 + 1002d98: 480e ldr r0, [pc, #56] ; (1002dd4 ) + 1002d9a: f7fd fbb1 bl 1000500 <_assert_handler> + 1002d9e: 4a0e ldr r2, [pc, #56] ; (1002dd8 ) + + if (DISABLE != status) + 1002da0: 2d00 cmp r5, #0 + 1002da2: d00a beq.n 1002dba + { + MBPK->LW.bit.LOCK_WRITE |= bpk_key_region; + 1002da4: 210f movs r1, #15 + 1002da6: 6810 ldr r0, [r2, #0] + 1002da8: 7813 ldrb r3, [r2, #0] + 1002daa: 0700 lsls r0, r0, #28 + 1002dac: 0f00 lsrs r0, r0, #28 + 1002dae: 4320 orrs r0, r4 + 1002db0: 4008 ands r0, r1 + 1002db2: 438b bics r3, r1 + 1002db4: 4318 orrs r0, r3 + 1002db6: 7010 strb r0, [r2, #0] + } + else + { + MBPK->LW.bit.LOCK_WRITE &= ~bpk_key_region; + } +} + 1002db8: bd70 pop {r4, r5, r6, pc} + MBPK->LW.bit.LOCK_WRITE &= ~bpk_key_region; + 1002dba: 200f movs r0, #15 + 1002dbc: 6813 ldr r3, [r2, #0] + 1002dbe: 7811 ldrb r1, [r2, #0] + 1002dc0: 071b lsls r3, r3, #28 + 1002dc2: 0f1b lsrs r3, r3, #28 + 1002dc4: 43a3 bics r3, r4 + 1002dc6: 4381 bics r1, r0 + 1002dc8: 430b orrs r3, r1 + 1002dca: 7013 strb r3, [r2, #0] +} + 1002dcc: e7f4 b.n 1002db8 + 1002dce: 46c0 nop ; (mov r8, r8) + 1002dd0: 01006fb9 .word 0x01006fb9 + 1002dd4: 01006f74 .word 0x01006f74 + 1002dd8: 000fac8c .word 0x000fac8c + +01002ddc : + * This parameter can be ENABLE or DISABLE + * @retval None + */ +void BPK_KeyReadLock(uint16_t bpk_key_region, FunctionalState status) +{ + _ASSERT(IS_BPK_KEY_REGION(bpk_key_region)); + 1002ddc: 230f movs r3, #15 + 1002dde: 0002 movs r2, r0 +{ + 1002de0: b570 push {r4, r5, r6, lr} + _ASSERT(IS_BPK_KEY_REGION(bpk_key_region)); + 1002de2: 439a bics r2, r3 +{ + 1002de4: 0004 movs r4, r0 + 1002de6: 000d movs r5, r1 + _ASSERT(IS_BPK_KEY_REGION(bpk_key_region)); + 1002de8: 2a00 cmp r2, #0 + 1002dea: d101 bne.n 1002df0 + 1002dec: 2800 cmp r0, #0 + 1002dee: d104 bne.n 1002dfa + 1002df0: 4a0e ldr r2, [pc, #56] ; (1002e2c ) + 1002df2: 21d3 movs r1, #211 ; 0xd3 + 1002df4: 480e ldr r0, [pc, #56] ; (1002e30 ) + 1002df6: f7fd fb83 bl 1000500 <_assert_handler> + 1002dfa: 4a0e ldr r2, [pc, #56] ; (1002e34 ) + + if (DISABLE != status) + 1002dfc: 2d00 cmp r5, #0 + 1002dfe: d00a beq.n 1002e16 + { + MBPK->LR.bit.LOCK_READ |= bpk_key_region; + 1002e00: 210f movs r1, #15 + 1002e02: 6810 ldr r0, [r2, #0] + 1002e04: 7813 ldrb r3, [r2, #0] + 1002e06: 0700 lsls r0, r0, #28 + 1002e08: 0f00 lsrs r0, r0, #28 + 1002e0a: 4320 orrs r0, r4 + 1002e0c: 4008 ands r0, r1 + 1002e0e: 438b bics r3, r1 + 1002e10: 4318 orrs r0, r3 + 1002e12: 7010 strb r0, [r2, #0] + } + else + { + MBPK->LR.bit.LOCK_READ &= ~bpk_key_region; + } +} + 1002e14: bd70 pop {r4, r5, r6, pc} + MBPK->LR.bit.LOCK_READ &= ~bpk_key_region; + 1002e16: 200f movs r0, #15 + 1002e18: 6813 ldr r3, [r2, #0] + 1002e1a: 7811 ldrb r1, [r2, #0] + 1002e1c: 071b lsls r3, r3, #28 + 1002e1e: 0f1b lsrs r3, r3, #28 + 1002e20: 43a3 bics r3, r4 + 1002e22: 4381 bics r1, r0 + 1002e24: 430b orrs r3, r1 + 1002e26: 7013 strb r3, [r2, #0] +} + 1002e28: e7f4 b.n 1002e14 + 1002e2a: 46c0 nop ; (mov r8, r8) + 1002e2c: 01006fca .word 0x01006fca + 1002e30: 01006f74 .word 0x01006f74 + 1002e34: 000fac88 .word 0x000fac88 + +01002e38 : + * @param status: new state of the specified BPK lock + * This parameter can be ENABLE or DISABLE + * @retval None + */ +void BPK_Lock(uint32_t bpk_locks, FunctionalState status) +{ + 1002e38: b570 push {r4, r5, r6, lr} + 1002e3a: 0004 movs r4, r0 + 1002e3c: 000d movs r5, r1 + _ASSERT((bpk_locks != BPK_LR_LOCK_SELF) && IS_BPK_LOCK(bpk_locks)); + 1002e3e: 2801 cmp r0, #1 + 1002e40: d003 beq.n 1002e4a + 1002e42: 231e movs r3, #30 + 1002e44: 0002 movs r2, r0 + 1002e46: 439a bics r2, r3 + 1002e48: d004 beq.n 1002e54 + 1002e4a: 4a07 ldr r2, [pc, #28] ; (1002e68 ) + 1002e4c: 21ef movs r1, #239 ; 0xef + 1002e4e: 4807 ldr r0, [pc, #28] ; (1002e6c ) + 1002e50: f7fd fb56 bl 1000500 <_assert_handler> + 1002e54: 4b06 ldr r3, [pc, #24] ; (1002e70 ) + + if (DISABLE != status) + { + MBPK->LOCK.reg |= bpk_locks; + 1002e56: 681a ldr r2, [r3, #0] + if (DISABLE != status) + 1002e58: 2d00 cmp r5, #0 + 1002e5a: d002 beq.n 1002e62 + MBPK->LOCK.reg |= bpk_locks; + 1002e5c: 4314 orrs r4, r2 + 1002e5e: 601c str r4, [r3, #0] + } + else + { + MBPK->LOCK.reg &= ~bpk_locks; + } +} + 1002e60: bd70 pop {r4, r5, r6, pc} + MBPK->LOCK.reg &= ~bpk_locks; + 1002e62: 43a2 bics r2, r4 + 1002e64: 601a str r2, [r3, #0] +} + 1002e66: e7fb b.n 1002e60 + 1002e68: 01006fda .word 0x01006fda + 1002e6c: 01006f74 .word 0x01006f74 + 1002e70: 000fac90 .word 0x000fac90 + +01002e74 : + * @param None + * @retval None + */ +void BPK_LockSelf(void) +{ + MBPK->LOCK.reg |= BPK_LR_LOCK_SELF; + 1002e74: 2301 movs r3, #1 + 1002e76: 4a02 ldr r2, [pc, #8] ; (1002e80 ) + 1002e78: 6811 ldr r1, [r2, #0] + 1002e7a: 430b orrs r3, r1 + 1002e7c: 6013 str r3, [r2, #0] +} + 1002e7e: 4770 bx lr + 1002e80: 000fac90 .word 0x000fac90 + +01002e84 : + * @arg BPK_LR_LOCK_ALL + * @retval result of operation + */ +FlagStatus BPK_GetLockStatus(uint32_t bpk_locks) +{ + _ASSERT(IS_BPK_LOCK(bpk_locks)); + 1002e84: 231e movs r3, #30 + 1002e86: 0002 movs r2, r0 +{ + 1002e88: b510 push {r4, lr} + _ASSERT(IS_BPK_LOCK(bpk_locks)); + 1002e8a: 439a bics r2, r3 +{ + 1002e8c: 0004 movs r4, r0 + _ASSERT(IS_BPK_LOCK(bpk_locks)); + 1002e8e: 2a00 cmp r2, #0 + 1002e90: d005 beq.n 1002e9e + 1002e92: 218b movs r1, #139 ; 0x8b + 1002e94: 4a05 ldr r2, [pc, #20] ; (1002eac ) + 1002e96: 0049 lsls r1, r1, #1 + 1002e98: 4805 ldr r0, [pc, #20] ; (1002eb0 ) + 1002e9a: f7fd fb31 bl 1000500 <_assert_handler> + + if ((MBPK->LOCK.reg & bpk_locks) != (uint16_t)RESET) + 1002e9e: 4b05 ldr r3, [pc, #20] ; (1002eb4 ) + 1002ea0: 6818 ldr r0, [r3, #0] + 1002ea2: 4004 ands r4, r0 + 1002ea4: 1e60 subs r0, r4, #1 + 1002ea6: 4184 sbcs r4, r0 + 1002ea8: b2e0 uxtb r0, r4 + } + else + { + return RESET; + } +} + 1002eaa: bd10 pop {r4, pc} + 1002eac: 01006fe3 .word 0x01006fe3 + 1002eb0: 01006f74 .word 0x01006f74 + 1002eb4: 000fac90 .word 0x000fac90 + +01002eb8 : + * @param SENSOR_EXTInitStruct: SENSOR_EXTInitStruct + * @retval result of operation + */ +uint32_t SENSOR_EXTInit(SENSOR_EXTInitTypeDef *SENSOR_EXTInitStruct) +{ + _ASSERT(IS_SENSOR_PORT(SENSOR_EXTInitStruct->SENSOR_Port_Static | SENSOR_EXTInitStruct->SENSOR_Port_Dynamic)); + 1002eb8: 6842 ldr r2, [r0, #4] + 1002eba: 6803 ldr r3, [r0, #0] +{ + 1002ebc: b5f0 push {r4, r5, r6, r7, lr} + _ASSERT(IS_SENSOR_PORT(SENSOR_EXTInitStruct->SENSOR_Port_Static | SENSOR_EXTInitStruct->SENSOR_Port_Dynamic)); + 1002ebe: 4313 orrs r3, r2 + 1002ec0: 0019 movs r1, r3 + 1002ec2: 22ff movs r2, #255 ; 0xff +{ + 1002ec4: b08b sub sp, #44 ; 0x2c + 1002ec6: 0004 movs r4, r0 + _ASSERT(IS_SENSOR_PORT(SENSOR_EXTInitStruct->SENSOR_Port_Static | SENSOR_EXTInitStruct->SENSOR_Port_Dynamic)); + 1002ec8: 4391 bics r1, r2 + 1002eca: d101 bne.n 1002ed0 + 1002ecc: 2b00 cmp r3, #0 + 1002ece: d105 bne.n 1002edc + 1002ed0: 2195 movs r1, #149 ; 0x95 + 1002ed2: 4ad8 ldr r2, [pc, #864] ; (1003234 ) + 1002ed4: 0049 lsls r1, r1, #1 + 1002ed6: 48d8 ldr r0, [pc, #864] ; (1003238 ) + 1002ed8: f7fd fb12 bl 1000500 <_assert_handler> + _ASSERT(IS_SENSOR_PORT_IE(SENSOR_EXTInitStruct->SENSOR_Port_IE)); + 1002edc: 23ff movs r3, #255 ; 0xff + 1002ede: 68a2 ldr r2, [r4, #8] + 1002ee0: 439a bics r2, r3 + 1002ee2: d005 beq.n 1002ef0 + 1002ee4: 212c movs r1, #44 ; 0x2c + 1002ee6: 4ad3 ldr r2, [pc, #844] ; (1003234 ) + 1002ee8: 31ff adds r1, #255 ; 0xff + 1002eea: 48d3 ldr r0, [pc, #844] ; (1003238 ) + 1002eec: f7fd fb08 bl 1000500 <_assert_handler> + _ASSERT(IS_SENSOR_PORT_PUPD(SENSOR_EXTInitStruct->SENSOR_Port_PU | SENSOR_EXTInitStruct->SENSOR_Port_PD)); + 1002ef0: 6922 ldr r2, [r4, #16] + 1002ef2: 68e3 ldr r3, [r4, #12] + 1002ef4: 4313 orrs r3, r2 + 1002ef6: 22ff movs r2, #255 ; 0xff + 1002ef8: 4393 bics r3, r2 + 1002efa: d005 beq.n 1002f08 + 1002efc: 2196 movs r1, #150 ; 0x96 + 1002efe: 4acd ldr r2, [pc, #820] ; (1003234 ) + 1002f00: 0049 lsls r1, r1, #1 + 1002f02: 48cd ldr r0, [pc, #820] ; (1003238 ) + 1002f04: f7fd fafc bl 1000500 <_assert_handler> + _ASSERT(IS_PERIOD_STATIC(SENSOR_EXTInitStruct->SENSOR_Static_Period)); + 1002f08: 6963 ldr r3, [r4, #20] + 1002f0a: 2b03 cmp r3, #3 + 1002f0c: d905 bls.n 1002f1a + 1002f0e: 212e movs r1, #46 ; 0x2e + 1002f10: 4ac8 ldr r2, [pc, #800] ; (1003234 ) + 1002f12: 31ff adds r1, #255 ; 0xff + 1002f14: 48c8 ldr r0, [pc, #800] ; (1003238 ) + 1002f16: f7fd faf3 bl 1000500 <_assert_handler> + _ASSERT(IS_PERIOD_DYNAMIC(SENSOR_EXTInitStruct->SENSOR_Dynamic_Period)); + 1002f1a: 69a3 ldr r3, [r4, #24] + 1002f1c: 2b03 cmp r3, #3 + 1002f1e: d905 bls.n 1002f2c + 1002f20: 2197 movs r1, #151 ; 0x97 + 1002f22: 4ac4 ldr r2, [pc, #784] ; (1003234 ) + 1002f24: 0049 lsls r1, r1, #1 + 1002f26: 48c4 ldr r0, [pc, #784] ; (1003238 ) + 1002f28: f7fd faea bl 1000500 <_assert_handler> + _ASSERT(IS_SENSOR_EXT_STATIC_CHECK(SENSOR_EXTInitStruct->SENSOR_Static_Chk_Num)); + 1002f2c: 69e3 ldr r3, [r4, #28] + 1002f2e: 2b03 cmp r3, #3 + 1002f30: d905 bls.n 1002f3e + 1002f32: 2130 movs r1, #48 ; 0x30 + 1002f34: 4abf ldr r2, [pc, #764] ; (1003234 ) + 1002f36: 31ff adds r1, #255 ; 0xff + 1002f38: 48bf ldr r0, [pc, #764] ; (1003238 ) + 1002f3a: f7fd fae1 bl 1000500 <_assert_handler> + _ASSERT(IS_SENSOR_EXT_DYNAMIC_CHECK(SENSOR_EXTInitStruct->SENSOR_Dynamic_Chk_Num)); + 1002f3e: 6a23 ldr r3, [r4, #32] + 1002f40: 2b03 cmp r3, #3 + 1002f42: d905 bls.n 1002f50 + 1002f44: 2198 movs r1, #152 ; 0x98 + 1002f46: 4abb ldr r2, [pc, #748] ; (1003234 ) + 1002f48: 0049 lsls r1, r1, #1 + 1002f4a: 48bb ldr r0, [pc, #748] ; (1003238 ) + 1002f4c: f7fd fad8 bl 1000500 <_assert_handler> + _ASSERT(IS_FUNCTIONAL_STATE(SENSOR_EXTInitStruct->SENSOR_Static_Alert_Port_En)); + 1002f50: 0023 movs r3, r4 + 1002f52: 3328 adds r3, #40 ; 0x28 + 1002f54: 781b ldrb r3, [r3, #0] + 1002f56: 2b01 cmp r3, #1 + 1002f58: d905 bls.n 1002f66 + 1002f5a: 2132 movs r1, #50 ; 0x32 + 1002f5c: 4ab5 ldr r2, [pc, #724] ; (1003234 ) + 1002f5e: 31ff adds r1, #255 ; 0xff + 1002f60: 48b5 ldr r0, [pc, #724] ; (1003238 ) + 1002f62: f7fd facd bl 1000500 <_assert_handler> + _ASSERT(IS_FUNCTIONAL_STATE(SENSOR_EXTInitStruct->SENSOR_Dynamic_Alert_Port_En)); + 1002f66: 0023 movs r3, r4 + 1002f68: 3329 adds r3, #41 ; 0x29 + 1002f6a: 781b ldrb r3, [r3, #0] + 1002f6c: 2b01 cmp r3, #1 + 1002f6e: d905 bls.n 1002f7c + 1002f70: 2199 movs r1, #153 ; 0x99 + 1002f72: 4ab0 ldr r2, [pc, #704] ; (1003234 ) + 1002f74: 0049 lsls r1, r1, #1 + 1002f76: 48b0 ldr r0, [pc, #704] ; (1003238 ) + 1002f78: f7fd fac2 bl 1000500 <_assert_handler> + _ASSERT(IS_ALERT_Port_Mode(SENSOR_EXTInitStruct->SENSOR_Static_Alert_Port_Mode)); + 1002f7c: 0023 movs r3, r4 + 1002f7e: 332a adds r3, #42 ; 0x2a + 1002f80: 781b ldrb r3, [r3, #0] + 1002f82: 2b01 cmp r3, #1 + 1002f84: d905 bls.n 1002f92 + 1002f86: 2134 movs r1, #52 ; 0x34 + 1002f88: 4aaa ldr r2, [pc, #680] ; (1003234 ) + 1002f8a: 31ff adds r1, #255 ; 0xff + 1002f8c: 48aa ldr r0, [pc, #680] ; (1003238 ) + 1002f8e: f7fd fab7 bl 1000500 <_assert_handler> + _ASSERT(IS_ALERT_Port_Mode(SENSOR_EXTInitStruct->SENSOR_Dynamic_Alert_Port_Mode)); + 1002f92: 0023 movs r3, r4 + 1002f94: 332b adds r3, #43 ; 0x2b + 1002f96: 781b ldrb r3, [r3, #0] + 1002f98: 2b01 cmp r3, #1 + 1002f9a: d905 bls.n 1002fa8 + 1002f9c: 219a movs r1, #154 ; 0x9a + 1002f9e: 4aa5 ldr r2, [pc, #660] ; (1003234 ) + 1002fa0: 0049 lsls r1, r1, #1 + 1002fa2: 48a5 ldr r0, [pc, #660] ; (1003238 ) + 1002fa4: f7fd faac bl 1000500 <_assert_handler> + _ASSERT(IS_FUNCTIONAL_STATE(SENSOR_EXTInitStruct->SENSOR_Static_Pull_Auto)); + 1002fa8: 0023 movs r3, r4 + 1002faa: 332c adds r3, #44 ; 0x2c + 1002fac: 781b ldrb r3, [r3, #0] + 1002fae: 2b01 cmp r3, #1 + 1002fb0: d905 bls.n 1002fbe + 1002fb2: 2136 movs r1, #54 ; 0x36 + 1002fb4: 4a9f ldr r2, [pc, #636] ; (1003234 ) + 1002fb6: 31ff adds r1, #255 ; 0xff + 1002fb8: 489f ldr r0, [pc, #636] ; (1003238 ) + 1002fba: f7fd faa1 bl 1000500 <_assert_handler> + _ASSERT(IS_SENSOR_ALERT_LEVEL(SENSOR_EXTInitStruct->SENSOR_Static_Alert_H | SENSOR_EXTInitStruct->SENSOR_Static_Alert_H)); + 1002fbe: 23ff movs r3, #255 ; 0xff + 1002fc0: 6b22 ldr r2, [r4, #48] ; 0x30 + 1002fc2: 439a bics r2, r3 + 1002fc4: d005 beq.n 1002fd2 + 1002fc6: 219b movs r1, #155 ; 0x9b + 1002fc8: 4a9a ldr r2, [pc, #616] ; (1003234 ) + 1002fca: 0049 lsls r1, r1, #1 + 1002fcc: 489a ldr r0, [pc, #616] ; (1003238 ) + 1002fce: f7fd fa97 bl 1000500 <_assert_handler> + + uint32_t i = 0; + volatile uint32_t tmpSensorExtType = 0; + 1002fd2: 2300 movs r3, #0 + 1002fd4: 9305 str r3, [sp, #20] + volatile uint32_t tmpSensorExtPullPd = 0; + 1002fd6: 9306 str r3, [sp, #24] + volatile uint32_t tmpSensorExtPullPu = 0; + 1002fd8: 9307 str r3, [sp, #28] + volatile uint32_t tmpSensorExtState = 0; + 1002fda: 9308 str r3, [sp, #32] + volatile uint32_t tmpSensorExtEnable = 0; + 1002fdc: 9309 str r3, [sp, #36] ; 0x24 + + /*simple rule check,each pin can be used only one mode*/ + if (SENSOR_EXTInitStruct->SENSOR_Port_Static & SENSOR_EXTInitStruct->SENSOR_Port_Dynamic) + 1002fde: 6823 ldr r3, [r4, #0] + 1002fe0: 9302 str r3, [sp, #8] + 1002fe2: 6863 ldr r3, [r4, #4] + 1002fe4: 9a02 ldr r2, [sp, #8] + 1002fe6: 9301 str r3, [sp, #4] + { + return 1; + 1002fe8: 2301 movs r3, #1 + 1002fea: 9300 str r3, [sp, #0] + if (SENSOR_EXTInitStruct->SENSOR_Port_Static & SENSOR_EXTInitStruct->SENSOR_Port_Dynamic) + 1002fec: 9b01 ldr r3, [sp, #4] + 1002fee: 4213 tst r3, r2 + 1002ff0: d000 beq.n 1002ff4 + 1002ff2: e137 b.n 1003264 + } + + /*simple rule check, each pin can be used only one mode*/ + if (SENSOR_EXTInitStruct->SENSOR_Port_PU & SENSOR_EXTInitStruct->SENSOR_Port_PD) + { + return 2; + 1002ff4: 2302 movs r3, #2 + if (SENSOR_EXTInitStruct->SENSOR_Port_PU & SENSOR_EXTInitStruct->SENSOR_Port_PD) + 1002ff6: 68e6 ldr r6, [r4, #12] + 1002ff8: 6927 ldr r7, [r4, #16] + return 2; + 1002ffa: 9300 str r3, [sp, #0] + if (SENSOR_EXTInitStruct->SENSOR_Port_PU & SENSOR_EXTInitStruct->SENSOR_Port_PD) + 1002ffc: 4237 tst r7, r6 + 1002ffe: d000 beq.n 1003002 + 1003000: e130 b.n 1003264 + } + + /*simple rule check, each pin can be used only one mode*/ + if (SENSOR_EXTInitStruct->SENSOR_Static_Alert_H & SENSOR_EXTInitStruct->SENSOR_Static_Alert_L) + 1003002: 6b23 ldr r3, [r4, #48] ; 0x30 + 1003004: 6b60 ldr r0, [r4, #52] ; 0x34 + 1003006: 9303 str r3, [sp, #12] + 1003008: 4018 ands r0, r3 + 100300a: 9000 str r0, [sp, #0] + 100300c: 1e03 subs r3, r0, #0 + 100300e: d000 beq.n 1003012 + 1003010: e132 b.n 1003278 + } + + /*configure the external detachable IO dynamic or static mode configuration*/ + for (i = 0; i < EXT_SENSOR_NUM / 2; i++) + { + if (0 != (SENSOR_EXTInitStruct->SENSOR_Port_Dynamic & (0x3 << i * 2))) + 1003012: 2103 movs r1, #3 + { + tmpSensorExtType |= 0x01 << i; + 1003014: 2501 movs r5, #1 + if (0 != (SENSOR_EXTInitStruct->SENSOR_Port_Dynamic & (0x3 << i * 2))) + 1003016: 0008 movs r0, r1 + 1003018: 005a lsls r2, r3, #1 + 100301a: 4090 lsls r0, r2 + 100301c: 0002 movs r2, r0 + 100301e: 9801 ldr r0, [sp, #4] + 1003020: 4210 tst r0, r2 + 1003022: d006 beq.n 1003032 + tmpSensorExtType |= 0x01 << i; + 1003024: 9a05 ldr r2, [sp, #20] + 1003026: 4694 mov ip, r2 + 1003028: 002a movs r2, r5 + 100302a: 4660 mov r0, ip + 100302c: 409a lsls r2, r3 + 100302e: 4302 orrs r2, r0 + 1003030: 9205 str r2, [sp, #20] + for (i = 0; i < EXT_SENSOR_NUM / 2; i++) + 1003032: 3301 adds r3, #1 + 1003034: 2b04 cmp r3, #4 + 1003036: d1ee bne.n 1003016 + } + } + MSEC->TAMP_CTRL.bit.MODE = RESET; + 1003038: 250f movs r5, #15 + 100303a: 4b80 ldr r3, [pc, #512] ; (100323c ) + 100303c: 6c5a ldr r2, [r3, #68] ; 0x44 + 100303e: 43aa bics r2, r5 + 1003040: 645a str r2, [r3, #68] ; 0x44 + MSEC->TAMP_CTRL.bit.MODE = tmpSensorExtType; + 1003042: 9905 ldr r1, [sp, #20] + 1003044: 6c5a ldr r2, [r3, #68] ; 0x44 + 1003046: 4029 ands r1, r5 + 1003048: 43aa bics r2, r5 + 100304a: 430a orrs r2, r1 + 100304c: 645a str r2, [r3, #68] ; 0x44 + + /*configure the external detachable IO IE configuration*/ + MSEC->TAMP_CTRL.bit.IE = RESET; + 100304e: 6c5a ldr r2, [r3, #68] ; 0x44 + 1003050: 4d7b ldr r5, [pc, #492] ; (1003240 ) + 1003052: 402a ands r2, r5 + 1003054: 645a str r2, [r3, #68] ; 0x44 + MSEC->TAMP_CTRL.bit.IE = SENSOR_EXTInitStruct->SENSOR_Port_IE; + 1003056: 68a1 ldr r1, [r4, #8] + 1003058: 6c5a ldr r2, [r3, #68] ; 0x44 + 100305a: b2c9 uxtb r1, r1 + 100305c: 0209 lsls r1, r1, #8 + 100305e: 402a ands r2, r5 + 1003060: 430a orrs r2, r1 + 1003062: 645a str r2, [r3, #68] ; 0x44 + + /*external anti-demolition IO pull up and down status configuration*/ + for (i = 0; i < EXT_SENSOR_NUM; i++) + { + if (0 != (SENSOR_EXTInitStruct->SENSOR_Port_PD & (0x1 << i))) + 1003064: 2201 movs r2, #1 + for (i = 0; i < EXT_SENSOR_NUM; i++) + 1003066: 2100 movs r1, #0 + if (0 != (SENSOR_EXTInitStruct->SENSOR_Port_PD & (0x1 << i))) + 1003068: 4694 mov ip, r2 + 100306a: 4662 mov r2, ip + 100306c: 408a lsls r2, r1 + 100306e: 423a tst r2, r7 + 1003070: d002 beq.n 1003078 + { + tmpSensorExtPullPd |= 0x01 << i; + 1003072: 9d06 ldr r5, [sp, #24] + 1003074: 4315 orrs r5, r2 + 1003076: 9506 str r5, [sp, #24] + } + if (0 != (SENSOR_EXTInitStruct->SENSOR_Port_PU & (0x1 << i))) + 1003078: 4232 tst r2, r6 + 100307a: d002 beq.n 1003082 + { + tmpSensorExtPullPu |= 0x01 << i; + 100307c: 9d07 ldr r5, [sp, #28] + 100307e: 432a orrs r2, r5 + 1003080: 9207 str r2, [sp, #28] + for (i = 0; i < EXT_SENSOR_NUM; i++) + 1003082: 3101 adds r1, #1 + 1003084: 2908 cmp r1, #8 + 1003086: d1f0 bne.n 100306a + } + } + MSEC->TAMP_CTRL.bit.PD_EN = RESET; + 1003088: 6c5a ldr r2, [r3, #68] ; 0x44 + 100308a: 4d6e ldr r5, [pc, #440] ; (1003244 ) + MSEC->TAMP_STA_CTRL.bit.PERIOD = SENSOR_EXTInitStruct->SENSOR_Static_Period; + MSEC->TAMP_DYN_CTRL.bit.PERIOD = RESET; + MSEC->TAMP_DYN_CTRL.bit.PERIOD = SENSOR_EXTInitStruct->SENSOR_Dynamic_Period; + + /*the number of single cycle detection of external anti-demolition IO*/ + MSEC->TAMP_STA_CTRL.bit.CHK_WIN = RESET; + 100308c: 270c movs r7, #12 + MSEC->TAMP_CTRL.bit.PD_EN = RESET; + 100308e: 402a ands r2, r5 + 1003090: 645a str r2, [r3, #68] ; 0x44 + MSEC->TAMP_CTRL.bit.PD_EN = tmpSensorExtPullPd; + 1003092: 9906 ldr r1, [sp, #24] + 1003094: 6c5a ldr r2, [r3, #68] ; 0x44 + 1003096: b2c9 uxtb r1, r1 + 1003098: 0409 lsls r1, r1, #16 + 100309a: 402a ands r2, r5 + 100309c: 430a orrs r2, r1 + 100309e: 645a str r2, [r3, #68] ; 0x44 + MSEC->TAMP_CTRL.bit.PU_EN = 0xff; + 10030a0: 22ff movs r2, #255 ; 0xff + 10030a2: 6c59 ldr r1, [r3, #68] ; 0x44 + 10030a4: 0612 lsls r2, r2, #24 + 10030a6: 430a orrs r2, r1 + 10030a8: 645a str r2, [r3, #68] ; 0x44 + MSEC->TAMP_CTRL.bit.PU_EN = tmpSensorExtPullPu; + 10030aa: 9907 ldr r1, [sp, #28] + 10030ac: 6c5a ldr r2, [r3, #68] ; 0x44 + 10030ae: 0609 lsls r1, r1, #24 + 10030b0: 0212 lsls r2, r2, #8 + 10030b2: 0a12 lsrs r2, r2, #8 + 10030b4: 430a orrs r2, r1 + MSEC->TAMP_STA_CTRL.bit.PERIOD = RESET; + 10030b6: 2103 movs r1, #3 + MSEC->TAMP_CTRL.bit.PU_EN = tmpSensorExtPullPu; + 10030b8: 645a str r2, [r3, #68] ; 0x44 + MSEC->TAMP_STA_CTRL.bit.PERIOD = RESET; + 10030ba: 6c9a ldr r2, [r3, #72] ; 0x48 + 10030bc: 438a bics r2, r1 + 10030be: 649a str r2, [r3, #72] ; 0x48 + MSEC->TAMP_STA_CTRL.bit.PERIOD = SENSOR_EXTInitStruct->SENSOR_Static_Period; + 10030c0: 6c9a ldr r2, [r3, #72] ; 0x48 + 10030c2: 6965 ldr r5, [r4, #20] + 10030c4: 438a bics r2, r1 + 10030c6: 400d ands r5, r1 + 10030c8: 432a orrs r2, r5 + 10030ca: 649a str r2, [r3, #72] ; 0x48 + MSEC->TAMP_DYN_CTRL.bit.PERIOD = RESET; + 10030cc: 4a5e ldr r2, [pc, #376] ; (1003248 ) + 10030ce: 8815 ldrh r5, [r2, #0] + 10030d0: 438d bics r5, r1 + 10030d2: 8015 strh r5, [r2, #0] + MSEC->TAMP_DYN_CTRL.bit.PERIOD = SENSOR_EXTInitStruct->SENSOR_Dynamic_Period; + 10030d4: 8815 ldrh r5, [r2, #0] + 10030d6: 69a6 ldr r6, [r4, #24] + 10030d8: 438d bics r5, r1 + 10030da: 400e ands r6, r1 + 10030dc: 4335 orrs r5, r6 + 10030de: 8015 strh r5, [r2, #0] + MSEC->TAMP_STA_CTRL.bit.CHK_WIN = RESET; + 10030e0: 6c9d ldr r5, [r3, #72] ; 0x48 + 10030e2: 43bd bics r5, r7 + 10030e4: 649d str r5, [r3, #72] ; 0x48 + MSEC->TAMP_STA_CTRL.bit.CHK_WIN = SENSOR_EXTInitStruct->SENSOR_Static_Chk_Num; + 10030e6: 69e6 ldr r6, [r4, #28] + 10030e8: 6c9d ldr r5, [r3, #72] ; 0x48 + 10030ea: 400e ands r6, r1 + 10030ec: 00b6 lsls r6, r6, #2 + 10030ee: 43bd bics r5, r7 + 10030f0: 4335 orrs r5, r6 + 10030f2: 649d str r5, [r3, #72] ; 0x48 + MSEC->TAMP_DYN_CTRL.bit.CHK_WIN = RESET; + 10030f4: 8815 ldrh r5, [r2, #0] + 10030f6: 43bd bics r5, r7 + 10030f8: 8015 strh r5, [r2, #0] + MSEC->TAMP_DYN_CTRL.bit.CHK_WIN = SENSOR_EXTInitStruct->SENSOR_Dynamic_Chk_Num; + 10030fa: 6a26 ldr r6, [r4, #32] + 10030fc: 8815 ldrh r5, [r2, #0] + 10030fe: 400e ands r6, r1 + 1003100: 00b6 lsls r6, r6, #2 + 1003102: 43bd bics r5, r7 + 1003104: 4335 orrs r5, r6 + + /*external static anti-demolition IO filter window number*/ + MSEC->TAMP_STA_CTRL.bit.FILT_WIN = RESET; + 1003106: 2630 movs r6, #48 ; 0x30 + MSEC->TAMP_DYN_CTRL.bit.CHK_WIN = SENSOR_EXTInitStruct->SENSOR_Dynamic_Chk_Num; + 1003108: 8015 strh r5, [r2, #0] + MSEC->TAMP_STA_CTRL.bit.FILT_WIN = RESET; + 100310a: 6c9d ldr r5, [r3, #72] ; 0x48 + MSEC->TAMP_STA_CTRL.bit.FILT_WIN = SENSOR_EXTInitStruct->SENSOR_Static_Fit_Win; + + /*Whether to start automatic protection after external static and dynamic IO alarm is triggered*/ + MSEC->TAMP_STA_CTRL.bit.PROT_EN = RESET; + 100310c: 4f4f ldr r7, [pc, #316] ; (100324c ) + MSEC->TAMP_STA_CTRL.bit.FILT_WIN = RESET; + 100310e: 43b5 bics r5, r6 + 1003110: 649d str r5, [r3, #72] ; 0x48 + MSEC->TAMP_STA_CTRL.bit.FILT_WIN = SENSOR_EXTInitStruct->SENSOR_Static_Fit_Win; + 1003112: 6c9d ldr r5, [r3, #72] ; 0x48 + 1003114: 6a60 ldr r0, [r4, #36] ; 0x24 + 1003116: 43b5 bics r5, r6 + 1003118: 4001 ands r1, r0 + 100311a: 0109 lsls r1, r1, #4 + 100311c: 4329 orrs r1, r5 + 100311e: 6499 str r1, [r3, #72] ; 0x48 + MSEC->TAMP_STA_CTRL.bit.PROT_EN = RESET; + 1003120: 6c99 ldr r1, [r3, #72] ; 0x48 + 1003122: 4039 ands r1, r7 + 1003124: 6499 str r1, [r3, #72] ; 0x48 + MSEC->TAMP_STA_CTRL.bit.PROT_EN = SENSOR_EXTInitStruct->SENSOR_Static_Alert_Port_En; + 1003126: 0021 movs r1, r4 + 1003128: 3128 adds r1, #40 ; 0x28 + 100312a: 780e ldrb r6, [r1, #0] + 100312c: 2101 movs r1, #1 + 100312e: 6c9d ldr r5, [r3, #72] ; 0x48 + 1003130: 400e ands r6, r1 + 1003132: 0236 lsls r6, r6, #8 + 1003134: 403d ands r5, r7 + 1003136: 4335 orrs r5, r6 + 1003138: 649d str r5, [r3, #72] ; 0x48 + MSEC->TAMP_DYN_CTRL.bit.PROT_EN = RESET; + 100313a: 8815 ldrh r5, [r2, #0] + 100313c: 403d ands r5, r7 + 100313e: 8015 strh r5, [r2, #0] + MSEC->TAMP_DYN_CTRL.bit.PROT_EN = SENSOR_EXTInitStruct->SENSOR_Dynamic_Alert_Port_En; + 1003140: 0025 movs r5, r4 + 1003142: 3529 adds r5, #41 ; 0x29 + 1003144: 782e ldrb r6, [r5, #0] + 1003146: 8815 ldrh r5, [r2, #0] + 1003148: 400e ands r6, r1 + 100314a: 0236 lsls r6, r6, #8 + 100314c: 403d ands r5, r7 + 100314e: 4335 orrs r5, r6 + 1003150: 8015 strh r5, [r2, #0] + + /*Mode control after external dynamic and static sensor alarm*/ + MSEC->TAMP_STA_CTRL.bit.PROT_MODE = RESET; + 1003152: 6c9d ldr r5, [r3, #72] ; 0x48 + 1003154: 4f3e ldr r7, [pc, #248] ; (1003250 ) + 1003156: 403d ands r5, r7 + 1003158: 649d str r5, [r3, #72] ; 0x48 + MSEC->TAMP_STA_CTRL.bit.PROT_MODE = SENSOR_EXTInitStruct->SENSOR_Static_Alert_Port_Mode; + 100315a: 0025 movs r5, r4 + 100315c: 352a adds r5, #42 ; 0x2a + 100315e: 782e ldrb r6, [r5, #0] + 1003160: 6c9d ldr r5, [r3, #72] ; 0x48 + 1003162: 400e ands r6, r1 + 1003164: 0276 lsls r6, r6, #9 + 1003166: 403d ands r5, r7 + 1003168: 4335 orrs r5, r6 + 100316a: 649d str r5, [r3, #72] ; 0x48 + MSEC->TAMP_DYN_CTRL.bit.PROT_MODE = RESET; + 100316c: 8815 ldrh r5, [r2, #0] + 100316e: 403d ands r5, r7 + 1003170: 8015 strh r5, [r2, #0] + MSEC->TAMP_DYN_CTRL.bit.PROT_MODE = SENSOR_EXTInitStruct->SENSOR_Dynamic_Alert_Port_Mode; + 1003172: 0025 movs r5, r4 + 1003174: 352b adds r5, #43 ; 0x2b + 1003176: 782e ldrb r6, [r5, #0] + 1003178: 8815 ldrh r5, [r2, #0] + 100317a: 400e ands r6, r1 + 100317c: 0276 lsls r6, r6, #9 + 100317e: 403d ands r5, r7 + 1003180: 4335 orrs r5, r6 + 1003182: 8015 strh r5, [r2, #0] + + /*External static sensor pull up and down whether automatic control*/ + MSEC->TAMP_STA_CTRL.bit.PULL_AUTO = RESET; + 1003184: 6c9a ldr r2, [r3, #72] ; 0x48 + 1003186: 4e33 ldr r6, [pc, #204] ; (1003254 ) + 1003188: 4032 ands r2, r6 + 100318a: 649a str r2, [r3, #72] ; 0x48 + MSEC->TAMP_STA_CTRL.bit.PULL_AUTO = SENSOR_EXTInitStruct->SENSOR_Static_Pull_Auto; + 100318c: 0022 movs r2, r4 + 100318e: 322c adds r2, #44 ; 0x2c + 1003190: 7815 ldrb r5, [r2, #0] + 1003192: 6c9a ldr r2, [r3, #72] ; 0x48 + 1003194: 400d ands r5, r1 + 1003196: 4032 ands r2, r6 + 1003198: 02ad lsls r5, r5, #10 + 100319a: 4315 orrs r5, r2 + + /*external static detachable IO trigger level configuration*/ + for (i = 0; i < EXT_SENSOR_NUM; i++) + 100319c: 2200 movs r2, #0 + MSEC->TAMP_STA_CTRL.bit.PULL_AUTO = SENSOR_EXTInitStruct->SENSOR_Static_Pull_Auto; + 100319e: 649d str r5, [r3, #72] ; 0x48 + { + if (0 != (SENSOR_EXTInitStruct->SENSOR_Static_Alert_H & (0x1 << i))) + 10031a0: 000e movs r6, r1 + 10031a2: 4096 lsls r6, r2 + 10031a4: 9803 ldr r0, [sp, #12] + { + tmpSensorExtState |= 0x01 << i; + 10031a6: 9d08 ldr r5, [sp, #32] + if (0 != (SENSOR_EXTInitStruct->SENSOR_Static_Alert_H & (0x1 << i))) + 10031a8: 4206 tst r6, r0 + 10031aa: d05e beq.n 100326a + tmpSensorExtState |= 0x01 << i; + 10031ac: 432e orrs r6, r5 + 10031ae: 9608 str r6, [sp, #32] + for (i = 0; i < EXT_SENSOR_NUM; i++) + 10031b0: 3201 adds r2, #1 + 10031b2: 2a08 cmp r2, #8 + 10031b4: d1f4 bne.n 10031a0 + MSEC->TAMP_STA_CTRL.bit.ALERT_LEVEL = RESET; + MSEC->TAMP_STA_CTRL.bit.ALERT_LEVEL = tmpSensorExtState; + + /*External static sensors detect intervals*/ + MSEC->TAMP_STA_CTRL.bit.CHK_GAP = RESET; + MSEC->TAMP_STA_CTRL.bit.CHK_GAP = SENSOR_EXTInitStruct->SENSOR_Static_Chk_Gap; + 10031b6: 2603 movs r6, #3 + MSEC->TAMP_STA_CTRL.bit.ALERT_LEVEL = RESET; + 10031b8: 6c9a ldr r2, [r3, #72] ; 0x48 + MSEC->TAMP_STA_CTRL.bit.CHK_GAP = RESET; + 10031ba: 4d27 ldr r5, [pc, #156] ; (1003258 ) + MSEC->TAMP_STA_CTRL.bit.ALERT_LEVEL = RESET; + 10031bc: 0212 lsls r2, r2, #8 + 10031be: 0a12 lsrs r2, r2, #8 + 10031c0: 649a str r2, [r3, #72] ; 0x48 + MSEC->TAMP_STA_CTRL.bit.ALERT_LEVEL = tmpSensorExtState; + 10031c2: 9908 ldr r1, [sp, #32] + 10031c4: 6c9a ldr r2, [r3, #72] ; 0x48 + 10031c6: 0609 lsls r1, r1, #24 + 10031c8: 0212 lsls r2, r2, #8 + 10031ca: 0a12 lsrs r2, r2, #8 + 10031cc: 430a orrs r2, r1 + 10031ce: 649a str r2, [r3, #72] ; 0x48 + MSEC->TAMP_STA_CTRL.bit.CHK_GAP = RESET; + 10031d0: 6c9a ldr r2, [r3, #72] ; 0x48 + /*configure the external detachable IO dynamic or static mode configuration*/ + for (i = 0; i < EXT_SENSOR_NUM; i++) + { + if (0 != ((SENSOR_EXTInitStruct->SENSOR_Port_Static | SENSOR_EXTInitStruct->SENSOR_Port_Dynamic) & (0x1 << i))) + { + SENSOR_T_S_PORT_ENABLE(tmpSensorExtEnable, i); + 10031d2: 270a movs r7, #10 + MSEC->TAMP_STA_CTRL.bit.CHK_GAP = RESET; + 10031d4: 402a ands r2, r5 + 10031d6: 649a str r2, [r3, #72] ; 0x48 + MSEC->TAMP_STA_CTRL.bit.CHK_GAP = SENSOR_EXTInitStruct->SENSOR_Static_Chk_Gap; + 10031d8: 6ba1 ldr r1, [r4, #56] ; 0x38 + 10031da: 6c9a ldr r2, [r3, #72] ; 0x48 + 10031dc: 4031 ands r1, r6 + 10031de: 0509 lsls r1, r1, #20 + 10031e0: 402a ands r2, r5 + 10031e2: 430a orrs r2, r1 + 10031e4: 649a str r2, [r3, #72] ; 0x48 + MSEC->TAMP_STA_CTRL.bit.CHK_DLY = RESET; + 10031e6: 6c9a ldr r2, [r3, #72] ; 0x48 + 10031e8: 4d1c ldr r5, [pc, #112] ; (100325c ) + 10031ea: 402a ands r2, r5 + 10031ec: 649a str r2, [r3, #72] ; 0x48 + MSEC->TAMP_STA_CTRL.bit.CHK_DLY = SENSOR_EXTInitStruct->SENSOR_Static_Chk_Dly; + 10031ee: 6be1 ldr r1, [r4, #60] ; 0x3c + 10031f0: 6c9a ldr r2, [r3, #72] ; 0x48 + 10031f2: 4031 ands r1, r6 + 10031f4: 0589 lsls r1, r1, #22 + 10031f6: 402a ands r2, r5 + 10031f8: 430a orrs r2, r1 + 10031fa: 649a str r2, [r3, #72] ; 0x48 + if (0 != ((SENSOR_EXTInitStruct->SENSOR_Port_Static | SENSOR_EXTInitStruct->SENSOR_Port_Dynamic) & (0x1 << i))) + 10031fc: 2501 movs r5, #1 + for (i = 0; i < EXT_SENSOR_NUM; i++) + 10031fe: 2200 movs r2, #0 + if (0 != ((SENSOR_EXTInitStruct->SENSOR_Port_Static | SENSOR_EXTInitStruct->SENSOR_Port_Dynamic) & (0x1 << i))) + 1003200: 9c02 ldr r4, [sp, #8] + 1003202: 9901 ldr r1, [sp, #4] + } + else + { + SENSOR_T_S_PORT_DISABLE(tmpSensorExtEnable, i); + 1003204: 3602 adds r6, #2 + if (0 != ((SENSOR_EXTInitStruct->SENSOR_Port_Static | SENSOR_EXTInitStruct->SENSOR_Port_Dynamic) & (0x1 << i))) + 1003206: 430c orrs r4, r1 + 1003208: 0028 movs r0, r5 + 100320a: 4090 lsls r0, r2 + 100320c: 0091 lsls r1, r2, #2 + 100320e: 4220 tst r0, r4 + 1003210: d02e beq.n 1003270 + SENSOR_T_S_PORT_ENABLE(tmpSensorExtEnable, i); + 1003212: 9809 ldr r0, [sp, #36] ; 0x24 + 1003214: 4684 mov ip, r0 + 1003216: 0038 movs r0, r7 + SENSOR_T_S_PORT_DISABLE(tmpSensorExtEnable, i); + 1003218: 4088 lsls r0, r1 + 100321a: 0001 movs r1, r0 + 100321c: 4660 mov r0, ip + for (i = 0; i < EXT_SENSOR_NUM; i++) + 100321e: 3201 adds r2, #1 + SENSOR_T_S_PORT_DISABLE(tmpSensorExtEnable, i); + 1003220: 4301 orrs r1, r0 + 1003222: 9109 str r1, [sp, #36] ; 0x24 + for (i = 0; i < EXT_SENSOR_NUM; i++) + 1003224: 2a08 cmp r2, #8 + 1003226: d1ef bne.n 1003208 + } + } + MSEC->TAMP_EN.reg = 0x55555555; + 1003228: 4a0d ldr r2, [pc, #52] ; (1003260 ) + 100322a: 641a str r2, [r3, #64] ; 0x40 + MSEC->TAMP_EN.reg = tmpSensorExtEnable; + 100322c: 9a09 ldr r2, [sp, #36] ; 0x24 + 100322e: 641a str r2, [r3, #64] ; 0x40 + 1003230: e018 b.n 1003264 + 1003232: 46c0 nop ; (mov r8, r8) + 1003234: 01006ff5 .word 0x01006ff5 + 1003238: 01006f74 .word 0x01006f74 + 100323c: 000fae00 .word 0x000fae00 + 1003240: ffff00ff .word 0xffff00ff + 1003244: ff00ffff .word 0xff00ffff + 1003248: 000fae4c .word 0x000fae4c + 100324c: fffffeff .word 0xfffffeff + 1003250: fffffdff .word 0xfffffdff + 1003254: fffffbff .word 0xfffffbff + 1003258: ffcfffff .word 0xffcfffff + 100325c: ff3fffff .word 0xff3fffff + 1003260: 55555555 .word 0x55555555 + + return 0; +} + 1003264: 9800 ldr r0, [sp, #0] + 1003266: b00b add sp, #44 ; 0x2c + 1003268: bdf0 pop {r4, r5, r6, r7, pc} + tmpSensorExtState &= ~(0x01 << i); + 100326a: 43b5 bics r5, r6 + 100326c: 9508 str r5, [sp, #32] + 100326e: e79f b.n 10031b0 + SENSOR_T_S_PORT_DISABLE(tmpSensorExtEnable, i); + 1003270: 9809 ldr r0, [sp, #36] ; 0x24 + 1003272: 4684 mov ip, r0 + 1003274: 0030 movs r0, r6 + 1003276: e7cf b.n 1003218 + return 3; + 1003278: 2303 movs r3, #3 + 100327a: 9300 str r3, [sp, #0] + 100327c: e7f2 b.n 1003264 + 100327e: 46c0 nop ; (mov r8, r8) + +01003280 : + * @retval None + */ +void SENSOR_EXTPortCmd(uint32_t SensorPort, FunctionalState NewState) +{ + uint32_t i = 0; + volatile uint32_t tmpSensorExtPortEn = 0; + 1003280: 2300 movs r3, #0 +{ + 1003282: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + + _ASSERT(IS_SENSOR_PORT(SensorPort)); + 1003284: 0002 movs r2, r0 + volatile uint32_t tmpSensorExtPortEn = 0; + 1003286: 9301 str r3, [sp, #4] + _ASSERT(IS_SENSOR_PORT(SensorPort)); + 1003288: 33ff adds r3, #255 ; 0xff +{ + 100328a: 0004 movs r4, r0 + 100328c: 000d movs r5, r1 + _ASSERT(IS_SENSOR_PORT(SensorPort)); + 100328e: 439a bics r2, r3 + 1003290: d101 bne.n 1003296 + 1003292: 2800 cmp r0, #0 + 1003294: d105 bne.n 10032a2 + 1003296: 21d0 movs r1, #208 ; 0xd0 + 1003298: 4a12 ldr r2, [pc, #72] ; (10032e4 ) + 100329a: 31ff adds r1, #255 ; 0xff + 100329c: 4812 ldr r0, [pc, #72] ; (10032e8 ) + 100329e: f7fd f92f bl 1000500 <_assert_handler> + + tmpSensorExtPortEn = MSEC->TAMP_EN.reg; + 10032a2: 4912 ldr r1, [pc, #72] ; (10032ec ) + + for (i = 0; i < EXT_SENSOR_NUM; i++) + 10032a4: 2200 movs r2, #0 + tmpSensorExtPortEn = MSEC->TAMP_EN.reg; + 10032a6: 6c0b ldr r3, [r1, #64] ; 0x40 + SENSOR_T_S_PORT_ENABLE(tmpSensorExtPortEn, i); + } + else + { + SENSOR_T_S_PORT_CLEAR(tmpSensorExtPortEn, i); + SENSOR_T_S_PORT_DISABLE(tmpSensorExtPortEn, i); + 10032a8: 2705 movs r7, #5 + tmpSensorExtPortEn = MSEC->TAMP_EN.reg; + 10032aa: 9301 str r3, [sp, #4] + SENSOR_T_S_PORT_ENABLE(tmpSensorExtPortEn, i); + 10032ac: 230a movs r3, #10 + 10032ae: 469c mov ip, r3 + if (0 != (SensorPort & (0x1 << i))) + 10032b0: 2301 movs r3, #1 + 10032b2: 4093 lsls r3, r2 + 10032b4: 421c tst r4, r3 + 10032b6: d00e beq.n 10032d6 + 10032b8: 230f movs r3, #15 + 10032ba: 0090 lsls r0, r2, #2 + 10032bc: 4083 lsls r3, r0 + 10032be: 43db mvns r3, r3 + SENSOR_T_S_PORT_CLEAR(tmpSensorExtPortEn, i); + 10032c0: 9e01 ldr r6, [sp, #4] + 10032c2: 4033 ands r3, r6 + 10032c4: 9301 str r3, [sp, #4] + SENSOR_T_S_PORT_ENABLE(tmpSensorExtPortEn, i); + 10032c6: 9b01 ldr r3, [sp, #4] + 10032c8: 4666 mov r6, ip + if (DISABLE != NewState) + 10032ca: 2d00 cmp r5, #0 + 10032cc: d100 bne.n 10032d0 + SENSOR_T_S_PORT_DISABLE(tmpSensorExtPortEn, i); + 10032ce: 003e movs r6, r7 + 10032d0: 4086 lsls r6, r0 + 10032d2: 4333 orrs r3, r6 + 10032d4: 9301 str r3, [sp, #4] + for (i = 0; i < EXT_SENSOR_NUM; i++) + 10032d6: 3201 adds r2, #1 + 10032d8: 2a08 cmp r2, #8 + 10032da: d1e9 bne.n 10032b0 + } + } + } + + MSEC->TAMP_EN.reg = tmpSensorExtPortEn; + 10032dc: 9b01 ldr r3, [sp, #4] + 10032de: 640b str r3, [r1, #64] ; 0x40 +} + 10032e0: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} + 10032e2: 46c0 nop ; (mov r8, r8) + 10032e4: 01007004 .word 0x01007004 + 10032e8: 01006f74 .word 0x01006f74 + 10032ec: 000fae00 .word 0x000fae00 + +010032f0 : + * @arg SENSOR_ANA_DEALY_1MS + * @arg SENSOR_ANA_DEALY_4MS + * @retval None + */ +void SENSOR_ANAConfig(uint32_t dur, uint32_t delay) +{ + 10032f0: b570 push {r4, r5, r6, lr} + 10032f2: 0005 movs r5, r0 + 10032f4: 000c movs r4, r1 + _ASSERT(IS_SENSOR_ANA_DUR(dur)); + 10032f6: 2803 cmp r0, #3 + 10032f8: d905 bls.n 1003306 + 10032fa: 21fa movs r1, #250 ; 0xfa + 10032fc: 4a0e ldr r2, [pc, #56] ; (1003338 ) + 10032fe: 31ff adds r1, #255 ; 0xff + 1003300: 480e ldr r0, [pc, #56] ; (100333c ) + 1003302: f7fd f8fd bl 1000500 <_assert_handler> + _ASSERT(IS_SENSOR_ANA_DELAY(delay)); + 1003306: 2c03 cmp r4, #3 + 1003308: d905 bls.n 1003316 + 100330a: 21fd movs r1, #253 ; 0xfd + 100330c: 4a0a ldr r2, [pc, #40] ; (1003338 ) + 100330e: 0049 lsls r1, r1, #1 + 1003310: 480a ldr r0, [pc, #40] ; (100333c ) + 1003312: f7fd f8f5 bl 1000500 <_assert_handler> + + MSEC->SENSOR_CTRL.bit.DUR = dur; + 1003316: 2103 movs r1, #3 + 1003318: 4a09 ldr r2, [pc, #36] ; (1003340 ) + 100331a: 480a ldr r0, [pc, #40] ; (1003344 ) + 100331c: 6fd3 ldr r3, [r2, #124] ; 0x7c + 100331e: 400d ands r5, r1 + 1003320: 4003 ands r3, r0 + 1003322: 042d lsls r5, r5, #16 + 1003324: 431d orrs r5, r3 + 1003326: 67d5 str r5, [r2, #124] ; 0x7c + MSEC->SENSOR_CTRL.bit.DELAY = delay; + 1003328: 6fd3 ldr r3, [r2, #124] ; 0x7c + 100332a: 400c ands r4, r1 + 100332c: 4906 ldr r1, [pc, #24] ; (1003348 ) + 100332e: 04a4 lsls r4, r4, #18 + 1003330: 400b ands r3, r1 + 1003332: 431c orrs r4, r3 + 1003334: 67d4 str r4, [r2, #124] ; 0x7c +} + 1003336: bd70 pop {r4, r5, r6, pc} + 1003338: 01007016 .word 0x01007016 + 100333c: 01006f74 .word 0x01006f74 + 1003340: 000fae08 .word 0x000fae08 + 1003344: fffcffff .word 0xfffcffff + 1003348: fff3ffff .word 0xfff3ffff + +0100334c : + * @param NewState: new state of the sensor + * This parameter can be ENABLE or DISABLE + * @retval None + */ +void SENSOR_ANACmd(uint32_t SensorAna, FunctionalState NewState) +{ + 100334c: b5f8 push {r3, r4, r5, r6, r7, lr} + _ASSERT(IS_SENSOR_ANA(SensorAna)); + 100334e: 0002 movs r2, r0 + 1003350: 231f movs r3, #31 +{ + 1003352: 0004 movs r4, r0 + 1003354: 000d movs r5, r1 + _ASSERT(IS_SENSOR_ANA(SensorAna)); + 1003356: 439a bics r2, r3 + 1003358: d005 beq.n 1003366 + 100335a: 2184 movs r1, #132 ; 0x84 + 100335c: 4a34 ldr r2, [pc, #208] ; (1003430 ) + 100335e: 0089 lsls r1, r1, #2 + 1003360: 4834 ldr r0, [pc, #208] ; (1003434 ) + 1003362: f7fd f8cd bl 1000500 <_assert_handler> +{ + 1003366: 2200 movs r2, #0 + MSEC->SENSOR_CTRL.bit.CHK_EN |= (BIT0 << i); + } + else + { + if (SensorAna & (BIT0 << i)) + MSEC->SENSOR_CTRL.bit.CHK_EN &= ~(BIT0 << i); + 1003368: 201f movs r0, #31 + 100336a: 4933 ldr r1, [pc, #204] ; (1003438 ) + 100336c: 4e33 ldr r6, [pc, #204] ; (100343c ) + 100336e: 2301 movs r3, #1 + 1003370: 4093 lsls r3, r2 + 1003372: 469c mov ip, r3 + 1003374: 4023 ands r3, r4 + if (DISABLE != NewState) + 1003376: 2d00 cmp r5, #0 + 1003378: d034 beq.n 10033e4 + if (SensorAna & (BIT0 << i)) + 100337a: 2b00 cmp r3, #0 + 100337c: d00a beq.n 1003394 + MSEC->SENSOR_CTRL.bit.CHK_EN |= (BIT0 << i); + 100337e: 4667 mov r7, ip + 1003380: 6fcb ldr r3, [r1, #124] ; 0x7c + 1003382: 00db lsls r3, r3, #3 + 1003384: 0edb lsrs r3, r3, #27 + 1003386: 433b orrs r3, r7 + MSEC->SENSOR_CTRL.bit.CHK_EN &= ~(BIT0 << i); + 1003388: 6fcf ldr r7, [r1, #124] ; 0x7c + 100338a: 4003 ands r3, r0 + 100338c: 061b lsls r3, r3, #24 + 100338e: 4037 ands r7, r6 + 1003390: 433b orrs r3, r7 + 1003392: 67cb str r3, [r1, #124] ; 0x7c + for (i = 0; i < INNER_SENSOR_NUM; i++) + 1003394: 3201 adds r2, #1 + 1003396: 2a05 cmp r2, #5 + 1003398: d1e9 bne.n 100336e + 100339a: 2301 movs r3, #1 + 100339c: 4023 ands r3, r4 + } + } + if (DISABLE != NewState) + 100339e: 2d00 cmp r5, #0 + 10033a0: d028 beq.n 10033f4 + { + if (SensorAna & SENSOR_ANA_VBUT_1_2L) + 10033a2: 2b00 cmp r3, #0 + 10033a4: d007 beq.n 10033b6 + { + MSEC->SENSOR_EN.bit.VBUT_1_2_EN = 0xa; + 10033a6: 4926 ldr r1, [pc, #152] ; (1003440 ) + 10033a8: 320a adds r2, #10 + 10033aa: 880b ldrh r3, [r1, #0] + 10033ac: 4393 bics r3, r2 + 10033ae: 001a movs r2, r3 + 10033b0: 230a movs r3, #10 + 10033b2: 4313 orrs r3, r2 + 10033b4: 800b strh r3, [r1, #0] + } + if (SensorAna & (SENSOR_ANA_VBUT_3_3H | SENSOR_ANA_VBUT_3_3L)) + 10033b6: 2306 movs r3, #6 + 10033b8: 421c tst r4, r3 + 10033ba: d007 beq.n 10033cc + { + MSEC->SENSOR_EN.bit.VBUT_3_3_EN = 0xa; + 10033bc: 22f0 movs r2, #240 ; 0xf0 + 10033be: 4920 ldr r1, [pc, #128] ; (1003440 ) + 10033c0: 880b ldrh r3, [r1, #0] + 10033c2: 4393 bics r3, r2 + 10033c4: 001a movs r2, r3 + 10033c6: 23a0 movs r3, #160 ; 0xa0 + 10033c8: 4313 orrs r3, r2 + 10033ca: 800b strh r3, [r1, #0] + } + if (SensorAna & (SENSOR_ANA_TEMPERA_H | SENSOR_ANA_TEMPERA_L)) + 10033cc: 2318 movs r3, #24 + 10033ce: 421c tst r4, r3 + 10033d0: d007 beq.n 10033e2 + { + MSEC->SENSOR_EN.bit.TEMP_EN = 0xa; + 10033d2: 491b ldr r1, [pc, #108] ; (1003440 ) + 10033d4: 4a1b ldr r2, [pc, #108] ; (1003444 ) + 10033d6: 880b ldrh r3, [r1, #0] + 10033d8: 401a ands r2, r3 + 10033da: 23a0 movs r3, #160 ; 0xa0 + 10033dc: 011b lsls r3, r3, #4 + { + MSEC->SENSOR_EN.bit.VBUT_3_3_EN = 0x5; + } + if (SensorAna & (SENSOR_ANA_TEMPERA_H | SENSOR_ANA_TEMPERA_L)) + { + MSEC->SENSOR_EN.bit.TEMP_EN = 0x5; + 10033de: 4313 orrs r3, r2 + 10033e0: 800b strh r3, [r1, #0] + } + } +} + 10033e2: bdf8 pop {r3, r4, r5, r6, r7, pc} + if (SensorAna & (BIT0 << i)) + 10033e4: 2b00 cmp r3, #0 + 10033e6: d0d5 beq.n 1003394 + MSEC->SENSOR_CTRL.bit.CHK_EN &= ~(BIT0 << i); + 10033e8: 4667 mov r7, ip + 10033ea: 6fcb ldr r3, [r1, #124] ; 0x7c + 10033ec: 00db lsls r3, r3, #3 + 10033ee: 0edb lsrs r3, r3, #27 + 10033f0: 43bb bics r3, r7 + 10033f2: e7c9 b.n 1003388 + if (SensorAna & SENSOR_ANA_VBUT_1_2L) + 10033f4: 2b00 cmp r3, #0 + 10033f6: d005 beq.n 1003404 + MSEC->SENSOR_EN.bit.VBUT_1_2_EN = 0x5; + 10033f8: 200f movs r0, #15 + 10033fa: 4911 ldr r1, [pc, #68] ; (1003440 ) + 10033fc: 880b ldrh r3, [r1, #0] + 10033fe: 4383 bics r3, r0 + 1003400: 431a orrs r2, r3 + 1003402: 800a strh r2, [r1, #0] + if (SensorAna & (SENSOR_ANA_VBUT_3_3H | SENSOR_ANA_VBUT_3_3L)) + 1003404: 2306 movs r3, #6 + 1003406: 421c tst r4, r3 + 1003408: d007 beq.n 100341a + MSEC->SENSOR_EN.bit.VBUT_3_3_EN = 0x5; + 100340a: 22f0 movs r2, #240 ; 0xf0 + 100340c: 490c ldr r1, [pc, #48] ; (1003440 ) + 100340e: 880b ldrh r3, [r1, #0] + 1003410: 4393 bics r3, r2 + 1003412: 001a movs r2, r3 + 1003414: 2350 movs r3, #80 ; 0x50 + 1003416: 4313 orrs r3, r2 + 1003418: 800b strh r3, [r1, #0] + if (SensorAna & (SENSOR_ANA_TEMPERA_H | SENSOR_ANA_TEMPERA_L)) + 100341a: 2318 movs r3, #24 + 100341c: 421c tst r4, r3 + 100341e: d0e0 beq.n 10033e2 + MSEC->SENSOR_EN.bit.TEMP_EN = 0x5; + 1003420: 4907 ldr r1, [pc, #28] ; (1003440 ) + 1003422: 4a08 ldr r2, [pc, #32] ; (1003444 ) + 1003424: 880b ldrh r3, [r1, #0] + 1003426: 401a ands r2, r3 + 1003428: 23a0 movs r3, #160 ; 0xa0 + 100342a: 00db lsls r3, r3, #3 + 100342c: e7d7 b.n 10033de + 100342e: 46c0 nop ; (mov r8, r8) + 1003430: 01007027 .word 0x01007027 + 1003434: 01006f74 .word 0x01006f74 + 1003438: 000fae08 .word 0x000fae08 + 100343c: e0ffffff .word 0xe0ffffff + 1003440: 000fae80 .word 0x000fae80 + 1003444: fffff0ff .word 0xfffff0ff + +01003448 : + * @param NewState: new state of the sensor check + * This parameter can be ENABLE or DISABLE + * @retval None + */ +void SENSOR_ChkConfig(uint32_t SensorAna, FunctionalState NewState) +{ + 1003448: b5f8 push {r3, r4, r5, r6, r7, lr} + _ASSERT(IS_SENSOR_ANA(SensorAna)); + 100344a: 0002 movs r2, r0 + 100344c: 231f movs r3, #31 +{ + 100344e: 0004 movs r4, r0 + 1003450: 000d movs r5, r1 + _ASSERT(IS_SENSOR_ANA(SensorAna)); + 1003452: 439a bics r2, r3 + 1003454: d004 beq.n 1003460 + 1003456: 4a14 ldr r2, [pc, #80] ; (10034a8 ) + 1003458: 4914 ldr r1, [pc, #80] ; (10034ac ) + 100345a: 4815 ldr r0, [pc, #84] ; (10034b0 ) + 100345c: f7fd f850 bl 1000500 <_assert_handler> +{ + 1003460: 2100 movs r1, #0 + MSEC->SENSOR_CTRL.bit.CHK_EN |= (BIT0 << i); + } + else + { + if (SensorAna & (BIT0 << i)) + MSEC->SENSOR_CTRL.bit.CHK_EN &= ~(BIT0 << i); + 1003462: 201f movs r0, #31 + 1003464: 4a13 ldr r2, [pc, #76] ; (10034b4 ) + 1003466: 4e14 ldr r6, [pc, #80] ; (10034b8 ) + 1003468: 2301 movs r3, #1 + 100346a: 408b lsls r3, r1 + 100346c: 469c mov ip, r3 + 100346e: 4023 ands r3, r4 + if (DISABLE != NewState) + 1003470: 2d00 cmp r5, #0 + 1003472: d010 beq.n 1003496 + if (SensorAna & (BIT0 << i)) + 1003474: 2b00 cmp r3, #0 + 1003476: d00a beq.n 100348e + MSEC->SENSOR_CTRL.bit.CHK_EN |= (BIT0 << i); + 1003478: 4667 mov r7, ip + 100347a: 6fd3 ldr r3, [r2, #124] ; 0x7c + 100347c: 00db lsls r3, r3, #3 + 100347e: 0edb lsrs r3, r3, #27 + 1003480: 433b orrs r3, r7 + MSEC->SENSOR_CTRL.bit.CHK_EN &= ~(BIT0 << i); + 1003482: 6fd7 ldr r7, [r2, #124] ; 0x7c + 1003484: 4003 ands r3, r0 + 1003486: 061b lsls r3, r3, #24 + 1003488: 4037 ands r7, r6 + 100348a: 433b orrs r3, r7 + 100348c: 67d3 str r3, [r2, #124] ; 0x7c + for (i = 0; i < INNER_SENSOR_NUM; i++) + 100348e: 3101 adds r1, #1 + 1003490: 2905 cmp r1, #5 + 1003492: d1e9 bne.n 1003468 + } + } +} + 1003494: bdf8 pop {r3, r4, r5, r6, r7, pc} + if (SensorAna & (BIT0 << i)) + 1003496: 2b00 cmp r3, #0 + 1003498: d0f9 beq.n 100348e + MSEC->SENSOR_CTRL.bit.CHK_EN &= ~(BIT0 << i); + 100349a: 4667 mov r7, ip + 100349c: 6fd3 ldr r3, [r2, #124] ; 0x7c + 100349e: 00db lsls r3, r3, #3 + 10034a0: 0edb lsrs r3, r3, #27 + 10034a2: 43bb bics r3, r7 + 10034a4: e7ed b.n 1003482 + 10034a6: 46c0 nop ; (mov r8, r8) + 10034a8: 01007035 .word 0x01007035 + 10034ac: 00000251 .word 0x00000251 + 10034b0: 01006f74 .word 0x01006f74 + 10034b4: 000fae08 .word 0x000fae08 + 10034b8: e0ffffff .word 0xe0ffffff + +010034bc : + * This parameter can be ENABLE or DISABLE + * @retval None + */ +void SENSOR_Config(uint32_t SensorAna, FunctionalState NewState) +{ + _ASSERT(IS_SENSOR_ANA(SensorAna)); + 10034bc: 231f movs r3, #31 + 10034be: 0002 movs r2, r0 +{ + 10034c0: b570 push {r4, r5, r6, lr} + _ASSERT(IS_SENSOR_ANA(SensorAna)); + 10034c2: 439a bics r2, r3 +{ + 10034c4: 0004 movs r4, r0 + 10034c6: 000d movs r5, r1 + _ASSERT(IS_SENSOR_ANA(SensorAna)); + 10034c8: 2a00 cmp r2, #0 + 10034ca: d004 beq.n 10034d6 + 10034cc: 4a24 ldr r2, [pc, #144] ; (1003560 ) + 10034ce: 4925 ldr r1, [pc, #148] ; (1003564 ) + 10034d0: 4825 ldr r0, [pc, #148] ; (1003568 ) + 10034d2: f7fd f815 bl 1000500 <_assert_handler> + 10034d6: 2301 movs r3, #1 + 10034d8: 4023 ands r3, r4 + if (DISABLE != NewState) + 10034da: 2d00 cmp r5, #0 + 10034dc: d020 beq.n 1003520 + { + if (SensorAna & SENSOR_ANA_VBUT_1_2L) + 10034de: 2b00 cmp r3, #0 + 10034e0: d007 beq.n 10034f2 + { + MSEC->SENSOR_EN.bit.VBUT_1_2_EN = 0xa; + 10034e2: 220f movs r2, #15 + 10034e4: 4921 ldr r1, [pc, #132] ; (100356c ) + 10034e6: 880b ldrh r3, [r1, #0] + 10034e8: 4393 bics r3, r2 + 10034ea: 001a movs r2, r3 + 10034ec: 230a movs r3, #10 + 10034ee: 4313 orrs r3, r2 + 10034f0: 800b strh r3, [r1, #0] + } + if (SensorAna & (SENSOR_ANA_VBUT_3_3H | SENSOR_ANA_VBUT_3_3L)) + 10034f2: 2306 movs r3, #6 + 10034f4: 421c tst r4, r3 + 10034f6: d007 beq.n 1003508 + { + MSEC->SENSOR_EN.bit.VBUT_3_3_EN = 0xa; + 10034f8: 22f0 movs r2, #240 ; 0xf0 + 10034fa: 491c ldr r1, [pc, #112] ; (100356c ) + 10034fc: 880b ldrh r3, [r1, #0] + 10034fe: 4393 bics r3, r2 + 1003500: 001a movs r2, r3 + 1003502: 23a0 movs r3, #160 ; 0xa0 + 1003504: 4313 orrs r3, r2 + 1003506: 800b strh r3, [r1, #0] + } + if (SensorAna & (SENSOR_ANA_TEMPERA_H | SENSOR_ANA_TEMPERA_L)) + 1003508: 2318 movs r3, #24 + 100350a: 421c tst r4, r3 + 100350c: d007 beq.n 100351e + { + MSEC->SENSOR_EN.bit.TEMP_EN = 0xa; + 100350e: 4917 ldr r1, [pc, #92] ; (100356c ) + 1003510: 4a17 ldr r2, [pc, #92] ; (1003570 ) + 1003512: 880b ldrh r3, [r1, #0] + 1003514: 401a ands r2, r3 + 1003516: 23a0 movs r3, #160 ; 0xa0 + 1003518: 011b lsls r3, r3, #4 + { + MSEC->SENSOR_EN.bit.VBUT_3_3_EN = 0x5; + } + if (SensorAna & (SENSOR_ANA_TEMPERA_H | SENSOR_ANA_TEMPERA_L)) + { + MSEC->SENSOR_EN.bit.TEMP_EN = 0x5; + 100351a: 4313 orrs r3, r2 + 100351c: 800b strh r3, [r1, #0] + } + } +} + 100351e: bd70 pop {r4, r5, r6, pc} + if (SensorAna & SENSOR_ANA_VBUT_1_2L) + 1003520: 2b00 cmp r3, #0 + 1003522: d007 beq.n 1003534 + MSEC->SENSOR_EN.bit.VBUT_1_2_EN = 0x5; + 1003524: 220f movs r2, #15 + 1003526: 4911 ldr r1, [pc, #68] ; (100356c ) + 1003528: 880b ldrh r3, [r1, #0] + 100352a: 4393 bics r3, r2 + 100352c: 001a movs r2, r3 + 100352e: 2305 movs r3, #5 + 1003530: 4313 orrs r3, r2 + 1003532: 800b strh r3, [r1, #0] + if (SensorAna & (SENSOR_ANA_VBUT_3_3H | SENSOR_ANA_VBUT_3_3L)) + 1003534: 2306 movs r3, #6 + 1003536: 421c tst r4, r3 + 1003538: d007 beq.n 100354a + MSEC->SENSOR_EN.bit.VBUT_3_3_EN = 0x5; + 100353a: 22f0 movs r2, #240 ; 0xf0 + 100353c: 490b ldr r1, [pc, #44] ; (100356c ) + 100353e: 880b ldrh r3, [r1, #0] + 1003540: 4393 bics r3, r2 + 1003542: 001a movs r2, r3 + 1003544: 2350 movs r3, #80 ; 0x50 + 1003546: 4313 orrs r3, r2 + 1003548: 800b strh r3, [r1, #0] + if (SensorAna & (SENSOR_ANA_TEMPERA_H | SENSOR_ANA_TEMPERA_L)) + 100354a: 2318 movs r3, #24 + 100354c: 421c tst r4, r3 + 100354e: d0e6 beq.n 100351e + MSEC->SENSOR_EN.bit.TEMP_EN = 0x5; + 1003550: 4906 ldr r1, [pc, #24] ; (100356c ) + 1003552: 4a07 ldr r2, [pc, #28] ; (1003570 ) + 1003554: 880b ldrh r3, [r1, #0] + 1003556: 401a ands r2, r3 + 1003558: 23a0 movs r3, #160 ; 0xa0 + 100355a: 00db lsls r3, r3, #3 + 100355c: e7dd b.n 100351a + 100355e: 46c0 nop ; (mov r8, r8) + 1003560: 01007046 .word 0x01007046 + 1003564: 00000272 .word 0x00000272 + 1003568: 01006f74 .word 0x01006f74 + 100356c: 000fae80 .word 0x000fae80 + 1003570: fffff0ff .word 0xfffff0ff + +01003574 : + * @param vthsel: threshold voltage select. + * Note: threshold voltage = 0.83 + vthsel * 0.02 + * @retval None + */ +void SENSOR_ANADvddLpmConfig(uint8_t vthsel) +{ + 1003574: b510 push {r4, lr} + MSEC->SENSOR_THRES.bit.DVDDLPM_L = vthsel; + 1003576: 240f movs r4, #15 + 1003578: 4904 ldr r1, [pc, #16] ; (100358c ) + 100357a: 0002 movs r2, r0 + 100357c: 680b ldr r3, [r1, #0] + 100357e: 4022 ands r2, r4 + 1003580: 43a3 bics r3, r4 + 1003582: 0018 movs r0, r3 + 1003584: 4310 orrs r0, r2 + 1003586: 6008 str r0, [r1, #0] +} + 1003588: bd10 pop {r4, pc} + 100358a: 46c0 nop ; (mov r8, r8) + 100358c: 000fae88 .word 0x000fae88 + +01003590 : + * @arg 1111: 2.580 V + * @retval None + */ +void SENSOR_ANAVbutConfig(uint8_t vthhsel, uint8_t vthlsel) +{ + MSEC->SENSOR_THRES.bit.VBUT_H = vthhsel; + 1003590: 220f movs r2, #15 +{ + 1003592: b530 push {r4, r5, lr} + MSEC->SENSOR_THRES.bit.VBUT_H = vthhsel; + 1003594: 4c07 ldr r4, [pc, #28] ; (10035b4 ) + 1003596: 4010 ands r0, r2 + 1003598: 6823 ldr r3, [r4, #0] + 100359a: 0305 lsls r5, r0, #12 + 100359c: 4806 ldr r0, [pc, #24] ; (10035b8 ) + MSEC->SENSOR_THRES.bit.VBUT_L = vthlsel; + 100359e: 400a ands r2, r1 + MSEC->SENSOR_THRES.bit.VBUT_H = vthhsel; + 10035a0: 4018 ands r0, r3 + 10035a2: 4328 orrs r0, r5 + 10035a4: 6020 str r0, [r4, #0] + MSEC->SENSOR_THRES.bit.VBUT_L = vthlsel; + 10035a6: 6823 ldr r3, [r4, #0] + 10035a8: 4904 ldr r1, [pc, #16] ; (10035bc ) + 10035aa: 0212 lsls r2, r2, #8 + 10035ac: 4019 ands r1, r3 + 10035ae: 4311 orrs r1, r2 + 10035b0: 6021 str r1, [r4, #0] +} + 10035b2: bd30 pop {r4, r5, pc} + 10035b4: 000fae88 .word 0x000fae88 + 10035b8: ffff0fff .word 0xffff0fff + 10035bc: fffff0ff .word 0xfffff0ff + +010035c0 : + * @arg 4: 105℃ + * @retval None + */ +void SENSOR_ANATsConfig(uint8_t utc, uint8_t otc) +{ + MSEC->SENSOR_THRES.bit.TS_UTC = utc; + 10035c0: 2207 movs r2, #7 +{ + 10035c2: b530 push {r4, r5, lr} + MSEC->SENSOR_THRES.bit.TS_UTC = utc; + 10035c4: 4c07 ldr r4, [pc, #28] ; (10035e4 ) + 10035c6: 4010 ands r0, r2 + 10035c8: 6823 ldr r3, [r4, #0] + 10035ca: 0405 lsls r5, r0, #16 + 10035cc: 4806 ldr r0, [pc, #24] ; (10035e8 ) + MSEC->SENSOR_THRES.bit.TS_OTC = otc; + 10035ce: 400a ands r2, r1 + MSEC->SENSOR_THRES.bit.TS_UTC = utc; + 10035d0: 4018 ands r0, r3 + 10035d2: 4328 orrs r0, r5 + 10035d4: 6020 str r0, [r4, #0] + MSEC->SENSOR_THRES.bit.TS_OTC = otc; + 10035d6: 6823 ldr r3, [r4, #0] + 10035d8: 4904 ldr r1, [pc, #16] ; (10035ec ) + 10035da: 0512 lsls r2, r2, #20 + 10035dc: 4019 ands r1, r3 + 10035de: 4311 orrs r1, r2 + 10035e0: 6021 str r1, [r4, #0] +} + 10035e2: bd30 pop {r4, r5, pc} + 10035e4: 000fae88 .word 0x000fae88 + 10035e8: fff8ffff .word 0xfff8ffff + 10035ec: ff8fffff .word 0xff8fffff + +010035f0 : + * @arg SENSOR_SHIELD_CHK_WIN_3 + * @arg SENSOR_SHIELD_CHK_WIN_4 + * @retval None + */ +void SENSOR_ShieldConfig(uint32_t period, uint32_t chknum) +{ + 10035f0: b570 push {r4, r5, r6, lr} + 10035f2: 0005 movs r5, r0 + 10035f4: 000c movs r4, r1 + _ASSERT(IS_PERIOD_SHIELD(period)); + 10035f6: 2803 cmp r0, #3 + 10035f8: d904 bls.n 1003604 + 10035fa: 4a0e ldr r2, [pc, #56] ; (1003634 ) + 10035fc: 490e ldr r1, [pc, #56] ; (1003638 ) + 10035fe: 480f ldr r0, [pc, #60] ; (100363c ) + 1003600: f7fc ff7e bl 1000500 <_assert_handler> + _ASSERT(IS_SENSOR_SHIELD_CHK_WIN(chknum)); + 1003604: 2c03 cmp r4, #3 + 1003606: d905 bls.n 1003614 + 1003608: 21bf movs r1, #191 ; 0xbf + 100360a: 4a0a ldr r2, [pc, #40] ; (1003634 ) + 100360c: 0089 lsls r1, r1, #2 + 100360e: 480b ldr r0, [pc, #44] ; (100363c ) + 1003610: f7fc ff76 bl 1000500 <_assert_handler> + + MSEC->SHIELD_CTRL.bit.PERIOD = period; + 1003614: 2303 movs r3, #3 + 1003616: 4a0a ldr r2, [pc, #40] ; (1003640 ) + 1003618: 401d ands r5, r3 + 100361a: 8810 ldrh r0, [r2, #0] + MSEC->SHIELD_CTRL.bit.CHK_WIN = chknum; + 100361c: 401c ands r4, r3 + MSEC->SHIELD_CTRL.bit.PERIOD = period; + 100361e: 4398 bics r0, r3 + 1003620: 4328 orrs r0, r5 + 1003622: 8010 strh r0, [r2, #0] + MSEC->SHIELD_CTRL.bit.CHK_WIN = chknum; + 1003624: 8813 ldrh r3, [r2, #0] + 1003626: 4907 ldr r1, [pc, #28] ; (1003644 ) + 1003628: 0224 lsls r4, r4, #8 + 100362a: 400b ands r3, r1 + 100362c: 431c orrs r4, r3 + 100362e: 8014 strh r4, [r2, #0] +} + 1003630: bd70 pop {r4, r5, r6, pc} + 1003632: 46c0 nop ; (mov r8, r8) + 1003634: 01007054 .word 0x01007054 + 1003638: 000002fb .word 0x000002fb + 100363c: 01006f74 .word 0x01006f74 + 1003640: 000faec4 .word 0x000faec4 + 1003644: fffffcff .word 0xfffffcff + +01003648 : + * @param NewState: new state of the sensor port + * This parameter can be ENABLE or DISABLE + * @retval None + */ +void SENSOR_ShieldPortCmd(uint32_t ShieldPort, FunctionalState NewState) +{ + 1003648: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + _ASSERT(IS_SHIELD_PORT(ShieldPort)); + 100364a: 23ff movs r3, #255 ; 0xff + 100364c: 0002 movs r2, r0 +{ + 100364e: 0004 movs r4, r0 + 1003650: 000d movs r5, r1 + _ASSERT(IS_SHIELD_PORT(ShieldPort)); + 1003652: 439a bics r2, r3 + 1003654: d004 beq.n 1003660 + 1003656: 4a13 ldr r2, [pc, #76] ; (10036a4 ) + 1003658: 4913 ldr r1, [pc, #76] ; (10036a8 ) + 100365a: 4814 ldr r0, [pc, #80] ; (10036ac ) + 100365c: f7fc ff50 bl 1000500 <_assert_handler> + + uint32_t i = 0; + volatile uint32_t tmpSensorShieldPortEn = 0; + 1003660: 2300 movs r3, #0 + + tmpSensorShieldPortEn = MSEC->SHIELD_EN.reg; + 1003662: 4913 ldr r1, [pc, #76] ; (10036b0 ) + volatile uint32_t tmpSensorShieldPortEn = 0; + 1003664: 9301 str r3, [sp, #4] + tmpSensorShieldPortEn = MSEC->SHIELD_EN.reg; + 1003666: 680a ldr r2, [r1, #0] + SENSOR_T_S_PORT_ENABLE(tmpSensorShieldPortEn, i); + } + else + { + SENSOR_T_S_PORT_CLEAR(tmpSensorShieldPortEn, i); + SENSOR_T_S_PORT_DISABLE(tmpSensorShieldPortEn, i); + 1003668: 2705 movs r7, #5 + tmpSensorShieldPortEn = MSEC->SHIELD_EN.reg; + 100366a: 9201 str r2, [sp, #4] + SENSOR_T_S_PORT_ENABLE(tmpSensorShieldPortEn, i); + 100366c: 220a movs r2, #10 + 100366e: 4694 mov ip, r2 + if (0 != (ShieldPort & (0x1 << i))) + 1003670: 2201 movs r2, #1 + 1003672: 409a lsls r2, r3 + 1003674: 4214 tst r4, r2 + 1003676: d00e beq.n 1003696 + 1003678: 220f movs r2, #15 + 100367a: 0098 lsls r0, r3, #2 + 100367c: 4082 lsls r2, r0 + 100367e: 43d2 mvns r2, r2 + SENSOR_T_S_PORT_CLEAR(tmpSensorShieldPortEn, i); + 1003680: 9e01 ldr r6, [sp, #4] + 1003682: 4032 ands r2, r6 + 1003684: 9201 str r2, [sp, #4] + SENSOR_T_S_PORT_ENABLE(tmpSensorShieldPortEn, i); + 1003686: 9a01 ldr r2, [sp, #4] + 1003688: 4666 mov r6, ip + if (DISABLE != NewState) + 100368a: 2d00 cmp r5, #0 + 100368c: d100 bne.n 1003690 + SENSOR_T_S_PORT_DISABLE(tmpSensorShieldPortEn, i); + 100368e: 003e movs r6, r7 + 1003690: 4086 lsls r6, r0 + 1003692: 4332 orrs r2, r6 + 1003694: 9201 str r2, [sp, #4] + for (i = 0; i < IN_SHIELD_NUM; i++) + 1003696: 3301 adds r3, #1 + 1003698: 2b08 cmp r3, #8 + 100369a: d1e9 bne.n 1003670 + } + } + } + + MSEC->SHIELD_EN.reg = tmpSensorShieldPortEn; + 100369c: 9b01 ldr r3, [sp, #4] + 100369e: 600b str r3, [r1, #0] +} + 10036a0: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} + 10036a2: 46c0 nop ; (mov r8, r8) + 10036a4: 01007068 .word 0x01007068 + 10036a8: 00000315 .word 0x00000315 + 10036ac: 01006f74 .word 0x01006f74 + 10036b0: 000faec0 .word 0x000faec0 + +010036b4 : + * @param NewState: new state of the sensor lock + * This parameter can be ENABLE or DISABLE + * @retval None + */ +void SENSOR_SecLockConfig(uint32_t SecLock, FunctionalState NewState) +{ + 10036b4: b570 push {r4, r5, r6, lr} + 10036b6: 0005 movs r5, r0 + 10036b8: 000e movs r6, r1 + _ASSERT(IS_SENSOR_LOCK(SecLock)); + 10036ba: 06c3 lsls r3, r0, #27 + 10036bc: d105 bne.n 10036ca + 10036be: 21d0 movs r1, #208 ; 0xd0 + 10036c0: 4a0b ldr r2, [pc, #44] ; (10036f0 ) + 10036c2: 0089 lsls r1, r1, #2 + 10036c4: 480b ldr r0, [pc, #44] ; (10036f4 ) + 10036c6: f7fc ff1b bl 1000500 <_assert_handler> + 10036ca: 4c0b ldr r4, [pc, #44] ; (10036f8 ) + _ASSERT(IS_FUNCTIONAL_STATE(NewState)); + 10036cc: 2e01 cmp r6, #1 + 10036ce: d908 bls.n 10036e2 + 10036d0: 4a07 ldr r2, [pc, #28] ; (10036f0 ) + 10036d2: 490a ldr r1, [pc, #40] ; (10036fc ) + 10036d4: 4807 ldr r0, [pc, #28] ; (10036f4 ) + 10036d6: f7fc ff13 bl 1000500 <_assert_handler> + { + MSEC->LOCK.reg |= SecLock; + } + else + { + MSEC->LOCK.reg &= ~SecLock; + 10036da: 6863 ldr r3, [r4, #4] + 10036dc: 43ab bics r3, r5 + 10036de: 6063 str r3, [r4, #4] + } +} + 10036e0: e004 b.n 10036ec + if(NewState == ENABLE) + 10036e2: 2e01 cmp r6, #1 + 10036e4: d1f9 bne.n 10036da + MSEC->LOCK.reg |= SecLock; + 10036e6: 6863 ldr r3, [r4, #4] + 10036e8: 431d orrs r5, r3 + 10036ea: 6065 str r5, [r4, #4] +} + 10036ec: bd70 pop {r4, r5, r6, pc} + 10036ee: 46c0 nop ; (mov r8, r8) + 10036f0: 0100707d .word 0x0100707d + 10036f4: 01006f74 .word 0x01006f74 + 10036f8: 000fae00 .word 0x000fae00 + 10036fc: 00000341 .word 0x00000341 + +01003700 : + * @arg 18:18 key_clear + * @retval TRUE or false + */ +Boolean SENSOR_GetITStatus(uint32_t ITStatus) +{ + _ASSERT(IS_SENSOR_IT(ITStatus)); + 1003700: 4b08 ldr r3, [pc, #32] ; (1003724 ) +{ + 1003702: b510 push {r4, lr} + 1003704: 0004 movs r4, r0 + _ASSERT(IS_SENSOR_IT(ITStatus)); + 1003706: 4218 tst r0, r3 + 1003708: d104 bne.n 1003714 + 100370a: 4a07 ldr r2, [pc, #28] ; (1003728 ) + 100370c: 4907 ldr r1, [pc, #28] ; (100372c ) + 100370e: 4808 ldr r0, [pc, #32] ; (1003730 ) + 1003710: f7fc fef6 bl 1000500 <_assert_handler> + + if ((MSEC->STATUS.reg & ITStatus) != 0) + 1003714: 4b07 ldr r3, [pc, #28] ; (1003734 ) + 1003716: 6b98 ldr r0, [r3, #56] ; 0x38 + 1003718: 4004 ands r4, r0 + 100371a: 1e60 subs r0, r4, #1 + 100371c: 4184 sbcs r4, r0 + 100371e: b2e0 uxtb r0, r4 + { + return TRUE; + } + + return FALSE; +} + 1003720: bd10 pop {r4, pc} + 1003722: 46c0 nop ; (mov r8, r8) + 1003724: fff8e000 .word 0xfff8e000 + 1003728: 01007092 .word 0x01007092 + 100372c: 0000035b .word 0x0000035b + 1003730: 01006f74 .word 0x01006f74 + 1003734: 000fae00 .word 0x000fae00 + +01003738 : + * @brief Get sensor's state reg value. + * @retval sensor state. + */ +uint32_t SENSOR_GetITStatusReg(void) +{ + return MSEC->STATUS.reg; + 1003738: 4b01 ldr r3, [pc, #4] ; (1003740 ) + 100373a: 6b98 ldr r0, [r3, #56] ; 0x38 +} + 100373c: 4770 bx lr + 100373e: 46c0 nop ; (mov r8, r8) + 1003740: 000fae00 .word 0x000fae00 + +01003744 : + * @param Statue: new state of the sensor check + * This parameter can be ENABLE or DISABLE + * @retval none + */ +void SENSOR_IRQCmd(uint32_t sec_irq, FunctionalState Statue) +{ + 1003744: b570 push {r4, r5, r6, lr} + 1003746: 0004 movs r4, r0 + 1003748: 000d movs r5, r1 + _ASSERT(IS_SENSOR_IRQ(sec_irq)); + 100374a: 06c3 lsls r3, r0, #27 + 100374c: d105 bne.n 100375a + 100374e: 21e0 movs r1, #224 ; 0xe0 + 1003750: 4a07 ldr r2, [pc, #28] ; (1003770 ) + 1003752: 0089 lsls r1, r1, #2 + 1003754: 4807 ldr r0, [pc, #28] ; (1003774 ) + 1003756: f7fc fed3 bl 1000500 <_assert_handler> + 100375a: 4b07 ldr r3, [pc, #28] ; (1003778 ) + + if (DISABLE != Statue) + { + MSEC->IE.reg |= sec_irq; + 100375c: 6b1a ldr r2, [r3, #48] ; 0x30 + if (DISABLE != Statue) + 100375e: 2d00 cmp r5, #0 + 1003760: d002 beq.n 1003768 + MSEC->IE.reg |= sec_irq; + 1003762: 4314 orrs r4, r2 + 1003764: 631c str r4, [r3, #48] ; 0x30 + } + else + { + MSEC->IE.reg &= ~sec_irq; + } +} + 1003766: bd70 pop {r4, r5, r6, pc} + MSEC->IE.reg &= ~sec_irq; + 1003768: 43a2 bics r2, r4 + 100376a: 631a str r2, [r3, #48] ; 0x30 +} + 100376c: e7fb b.n 1003766 + 100376e: 46c0 nop ; (mov r8, r8) + 1003770: 010070a5 .word 0x010070a5 + 1003774: 01006f74 .word 0x01006f74 + 1003778: 000fae00 .word 0x000fae00 + +0100377c : + * @brief Clear sensor irq pending. + * @retval none + */ +void SENSOR_ClearITPending(void) +{ + MSEC->IRQ.reg = ALL_IRQ; + 100377c: 221f movs r2, #31 + 100377e: 4b01 ldr r3, [pc, #4] ; (1003784 ) + 1003780: 635a str r2, [r3, #52] ; 0x34 +} + 1003782: 4770 bx lr + 1003784: 000fae00 .word 0x000fae00 + +01003788 : + * @arg KEY_CLEAR_IRQ + * @arg ALL_IRQ + * @retval none + */ +void SENSOR_ClearITPendingBit(uint32_t sec_irq) +{ + 1003788: b510 push {r4, lr} + 100378a: 0004 movs r4, r0 + _ASSERT(IS_SENSOR_IRQ(sec_irq)); + 100378c: 06c3 lsls r3, r0, #27 + 100378e: d104 bne.n 100379a + 1003790: 4a05 ldr r2, [pc, #20] ; (10037a8 ) + 1003792: 4906 ldr r1, [pc, #24] ; (10037ac ) + 1003794: 4806 ldr r0, [pc, #24] ; (10037b0 ) + 1003796: f7fc feb3 bl 1000500 <_assert_handler> + + MSEC->IRQ.reg |= BIT(sec_irq); + 100379a: 2301 movs r3, #1 + 100379c: 40a3 lsls r3, r4 + 100379e: 4a05 ldr r2, [pc, #20] ; (10037b4 ) + 10037a0: 6b51 ldr r1, [r2, #52] ; 0x34 + 10037a2: 430b orrs r3, r1 + 10037a4: 6353 str r3, [r2, #52] ; 0x34 +} + 10037a6: bd10 pop {r4, pc} + 10037a8: 010070b3 .word 0x010070b3 + 10037ac: 000003a5 .word 0x000003a5 + 10037b0: 01006f74 .word 0x01006f74 + 10037b4: 000fae00 .word 0x000fae00 + +010037b8 : + * This parameter can be 0~0xf: + * @retval none + */ +void SENSOR_SetSecThreshold(uint32_t SecThre_val) +{ + _ASSERT(IS_SECTHRE_VAL(SecThre_val)); + 10037b8: 1e43 subs r3, r0, #1 +{ + 10037ba: b510 push {r4, lr} + 10037bc: 0004 movs r4, r0 + _ASSERT(IS_SECTHRE_VAL(SecThre_val)); + 10037be: 2b0e cmp r3, #14 + 10037c0: d904 bls.n 10037cc + 10037c2: 4a07 ldr r2, [pc, #28] ; (10037e0 ) + 10037c4: 4907 ldr r1, [pc, #28] ; (10037e4 ) + 10037c6: 4808 ldr r0, [pc, #32] ; (10037e8 ) + 10037c8: f7fc fe9a bl 1000500 <_assert_handler> + + MSEC->ALERT_FILT.bit.THOLD = SecThre_val; + 10037cc: 210f movs r1, #15 + 10037ce: 4a07 ldr r2, [pc, #28] ; (10037ec ) + 10037d0: 400c ands r4, r1 + 10037d2: 6893 ldr r3, [r2, #8] + 10037d4: 4906 ldr r1, [pc, #24] ; (10037f0 ) + 10037d6: 0224 lsls r4, r4, #8 + 10037d8: 400b ands r3, r1 + 10037da: 431c orrs r4, r3 + 10037dc: 6094 str r4, [r2, #8] +} + 10037de: bd10 pop {r4, pc} + 10037e0: 010070cc .word 0x010070cc + 10037e4: 000003b3 .word 0x000003b3 + 10037e8: 01006f74 .word 0x01006f74 + 10037ec: 000fae00 .word 0x000fae00 + 10037f0: fffff0ff .word 0xfffff0ff + +010037f4 : + * @brief Get sensor alert cont. + * @retval sensor alert cont. + */ +uint32_t SENSOR_GetSecCnt(void) +{ + return MSEC->ALERT_FILT.bit.CNT; + 10037f4: 4b02 ldr r3, [pc, #8] ; (1003800 ) + 10037f6: 6898 ldr r0, [r3, #8] + 10037f8: 0700 lsls r0, r0, #28 + 10037fa: 0f00 lsrs r0, r0, #28 +} + 10037fc: 4770 bx lr + 10037fe: 46c0 nop ; (mov r8, r8) + 1003800: 000fae00 .word 0x000fae00 + +01003804 : + * @brief Clear sensor alert cont. + * @retval none + */ +void SENSOR_ClearSecCount(void) +{ + MSEC->ALERT_FILT.bit.CNT_CLR = 1; + 1003804: 2380 movs r3, #128 ; 0x80 + 1003806: 4a03 ldr r2, [pc, #12] ; (1003814 ) + 1003808: 025b lsls r3, r3, #9 + 100380a: 6891 ldr r1, [r2, #8] + 100380c: 430b orrs r3, r1 + 100380e: 6093 str r3, [r2, #8] +} + 1003810: 4770 bx lr + 1003812: 46c0 nop ; (mov r8, r8) + 1003814: 000fae00 .word 0x000fae00 + +01003818 : + * @brief init otp module + * @param NULL + * @retval NULL + */ +void init_otp(void) +{ + 1003818: b510 push {r4, lr} + ((void(*)())FUNC_INIT_OTP_ADDR)(); + 100381a: 4b01 ldr r3, [pc, #4] ; (1003820 ) + 100381c: 4798 blx r3 +} + 100381e: bd10 pop {r4, pc} + 1003820: 00005459 .word 0x00005459 + +01003824 : + * @brief deinit otp module + * @param NULL + * @retval NULL + */ +void deinit_otp(void) +{ + 1003824: b510 push {r4, lr} + ((void(*)())FUNC_DEINIT_OTP_ADDR)(); + 1003826: 4b01 ldr r3, [pc, #4] ; (100382c ) + 1003828: 4798 blx r3 +} + 100382a: bd10 pop {r4, pc} + 100382c: 000054b9 .word 0x000054b9 + +01003830 : + * @brief read chipid + * @param id:id out buf(6byte) + * @retval NULL + */ +void read_chipid(uint8_t *id) +{ + 1003830: b510 push {r4, lr} + 1003832: 0004 movs r4, r0 + init_otp(); + 1003834: f7ff fff0 bl 1003818 + ((void(*)(uint8_t *id))FUNC_READ_CHIPID_ADDR)(id); + 1003838: 0020 movs r0, r4 + 100383a: 4b02 ldr r3, [pc, #8] ; (1003844 ) + 100383c: 4798 blx r3 + deinit_otp(); + 100383e: f7ff fff1 bl 1003824 +} + 1003842: bd10 pop {r4, pc} + 1003844: 0000569d .word 0x0000569d + +01003848 : + * @retval 0x0000-->test stage + * 0x1111-->debug stage + * 0x7777-->product stage + */ +uint32_t read_chip_life(void) +{ + 1003848: b510 push {r4, lr} + uint32_t life = 0; + init_otp(); + 100384a: f7ff ffe5 bl 1003818 + life = ((uint32_t(*)(void))FUNC_READ_CHIPLF_ADDR)(); + 100384e: 4b03 ldr r3, [pc, #12] ; (100385c ) + 1003850: 4798 blx r3 + 1003852: 0004 movs r4, r0 + deinit_otp(); + 1003854: f7ff ffe6 bl 1003824 + return life; +} + 1003858: 0020 movs r0, r4 + 100385a: bd10 pop {r4, pc} + 100385c: 000056ab .word 0x000056ab + +01003860 : + * @param *data: read data buf ptr + * @param len: read data len + * @retval SUCCESS / ERROR + */ +uint8_t read_otp(uint32_t addr, uint8_t *data, uint32_t len) +{ + 1003860: b570 push {r4, r5, r6, lr} + 1003862: 000d movs r5, r1 + 1003864: 0016 movs r6, r2 + 1003866: 0004 movs r4, r0 + init_otp(); + 1003868: f7ff ffd6 bl 1003818 + ((uint8_t(*)(uint32_t addr, uint8_t *data, uint32_t len))FUNC_READ_OTP_ADDR)(addr, data, len); + 100386c: 0032 movs r2, r6 + 100386e: 0029 movs r1, r5 + 1003870: 4b03 ldr r3, [pc, #12] ; (1003880 ) + 1003872: 0020 movs r0, r4 + 1003874: 4798 blx r3 + deinit_otp(); + 1003876: f7ff ffd5 bl 1003824 + return SUCCESS; +} + 100387a: 2001 movs r0, #1 + 100387c: bd70 pop {r4, r5, r6, pc} + 100387e: 46c0 nop ; (mov r8, r8) + 1003880: 00005501 .word 0x00005501 + +01003884 : + +uint8_t dataxor_otp(uint32_t data,uint8_t bit) +{ + uint8_t xor_val = 0; + for(uint8_t i = 0; i< bit; i++) + 1003884: 2300 movs r3, #0 +{ + 1003886: b530 push {r4, r5, lr} + uint8_t xor_val = 0; + 1003888: 001a movs r2, r3 + { + xor_val ^= (data >> i) & 0x01; + 100388a: 2501 movs r5, #1 + for(uint8_t i = 0; i< bit; i++) + 100388c: b2dc uxtb r4, r3 + 100388e: 42a1 cmp r1, r4 + 1003890: d801 bhi.n 1003896 + } + return xor_val; +} + 1003892: 0010 movs r0, r2 + 1003894: bd30 pop {r4, r5, pc} + xor_val ^= (data >> i) & 0x01; + 1003896: 0004 movs r4, r0 + 1003898: 40dc lsrs r4, r3 + 100389a: 402c ands r4, r5 + 100389c: 4062 eors r2, r4 + 100389e: 3301 adds r3, #1 + 10038a0: e7f4 b.n 100388c + ... + +010038a4 : + * @param: *data: write data buf ptr + * @param: len: write data len + * @return: SUCCESS or ERROR + */ +uint8_t write_otp(uint32_t addr, uint8_t *data, uint32_t len) +{ + 10038a4: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 10038a6: 0005 movs r5, r0 + read_otp(OTP_CHGPUMPADDR,readbuf,OTP_CHGPUMPLEN); + 10038a8: 20a3 movs r0, #163 ; 0xa3 + uint8_t readbuf[2] = {0}; + 10038aa: 2300 movs r3, #0 + 10038ac: ac01 add r4, sp, #4 +{ + 10038ae: 000e movs r6, r1 + 10038b0: 0017 movs r7, r2 + read_otp(OTP_CHGPUMPADDR,readbuf,OTP_CHGPUMPLEN); + 10038b2: 0021 movs r1, r4 + 10038b4: 2202 movs r2, #2 + 10038b6: 0040 lsls r0, r0, #1 + uint8_t readbuf[2] = {0}; + 10038b8: 8023 strh r3, [r4, #0] + read_otp(OTP_CHGPUMPADDR,readbuf,OTP_CHGPUMPLEN); + 10038ba: f7ff ffd1 bl 1003860 + 10038be: 8824 ldrh r4, [r4, #0] + uint8_t xorbit = dataxor_otp(chgpumpconfig,9); + 10038c0: 2109 movs r1, #9 + 10038c2: 0020 movs r0, r4 + 10038c4: f7ff ffde bl 1003884 + uint8_t enable = (chgpumpconfig >> 15) & 0x01; + 10038c8: 0be2 lsrs r2, r4, #15 + return OTP_WRITE_CHGPUMP_CFG; + 10038ca: 2343 movs r3, #67 ; 0x43 + if(enable && (xorbit == ((chgpumpconfig >> 14) & 0x01))) + 10038cc: 2a00 cmp r2, #0 + 10038ce: d008 beq.n 10038e2 + 10038d0: 0ba2 lsrs r2, r4, #14 + 10038d2: 3a02 subs r2, #2 + 10038d4: 1e53 subs r3, r2, #1 + 10038d6: 419a sbcs r2, r3 + return OTP_WRITE_CHGPUMP_CFG; + 10038d8: 2343 movs r3, #67 ; 0x43 + if(enable && (xorbit == ((chgpumpconfig >> 14) & 0x01))) + 10038da: 4290 cmp r0, r2 + 10038dc: d101 bne.n 10038e2 + return (chgpumpconfig & 0x3ff); + 10038de: 05a4 lsls r4, r4, #22 + 10038e0: 0da3 lsrs r3, r4, #22 + uint32_t chgpumpconfig = 0; + chgpumpconfig = Get_WriteChgrpumpConfig(); + return ((uint8_t(*)(uint32_t addr, uint8_t *data, uint32_t len, uint32_t chgpumpconfig))FUNC_WRITE_OTP_ADDR)(addr, data, len,chgpumpconfig ); + 10038e2: 003a movs r2, r7 + 10038e4: 0031 movs r1, r6 + 10038e6: 0028 movs r0, r5 + 10038e8: 4c01 ldr r4, [pc, #4] ; (10038f0 ) + 10038ea: 47a0 blx r4 +} + 10038ec: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} + 10038ee: 46c0 nop ; (mov r8, r8) + 10038f0: 00005639 .word 0x00005639 + +010038f4 : + * @brief Init para + * @param SCIx=SCI0/SCI1 + * @retval None + */ +void ISO7816_Init(SCI_Struct_Type* SCIx) +{ + 10038f4: b530 push {r4, r5, lr} + uint16_t buff_f[] = {372, 372, 558, 744, 1116, 1488, 1860, 0,0, 512, 768, 1024, 1536, 2048, 0, 0}; + 10038f6: 2520 movs r5, #32 +{ + 10038f8: b091 sub sp, #68 ; 0x44 + 10038fa: 0004 movs r4, r0 + uint16_t buff_f[] = {372, 372, 558, 744, 1116, 1488, 1860, 0,0, 512, 768, 1024, 1536, 2048, 0, 0}; + 10038fc: 002a movs r2, r5 + 10038fe: 492f ldr r1, [pc, #188] ; (10039bc ) + 1003900: 4668 mov r0, sp + 1003902: f002 fd91 bl 1006428 + uint16_t buff_d[] = {0, 1, 2, 4, 8, 16, 32, 64,12, 20, 0, 0, 0, 0, 0, 0}; + 1003906: 002a movs r2, r5 + 1003908: 492d ldr r1, [pc, #180] ; (10039c0 ) + 100390a: a808 add r0, sp, #32 + 100390c: f002 fd8c bl 1006428 + SCIx->SCI_Tran_StateCB.Sci_Pin_Detect_State = 0; + 1003910: 22b7 movs r2, #183 ; 0xb7 + 1003912: 2300 movs r3, #0 + SCIx->SCI_Tran_StateCB.Sci_Pin_Detect_State = 0; + SCIx->SCI_Tran_StateCB.SCI_State = 0; //0-rx 1-tx + SCIx->SCI_Tran_StateCB.SCI_RX_Result = 0; //1-rec finsh + SCIx->SCI_Tran_StateCB.SCI_TX_Result = 0xff; //0-send finsh + 1003914: 21ff movs r1, #255 ; 0xff + SCIx->SCI_Tran_StateCB.Sci_Pin_Detect_State = 0; + 1003916: 0092 lsls r2, r2, #2 + 1003918: 54a3 strb r3, [r4, r2] + SCIx->SCI_Tran_StateCB.Sci_Pin_Detect_State = 0; + 100391a: 54a3 strb r3, [r4, r2] + SCIx->SCI_Tran_StateCB.SCI_State = 0; //0-rx 1-tx + 100391c: 4a29 ldr r2, [pc, #164] ; (10039c4 ) + SCIx->SCI_Tran_StateCB.contact_reset_l_cnt = 0; + SCIx->SCI_Tran_StateCB.contact_atr_rfb_time_cnt = 0; + SCIx->SCI_Tran_StateCB.contact_atr_rab_time_cnt = 0; + SCIx->SCI_Tran_StateCB.contact_over_time_cnt = 0; + SCIx->SCI_Tran_StateCB.SCI_Protocol_Step = 0; + memcpy(SCIx->SCI_Tran_StateCB.fi_table,buff_f,sizeof(buff_f)); + 100391e: 0020 movs r0, r4 + SCIx->SCI_Tran_StateCB.SCI_State = 0; //0-rx 1-tx + 1003920: 54a3 strb r3, [r4, r2] + SCIx->SCI_Tran_StateCB.SCI_RX_Result = 0; //1-rec finsh + 1003922: 4a29 ldr r2, [pc, #164] ; (10039c8 ) + memcpy(SCIx->SCI_Tran_StateCB.fi_table,buff_f,sizeof(buff_f)); + 1003924: 3069 adds r0, #105 ; 0x69 + SCIx->SCI_Tran_StateCB.SCI_RX_Result = 0; //1-rec finsh + 1003926: 54a3 strb r3, [r4, r2] + SCIx->SCI_Tran_StateCB.SCI_TX_Result = 0xff; //0-send finsh + 1003928: 4a28 ldr r2, [pc, #160] ; (10039cc ) + memcpy(SCIx->SCI_Tran_StateCB.fi_table,buff_f,sizeof(buff_f)); + 100392a: 30ff adds r0, #255 ; 0xff + SCIx->SCI_Tran_StateCB.SCI_TX_Result = 0xff; //0-send finsh + 100392c: 54a1 strb r1, [r4, r2] + SCIx->SCI_Tran_StateCB.Card_Type = 0; //0-T0 1-T1 + 100392e: 3201 adds r2, #1 + 1003930: 54a3 strb r3, [r4, r2] + SCIx->SCI_Tran_StateCB.T1_parity_flag = 0; + 1003932: 4a27 ldr r2, [pc, #156] ; (10039d0 ) + SCIx->SCI_Tran_StateCB.terminal_send_cwt = 12; + 1003934: 39f3 subs r1, #243 ; 0xf3 + SCIx->SCI_Tran_StateCB.T1_parity_flag = 0; + 1003936: 54a3 strb r3, [r4, r2] + SCIx->SCI_Tran_StateCB.terminal_send_cwt = 12; + 1003938: 22a3 movs r2, #163 ; 0xa3 + 100393a: 00d2 lsls r2, r2, #3 + 100393c: 50a1 str r1, [r4, r2] + SCIx->SCI_Tran_StateCB.terminal_rec_cwt = 10086; + 100393e: 4a25 ldr r2, [pc, #148] ; (10039d4 ) + 1003940: 4925 ldr r1, [pc, #148] ; (10039d8 ) + 1003942: 50a1 str r1, [r4, r2] + SCIx->SCI_Tran_StateCB.terminal_rec_bwt = 15380; + 1003944: 4925 ldr r1, [pc, #148] ; (10039dc ) + 1003946: 3204 adds r2, #4 + 1003948: 50a1 str r1, [r4, r2] + SCIx->SCI_Tran_StateCB.terminal_send_bgt = 26; + 100394a: 211a movs r1, #26 + 100394c: 4a24 ldr r2, [pc, #144] ; (10039e0 ) + 100394e: 50a1 str r1, [r4, r2] + SCIx->SCI_Tran_StateCB.terminal_rec_bwt_atr = 0; + 1003950: 3204 adds r2, #4 + 1003952: 50a3 str r3, [r4, r2] + SCIx->SCI_Tran_StateCB.terminal_change_rec_bwt_num = 0; + 1003954: 4a23 ldr r2, [pc, #140] ; (10039e4 ) + memcpy(SCIx->SCI_Tran_StateCB.fi_table,buff_f,sizeof(buff_f)); + 1003956: 4669 mov r1, sp + SCIx->SCI_Tran_StateCB.terminal_change_rec_bwt_num = 0; + 1003958: 50a3 str r3, [r4, r2] + SCIx->SCI_Tran_StateCB.atr_cwt_valid_flag = 0; + 100395a: 4a23 ldr r2, [pc, #140] ; (10039e8 ) + 100395c: 54a3 strb r3, [r4, r2] + SCIx->SCI_Tran_StateCB.sci_atr_byte_parity = 0; + 100395e: 4a23 ldr r2, [pc, #140] ; (10039ec ) + 1003960: 54a3 strb r3, [r4, r2] + SCIx->SCI_Tran_StateCB.SCI_Rec_Data_Index = 0; + 1003962: 22a6 movs r2, #166 ; 0xa6 + 1003964: 00d2 lsls r2, r2, #3 + 1003966: 52a3 strh r3, [r4, r2] + SCIx->SCI_Tran_StateCB.SCI_Process_Step = 0; + 1003968: 4a21 ldr r2, [pc, #132] ; (10039f0 ) + 100396a: 54a3 strb r3, [r4, r2] + SCIx->SCI_Tran_StateCB.tpdu_t0_step = 0; + 100396c: 4a21 ldr r2, [pc, #132] ; (10039f4 ) + 100396e: 54a3 strb r3, [r4, r2] + SCIx->SCI_Tran_StateCB.tpdu_t1_step = 0; + 1003970: 4a21 ldr r2, [pc, #132] ; (10039f8 ) + 1003972: 54a3 strb r3, [r4, r2] + SCIx->SCI_Tran_StateCB.tpdu_t1_type = 0; + 1003974: 4a21 ldr r2, [pc, #132] ; (10039fc ) + 1003976: 54a3 strb r3, [r4, r2] + SCIx->SCI_Tran_StateCB.time3_cnt_last = 0; + 1003978: 3203 adds r2, #3 + 100397a: 50a3 str r3, [r4, r2] + SCIx->SCI_Tran_StateCB.time3_cnt_new = 0; + 100397c: 4a20 ldr r2, [pc, #128] ; (1003a00 ) + 100397e: 50a3 str r3, [r4, r2] + SCIx->SCI_Tran_StateCB.contact_atr_reset_l_flag = 0; + 1003980: 22b9 movs r2, #185 ; 0xb9 + 1003982: 0092 lsls r2, r2, #2 + 1003984: 54a3 strb r3, [r4, r2] + SCIx->SCI_Tran_StateCB.contact_atr_rfb_overtime_falg = 0; + 1003986: 4a1f ldr r2, [pc, #124] ; (1003a04 ) + 1003988: 54a3 strb r3, [r4, r2] + SCIx->SCI_Tran_StateCB.contact_atr_rab_overtime_falg = 0; + 100398a: 4a1f ldr r2, [pc, #124] ; (1003a08 ) + 100398c: 54a3 strb r3, [r4, r2] + SCIx->SCI_Tran_StateCB.contact_reset_l_cnt = 0; + 100398e: 3a3f subs r2, #63 ; 0x3f + 1003990: 3aff subs r2, #255 ; 0xff + 1003992: 50a3 str r3, [r4, r2] + SCIx->SCI_Tran_StateCB.contact_atr_rfb_time_cnt = 0; + 1003994: 3204 adds r2, #4 + 1003996: 50a3 str r3, [r4, r2] + SCIx->SCI_Tran_StateCB.contact_atr_rab_time_cnt = 0; + 1003998: 3204 adds r2, #4 + 100399a: 50a3 str r3, [r4, r2] + SCIx->SCI_Tran_StateCB.contact_over_time_cnt = 0; + 100399c: 3204 adds r2, #4 + 100399e: 50a3 str r3, [r4, r2] + SCIx->SCI_Tran_StateCB.SCI_Protocol_Step = 0; + 10039a0: 4a1a ldr r2, [pc, #104] ; (1003a0c ) + 10039a2: 54a3 strb r3, [r4, r2] + memcpy(SCIx->SCI_Tran_StateCB.fi_table,buff_f,sizeof(buff_f)); + 10039a4: 002a movs r2, r5 + 10039a6: f002 fd3f bl 1006428 + memcpy(SCIx->SCI_Tran_StateCB.di_table,buff_d,sizeof(buff_d)); + 10039aa: 0020 movs r0, r4 + 10039ac: 3089 adds r0, #137 ; 0x89 + 10039ae: 002a movs r2, r5 + 10039b0: a908 add r1, sp, #32 + 10039b2: 30ff adds r0, #255 ; 0xff + 10039b4: f002 fd38 bl 1006428 + +} + 10039b8: b011 add sp, #68 ; 0x44 + 10039ba: bd30 pop {r4, r5, pc} + 10039bc: 010070e4 .word 0x010070e4 + 10039c0: 01007104 .word 0x01007104 + 10039c4: 000002dd .word 0x000002dd + 10039c8: 000002de .word 0x000002de + 10039cc: 000002df .word 0x000002df + 10039d0: 000002e1 .word 0x000002e1 + 10039d4: 0000051c .word 0x0000051c + 10039d8: 00002766 .word 0x00002766 + 10039dc: 00003c14 .word 0x00003c14 + 10039e0: 00000524 .word 0x00000524 + 10039e4: 0000052c .word 0x0000052c + 10039e8: 000002e2 .word 0x000002e2 + 10039ec: 000002e3 .word 0x000002e3 + 10039f0: 00000532 .word 0x00000532 + 10039f4: 00000533 .word 0x00000533 + 10039f8: 00000534 .word 0x00000534 + 10039fc: 00000535 .word 0x00000535 + 1003a00: 0000053c .word 0x0000053c + 1003a04: 000002e5 .word 0x000002e5 + 1003a08: 000002e6 .word 0x000002e6 + 1003a0c: 00000541 .word 0x00000541 + +01003a10 : + * @retval 0 : Card in place + * 1 : Card not place + */ +uint8_t ISO7816_Detect_Io_State(void) +{ + return GPIO_ReadInputDataBit(SCI7816_DETECT_PORT, SCI7816_DETECT_IO_PIN); + 1003a10: 2102 movs r1, #2 +{ + 1003a12: b510 push {r4, lr} + return GPIO_ReadInputDataBit(SCI7816_DETECT_PORT, SCI7816_DETECT_IO_PIN); + 1003a14: 0008 movs r0, r1 + 1003a16: f7fd fa07 bl 1000e28 +} + 1003a1a: bd10 pop {r4, pc} + +01003a1c : + ISO7816_VCC_5V: 5 vcard + * @retval None + */ +void ISO7816_Vcard_Control(uint8_t state) +{ + if (state == ISO7816_VCC_3V) + 1003a1c: 2802 cmp r0, #2 + 1003a1e: d110 bne.n 1003a42 + { + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_OCP_EN = 1; + 1003a20: 2280 movs r2, #128 ; 0x80 + 1003a22: 4b1d ldr r3, [pc, #116] ; (1003a98 ) + 1003a24: 6819 ldr r1, [r3, #0] + 1003a26: 430a orrs r2, r1 + 1003a28: 601a str r2, [r3, #0] + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_EN = 1; + 1003a2a: 2240 movs r2, #64 ; 0x40 + 1003a2c: 6819 ldr r1, [r3, #0] + 1003a2e: 430a orrs r2, r1 + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_VSEL = 1; + 1003a30: 2130 movs r1, #48 ; 0x30 + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_EN = 1; + 1003a32: 601a str r2, [r3, #0] + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_VSEL = 1; + 1003a34: 681a ldr r2, [r3, #0] + 1003a36: 438a bics r2, r1 + 1003a38: 0011 movs r1, r2 + 1003a3a: 2210 movs r2, #16 + } + else if (state == ISO7816_VCC_5V) + { + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_OCP_EN = 1; + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_EN = 1; + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_VSEL = 2; + 1003a3c: 430a orrs r2, r1 + } + + else if (state == ISO7816_VCC_0V) + { + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_OCP_EN = 0; + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_EN = 0; + 1003a3e: 601a str r2, [r3, #0] + } +} + 1003a40: 4770 bx lr + else if (state == ISO7816_VCC_1_8V) + 1003a42: 2801 cmp r0, #1 + 1003a44: d10c bne.n 1003a60 + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_OCP_EN = 1; + 1003a46: 2280 movs r2, #128 ; 0x80 + 1003a48: 4b13 ldr r3, [pc, #76] ; (1003a98 ) + 1003a4a: 6819 ldr r1, [r3, #0] + 1003a4c: 430a orrs r2, r1 + 1003a4e: 601a str r2, [r3, #0] + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_EN = 1; + 1003a50: 2240 movs r2, #64 ; 0x40 + 1003a52: 6819 ldr r1, [r3, #0] + 1003a54: 430a orrs r2, r1 + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_VSEL = 0; + 1003a56: 2130 movs r1, #48 ; 0x30 + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_EN = 1; + 1003a58: 601a str r2, [r3, #0] + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_VSEL = 0; + 1003a5a: 681a ldr r2, [r3, #0] + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_EN = 0; + 1003a5c: 438a bics r2, r1 + 1003a5e: e7ee b.n 1003a3e + else if (state == ISO7816_VCC_5V) + 1003a60: 2803 cmp r0, #3 + 1003a62: d10e bne.n 1003a82 + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_OCP_EN = 1; + 1003a64: 2280 movs r2, #128 ; 0x80 + 1003a66: 4b0c ldr r3, [pc, #48] ; (1003a98 ) + 1003a68: 6819 ldr r1, [r3, #0] + 1003a6a: 430a orrs r2, r1 + 1003a6c: 601a str r2, [r3, #0] + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_EN = 1; + 1003a6e: 2240 movs r2, #64 ; 0x40 + 1003a70: 6819 ldr r1, [r3, #0] + 1003a72: 430a orrs r2, r1 + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_VSEL = 2; + 1003a74: 2130 movs r1, #48 ; 0x30 + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_EN = 1; + 1003a76: 601a str r2, [r3, #0] + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_VSEL = 2; + 1003a78: 681a ldr r2, [r3, #0] + 1003a7a: 438a bics r2, r1 + 1003a7c: 0011 movs r1, r2 + 1003a7e: 2220 movs r2, #32 + 1003a80: e7dc b.n 1003a3c + else if (state == ISO7816_VCC_0V) + 1003a82: 2800 cmp r0, #0 + 1003a84: d1dc bne.n 1003a40 + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_OCP_EN = 0; + 1003a86: 2180 movs r1, #128 ; 0x80 + 1003a88: 4b03 ldr r3, [pc, #12] ; (1003a98 ) + 1003a8a: 681a ldr r2, [r3, #0] + 1003a8c: 438a bics r2, r1 + 1003a8e: 601a str r2, [r3, #0] + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_EN = 0; + 1003a90: 681a ldr r2, [r3, #0] + 1003a92: 3940 subs r1, #64 ; 0x40 + 1003a94: e7e2 b.n 1003a5c + 1003a96: 46c0 nop ; (mov r8, r8) + 1003a98: 000fb200 .word 0x000fb200 + +01003a9c : + * @param None + * @retval None + */ +void ISO7816_TXRX_TIME_Init(SCI_Struct_Type* SCIx) +{ + SCIx->SCIx7816->CTRL2.bit.BWT_ST = 1; + 1003a9c: 2280 movs r2, #128 ; 0x80 + 1003a9e: 6803 ldr r3, [r0, #0] + 1003aa0: 0492 lsls r2, r2, #18 + 1003aa2: 6ed9 ldr r1, [r3, #108] ; 0x6c + 1003aa4: 430a orrs r2, r1 + 1003aa6: 66da str r2, [r3, #108] ; 0x6c + SCIx->SCIx7816->CTRL2.bit.CWT_ST = 1; + 1003aa8: 2280 movs r2, #128 ; 0x80 + 1003aaa: 6ed9 ldr r1, [r3, #108] ; 0x6c + 1003aac: 0292 lsls r2, r2, #10 + 1003aae: 430a orrs r2, r1 + 1003ab0: 66da str r2, [r3, #108] ; 0x6c + SCIx->SCIx7816->BWT_TO.reg = SCIx->SCI_Tran_StateCB.terminal_rec_bwt; + 1003ab2: 22a4 movs r2, #164 ; 0xa4 + 1003ab4: 00d2 lsls r2, r2, #3 + 1003ab6: 5881 ldr r1, [r0, r2] + 1003ab8: 1d1a adds r2, r3, #4 + 1003aba: 67d1 str r1, [r2, #124] ; 0x7c + SCIx->SCIx7816->CWT_TO.reg = SCIx->SCI_Tran_StateCB.terminal_rec_cwt; + 1003abc: 4a05 ldr r2, [pc, #20] ; (1003ad4 ) + 1003abe: 5882 ldr r2, [r0, r2] + 1003ac0: 671a str r2, [r3, #112] ; 0x70 + SCIx->SCIx7816->BGT.reg = SCIx->SCI_Tran_StateCB.terminal_send_bgt; + 1003ac2: 4a05 ldr r2, [pc, #20] ; (1003ad8 ) + 1003ac4: 5882 ldr r2, [r0, r2] + 1003ac6: 62da str r2, [r3, #44] ; 0x2c + SCIx->SCIx7816->CWT.reg = SCIx->SCI_Tran_StateCB.terminal_send_cwt; + 1003ac8: 22a3 movs r2, #163 ; 0xa3 + 1003aca: 00d2 lsls r2, r2, #3 + 1003acc: 5882 ldr r2, [r0, r2] + 1003ace: 631a str r2, [r3, #48] ; 0x30 +} + 1003ad0: 4770 bx lr + 1003ad2: 46c0 nop ; (mov r8, r8) + 1003ad4: 0000051c .word 0x0000051c + 1003ad8: 00000524 .word 0x00000524 + +01003adc : + * @param None + * @retval None + */ +void ISO7816_Reg_Init(SCI_Struct_Type* SCIx) +{ + SCIx->SCIx7816->IE.reg = 0; + 1003adc: 2200 movs r2, #0 + SCIx->SCIx7816->IS.reg = 0XFFFFFFFF; + SCIx->SCIx7816->IES.reg = 0XFFFFFFFF; + SCIx->SCIx7816->CTRL2.bit.BWTA_ST = 1; + 1003ade: 2180 movs r1, #128 ; 0x80 + SCIx->SCIx7816->IE.reg = 0; + 1003ae0: 6803 ldr r3, [r0, #0] + SCIx->SCIx7816->CTRL2.bit.BWTA_ST = 1; + 1003ae2: 0589 lsls r1, r1, #22 + SCIx->SCIx7816->IE.reg = 0; + 1003ae4: 665a str r2, [r3, #100] ; 0x64 + SCIx->SCIx7816->IS.reg = 0XFFFFFFFF; + 1003ae6: 3a01 subs r2, #1 + 1003ae8: 661a str r2, [r3, #96] ; 0x60 + SCIx->SCIx7816->IES.reg = 0XFFFFFFFF; + 1003aea: 669a str r2, [r3, #104] ; 0x68 + SCIx->SCIx7816->CTRL2.bit.BWTA_ST = 1; + 1003aec: 6ed8 ldr r0, [r3, #108] ; 0x6c + 1003aee: 4301 orrs r1, r0 + 1003af0: 66d9 str r1, [r3, #108] ; 0x6c + SCIx->SCIx7816->CTRL2.bit.BWTA_SRT = 1; + 1003af2: 2180 movs r1, #128 ; 0x80 + 1003af4: 6ed8 ldr r0, [r3, #108] ; 0x6c + 1003af6: 0549 lsls r1, r1, #21 + 1003af8: 4301 orrs r1, r0 + 1003afa: 66d9 str r1, [r3, #108] ; 0x6c + SCIx->SCIx7816->CTRL2.bit.BWT_ST = 1; + 1003afc: 2180 movs r1, #128 ; 0x80 + 1003afe: 6ed8 ldr r0, [r3, #108] ; 0x6c + 1003b00: 0489 lsls r1, r1, #18 + 1003b02: 4301 orrs r1, r0 + 1003b04: 66d9 str r1, [r3, #108] ; 0x6c + SCIx->SCIx7816->CTRL2.bit.BWT_EN = 1; + 1003b06: 2180 movs r1, #128 ; 0x80 + 1003b08: 6ed8 ldr r0, [r3, #108] ; 0x6c + 1003b0a: 0449 lsls r1, r1, #17 + 1003b0c: 4301 orrs r1, r0 + 1003b0e: 66d9 str r1, [r3, #108] ; 0x6c + SCIx->SCIx7816->CTRL2.bit.CWTA_SRT = 1; + 1003b10: 2180 movs r1, #128 ; 0x80 + 1003b12: 6ed8 ldr r0, [r3, #108] ; 0x6c + 1003b14: 0349 lsls r1, r1, #13 + 1003b16: 4301 orrs r1, r0 + 1003b18: 66d9 str r1, [r3, #108] ; 0x6c + SCIx->SCIx7816->CTRL2.bit.CWT_ST = 1; + 1003b1a: 2180 movs r1, #128 ; 0x80 + 1003b1c: 6ed8 ldr r0, [r3, #108] ; 0x6c + 1003b1e: 0289 lsls r1, r1, #10 + 1003b20: 4301 orrs r1, r0 + 1003b22: 66d9 str r1, [r3, #108] ; 0x6c + SCIx->SCIx7816->CTRL2.bit.CWT_EN = 1; + 1003b24: 2180 movs r1, #128 ; 0x80 + 1003b26: 6ed8 ldr r0, [r3, #108] ; 0x6c + 1003b28: 0249 lsls r1, r1, #9 + 1003b2a: 4301 orrs r1, r0 + 1003b2c: 66d9 str r1, [r3, #108] ; 0x6c + SCIx->SCIx7816->CTRL2.bit.CWTC_DSA = 1; + 1003b2e: 2180 movs r1, #128 ; 0x80 + 1003b30: 6ed8 ldr r0, [r3, #108] ; 0x6c + 1003b32: 01c9 lsls r1, r1, #7 + 1003b34: 4301 orrs r1, r0 + 1003b36: 66d9 str r1, [r3, #108] ; 0x6c + SCIx->SCIx7816->CTRL2.bit.CWTS_SL = 1; + 1003b38: 2180 movs r1, #128 ; 0x80 + 1003b3a: 6ed8 ldr r0, [r3, #108] ; 0x6c + 1003b3c: 0189 lsls r1, r1, #6 + 1003b3e: 4301 orrs r1, r0 + 1003b40: 66d9 str r1, [r3, #108] ; 0x6c + SCIx->SCIx7816->CTRL2.bit.BGTS_SL = 1; + 1003b42: 2180 movs r1, #128 ; 0x80 + 1003b44: 6ed8 ldr r0, [r3, #108] ; 0x6c + 1003b46: 0149 lsls r1, r1, #5 + 1003b48: 4301 orrs r1, r0 + 1003b4a: 66d9 str r1, [r3, #108] ; 0x6c + SCIx->SCIx7816->CTRL2.bit.FST_W = 1; + 1003b4c: 2180 movs r1, #128 ; 0x80 + 1003b4e: 6ed8 ldr r0, [r3, #108] ; 0x6c + 1003b50: 00c9 lsls r1, r1, #3 + 1003b52: 4301 orrs r1, r0 + 1003b54: 66d9 str r1, [r3, #108] ; 0x6c + SCIx->SCIx7816->CTRL2.bit.FST_EN = 1; + 1003b56: 2180 movs r1, #128 ; 0x80 + 1003b58: 6ed8 ldr r0, [r3, #108] ; 0x6c + 1003b5a: 0049 lsls r1, r1, #1 + 1003b5c: 4301 orrs r1, r0 + 1003b5e: 66d9 str r1, [r3, #108] ; 0x6c + + SCIx->SCIx7816->CWT_TO.reg = 0XFFFFFFFF; + SCIx->SCIx7816->CWT_TO.reg = 0XFFFFFFFF; + SCIx->SCIx7816->BGT.reg = 0XFFFFFFFF; + SCIx->SCIx7816->CWT.reg = 0XFFFFFFFF; + SCIx->SCIx7816->FIFO_CTRL.bit.TL_WTL = 0; + 1003b60: 210f movs r1, #15 + SCIx->SCIx7816->CWT_TO.reg = 0XFFFFFFFF; + 1003b62: 671a str r2, [r3, #112] ; 0x70 + SCIx->SCIx7816->CWT_TO.reg = 0XFFFFFFFF; + 1003b64: 671a str r2, [r3, #112] ; 0x70 + SCIx->SCIx7816->BGT.reg = 0XFFFFFFFF; + 1003b66: 62da str r2, [r3, #44] ; 0x2c + SCIx->SCIx7816->CWT.reg = 0XFFFFFFFF; + 1003b68: 631a str r2, [r3, #48] ; 0x30 + SCIx->SCIx7816->FIFO_CTRL.bit.TL_WTL = 0; + 1003b6a: 338c adds r3, #140 ; 0x8c + 1003b6c: 881a ldrh r2, [r3, #0] + 1003b6e: 438a bics r2, r1 + 1003b70: 801a strh r2, [r3, #0] + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL = RX_APDU_FIFO_WATERLEVER_VAL; + 1003b72: 881a ldrh r2, [r3, #0] + 1003b74: 31e1 adds r1, #225 ; 0xe1 + 1003b76: 438a bics r2, r1 + 1003b78: 0011 movs r1, r2 + 1003b7a: 2240 movs r2, #64 ; 0x40 + 1003b7c: 430a orrs r2, r1 + 1003b7e: 801a strh r2, [r3, #0] +} + 1003b80: 4770 bx lr + ... + +01003b84 : + * @param state: rx_waterlevel + * @retval None + */ +void ISO7816_RX_APDU_Config(SCI_Struct_Type* SCIx,uint8_t rx_waterlevel) +{ + SCIx->SCI_Tran_StateCB.SCI_State = 0; + 1003b84: 2300 movs r3, #0 + 1003b86: 4a0c ldr r2, [pc, #48] ; (1003bb8 ) +{ + 1003b88: b510 push {r4, lr} + SCIx->SCI_Tran_StateCB.SCI_State = 0; + 1003b8a: 5483 strb r3, [r0, r2] + + SCIx->SCI_Tran_StateCB.SCI_RX_Result = 0; + 1003b8c: 4a0b ldr r2, [pc, #44] ; (1003bbc ) + + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &=~0x0f; + 1003b8e: 24f0 movs r4, #240 ; 0xf0 + SCIx->SCI_Tran_StateCB.SCI_RX_Result = 0; + 1003b90: 5483 strb r3, [r0, r2] + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &=~0x0f; + 1003b92: 6800 ldr r0, [r0, #0] + 1003b94: 0003 movs r3, r0 + 1003b96: 338c adds r3, #140 ; 0x8c + 1003b98: 681a ldr r2, [r3, #0] + 1003b9a: 881a ldrh r2, [r3, #0] + 1003b9c: 43a2 bics r2, r4 + 1003b9e: 801a strh r2, [r3, #0] + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL = rx_waterlevel; + 1003ba0: 220f movs r2, #15 + 1003ba2: 400a ands r2, r1 + 1003ba4: 8819 ldrh r1, [r3, #0] + 1003ba6: 0112 lsls r2, r2, #4 + 1003ba8: 43a1 bics r1, r4 + 1003baa: 4311 orrs r1, r2 + 1003bac: 8019 strh r1, [r3, #0] + SCIx->SCIx7816->CTRL2.bit.RX_EN = 1; + 1003bae: 2302 movs r3, #2 + 1003bb0: 6ec2 ldr r2, [r0, #108] ; 0x6c + 1003bb2: 4313 orrs r3, r2 + 1003bb4: 66c3 str r3, [r0, #108] ; 0x6c +} + 1003bb6: bd10 pop {r4, pc} + 1003bb8: 000002dd .word 0x000002dd + 1003bbc: 000002de .word 0x000002de + +01003bc0 : + * @param state: rx_waterlevel + * @retval None + */ +void ISO7816_TX_First_Byte_Enable(SCI_Struct_Type* SCIx) +{ + SCIx->SCIx7816->CTRL2.bit.FST_RF = 1; + 1003bc0: 2380 movs r3, #128 ; 0x80 + 1003bc2: 6802 ldr r2, [r0, #0] + 1003bc4: 009b lsls r3, r3, #2 + 1003bc6: 6ed1 ldr r1, [r2, #108] ; 0x6c + 1003bc8: 430b orrs r3, r1 + 1003bca: 66d3 str r3, [r2, #108] ; 0x6c +} + 1003bcc: 4770 bx lr + ... + +01003bd0 : + * @param None + * @retval None + */ +void ISO7816_TX_APDU_Config(SCI_Struct_Type* SCIx) +{ + SCIx->SCIx7816->CTRL2.bit.CWT_ST = 1; + 1003bd0: 2280 movs r2, #128 ; 0x80 +{ + 1003bd2: b570 push {r4, r5, r6, lr} + SCIx->SCIx7816->CTRL2.bit.CWT_ST = 1; + 1003bd4: 6803 ldr r3, [r0, #0] + 1003bd6: 0292 lsls r2, r2, #10 + 1003bd8: 6ed9 ldr r1, [r3, #108] ; 0x6c + SCIx->SCIx7816->IS.bit.CWT_TO = 1; + 1003bda: 001d movs r5, r3 + SCIx->SCIx7816->CTRL2.bit.CWT_ST = 1; + 1003bdc: 430a orrs r2, r1 + 1003bde: 66da str r2, [r3, #108] ; 0x6c + SCIx->SCIx7816->IS.bit.CWT_TO = 1; + 1003be0: 2204 movs r2, #4 + 1003be2: 3560 adds r5, #96 ; 0x60 + 1003be4: 8829 ldrh r1, [r5, #0] + 1003be6: 4311 orrs r1, r2 + 1003be8: 8029 strh r1, [r5, #0] + SCIx->SCIx7816->IES.bit.CWT_TO = 1; + 1003bea: 0019 movs r1, r3 + 1003bec: 3168 adds r1, #104 ; 0x68 + 1003bee: 880c ldrh r4, [r1, #0] + 1003bf0: 4314 orrs r4, r2 + 1003bf2: 800c strh r4, [r1, #0] + SCIx->SCIx7816->CTRL2.bit.BWT_ST = 1; + 1003bf4: 2480 movs r4, #128 ; 0x80 + 1003bf6: 6ede ldr r6, [r3, #108] ; 0x6c + 1003bf8: 04a4 lsls r4, r4, #18 + 1003bfa: 4334 orrs r4, r6 + 1003bfc: 66dc str r4, [r3, #108] ; 0x6c + SCIx->SCIx7816->IS.bit.BWT_TO = 1; + 1003bfe: 2408 movs r4, #8 + 1003c00: 882e ldrh r6, [r5, #0] + 1003c02: 4326 orrs r6, r4 + 1003c04: 802e strh r6, [r5, #0] + SCIx->SCIx7816->IES.bit.BWT_TO = 1; + 1003c06: 880d ldrh r5, [r1, #0] + 1003c08: 432c orrs r4, r5 + 1003c0a: 800c strh r4, [r1, #0] + + SCIx->SCI_Tran_StateCB.SCI_State = 1; + 1003c0c: 2101 movs r1, #1 + + SCIx->SCI_Tran_StateCB.SCI_TX_Result = 0xff; + 1003c0e: 25ff movs r5, #255 ; 0xff + SCIx->SCI_Tran_StateCB.SCI_State = 1; + 1003c10: 4c0b ldr r4, [pc, #44] ; (1003c40 ) + 1003c12: 5501 strb r1, [r0, r4] + SCIx->SCI_Tran_StateCB.SCI_TX_Result = 0xff; + 1003c14: 4c0b ldr r4, [pc, #44] ; (1003c44 ) + 1003c16: 5505 strb r5, [r0, r4] + SCIx->SCIx7816->CTRL2.bit.FST_RF = 1; + 1003c18: 2080 movs r0, #128 ; 0x80 + 1003c1a: 6edc ldr r4, [r3, #108] ; 0x6c + 1003c1c: 0080 lsls r0, r0, #2 + 1003c1e: 4320 orrs r0, r4 + 1003c20: 66d8 str r0, [r3, #108] ; 0x6c + + SCIx->SCIx7816->CTRL2.bit.TX_EN = 1; + 1003c22: 6ed8 ldr r0, [r3, #108] ; 0x6c + 1003c24: 4301 orrs r1, r0 + SCIx->SCIx7816->FIFO_CTRL.bit.TL_WTL &= ~0x0f; + 1003c26: 200f movs r0, #15 + SCIx->SCIx7816->CTRL2.bit.TX_EN = 1; + 1003c28: 66d9 str r1, [r3, #108] ; 0x6c + SCIx->SCIx7816->FIFO_CTRL.bit.TL_WTL &= ~0x0f; + 1003c2a: 338c adds r3, #140 ; 0x8c + 1003c2c: 6819 ldr r1, [r3, #0] + 1003c2e: 8819 ldrh r1, [r3, #0] + 1003c30: 4381 bics r1, r0 + 1003c32: 8019 strh r1, [r3, #0] + SCIx->SCIx7816->FIFO_CTRL.bit.TL_WTL = TX_APDU_FIFO_WATERLEVER_VAL; + 1003c34: 8819 ldrh r1, [r3, #0] + 1003c36: 4381 bics r1, r0 + 1003c38: 430a orrs r2, r1 + 1003c3a: 801a strh r2, [r3, #0] +} + 1003c3c: bd70 pop {r4, r5, r6, pc} + 1003c3e: 46c0 nop ; (mov r8, r8) + 1003c40: 000002dd .word 0x000002dd + 1003c44: 000002df .word 0x000002df + +01003c48 : + * @param None + * @retval None + */ +void ISO7816_Deactive(SCI_Struct_Type* SCIx) +{ + if(SCIx->SCIx7816 == MSCI0) + 1003c48: 4b25 ldr r3, [pc, #148] ; (1003ce0 ) + 1003c4a: 6802 ldr r2, [r0, #0] +{ + 1003c4c: b570 push {r4, r5, r6, lr} + 1003c4e: 0004 movs r4, r0 + 1003c50: 4d24 ldr r5, [pc, #144] ; (1003ce4 ) + if(SCIx->SCIx7816 == MSCI0) + 1003c52: 429a cmp r2, r3 + 1003c54: d124 bne.n 1003ca0 + { + GPIO_Config(SCI7816_RESET_PORT, SCI7816_RESET_IO_PIN, OUTPUT_LOW);//RST + 1003c56: 2180 movs r1, #128 ; 0x80 + 1003c58: 223e movs r2, #62 ; 0x3e + 1003c5a: 01c9 lsls r1, r1, #7 + 1003c5c: 2004 movs r0, #4 + 1003c5e: f7fc fff3 bl 1000c48 + delay_ms(1); + 1003c62: 2001 movs r0, #1 + 1003c64: f7fe fde6 bl 1002834 + + GPIO_Config(SCI7816_CLK_PORT, SCI7816_CLK_IO_PIN, OUTPUT_LOW);//CLK + 1003c68: 2180 movs r1, #128 ; 0x80 + 1003c6a: 223e movs r2, #62 ; 0x3e + 1003c6c: 0209 lsls r1, r1, #8 + 1003c6e: 2004 movs r0, #4 + 1003c70: f7fc ffea bl 1000c48 + TIM_Cmd(MTIM, SCI7816_PWMClK4M_TIMX, DISABLE); + 1003c74: 5d61 ldrb r1, [r4, r5] + 1003c76: 2200 movs r2, #0 + 1003c78: b2c9 uxtb r1, r1 + 1003c7a: 481b ldr r0, [pc, #108] ; (1003ce8 ) + 1003c7c: f7fe fe42 bl 1002904 + + GPIO_Config(SCI7816_DATA_PORT, SCI7816_DATA_IO_PIN, OUTPUT_LOW);//IO + 1003c80: 2180 movs r1, #128 ; 0x80 + 1003c82: 223e movs r2, #62 ; 0x3e + 1003c84: 0189 lsls r1, r1, #6 + 1003c86: 2004 movs r0, #4 + 1003c88: f7fc ffde bl 1000c48 + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_OCP_EN = 0; + 1003c8c: 2180 movs r1, #128 ; 0x80 + 1003c8e: 4b17 ldr r3, [pc, #92] ; (1003cec ) + 1003c90: 681a ldr r2, [r3, #0] + 1003c92: 438a bics r2, r1 + 1003c94: 601a str r2, [r3, #0] + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_EN = 0; + 1003c96: 681a ldr r2, [r3, #0] + 1003c98: 3940 subs r1, #64 ; 0x40 + 1003c9a: 438a bics r2, r1 + 1003c9c: 601a str r2, [r3, #0] + MyPrintf("terminal_send_bgt %08x= \r\n", SCIx->SCI_Tran_StateCB.terminal_send_bgt); + MyPrintf("terminal_send_cwt %08x= \r\n", SCIx->SCI_Tran_StateCB.terminal_send_cwt); + + MyPrintf("power down\n"); + #endif +} + 1003c9e: bd70 pop {r4, r5, r6, pc} + GPIO_Config(SCI17816_RESET_PORT, SCI17816_RESET_IO_PIN, OUTPUT_LOW);//RST + 1003ca0: 2180 movs r1, #128 ; 0x80 + 1003ca2: 223e movs r2, #62 ; 0x3e + 1003ca4: 00c9 lsls r1, r1, #3 + 1003ca6: 2004 movs r0, #4 + 1003ca8: f7fc ffce bl 1000c48 + delay_ms(1); + 1003cac: 2001 movs r0, #1 + 1003cae: f7fe fdc1 bl 1002834 + GPIO_Config(SCI17816_CLK_PORT, SCI17816_CLK_IO_PIN, OUTPUT_LOW);//CLK + 1003cb2: 223e movs r2, #62 ; 0x3e + 1003cb4: 2180 movs r1, #128 ; 0x80 + 1003cb6: 2000 movs r0, #0 + 1003cb8: f7fc ffc6 bl 1000c48 + TIM_Cmd(MTIM, SCI17816_PWMClK4M_TIMX, DISABLE); + 1003cbc: 5d61 ldrb r1, [r4, r5] + 1003cbe: 2200 movs r2, #0 + 1003cc0: b2c9 uxtb r1, r1 + 1003cc2: 4809 ldr r0, [pc, #36] ; (1003ce8 ) + 1003cc4: f7fe fe1e bl 1002904 + GPIO_Config(SCI17816_DATA_PORT, SCI17816_DATA_IO_PIN, OUTPUT_LOW);//IO + 1003cc8: 223e movs r2, #62 ; 0x3e + 1003cca: 2140 movs r1, #64 ; 0x40 + 1003ccc: 2000 movs r0, #0 + 1003cce: f7fc ffbb bl 1000c48 + GPIO_Config(SCI17816_CARD1_EN_PORT, SCI17816_CARD1_EN_IO_PIN, OUTPUT_HIGH); + 1003cd2: 2180 movs r1, #128 ; 0x80 + 1003cd4: 223f movs r2, #63 ; 0x3f + 1003cd6: 0109 lsls r1, r1, #4 + 1003cd8: 2004 movs r0, #4 + 1003cda: f7fc ffb5 bl 1000c48 +} + 1003cde: e7de b.n 1003c9e + 1003ce0: 000f0400 .word 0x000f0400 + 1003ce4: 00000543 .word 0x00000543 + 1003ce8: 000f0c00 .word 0x000f0c00 + 1003cec: 000fb200 .word 0x000fb200 + +01003cf0 : + * @brief Turn on the timer function (used to calculate the timeout of card reset) + * @param None + * @retval None + */ +void ISO7816_Atr_Timer_Start(SCI_Struct_Type* SCIx) +{ + 1003cf0: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + ISO7816_Timer_Enable(SCI7816_TIMX, SCI7816_TIMER_PERIOD); + 1003cf2: 4b0f ldr r3, [pc, #60] ; (1003d30 ) + TIM_InitStruct.Auto_Reload = ENABLE; + 1003cf4: 2601 movs r6, #1 + ISO7816_Timer_Enable(SCI7816_TIMX, SCI7816_TIMER_PERIOD); + 1003cf6: 5cc4 ldrb r4, [r0, r3] + TIM_InitStruct.period = TimerPeriod; + 1003cf8: 2301 movs r3, #1 + 1003cfa: 425b negs r3, r3 + 1003cfc: 9301 str r3, [sp, #4] + TIM_InitStruct.TIMx = Timx; + 1003cfe: 466b mov r3, sp + TIM_Init(MTIM, &TIM_InitStruct); + 1003d00: 4d0c ldr r5, [pc, #48] ; (1003d34 ) +{ + 1003d02: 0007 movs r7, r0 + ISO7816_Timer_Enable(SCI7816_TIMX, SCI7816_TIMER_PERIOD); + 1003d04: b2e4 uxtb r4, r4 + TIM_Init(MTIM, &TIM_InitStruct); + 1003d06: 0028 movs r0, r5 + 1003d08: 4669 mov r1, sp + TIM_InitStruct.Auto_Reload = ENABLE; + 1003d0a: 705e strb r6, [r3, #1] + TIM_InitStruct.TIMx = Timx; + 1003d0c: 701c strb r4, [r3, #0] + TIM_Init(MTIM, &TIM_InitStruct); + 1003d0e: f7fe fd9d bl 100284c + TIM_ModeConfig(MTIM, Timx, TIM_Mode_TIMER); + 1003d12: 0032 movs r2, r6 + 1003d14: 0028 movs r0, r5 + 1003d16: 0021 movs r1, r4 + 1003d18: f7fe fe2a bl 1002970 + TIM_Cmd(MTIM, Timx, ENABLE); + 1003d1c: 0032 movs r2, r6 + 1003d1e: 0028 movs r0, r5 + 1003d20: 0021 movs r1, r4 + 1003d22: f7fe fdef bl 1002904 + SCIx->SCI_Tran_StateCB.contact_over_time_cnt = CONTACT_OVER_TIME_VAL * 24000000; + 1003d26: 23da movs r3, #218 ; 0xda + 1003d28: 4a03 ldr r2, [pc, #12] ; (1003d38 ) + 1003d2a: 005b lsls r3, r3, #1 + 1003d2c: 50fa str r2, [r7, r3] +} + 1003d2e: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} + 1003d30: 00000542 .word 0x00000542 + 1003d34: 000f0c00 .word 0x000f0c00 + 1003d38: 044aa200 .word 0x044aa200 + +01003d3c : + * @param RxBuf: Receiving data storage unit + * @param RxLen: Length of received data + * @retval OK: 0 on success + */ +uint16_t ISO7816_RecAtrBytes(SCI_Struct_Type* SCIx,uint8_t *RxBuf, uint16_t RxLen) +{ + 1003d3c: b5f0 push {r4, r5, r6, r7, lr} + 1003d3e: b089 sub sp, #36 ; 0x24 + 1003d40: 0004 movs r4, r0 + 1003d42: 9102 str r1, [sp, #8] + 1003d44: 0015 movs r5, r2 + uint16_t val = 0; + uint8_t rx_num = 0; + + if ((!RxLen) || (NULL == RxBuf)) + { + return ISO7816_PARA_ERROR; + 1003d46: 2059 movs r0, #89 ; 0x59 + if ((!RxLen) || (NULL == RxBuf)) + 1003d48: 2a00 cmp r2, #0 + 1003d4a: d100 bne.n 1003d4e + 1003d4c: e116 b.n 1003f7c + 1003d4e: 2900 cmp r1, #0 + 1003d50: d100 bne.n 1003d54 + 1003d52: e113 b.n 1003f7c + } + + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[0] = RxLen/0x100; + 1003d54: 4fa1 ldr r7, [pc, #644] ; (1003fdc ) + 1003d56: 0a13 lsrs r3, r2, #8 + 1003d58: 55e3 strb r3, [r4, r7] + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[1] = RxLen%0x100; + 1003d5a: 23ba movs r3, #186 ; 0xba + 1003d5c: b2d1 uxtb r1, r2 + 1003d5e: 009b lsls r3, r3, #2 + 1003d60: 54e1 strb r1, [r4, r3] + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2] = 0; + 1003d62: 2300 movs r3, #0 + 1003d64: 4e9e ldr r6, [pc, #632] ; (1003fe0 ) + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3] = 0; + 1003d66: 489f ldr r0, [pc, #636] ; (1003fe4 ) + SCIx->SCI_Tran_StateCB.SCI_RX_Result = 0; + 1003d68: 4a9f ldr r2, [pc, #636] ; (1003fe8 ) + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2] = 0; + 1003d6a: 55a3 strb r3, [r4, r6] + 1003d6c: 9707 str r7, [sp, #28] + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3] = 0; + 1003d6e: 5423 strb r3, [r4, r0] + 1003d70: 9605 str r6, [sp, #20] + SCIx->SCI_Tran_StateCB.SCI_RX_Result = 0; + 1003d72: 54a3 strb r3, [r4, r2] + 1003d74: 9006 str r0, [sp, #24] + 1003d76: 9201 str r2, [sp, #4] + + if (RxLen >= 8) + 1003d78: 2d07 cmp r5, #7 + 1003d7a: d900 bls.n 1003d7e + { + waterlevel = 4; + 1003d7c: 2104 movs r1, #4 + } + else + { + waterlevel = RxLen; + } + ISO7816_RX_APDU_Config(SCIx,waterlevel); + 1003d7e: 0020 movs r0, r4 + 1003d80: f7ff ff00 bl 1003b84 + uint16_t RemainLen = 0; + 1003d84: 2300 movs r3, #0 + 1003d86: 9304 str r3, [sp, #16] + do + { + if (SCIx->SCIx7816->IS.bit.RFIFO_HA == 1) + 1003d88: 6822 ldr r2, [r4, #0] + 1003d8a: 6e13 ldr r3, [r2, #96] ; 0x60 + 1003d8c: 065b lsls r3, r3, #25 + 1003d8e: d54f bpl.n 1003e30 + { + len = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[0] * 0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[1]; + 1003d90: 9b07 ldr r3, [sp, #28] + index = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2] * 0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3]; + 1003d92: 9806 ldr r0, [sp, #24] + len = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[0] * 0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[1]; + 1003d94: 5ce1 ldrb r1, [r4, r3] + 1003d96: 23ba movs r3, #186 ; 0xba + 1003d98: 009b lsls r3, r3, #2 + 1003d9a: 5ce3 ldrb r3, [r4, r3] + 1003d9c: 0209 lsls r1, r1, #8 + 1003d9e: 18c9 adds r1, r1, r3 + index = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2] * 0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3]; + 1003da0: 9b05 ldr r3, [sp, #20] + len = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[0] * 0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[1]; + 1003da2: b289 uxth r1, r1 + index = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2] * 0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3]; + 1003da4: 5ce3 ldrb r3, [r4, r3] + 1003da6: 5c20 ldrb r0, [r4, r0] + 1003da8: 021b lsls r3, r3, #8 + 1003daa: 181b adds r3, r3, r0 + + rx_num = SCIx->SCIx7816->FIFO_CTRL.bit.R_ITEMS; + 1003dac: 0010 movs r0, r2 + 1003dae: 308c adds r0, #140 ; 0x8c + 1003db0: 6800 ldr r0, [r0, #0] + index = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2] * 0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3]; + 1003db2: b29b uxth r3, r3 + rx_num = SCIx->SCIx7816->FIFO_CTRL.bit.R_ITEMS; + 1003db4: 0400 lsls r0, r0, #16 + 1003db6: 0f00 lsrs r0, r0, #28 + if (len > index) + 1003db8: 4299 cmp r1, r3 + 1003dba: d91d bls.n 1003df8 + { + val = len - index; + 1003dbc: 1ace subs r6, r1, r3 + if (val <= rx_num) + 1003dbe: b280 uxth r0, r0 + 1003dc0: b2b6 uxth r6, r6 + 1003dc2: 9003 str r0, [sp, #12] + 1003dc4: 4286 cmp r6, r0 + 1003dc6: d911 bls.n 1003dec + 1003dc8: 001e movs r6, r3 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[4 + index++] = SCIx->SCIx7816->DATA.reg; + } + } + else + { + for (i = 0; i < rx_num; i++) + 1003dca: 1af7 subs r7, r6, r3 + 1003dcc: 9803 ldr r0, [sp, #12] + 1003dce: b2bf uxth r7, r7 + 1003dd0: 42b8 cmp r0, r7 + 1003dd2: d900 bls.n 1003dd6 + 1003dd4: e08b b.n 1003eee + 1003dd6: 181b adds r3, r3, r0 + 1003dd8: b29b uxth r3, r3 + 1003dda: e00a b.n 1003df2 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[4 + index++] = SCIx->SCIx7816->DATA.reg; + 1003ddc: 6a10 ldr r0, [r2, #32] + 1003dde: 4f83 ldr r7, [pc, #524] ; (1003fec ) + 1003de0: 1c5e adds r6, r3, #1 + 1003de2: 18e3 adds r3, r4, r3 + 1003de4: 19db adds r3, r3, r7 + 1003de6: b2c0 uxtb r0, r0 + 1003de8: 7018 strb r0, [r3, #0] + 1003dea: b2b3 uxth r3, r6 + for (i = 0; i < val; i++) + 1003dec: 4299 cmp r1, r3 + 1003dee: d1f5 bne.n 1003ddc + 1003df0: 000b movs r3, r1 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[4 + index++] = SCIx->SCIx7816->DATA.reg; + } + } + } + + if (index >= len) + 1003df2: 4299 cmp r1, r3 + 1003df4: d900 bls.n 1003df8 + 1003df6: e085 b.n 1003f04 + { + SCIx->SCI_Tran_StateCB.SCI_RX_Result = 1; //rec finsh + 1003df8: 2101 movs r1, #1 + 1003dfa: 9801 ldr r0, [sp, #4] + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &= ~0x0f; + 1003dfc: 26f0 movs r6, #240 ; 0xf0 + SCIx->SCI_Tran_StateCB.SCI_RX_Result = 1; //rec finsh + 1003dfe: 5421 strb r1, [r4, r0] + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &= ~0x0f; + 1003e00: 0011 movs r1, r2 + 1003e02: 318c adds r1, #140 ; 0x8c + 1003e04: 6808 ldr r0, [r1, #0] + 1003e06: 8808 ldrh r0, [r1, #0] + 1003e08: 43b0 bics r0, r6 + 1003e0a: 8008 strh r0, [r1, #0] + SCIx->SCIx7816->IS.bit.RFIFO_HA = 1; + 1003e0c: 0010 movs r0, r2 + 1003e0e: 3060 adds r0, #96 ; 0x60 + 1003e10: 8801 ldrh r1, [r0, #0] + 1003e12: 3eb0 subs r6, #176 ; 0xb0 + 1003e14: 4331 orrs r1, r6 + } + else if (((len - index) > 0) && ((len - index) < 4)) + { + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &= ~0x0f; + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL = (len - index); + 1003e16: 8001 strh r1, [r0, #0] + } + + SCIx->SCIx7816->IS.bit.RFIFO_HA = 1; + 1003e18: 0010 movs r0, r2 + 1003e1a: 2640 movs r6, #64 ; 0x40 + 1003e1c: 3060 adds r0, #96 ; 0x60 + 1003e1e: 8801 ldrh r1, [r0, #0] + 1003e20: 4331 orrs r1, r6 + 1003e22: 8001 strh r1, [r0, #0] + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2] = index / 0x100; + 1003e24: 9805 ldr r0, [sp, #20] + 1003e26: 0a19 lsrs r1, r3, #8 + 1003e28: 5421 strb r1, [r4, r0] + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3] = index % 0x100; + 1003e2a: 9906 ldr r1, [sp, #24] + 1003e2c: b2db uxtb r3, r3 + 1003e2e: 5463 strb r3, [r4, r1] + } + + + if ((SCIx->SCIx7816->IS.bit.CWT_TO == 1) || (SCIx->SCIx7816->IS.bit.BWT_TO == 1)) + 1003e30: 6e13 ldr r3, [r2, #96] ; 0x60 + 1003e32: 075b lsls r3, r3, #29 + 1003e34: d402 bmi.n 1003e3c + 1003e36: 6e13 ldr r3, [r2, #96] ; 0x60 + 1003e38: 071b lsls r3, r3, #28 + 1003e3a: d50c bpl.n 1003e56 + { + SCIx->SCI_Tran_StateCB.SCI_RX_Result = ISO7816_REC_TIMEOUT; + 1003e3c: 235a movs r3, #90 ; 0x5a + 1003e3e: 9901 ldr r1, [sp, #4] + 1003e40: 5463 strb r3, [r4, r1] + SCIx->SCIx7816->IS.bit.CWT_TO = 1; + 1003e42: 0013 movs r3, r2 + 1003e44: 2104 movs r1, #4 + 1003e46: 3360 adds r3, #96 ; 0x60 + 1003e48: 8818 ldrh r0, [r3, #0] + 1003e4a: 4301 orrs r1, r0 + 1003e4c: 8019 strh r1, [r3, #0] + SCIx->SCIx7816->IS.bit.BWT_TO = 1; + 1003e4e: 2108 movs r1, #8 + 1003e50: 8818 ldrh r0, [r3, #0] + 1003e52: 4301 orrs r1, r0 + 1003e54: 8019 strh r1, [r3, #0] + + } + if ((SCIx->SCIx7816->IS.bit.R_ERR == 1) && (SCIx->SCI_Tran_StateCB.Card_Type == 0)) + 1003e56: 6e13 ldr r3, [r2, #96] ; 0x60 + 1003e58: 079b lsls r3, r3, #30 + 1003e5a: d50d bpl.n 1003e78 + 1003e5c: 23b8 movs r3, #184 ; 0xb8 + 1003e5e: 009b lsls r3, r3, #2 + 1003e60: 5ce3 ldrb r3, [r4, r3] + 1003e62: 2b00 cmp r3, #0 + 1003e64: d108 bne.n 1003e78 + { + SCIx->SCI_Tran_StateCB.SCI_RX_Result = ISO7816_ERR_NUM_OVER; + 1003e66: 9901 ldr r1, [sp, #4] + 1003e68: 335c adds r3, #92 ; 0x5c + 1003e6a: 5463 strb r3, [r4, r1] + SCIx->SCIx7816->IS.bit.R_ERR = 1; + 1003e6c: 0011 movs r1, r2 + 1003e6e: 3160 adds r1, #96 ; 0x60 + 1003e70: 8808 ldrh r0, [r1, #0] + 1003e72: 3b5a subs r3, #90 ; 0x5a + 1003e74: 4303 orrs r3, r0 + 1003e76: 800b strh r3, [r1, #0] + } + if ((SCIx->SCIx7816->IS.bit.R_ERR == 1) && (SCIx->SCI_Tran_StateCB.Card_Type == 1)) + 1003e78: 6e13 ldr r3, [r2, #96] ; 0x60 + 1003e7a: 079b lsls r3, r3, #30 + 1003e7c: d50d bpl.n 1003e9a + 1003e7e: 23b8 movs r3, #184 ; 0xb8 + 1003e80: 009b lsls r3, r3, #2 + 1003e82: 5ce3 ldrb r3, [r4, r3] + 1003e84: b2db uxtb r3, r3 + 1003e86: 2b01 cmp r3, #1 + 1003e88: d107 bne.n 1003e9a + { + SCIx->SCI_Tran_StateCB.T1_parity_flag = 1; + 1003e8a: 4959 ldr r1, [pc, #356] ; (1003ff0 ) + 1003e8c: 5463 strb r3, [r4, r1] + SCIx->SCIx7816->IS.bit.R_ERR = 1; + 1003e8e: 0011 movs r1, r2 + 1003e90: 3160 adds r1, #96 ; 0x60 + 1003e92: 8808 ldrh r0, [r1, #0] + 1003e94: 3301 adds r3, #1 + 1003e96: 4303 orrs r3, r0 + 1003e98: 800b strh r3, [r1, #0] + } + if (SCIx->SCIx7816->IS.bit.RFIFO_OVF == 1) + 1003e9a: 6e13 ldr r3, [r2, #96] ; 0x60 + 1003e9c: 05db lsls r3, r3, #23 + 1003e9e: d508 bpl.n 1003eb2 + { +#ifdef DEBUG_7816_FPGA + MyPrintf("sci isr %08x \r\n", SCIx->SCIx7816->IS.reg); +#endif + SCIx->SCI_Tran_StateCB.SCI_RX_Result = ISO7816_ERR_NUM_OVER; + 1003ea0: 235c movs r3, #92 ; 0x5c + 1003ea2: 9901 ldr r1, [sp, #4] + 1003ea4: 5463 strb r3, [r4, r1] + + SCIx->SCIx7816->IS.bit.RFIFO_OVF = 1; + 1003ea6: 0011 movs r1, r2 + 1003ea8: 3160 adds r1, #96 ; 0x60 + 1003eaa: 8808 ldrh r0, [r1, #0] + 1003eac: 33a4 adds r3, #164 ; 0xa4 + 1003eae: 4303 orrs r3, r0 + 1003eb0: 800b strh r3, [r1, #0] + } + if ((SCIx->SCIx7816->IS.bit.TFIFO_OVF == 1) | (SCIx->SCIx7816->IS.bit.TFIFO_LA == 1) \ + 1003eb2: 6e11 ldr r1, [r2, #96] ; 0x60 + 1003eb4: 6e13 ldr r3, [r2, #96] ; 0x60 + 1003eb6: 0589 lsls r1, r1, #22 + 1003eb8: 061b lsls r3, r3, #24 + 1003eba: 430b orrs r3, r1 + | (SCIx->SCIx7816->IS.bit.T_ERR == 1) | (SCIx->SCIx7816->IS.bit.T_DONE == 1)) + 1003ebc: 6e10 ldr r0, [r2, #96] ; 0x60 + 1003ebe: 6e11 ldr r1, [r2, #96] ; 0x60 + 1003ec0: 0680 lsls r0, r0, #26 + 1003ec2: 06c9 lsls r1, r1, #27 + 1003ec4: 0fc9 lsrs r1, r1, #31 + if ((SCIx->SCIx7816->IS.bit.TFIFO_OVF == 1) | (SCIx->SCIx7816->IS.bit.TFIFO_LA == 1) \ + 1003ec6: 4303 orrs r3, r0 + 1003ec8: d401 bmi.n 1003ece + 1003eca: 2900 cmp r1, #0 + 1003ecc: d009 beq.n 1003ee2 + MyPrintf("irq_sci isr= %08x \r\n", SCIx->SCIx7816->IS.reg); + MyPrintf("irq_sci iesr= %08x \r\n", SCIx->SCIx7816->IE.reg); + MyPrintf("irq_sci iesr= %08x \r\n", SCIx->SCIx7816->IES.reg); + MyPrintf("irq_sci ctrl2= %08x \r\n", SCIx->SCIx7816->CTRL2.reg); +#endif + SCIx->SCIx7816->FIFO_CTRL.bit.TL_WTL &= ~0x0f; + 1003ece: 0013 movs r3, r2 + 1003ed0: 200f movs r0, #15 + 1003ed2: 338c adds r3, #140 ; 0x8c + 1003ed4: 6819 ldr r1, [r3, #0] + 1003ed6: 8819 ldrh r1, [r3, #0] + 1003ed8: 4381 bics r1, r0 + 1003eda: 8019 strh r1, [r3, #0] + SCIx->SCIx7816->IS.reg = 0XFFFFFFFF; + 1003edc: 2301 movs r3, #1 + 1003ede: 425b negs r3, r3 + 1003ee0: 6613 str r3, [r2, #96] ; 0x60 + } + if (SCIx->SCI_Tran_StateCB.SCI_RX_Result == 1) + 1003ee2: 9b01 ldr r3, [sp, #4] + 1003ee4: 5ce3 ldrb r3, [r4, r3] + 1003ee6: 2b01 cmp r3, #1 + 1003ee8: d142 bne.n 1003f70 + 1003eea: 2300 movs r3, #0 + 1003eec: e024 b.n 1003f38 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[4 + index++] = SCIx->SCIx7816->DATA.reg; + 1003eee: 1c70 adds r0, r6, #1 + 1003ef0: 4684 mov ip, r0 + 1003ef2: 483e ldr r0, [pc, #248] ; (1003fec ) + 1003ef4: 19a6 adds r6, r4, r6 + 1003ef6: 1836 adds r6, r6, r0 + 1003ef8: 4660 mov r0, ip + 1003efa: 6a17 ldr r7, [r2, #32] + 1003efc: b2ff uxtb r7, r7 + 1003efe: 7037 strb r7, [r6, #0] + 1003f00: b286 uxth r6, r0 + 1003f02: e762 b.n 1003dca + else if (((len - index) > 0) && ((len - index) < 4)) + 1003f04: 1ac9 subs r1, r1, r3 + 1003f06: 1e48 subs r0, r1, #1 + 1003f08: 2802 cmp r0, #2 + 1003f0a: d900 bls.n 1003f0e + 1003f0c: e784 b.n 1003e18 + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &= ~0x0f; + 1003f0e: 0010 movs r0, r2 + 1003f10: 308c adds r0, #140 ; 0x8c + 1003f12: 6806 ldr r6, [r0, #0] + 1003f14: 26f0 movs r6, #240 ; 0xf0 + 1003f16: 8807 ldrh r7, [r0, #0] + 1003f18: 43b7 bics r7, r6 + 1003f1a: 8007 strh r7, [r0, #0] + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL = (len - index); + 1003f1c: 270f movs r7, #15 + 1003f1e: 4039 ands r1, r7 + 1003f20: 8807 ldrh r7, [r0, #0] + 1003f22: 0109 lsls r1, r1, #4 + 1003f24: 43b7 bics r7, r6 + 1003f26: 4339 orrs r1, r7 + 1003f28: e775 b.n 1003e16 + { + for (i=0; iSCI_Tran_StateCB.SCI_RX_Buf[4+i]; + 1003f2a: 4930 ldr r1, [pc, #192] ; (1003fec ) + 1003f2c: 18e2 adds r2, r4, r3 + 1003f2e: 1852 adds r2, r2, r1 + 1003f30: 7812 ldrb r2, [r2, #0] + 1003f32: 9902 ldr r1, [sp, #8] + 1003f34: 54ca strb r2, [r1, r3] + 1003f36: 3301 adds r3, #1 + for (i=0; i + 1003f3e: 9b02 ldr r3, [sp, #8] + 1003f40: 9504 str r5, [sp, #16] + 1003f42: 195b adds r3, r3, r5 + 1003f44: 9302 str r3, [sp, #8] + else if (SCIx->SCI_Tran_StateCB.SCI_RX_Result > 1) + { + return SCIx->SCI_Tran_StateCB.SCI_RX_Result; + } + + if (ISO7816_Detect_Io_State() == SCIx->SCI_Tran_StateCB.Sci_Pin_Detect_State) + 1003f46: f7ff fd63 bl 1003a10 + 1003f4a: 23b7 movs r3, #183 ; 0xb7 + 1003f4c: 009b lsls r3, r3, #2 + 1003f4e: 5ce3 ldrb r3, [r4, r3] + 1003f50: 4298 cmp r0, r3 + 1003f52: d040 beq.n 1003fd6 + { + return ISO7816_CARD_ABSENT; + } + + if (SCIx->SCI_Tran_StateCB.contact_atr_rfb_overtime_falg == 0) + 1003f54: 4b27 ldr r3, [pc, #156] ; (1003ff4 ) + 1003f56: 5ce3 ldrb r3, [r4, r3] + 1003f58: 2b00 cmp r3, #0 + 1003f5a: d011 beq.n 1003f80 + #endif + return ISO7816_REC_TIMEOUT; + } + } + + if (SCIx->SCI_Tran_StateCB.contact_atr_rab_overtime_falg == 0) + 1003f5c: 4b26 ldr r3, [pc, #152] ; (1003ff8 ) + 1003f5e: 5ce3 ldrb r3, [r4, r3] + 1003f60: 2b00 cmp r3, #0 + 1003f62: d023 beq.n 1003fac + #endif + return ISO7816_REC_TIMEOUT; + } + } + } + while (RemainLen < RxLen); + 1003f64: 9b04 ldr r3, [sp, #16] + 1003f66: 429d cmp r5, r3 + 1003f68: d900 bls.n 1003f6c + 1003f6a: e70d b.n 1003d88 + + return OK; + 1003f6c: 2000 movs r0, #0 + 1003f6e: e005 b.n 1003f7c + else if (SCIx->SCI_Tran_StateCB.SCI_RX_Result > 1) + 1003f70: 9b01 ldr r3, [sp, #4] + 1003f72: 5ce3 ldrb r3, [r4, r3] + 1003f74: 2b01 cmp r3, #1 + 1003f76: d9e6 bls.n 1003f46 + return SCIx->SCI_Tran_StateCB.SCI_RX_Result; + 1003f78: 9b01 ldr r3, [sp, #4] + 1003f7a: 5ce0 ldrb r0, [r4, r3] +} + 1003f7c: b009 add sp, #36 ; 0x24 + 1003f7e: bdf0 pop {r4, r5, r6, r7, pc} + SCIx->SCI_Tran_StateCB.time3_cnt_new = SCI7816_TIMX_CNT; + 1003f80: 4b1e ldr r3, [pc, #120] ; (1003ffc ) + 1003f82: 4a1f ldr r2, [pc, #124] ; (1004000 ) + 1003f84: 5ce3 ldrb r3, [r4, r3] + 1003f86: 3314 adds r3, #20 + 1003f88: 009b lsls r3, r3, #2 + 1003f8a: 589a ldr r2, [r3, r2] + 1003f8c: 4b1d ldr r3, [pc, #116] ; (1004004 ) + 1003f8e: 50e2 str r2, [r4, r3] + SCIx->SCI_Tran_StateCB.time3_cnt_new = SCIx->SCI_Tran_StateCB.time3_cnt_last - SCIx->SCI_Tran_StateCB.time3_cnt_new; + 1003f90: 22a7 movs r2, #167 ; 0xa7 + 1003f92: 00d2 lsls r2, r2, #3 + 1003f94: 58a2 ldr r2, [r4, r2] + 1003f96: 58e1 ldr r1, [r4, r3] + 1003f98: 1a52 subs r2, r2, r1 + 1003f9a: 50e2 str r2, [r4, r3] + if (SCIx->SCI_Tran_StateCB.time3_cnt_new >= CONTACT_ATR_RFB_TIME_CNT) //icc not response atr + 1003f9c: 58e2 ldr r2, [r4, r3] + 1003f9e: 23d6 movs r3, #214 ; 0xd6 + 1003fa0: 005b lsls r3, r3, #1 + 1003fa2: 58e3 ldr r3, [r4, r3] + 1003fa4: 429a cmp r2, r3 + 1003fa6: d3d9 bcc.n 1003f5c + return ISO7816_REC_TIMEOUT; + 1003fa8: 205a movs r0, #90 ; 0x5a + 1003faa: e7e7 b.n 1003f7c + SCIx->SCI_Tran_StateCB.time3_cnt_new = SCI7816_TIMX_CNT; + 1003fac: 4b13 ldr r3, [pc, #76] ; (1003ffc ) + 1003fae: 4a14 ldr r2, [pc, #80] ; (1004000 ) + 1003fb0: 5ce3 ldrb r3, [r4, r3] + 1003fb2: 3314 adds r3, #20 + 1003fb4: 009b lsls r3, r3, #2 + 1003fb6: 589a ldr r2, [r3, r2] + 1003fb8: 4b12 ldr r3, [pc, #72] ; (1004004 ) + 1003fba: 50e2 str r2, [r4, r3] + SCIx->SCI_Tran_StateCB.time3_cnt_new = SCIx->SCI_Tran_StateCB.time3_cnt_last - SCIx->SCI_Tran_StateCB.time3_cnt_new; + 1003fbc: 22a7 movs r2, #167 ; 0xa7 + 1003fbe: 00d2 lsls r2, r2, #3 + 1003fc0: 58a2 ldr r2, [r4, r2] + 1003fc2: 58e1 ldr r1, [r4, r3] + 1003fc4: 1a52 subs r2, r2, r1 + 1003fc6: 50e2 str r2, [r4, r3] + if (SCIx->SCI_Tran_StateCB.time3_cnt_new >= CONTACT_ATR_RAB_TIME_CNT) //icc response atr overtime + 1003fc8: 58e2 ldr r2, [r4, r3] + 1003fca: 23d8 movs r3, #216 ; 0xd8 + 1003fcc: 005b lsls r3, r3, #1 + 1003fce: 58e3 ldr r3, [r4, r3] + 1003fd0: 429a cmp r2, r3 + 1003fd2: d3c7 bcc.n 1003f64 + 1003fd4: e7e8 b.n 1003fa8 + return ISO7816_CARD_ABSENT; + 1003fd6: 2062 movs r0, #98 ; 0x62 + 1003fd8: e7d0 b.n 1003f7c + 1003fda: 46c0 nop ; (mov r8, r8) + 1003fdc: 000002e7 .word 0x000002e7 + 1003fe0: 000002e9 .word 0x000002e9 + 1003fe4: 000002ea .word 0x000002ea + 1003fe8: 000002de .word 0x000002de + 1003fec: 000002eb .word 0x000002eb + 1003ff0: 000002e1 .word 0x000002e1 + 1003ff4: 000002e5 .word 0x000002e5 + 1003ff8: 000002e6 .word 0x000002e6 + 1003ffc: 00000542 .word 0x00000542 + 1004000: 000f0c00 .word 0x000f0c00 + 1004004: 0000053c .word 0x0000053c + +01004008 : + * @brief 7816 cold reset function + * @param state: VCard voltage setting + * @retval OK: 0 on success + */ +uint8_t ISO7816_Cold_Reset(SCI_Struct_Type* SCIx) +{ + 1004008: b5f0 push {r4, r5, r6, r7, lr} + 100400a: 0007 movs r7, r0 + 100400c: b099 sub sp, #100 ; 0x64 + uint8_t TempChar; + uint16_t fi_table_1[16] = {372, 372, 558, 744, 1116, 1488, 1860, 0, + 100400e: 2220 movs r2, #32 + 1004010: 49dc ldr r1, [pc, #880] ; (1004384 ) + 1004012: a808 add r0, sp, #32 + 1004014: f002 fa08 bl 1006428 + 0, 512, 768, 1024, 1536, 2048, 0, 0 + }; + uint16_t di_table_1[16] = {0, 1, 2, 4, 8, 16, 32, 64, + 1004018: 2220 movs r2, #32 + 100401a: 49db ldr r1, [pc, #876] ; (1004388 ) + 100401c: a810 add r0, sp, #64 ; 0x40 + 100401e: f002 fa03 bl 1006428 + +#ifdef DEBUG_7816 + MyPrintf("sci7816 cold reset\n"); +#endif + + memcpy(SCIx->SCI_Tran_StateCB.fi_table, fi_table_1, 16); + 1004022: 0038 movs r0, r7 + 1004024: 3069 adds r0, #105 ; 0x69 + 1004026: 2210 movs r2, #16 + 1004028: a908 add r1, sp, #32 + 100402a: 30ff adds r0, #255 ; 0xff + 100402c: f002 f9fc bl 1006428 + memcpy(SCIx->SCI_Tran_StateCB.di_table, di_table_1, 16); + 1004030: 0038 movs r0, r7 + 1004032: 3089 adds r0, #137 ; 0x89 + 1004034: 2210 movs r2, #16 + 1004036: a910 add r1, sp, #64 ; 0x40 + 1004038: 30ff adds r0, #255 ; 0xff + 100403a: f002 f9f5 bl 1006428 + + SCIx->SCI_Tran_StateCB.terminal_send_cwt = 20; + 100403e: 23a3 movs r3, #163 ; 0xa3 + 1004040: 2214 movs r2, #20 + 1004042: 00db lsls r3, r3, #3 + 1004044: 50fa str r2, [r7, r3] + SCIx->SCI_Tran_StateCB.terminal_rec_cwt = 10086; //当atr第一个字节在10080个etu回复时，6个dummy + 1004046: 4bd1 ldr r3, [pc, #836] ; (100438c ) + 1004048: 4ad1 ldr r2, [pc, #836] ; (1004390 ) + SCIx->g_7816Para.bTA2 = 0xFF; + SCIx->g_7816Para.bTA2Flag = 0; + SCIx->g_7816Para.bFlag = 0; + + SCIx->SCI_Tran_StateCB.contact_atr_reset_l_flag = 0; + SCIx->SCI_Tran_StateCB.contact_atr_rfb_overtime_falg = 0; + 100404a: 49d2 ldr r1, [pc, #840] ; (1004394 ) + SCIx->SCI_Tran_StateCB.terminal_rec_cwt = 10086; //当atr第一个字节在10080个etu回复时，6个dummy + 100404c: 50fa str r2, [r7, r3] + SCIx->SCI_Tran_StateCB.terminal_rec_bwt = 15380; + 100404e: 4ad2 ldr r2, [pc, #840] ; (1004398 ) + 1004050: 3304 adds r3, #4 + 1004052: 50fa str r2, [r7, r3] + SCIx->SCI_Tran_StateCB.terminal_send_bgt = 26; + 1004054: 221a movs r2, #26 + 1004056: 4bd1 ldr r3, [pc, #836] ; (100439c ) + SCIx->SCI_Tran_StateCB.contact_atr_rab_overtime_falg = 0; + + SCIx->SCI_Tran_StateCB.atr_cwt_valid_flag = 0; + 1004058: 48d1 ldr r0, [pc, #836] ; (10043a0 ) + SCIx->SCI_Tran_StateCB.terminal_send_bgt = 26; + 100405a: 50fa str r2, [r7, r3] + SCIx->g_7816Para.bFlag = 0; + 100405c: 4bd1 ldr r3, [pc, #836] ; (10043a4 ) + SCIx->SCI_Tran_StateCB.contact_atr_reset_l_flag = 0; + 100405e: 22b9 movs r2, #185 ; 0xb9 + SCIx->g_7816Para.bFlag = 0; + 1004060: 627b str r3, [r7, #36] ; 0x24 + SCIx->SCI_Tran_StateCB.contact_atr_reset_l_flag = 0; + 1004062: 2300 movs r3, #0 + 1004064: 0092 lsls r2, r2, #2 + 1004066: 54bb strb r3, [r7, r2] + SCIx->SCI_Tran_StateCB.contact_atr_rab_overtime_falg = 0; + 1004068: 4acf ldr r2, [pc, #828] ; (10043a8 ) + SCIx->SCI_Tran_StateCB.contact_atr_rfb_overtime_falg = 0; + 100406a: 547b strb r3, [r7, r1] + SCIx->SCI_Tran_StateCB.contact_atr_rab_overtime_falg = 0; + 100406c: 54bb strb r3, [r7, r2] + SCIx->SCI_Tran_StateCB.atr_cwt_valid_flag = 0; + 100406e: 543b strb r3, [r7, r0] + 1004070: 9203 str r2, [sp, #12] + + if(SCIx->SCIx7816 == MSCI0) + 1004072: 683b ldr r3, [r7, #0] + 1004074: 4acd ldr r2, [pc, #820] ; (10043ac ) + 1004076: 4ece ldr r6, [pc, #824] ; (10043b0 ) + 1004078: 9102 str r1, [sp, #8] + { + MRSTGEN->RESET.bit.RESET = 0xab; //oxf857c，此寄存器是YSCTRL_RESET，写入oxab，触发sci0复位 + 100407a: 7a11 ldrb r1, [r2, #8] + 100407c: 2155 movs r1, #85 ; 0x55 + if(SCIx->SCIx7816 == MSCI0) + 100407e: 42b3 cmp r3, r6 + 1004080: d000 beq.n 1004084 + } + else + { + MRSTGEN->RESET.bit.RESET = 0xae; //oxf857c，此寄存器是YSCTRL_RESET，写入oxae，触发sci1复位 + 1004082: 2152 movs r1, #82 ; 0x52 + 1004084: 4249 negs r1, r1 + 1004086: 7211 strb r1, [r2, #8] + } + + SCIx->SCIx7816->CTRL.bit.RFIFO_CL = 1; + 1004088: 2201 movs r2, #1 + 100408a: 7a19 ldrb r1, [r3, #8] + 100408c: 430a orrs r2, r1 + 100408e: 721a strb r2, [r3, #8] + SCIx->SCIx7816->CTRL.bit.TFIFO_CL = 1; + 1004090: 2202 movs r2, #2 + 1004092: 7a19 ldrb r1, [r3, #8] + 1004094: 430a orrs r2, r1 + 1004096: 721a strb r2, [r3, #8] + + if(SCIx->SCIx7816 == MSCI0) + 1004098: 42b3 cmp r3, r6 + 100409a: d000 beq.n 100409e + 100409c: e0fe b.n 100429c + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_OCP_EN = 0; + 100409e: 2180 movs r1, #128 ; 0x80 + 10040a0: 4bc4 ldr r3, [pc, #784] ; (10043b4 ) + 10040a2: 681a ldr r2, [r3, #0] + 10040a4: 438a bics r2, r1 + 10040a6: 601a str r2, [r3, #0] + ANA_LDO_CLK->LDO_CTRL.bit.LDO_CARD_EN = 0; + 10040a8: 681a ldr r2, [r3, #0] + 10040aa: 3940 subs r1, #64 ; 0x40 + 10040ac: 438a bics r2, r1 + 10040ae: 601a str r2, [r3, #0] + if(SCIx->SCIx7816 == MSCI0) + 10040b0: 683b ldr r3, [r7, #0] + GPIO_Config(SCI7816_CLK_PORT, SCI7816_CLK_IO_PIN, OUTPUT_LOW); //clk + 10040b2: 223e movs r2, #62 ; 0x3e + 10040b4: 2180 movs r1, #128 ; 0x80 + if(SCIx->SCIx7816 == MSCI0) + 10040b6: 42b3 cmp r3, r6 + 10040b8: d000 beq.n 10040bc + 10040ba: e0f6 b.n 10042aa + GPIO_Config(SCI7816_CLK_PORT, SCI7816_CLK_IO_PIN, OUTPUT_LOW); //clk + 10040bc: 0209 lsls r1, r1, #8 + 10040be: 2004 movs r0, #4 + 10040c0: f7fc fdc2 bl 1000c48 + GPIO_Config(SCI7816_RESET_PORT, SCI7816_RESET_IO_PIN, OUTPUT_LOW); //reset + 10040c4: 2180 movs r1, #128 ; 0x80 + 10040c6: 223e movs r2, #62 ; 0x3e + 10040c8: 01c9 lsls r1, r1, #7 + 10040ca: 2004 movs r0, #4 + 10040cc: f7fc fdbc bl 1000c48 + GPIO_Config(SCI7816_DATA_PORT, SCI7816_DATA_IO_PIN, OUTPUT_LOW); //io + 10040d0: 2180 movs r1, #128 ; 0x80 + 10040d2: 223e movs r2, #62 ; 0x3e + 10040d4: 2004 movs r0, #4 + 10040d6: 0189 lsls r1, r1, #6 + GPIO_Config(SCI17816_DATA_PORT, SCI17816_DATA_IO_PIN, OUTPUT_LOW); //io + 10040d8: f7fc fdb6 bl 1000c48 + GPIO_Config(SCI17816_CARD1_EN_PORT, SCI17816_CARD1_EN_IO_PIN, OUTPUT_HIGH); //CARD1 供电 + } + + ISO7816_Gpio_Reset(SCIx); + + if(SCIx->SCIx7816 == MSCI0) + 10040dc: 683b ldr r3, [r7, #0] + 10040de: 42b3 cmp r3, r6 + 10040e0: d000 beq.n 10040e4 + 10040e2: e0ef b.n 10042c4 + { + ISO7816_Vcard_Control(ISO7816_VCC_3V); //CARD0 VCC + 10040e4: 2002 movs r0, #2 + 10040e6: f7ff fc99 bl 1003a1c + { + GPIO_Config(SCI17816_CARD1_EN_PORT, SCI17816_CARD1_EN_IO_PIN, OUTPUT_LOW); //CARD1 VCC + } + + + delay_ms(10); + 10040ea: 200a movs r0, #10 + 10040ec: f7fe fba2 bl 1002834 + + ISO7816_Reg_Init(SCIx); + 10040f0: 0038 movs r0, r7 + 10040f2: f7ff fcf3 bl 1003adc + uint32_t PllClockFreq = SYSCTRL_GetClocksFreq(PCLK_FRE); + 10040f6: 200a movs r0, #10 + 10040f8: f7fe f82c bl 1002154 + 10040fc: 4dae ldr r5, [pc, #696] ; (10043b8 ) + if(SCIx->SCIx7816 == MSCI0) + 10040fe: 683b ldr r3, [r7, #0] + uint32_t PllClockFreq = SYSCTRL_GetClocksFreq(PCLK_FRE); + 1004100: 0004 movs r4, r0 + HighLevelPeriod = ((PllClockFreq/SCI7816_PWM4M_PERIOD)- 1); + 1004102: 5979 ldr r1, [r7, r5] + if(SCIx->SCIx7816 == MSCI0) + 1004104: 42b3 cmp r3, r6 + 1004106: d000 beq.n 100410a + 1004108: e0e3 b.n 10042d2 + HighLevelPeriod = ((PllClockFreq/SCI7816_PWM4M_PERIOD)- 1); + 100410a: f002 fa33 bl 1006574 <__udivsi3> + 100410e: 0003 movs r3, r0 + 1004110: 9000 str r0, [sp, #0] + 1004112: 3b01 subs r3, #1 + if((PllClockFreq % SCI7816_PWM4M_PERIOD) != 0) + 1004114: 5979 ldr r1, [r7, r5] + 1004116: 0020 movs r0, r4 + HighLevelPeriod = ((PllClockFreq/SCI7816_PWM4M_PERIOD)- 1); + 1004118: 9301 str r3, [sp, #4] + if((PllClockFreq % SCI7816_PWM4M_PERIOD) != 0) + 100411a: f002 fab1 bl 1006680 <__aeabi_uidivmod> + 100411e: 2900 cmp r1, #0 + 1004120: d101 bne.n 1004126 + HighLevelPeriod = ((PllClockFreq/SCI7816_PWM4M_PERIOD)- 1); + 1004122: 9b01 ldr r3, [sp, #4] + 1004124: 9300 str r3, [sp, #0] + PWM_InitStruct.StartLevel = HIGH_LEVEL; + 1004126: 2401 movs r4, #1 + PWM_InitStruct.HighLevelPeriod = HighLevelPeriod; + 1004128: 9b00 ldr r3, [sp, #0] + PWM_InitStruct.TIMx = SCI7816_PWMClK4M_TIMX; + 100412a: 4da4 ldr r5, [pc, #656] ; (10043bc ) + PWM_InitStruct.HighLevelPeriod = HighLevelPeriod; + 100412c: 9306 str r3, [sp, #24] + PWM_InitStruct.LowLevelPeriod = LowLevelPeriod ; + 100412e: 9b01 ldr r3, [sp, #4] + PWM_InitStruct.TIMx = SCI7816_PWMClK4M_TIMX; + 1004130: aa04 add r2, sp, #16 + PWM_InitStruct.LowLevelPeriod = LowLevelPeriod ; + 1004132: 9305 str r3, [sp, #20] + PWM_InitStruct.StartLevel = HIGH_LEVEL; + 1004134: ab04 add r3, sp, #16 + 1004136: 731c strb r4, [r3, #12] + PWM_InitStruct.TIMx = SCI7816_PWMClK4M_TIMX; + 1004138: 5d7b ldrb r3, [r7, r5] + TIM_PWMInit(MTIM, &PWM_InitStruct); + 100413a: 0011 movs r1, r2 + 100413c: 48a0 ldr r0, [pc, #640] ; (10043c0 ) + PWM_InitStruct.TIMx = SCI7816_PWMClK4M_TIMX; + 100413e: 7013 strb r3, [r2, #0] + TIM_PWMInit(MTIM, &PWM_InitStruct); + 1004140: f7fe fc6e bl 1002a20 + TIM_ModeConfig(MTIM, SCI7816_PWMClK4M_TIMX, TIM_Mode_PWM); + 1004144: 5d79 ldrb r1, [r7, r5] + 1004146: 2200 movs r2, #0 + 1004148: b2c9 uxtb r1, r1 + 100414a: 489d ldr r0, [pc, #628] ; (10043c0 ) + 100414c: f7fe fc10 bl 1002970 + TIM_Cmd(MTIM, SCI7816_PWMClK4M_TIMX, ENABLE); + 1004150: 5d79 ldrb r1, [r7, r5] + 1004152: 0022 movs r2, r4 + 1004154: b2c9 uxtb r1, r1 + 1004156: 489a ldr r0, [pc, #616] ; (10043c0 ) + 1004158: f7fe fbd4 bl 1002904 + GPIO_Config(SCI7816_CLK_PORT, SCI7816_CLK_IO_PIN, PWM_OUT); + 100415c: 2180 movs r1, #128 ; 0x80 + 100415e: 2210 movs r2, #16 + 1004160: 2004 movs r0, #4 + 1004162: 0209 lsls r1, r1, #8 + GPIO_Config(SCI17816_CLK_PORT, SCI17816_CLK_IO_PIN, PWM_OUT); + 1004164: f7fc fd70 bl 1000c48 + + ISO7816_PwmClkNM_Init(SCIx); + + if(SCIx->SCIx7816 == MSCI0) + 1004168: 683b ldr r3, [r7, #0] + 100416a: 42b3 cmp r3, r6 + 100416c: d000 beq.n 1004170 + 100416e: e0dd b.n 100432c + { + /*data io init*/ + GPIO_Config(SCI7816_DATA_PORT, SCI7816_DATA_IO_PIN, SCI7816_IO|PULL_PU); + 1004170: 2180 movs r1, #128 ; 0x80 + 1004172: 2278 movs r2, #120 ; 0x78 + 1004174: 2004 movs r0, #4 + 1004176: 0189 lsls r1, r1, #6 + { + TempChar = SCIx->SCIx7816->DATA.bit.VAL; + MyPrintf("%02x", TempChar); + MyPrintf("\n"); + + if (ISO7816_Detect_Io_State() == SCIx->SCI_Tran_StateCB.Sci_Pin_Detect_State) + 1004178: 24b7 movs r4, #183 ; 0xb7 + GPIO_Config(SCI17816_DATA_PORT, SCI17816_DATA_IO_PIN, SCI7816_IO2|PULL_PU); + 100417a: f7fc fd65 bl 1000c48 + if (ISO7816_Detect_Io_State() == SCIx->SCI_Tran_StateCB.Sci_Pin_Detect_State) + 100417e: 00a4 lsls r4, r4, #2 + while ((SCIx->SCIx7816->STATUS.bit.RFIFO_N & 1) || (SCIx->SCIx7816->FIFO_CTRL.bit.R_ITEMS & 0xf)) + 1004180: 683b ldr r3, [r7, #0] + 1004182: 68da ldr r2, [r3, #12] + 1004184: 07d2 lsls r2, r2, #31 + 1004186: d500 bpl.n 100418a + 1004188: e0d4 b.n 1004334 + 100418a: 001a movs r2, r3 + 100418c: 328c adds r2, #140 ; 0x8c + 100418e: 6811 ldr r1, [r2, #0] + 1004190: 0409 lsls r1, r1, #16 + 1004192: 0f09 lsrs r1, r1, #28 + 1004194: d000 beq.n 1004198 + 1004196: e0cd b.n 1004334 + return ISO7816_CARD_ABSENT; + } + } + + //check atr first byte and tx/rx fifo + SCIx->SCIx7816->CTRL.bit.RFIFO_CL = 1; + 1004198: 2201 movs r2, #1 + 100419a: 7a18 ldrb r0, [r3, #8] + SCIx->SCIx7816->STATUS.bit.PRT_CHK = 1; + SCIx->SCIx7816->STATUS.bit.CHK_BIT = 1; + + //clk + //delay 40000-45000clk (250ns*42000clk = 10.5ms) + SCIx->SCI_Tran_StateCB.time3_cnt_last = SCI7816_TIMX_CNT; + 100419c: 4d89 ldr r5, [pc, #548] ; (10043c4 ) + SCIx->SCIx7816->CTRL.bit.RFIFO_CL = 1; + 100419e: 4302 orrs r2, r0 + 10041a0: 721a strb r2, [r3, #8] + SCIx->SCIx7816->CTRL.bit.TS_TEST = 1; + 10041a2: 2204 movs r2, #4 + 10041a4: 7a18 ldrb r0, [r3, #8] + 10041a6: 4310 orrs r0, r2 + 10041a8: 7218 strb r0, [r3, #8] + SCIx->SCIx7816->CTRL.bit.TFIFO_CL = 1; + 10041aa: 2002 movs r0, #2 + 10041ac: 7a1c ldrb r4, [r3, #8] + 10041ae: 4320 orrs r0, r4 + 10041b0: 7218 strb r0, [r3, #8] + SCIx->SCIx7816->STATUS.bit.RET_CHK = 1;//clear tx/rx retry error + 10041b2: 2020 movs r0, #32 + 10041b4: 899c ldrh r4, [r3, #12] + 10041b6: 4320 orrs r0, r4 + 10041b8: 8198 strh r0, [r3, #12] + SCIx->SCIx7816->STATUS.bit.PRT_CHK = 1; + 10041ba: 8998 ldrh r0, [r3, #12] + SCIx->SCI_Tran_StateCB.time3_cnt_last = SCI7816_TIMX_CNT; + 10041bc: 4c80 ldr r4, [pc, #512] ; (10043c0 ) + SCIx->SCIx7816->STATUS.bit.PRT_CHK = 1; + 10041be: 4302 orrs r2, r0 + 10041c0: 819a strh r2, [r3, #12] + SCIx->SCIx7816->STATUS.bit.CHK_BIT = 1; + 10041c2: 2280 movs r2, #128 ; 0x80 + 10041c4: 8998 ldrh r0, [r3, #12] + 10041c6: 0052 lsls r2, r2, #1 + 10041c8: 4302 orrs r2, r0 + SCIx->SCI_Tran_StateCB.time3_cnt_last = SCI7816_TIMX_CNT; + 10041ca: 20a7 movs r0, #167 ; 0xa7 + SCIx->SCIx7816->STATUS.bit.CHK_BIT = 1; + 10041cc: 819a strh r2, [r3, #12] + SCIx->SCI_Tran_StateCB.time3_cnt_last = SCI7816_TIMX_CNT; + 10041ce: 5d7a ldrb r2, [r7, r5] + 10041d0: 00c0 lsls r0, r0, #3 + 10041d2: 3214 adds r2, #20 + 10041d4: 0092 lsls r2, r2, #2 + 10041d6: 5912 ldr r2, [r2, r4] + 10041d8: 9400 str r4, [sp, #0] + 10041da: 503a str r2, [r7, r0] + SCIx->SCI_Tran_StateCB.time3_cnt_new = 0; + 10041dc: 4a7a ldr r2, [pc, #488] ; (10043c8 ) + while (SCIx->SCI_Tran_StateCB.time3_cnt_new <= CONTACT_RESET_L_CNT) + { + SCIx->SCI_Tran_StateCB.time3_cnt_new = SCI7816_TIMX_CNT; + SCIx->SCI_Tran_StateCB.time3_cnt_new = SCIx->SCI_Tran_StateCB.time3_cnt_last - SCIx->SCI_Tran_StateCB.time3_cnt_new; + 10041de: 9001 str r0, [sp, #4] + SCIx->SCI_Tran_StateCB.time3_cnt_new = 0; + 10041e0: 50b9 str r1, [r7, r2] + while (SCIx->SCI_Tran_StateCB.time3_cnt_new <= CONTACT_RESET_L_CNT) + 10041e2: 31a9 adds r1, #169 ; 0xa9 + 10041e4: 31ff adds r1, #255 ; 0xff + 10041e6: 5879 ldr r1, [r7, r1] + 10041e8: 58bc ldr r4, [r7, r2] + 10041ea: 428c cmp r4, r1 + 10041ec: d800 bhi.n 10041f0 + 10041ee: e0b1 b.n 1004354 + } + + //config sci7816 tmode bit=1 实现ATR发送字节校验位错误时只要判断出检验错误即可，不需要将IO拉低 + SCIx->SCIx7816->MODE.bit.ETU_NUM = 0; + 10041f0: 2118 movs r1, #24 + 10041f2: 681a ldr r2, [r3, #0] + 10041f4: 2407 movs r4, #7 + 10041f6: 438a bics r2, r1 + 10041f8: 601a str r2, [r3, #0] + SCIx->SCIx7816->MODE.bit.MST_EN = 1; + 10041fa: 2280 movs r2, #128 ; 0x80 + 10041fc: 6819 ldr r1, [r3, #0] + 10041fe: 0212 lsls r2, r2, #8 + 1004200: 430a orrs r2, r1 + 1004202: 601a str r2, [r3, #0] + SCIx->SCIx7816->MODE.bit.BGT_EN = 1; + 1004204: 2280 movs r2, #128 ; 0x80 + 1004206: 6819 ldr r1, [r3, #0] + 1004208: 00d2 lsls r2, r2, #3 + 100420a: 430a orrs r2, r1 + 100420c: 601a str r2, [r3, #0] + SCIx->SCIx7816->MODE.bit.CWT_EN = 1; + 100420e: 2280 movs r2, #128 ; 0x80 + 1004210: 6819 ldr r1, [r3, #0] + 1004212: 0112 lsls r2, r2, #4 + 1004214: 430a orrs r2, r1 + 1004216: 601a str r2, [r3, #0] + SCIx->SCIx7816->MODE.bit.EDC_EN = 1; + 1004218: 2280 movs r2, #128 ; 0x80 + 100421a: 6819 ldr r1, [r3, #0] + 100421c: 0252 lsls r2, r2, #9 + 100421e: 430a orrs r2, r1 + 1004220: 601a str r2, [r3, #0] + SCIx->SCIx7816->MODE.bit.EN = 1; + 1004222: 2280 movs r2, #128 ; 0x80 + 1004224: 6819 ldr r1, [r3, #0] + 1004226: 0092 lsls r2, r2, #2 + 1004228: 430a orrs r2, r1 + 100422a: 601a str r2, [r3, #0] + SCIx->SCIx7816->MODE.bit.TPS = 1; + 100422c: 2201 movs r2, #1 + 100422e: 6819 ldr r1, [r3, #0] + 1004230: 4866 ldr r0, [pc, #408] ; (10043cc ) + 1004232: 430a orrs r2, r1 + SCIx->SCIx7816->ETU.bit.VAL = 372; + 1004234: 21ba movs r1, #186 ; 0xba + SCIx->SCIx7816->MODE.bit.TPS = 1; + 1004236: 601a str r2, [r3, #0] + SCIx->SCIx7816->ETU.bit.VAL = 372; + 1004238: 8d1a ldrh r2, [r3, #40] ; 0x28 + 100423a: 0049 lsls r1, r1, #1 + 100423c: 0b52 lsrs r2, r2, #13 + 100423e: 0352 lsls r2, r2, #13 + 1004240: 430a orrs r2, r1 + 1004242: 851a strh r2, [r3, #40] ; 0x28 + + if(SCIx->SCIx7816 == MSCI0) + 1004244: 42b3 cmp r3, r6 + 1004246: d000 beq.n 100424a + 1004248: e090 b.n 100436c + { + SCIx->SCIx7816->MODE.bit.CLK_SEL = SCI7816_PWMClK4M_TIMX; //SCI时钟源 TIMx + 100424a: 4b5c ldr r3, [pc, #368] ; (10043bc ) + 100424c: 5cf9 ldrb r1, [r7, r3] + 100424e: 6832 ldr r2, [r6, #0] + 1004250: 400c ands r4, r1 + 1004252: 0324 lsls r4, r4, #12 + 1004254: 4010 ands r0, r2 + 1004256: 4320 orrs r0, r4 + 1004258: 6030 str r0, [r6, #0] + } + else + { + SCIx->SCIx7816->MODE.bit.CLK_SEL = SCI17816_PWMClK4M_TIMX; //SCI时钟源 TIMx + } + ISO7816_TXRX_TIME_Init(SCIx); + 100425a: 0038 movs r0, r7 + 100425c: f7ff fc1e bl 1003a9c + + + ISO7816_RX_APDU_Config(SCIx,1); + 1004260: 2101 movs r1, #1 + 1004262: 0038 movs r0, r7 + 1004264: f7ff fc8e bl 1003b84 + if(SCIx->SCIx7816 == MSCI0) + 1004268: 683b ldr r3, [r7, #0] + { + //rst disable + GPIO_Config(SCI7816_RESET_PORT, SCI7816_RESET_IO_PIN, OUTPUT_HIGH); //reset + 100426a: 223f movs r2, #63 ; 0x3f + 100426c: 2180 movs r1, #128 ; 0x80 + if(SCIx->SCIx7816 == MSCI0) + 100426e: 42b3 cmp r3, r6 + 1004270: d000 beq.n 1004274 + 1004272: e084 b.n 100437e + GPIO_Config(SCI7816_RESET_PORT, SCI7816_RESET_IO_PIN, OUTPUT_HIGH); //reset + 1004274: 01c9 lsls r1, r1, #7 + } + else + { + GPIO_Config(SCI17816_RESET_PORT, SCI17816_RESET_IO_PIN, OUTPUT_HIGH); //reset + 1004276: 2004 movs r0, #4 + 1004278: f7fc fce6 bl 1000c48 + } + + //icc response atr firstbyte max time 42020 clk + SCIx->SCI_Tran_StateCB.time3_cnt_last = SCI7816_TIMX_CNT; + 100427c: 5d7b ldrb r3, [r7, r5] + 100427e: 9a00 ldr r2, [sp, #0] + 1004280: 3314 adds r3, #20 + 1004282: 009b lsls r3, r3, #2 + 1004284: 58d2 ldr r2, [r2, r3] + 1004286: 23a7 movs r3, #167 ; 0xa7 + SCIx->SCI_Tran_StateCB.contact_atr_rfb_overtime_falg = 0; + 1004288: 2000 movs r0, #0 + SCIx->SCI_Tran_StateCB.time3_cnt_last = SCI7816_TIMX_CNT; + 100428a: 00db lsls r3, r3, #3 + 100428c: 50fa str r2, [r7, r3] + SCIx->SCI_Tran_StateCB.contact_atr_rfb_overtime_falg = 0; + 100428e: 9b02 ldr r3, [sp, #8] + SCIx->SCI_Tran_StateCB.contact_atr_rab_overtime_falg = 1; + 1004290: 9a03 ldr r2, [sp, #12] + SCIx->SCI_Tran_StateCB.contact_atr_rfb_overtime_falg = 0; + 1004292: 54f8 strb r0, [r7, r3] + SCIx->SCI_Tran_StateCB.contact_atr_rab_overtime_falg = 1; + 1004294: 2301 movs r3, #1 + 1004296: 54bb strb r3, [r7, r2] + + return OK; +} + 1004298: b019 add sp, #100 ; 0x64 + 100429a: bdf0 pop {r4, r5, r6, r7, pc} + GPIO_Config(SCI17816_CARD1_EN_PORT, SCI17816_CARD1_EN_IO_PIN, OUTPUT_HIGH); //CARD1 供电 + 100429c: 2180 movs r1, #128 ; 0x80 + 100429e: 223f movs r2, #63 ; 0x3f + 10042a0: 0109 lsls r1, r1, #4 + 10042a2: 2004 movs r0, #4 + 10042a4: f7fc fcd0 bl 1000c48 + 10042a8: e702 b.n 10040b0 + GPIO_Config(SCI17816_CLK_PORT, SCI17816_CLK_IO_PIN, OUTPUT_LOW); //clk + 10042aa: 2000 movs r0, #0 + 10042ac: f7fc fccc bl 1000c48 + GPIO_Config(SCI17816_RESET_PORT, SCI17816_RESET_IO_PIN, OUTPUT_LOW); //reset + 10042b0: 2180 movs r1, #128 ; 0x80 + 10042b2: 223e movs r2, #62 ; 0x3e + 10042b4: 00c9 lsls r1, r1, #3 + 10042b6: 2004 movs r0, #4 + 10042b8: f7fc fcc6 bl 1000c48 + GPIO_Config(SCI17816_DATA_PORT, SCI17816_DATA_IO_PIN, OUTPUT_LOW); //io + 10042bc: 223e movs r2, #62 ; 0x3e + 10042be: 2140 movs r1, #64 ; 0x40 + 10042c0: 2000 movs r0, #0 + 10042c2: e709 b.n 10040d8 + GPIO_Config(SCI17816_CARD1_EN_PORT, SCI17816_CARD1_EN_IO_PIN, OUTPUT_LOW); //CARD1 VCC + 10042c4: 2180 movs r1, #128 ; 0x80 + 10042c6: 223e movs r2, #62 ; 0x3e + 10042c8: 0109 lsls r1, r1, #4 + 10042ca: 2004 movs r0, #4 + 10042cc: f7fc fcbc bl 1000c48 + 10042d0: e70b b.n 10040ea + HighLevelPeriod = ((PllClockFreq/SCI7816_PWM4M_PERIOD)- 1); + 10042d2: f002 f94f bl 1006574 <__udivsi3> + 10042d6: 0003 movs r3, r0 + 10042d8: 9000 str r0, [sp, #0] + 10042da: 3b01 subs r3, #1 + if((PllClockFreq % SCI7816_PWM4M_PERIOD) != 0) + 10042dc: 5979 ldr r1, [r7, r5] + 10042de: 0020 movs r0, r4 + HighLevelPeriod = ((PllClockFreq/SCI7816_PWM4M_PERIOD)- 1); + 10042e0: 9301 str r3, [sp, #4] + if((PllClockFreq % SCI7816_PWM4M_PERIOD) != 0) + 10042e2: f002 f9cd bl 1006680 <__aeabi_uidivmod> + 10042e6: 2900 cmp r1, #0 + 10042e8: d101 bne.n 10042ee + HighLevelPeriod = ((PllClockFreq/SCI7816_PWM4M_PERIOD)- 1); + 10042ea: 9b01 ldr r3, [sp, #4] + 10042ec: 9300 str r3, [sp, #0] + PWM_InitStruct.StartLevel = HIGH_LEVEL; + 10042ee: 2401 movs r4, #1 + PWM_InitStruct.HighLevelPeriod = HighLevelPeriod; + 10042f0: 9b00 ldr r3, [sp, #0] + PWM_InitStruct.TIMx = SCI17816_PWMClK4M_TIMX; + 10042f2: 4d32 ldr r5, [pc, #200] ; (10043bc ) + PWM_InitStruct.HighLevelPeriod = HighLevelPeriod; + 10042f4: 9306 str r3, [sp, #24] + PWM_InitStruct.LowLevelPeriod = LowLevelPeriod ; + 10042f6: 9b01 ldr r3, [sp, #4] + PWM_InitStruct.TIMx = SCI17816_PWMClK4M_TIMX; + 10042f8: aa04 add r2, sp, #16 + PWM_InitStruct.LowLevelPeriod = LowLevelPeriod ; + 10042fa: 9305 str r3, [sp, #20] + PWM_InitStruct.StartLevel = HIGH_LEVEL; + 10042fc: ab04 add r3, sp, #16 + 10042fe: 731c strb r4, [r3, #12] + PWM_InitStruct.TIMx = SCI17816_PWMClK4M_TIMX; + 1004300: 5d7b ldrb r3, [r7, r5] + TIM_PWMInit(MTIM, &PWM_InitStruct); + 1004302: 0011 movs r1, r2 + 1004304: 482e ldr r0, [pc, #184] ; (10043c0 ) + PWM_InitStruct.TIMx = SCI17816_PWMClK4M_TIMX; + 1004306: 7013 strb r3, [r2, #0] + TIM_PWMInit(MTIM, &PWM_InitStruct); + 1004308: f7fe fb8a bl 1002a20 + TIM_ModeConfig(MTIM, SCI17816_PWMClK4M_TIMX, TIM_Mode_PWM); + 100430c: 5d79 ldrb r1, [r7, r5] + 100430e: 2200 movs r2, #0 + 1004310: b2c9 uxtb r1, r1 + 1004312: 482b ldr r0, [pc, #172] ; (10043c0 ) + 1004314: f7fe fb2c bl 1002970 + TIM_Cmd(MTIM, SCI17816_PWMClK4M_TIMX, ENABLE); + 1004318: 5d79 ldrb r1, [r7, r5] + 100431a: 0022 movs r2, r4 + 100431c: b2c9 uxtb r1, r1 + 100431e: 4828 ldr r0, [pc, #160] ; (10043c0 ) + 1004320: f7fe faf0 bl 1002904 + GPIO_Config(SCI17816_CLK_PORT, SCI17816_CLK_IO_PIN, PWM_OUT); + 1004324: 2210 movs r2, #16 + 1004326: 2180 movs r1, #128 ; 0x80 + 1004328: 2000 movs r0, #0 + 100432a: e71b b.n 1004164 + GPIO_Config(SCI17816_DATA_PORT, SCI17816_DATA_IO_PIN, SCI7816_IO2|PULL_PU); + 100432c: 2273 movs r2, #115 ; 0x73 + 100432e: 2140 movs r1, #64 ; 0x40 + 1004330: 2000 movs r0, #0 + 1004332: e721 b.n 1004178 + TempChar = SCIx->SCIx7816->DATA.bit.VAL; + 1004334: 6a19 ldr r1, [r3, #32] + MyPrintf("%02x", TempChar); + 1004336: 4826 ldr r0, [pc, #152] ; (10043d0 ) + TempChar = SCIx->SCIx7816->DATA.bit.VAL; + 1004338: b2c9 uxtb r1, r1 + MyPrintf("%02x", TempChar); + 100433a: f7fb ff1d bl 1000178 + MyPrintf("\n"); + 100433e: 4825 ldr r0, [pc, #148] ; (10043d4 ) + 1004340: f7fb ff1a bl 1000178 + if (ISO7816_Detect_Io_State() == SCIx->SCI_Tran_StateCB.Sci_Pin_Detect_State) + 1004344: f7ff fb64 bl 1003a10 + 1004348: 5d3b ldrb r3, [r7, r4] + 100434a: 4298 cmp r0, r3 + 100434c: d000 beq.n 1004350 + 100434e: e717 b.n 1004180 + return ISO7816_CARD_ABSENT; + 1004350: 2062 movs r0, #98 ; 0x62 + 1004352: e7a1 b.n 1004298 + SCIx->SCI_Tran_StateCB.time3_cnt_new = SCI7816_TIMX_CNT; + 1004354: 5d7c ldrb r4, [r7, r5] + 1004356: 9800 ldr r0, [sp, #0] + 1004358: 3414 adds r4, #20 + 100435a: 00a4 lsls r4, r4, #2 + 100435c: 5904 ldr r4, [r0, r4] + SCIx->SCI_Tran_StateCB.time3_cnt_new = SCIx->SCI_Tran_StateCB.time3_cnt_last - SCIx->SCI_Tran_StateCB.time3_cnt_new; + 100435e: 9801 ldr r0, [sp, #4] + SCIx->SCI_Tran_StateCB.time3_cnt_new = SCI7816_TIMX_CNT; + 1004360: 50bc str r4, [r7, r2] + SCIx->SCI_Tran_StateCB.time3_cnt_new = SCIx->SCI_Tran_StateCB.time3_cnt_last - SCIx->SCI_Tran_StateCB.time3_cnt_new; + 1004362: 583c ldr r4, [r7, r0] + 1004364: 58b8 ldr r0, [r7, r2] + 1004366: 1a24 subs r4, r4, r0 + 1004368: 50bc str r4, [r7, r2] + 100436a: e73d b.n 10041e8 + SCIx->SCIx7816->MODE.bit.CLK_SEL = SCI17816_PWMClK4M_TIMX; //SCI时钟源 TIMx + 100436c: 4a13 ldr r2, [pc, #76] ; (10043bc ) + 100436e: 5cb9 ldrb r1, [r7, r2] + 1004370: 681a ldr r2, [r3, #0] + 1004372: 4021 ands r1, r4 + 1004374: 0309 lsls r1, r1, #12 + 1004376: 4002 ands r2, r0 + 1004378: 430a orrs r2, r1 + 100437a: 601a str r2, [r3, #0] + 100437c: e76d b.n 100425a + GPIO_Config(SCI17816_RESET_PORT, SCI17816_RESET_IO_PIN, OUTPUT_HIGH); //reset + 100437e: 00c9 lsls r1, r1, #3 + 1004380: e779 b.n 1004276 + 1004382: 46c0 nop ; (mov r8, r8) + 1004384: 010070e4 .word 0x010070e4 + 1004388: 01007104 .word 0x01007104 + 100438c: 0000051c .word 0x0000051c + 1004390: 00002766 .word 0x00002766 + 1004394: 000002e5 .word 0x000002e5 + 1004398: 00003c14 .word 0x00003c14 + 100439c: 00000524 .word 0x00000524 + 10043a0: 000002e2 .word 0x000002e2 + 10043a4: 00ffff00 .word 0x00ffff00 + 10043a8: 000002e6 .word 0x000002e6 + 10043ac: 000f8574 .word 0x000f8574 + 10043b0: 000f0400 .word 0x000f0400 + 10043b4: 000fb200 .word 0x000fb200 + 10043b8: 00000544 .word 0x00000544 + 10043bc: 00000543 .word 0x00000543 + 10043c0: 000f0c00 .word 0x000f0c00 + 10043c4: 00000542 .word 0x00000542 + 10043c8: 0000053c .word 0x0000053c + 10043cc: ffff8fff .word 0xffff8fff + 10043d0: 01007138 .word 0x01007138 + 10043d4: 01007195 .word 0x01007195 + +010043d8 : + * @brief 7816 warm reset function + * @param None + * @retval None + */ +void ISO7816_Warm_Reset(SCI_Struct_Type* SCIx) +{ + 10043d8: b5f8 push {r3, r4, r5, r6, r7, lr} +#ifdef DEBUG_7816 + MyPrintf("sci7816 warm reset\n"); +#endif + + SCIx->g_7816Para.bTA1 = 0xff; + 10043da: 23ff movs r3, #255 ; 0xff + 10043dc: 1d82 adds r2, r0, #6 + 10043de: 77d3 strb r3, [r2, #31] + SCIx->g_7816Para.bTA2 = 0xFF; + 10043e0: 1dc2 adds r2, r0, #7 + 10043e2: 77d3 strb r3, [r2, #31] + SCIx->g_7816Para.bTA2Flag = 0; + 10043e4: 2300 movs r3, #0 +{ + 10043e6: 0004 movs r4, r0 + SCIx->g_7816Para.bTA2Flag = 0; + 10043e8: 3201 adds r2, #1 + 10043ea: 77d3 strb r3, [r2, #31] + + SCIx->SCI_Tran_StateCB.atr_cwt_valid_flag = 0; + 10043ec: 4a4d ldr r2, [pc, #308] ; (1004524 ) + 10043ee: 4f4e ldr r7, [pc, #312] ; (1004528 ) + 10043f0: 5483 strb r3, [r0, r2] + + ISO7816_Reg_Init(SCIx); + 10043f2: f7ff fb73 bl 1003adc + + //check atr first byte and tx/rx fifo + SCIx->SCIx7816->CTRL.bit.RFIFO_CL = 1; + 10043f6: 2201 movs r2, #1 + SCIx->SCIx7816->CTRL.bit.TS_TEST = 1; + 10043f8: 2004 movs r0, #4 + SCIx->SCIx7816->CTRL.bit.RFIFO_CL = 1; + 10043fa: 6823 ldr r3, [r4, #0] + 10043fc: 7a19 ldrb r1, [r3, #8] + 10043fe: 4311 orrs r1, r2 + 1004400: 7219 strb r1, [r3, #8] + SCIx->SCIx7816->CTRL.bit.TS_TEST = 1; + 1004402: 7a19 ldrb r1, [r3, #8] + 1004404: 4301 orrs r1, r0 + 1004406: 7219 strb r1, [r3, #8] + SCIx->SCIx7816->CTRL.bit.TFIFO_CL = 1; + 1004408: 2102 movs r1, #2 + 100440a: 7a1d ldrb r5, [r3, #8] + 100440c: 4329 orrs r1, r5 + 100440e: 7219 strb r1, [r3, #8] + SCIx->SCIx7816->STATUS.bit.RET_CHK = 1;//clear tx/rx retry error + 1004410: 2120 movs r1, #32 + 1004412: 899d ldrh r5, [r3, #12] + 1004414: 4329 orrs r1, r5 + 1004416: 8199 strh r1, [r3, #12] + SCIx->SCIx7816->STATUS.bit.PRT_CHK = 1; + 1004418: 8999 ldrh r1, [r3, #12] + 100441a: 4301 orrs r1, r0 + 100441c: 8199 strh r1, [r3, #12] + SCIx->SCIx7816->STATUS.bit.CHK_BIT = 1; + 100441e: 2180 movs r1, #128 ; 0x80 + 1004420: 899d ldrh r5, [r3, #12] + 1004422: 0049 lsls r1, r1, #1 + 1004424: 4329 orrs r1, r5 + + + //config sci7816 tmode bit=1 实现ATR发送字节校验位错误时只要判断出检验错误即可，不需要将IO拉低 + SCIx->SCIx7816->MODE.bit.ETU_NUM = 0; + 1004426: 2518 movs r5, #24 + SCIx->SCIx7816->STATUS.bit.CHK_BIT = 1; + 1004428: 8199 strh r1, [r3, #12] + SCIx->SCIx7816->MODE.bit.ETU_NUM = 0; + 100442a: 6819 ldr r1, [r3, #0] + 100442c: 43a9 bics r1, r5 + 100442e: 6019 str r1, [r3, #0] + SCIx->SCIx7816->MODE.bit.MST_EN = 1; + 1004430: 2180 movs r1, #128 ; 0x80 + 1004432: 681d ldr r5, [r3, #0] + 1004434: 0209 lsls r1, r1, #8 + 1004436: 4329 orrs r1, r5 + 1004438: 6019 str r1, [r3, #0] + SCIx->SCIx7816->MODE.bit.BGT_EN = 1; + 100443a: 2180 movs r1, #128 ; 0x80 + 100443c: 681d ldr r5, [r3, #0] + 100443e: 00c9 lsls r1, r1, #3 + 1004440: 430d orrs r5, r1 + 1004442: 601d str r5, [r3, #0] + SCIx->SCIx7816->MODE.bit.CWT_EN = 1; + 1004444: 2580 movs r5, #128 ; 0x80 + 1004446: 681e ldr r6, [r3, #0] + 1004448: 012d lsls r5, r5, #4 + 100444a: 4335 orrs r5, r6 + 100444c: 601d str r5, [r3, #0] + SCIx->SCIx7816->MODE.bit.EDC_EN = 1; + 100444e: 2580 movs r5, #128 ; 0x80 + 1004450: 681e ldr r6, [r3, #0] + 1004452: 026d lsls r5, r5, #9 + 1004454: 4335 orrs r5, r6 + 1004456: 601d str r5, [r3, #0] + SCIx->SCIx7816->MODE.bit.EN = 1; + 1004458: 2580 movs r5, #128 ; 0x80 + 100445a: 681e ldr r6, [r3, #0] + 100445c: 00ad lsls r5, r5, #2 + 100445e: 4335 orrs r5, r6 + 1004460: 601d str r5, [r3, #0] + SCIx->SCIx7816->MODE.bit.TPS = 1; + 1004462: 681d ldr r5, [r3, #0] + 1004464: 432a orrs r2, r5 + 1004466: 2507 movs r5, #7 + 1004468: 46ac mov ip, r5 + + if(SCIx->SCIx7816 == MSCI0) + 100446a: 4d30 ldr r5, [pc, #192] ; (100452c ) + SCIx->SCIx7816->MODE.bit.TPS = 1; + 100446c: 601a str r2, [r3, #0] + 100446e: 4a30 ldr r2, [pc, #192] ; (1004530 ) + if(SCIx->SCIx7816 == MSCI0) + 1004470: 42ab cmp r3, r5 + 1004472: d13e bne.n 10044f2 + { + SCIx->SCIx7816->MODE.bit.CLK_SEL = SCI7816_PWMClK4M_TIMX; //SCI时钟源 TIMx + 1004474: 4663 mov r3, ip + 1004476: 492d ldr r1, [pc, #180] ; (100452c ) + 1004478: 5ca5 ldrb r5, [r4, r2] + 100447a: 680a ldr r2, [r1, #0] + 100447c: 401d ands r5, r3 + 100447e: 4017 ands r7, r2 + 1004480: 032d lsls r5, r5, #12 + 1004482: 432f orrs r7, r5 + 1004484: 600f str r7, [r1, #0] + GPIO_Config(SCI7816_RESET_PORT, SCI7816_RESET_IO_PIN, OUTPUT_LOW); //reset + 1004486: 2180 movs r1, #128 ; 0x80 + 1004488: 223e movs r2, #62 ; 0x3e + 100448a: 01c9 lsls r1, r1, #7 + } + else + { + SCIx->SCIx7816->MODE.bit.CLK_SEL = SCI17816_PWMClK4M_TIMX; //SCI时钟源 TIMx + GPIO_Config(SCI17816_RESET_PORT, SCI17816_RESET_IO_PIN, OUTPUT_LOW); //reset + 100448c: f7fc fbdc bl 1000c48 + } + + + //delay 40000-45000clk (250ns*42000clk = 10.5ms) + SCIx->SCI_Tran_StateCB.time3_cnt_last = SCI7816_TIMX_CNT; + 1004490: 21a7 movs r1, #167 ; 0xa7 + SCIx->SCI_Tran_StateCB.time3_cnt_new = 0; + 1004492: 2200 movs r2, #0 + SCIx->SCI_Tran_StateCB.time3_cnt_last = SCI7816_TIMX_CNT; + 1004494: 4f27 ldr r7, [pc, #156] ; (1004534 ) + 1004496: 4d28 ldr r5, [pc, #160] ; (1004538 ) + 1004498: 5de3 ldrb r3, [r4, r7] + 100449a: 00c9 lsls r1, r1, #3 + 100449c: 3314 adds r3, #20 + 100449e: 009b lsls r3, r3, #2 + 10044a0: 595b ldr r3, [r3, r5] + 10044a2: 5063 str r3, [r4, r1] + SCIx->SCI_Tran_StateCB.time3_cnt_new = 0; + 10044a4: 4b25 ldr r3, [pc, #148] ; (100453c ) + 10044a6: 50e2 str r2, [r4, r3] + while (SCIx->SCI_Tran_StateCB.time3_cnt_new <= CONTACT_RESET_L_CNT) + 10044a8: 32a9 adds r2, #169 ; 0xa9 + 10044aa: 32ff adds r2, #255 ; 0xff + 10044ac: 58a0 ldr r0, [r4, r2] + 10044ae: 58e2 ldr r2, [r4, r3] + 10044b0: 4282 cmp r2, r0 + 10044b2: d928 bls.n 1004506 + { + SCIx->SCI_Tran_StateCB.time3_cnt_new = SCI7816_TIMX_CNT; + SCIx->SCI_Tran_StateCB.time3_cnt_new = SCIx->SCI_Tran_StateCB.time3_cnt_last - SCIx->SCI_Tran_StateCB.time3_cnt_new; + } + + ISO7816_TXRX_TIME_Init(SCIx); + 10044b4: 0020 movs r0, r4 + 10044b6: f7ff faf1 bl 1003a9c + + ISO7816_RX_APDU_Config(SCIx,1); + 10044ba: 2101 movs r1, #1 + 10044bc: 0020 movs r0, r4 + 10044be: f7ff fb61 bl 1003b84 + if(SCIx->SCIx7816 == MSCI0) + 10044c2: 6823 ldr r3, [r4, #0] + 10044c4: 4a19 ldr r2, [pc, #100] ; (100452c ) + 10044c6: 4293 cmp r3, r2 + 10044c8: d127 bne.n 100451a + { + GPIO_Config(SCI7816_RESET_PORT, SCI7816_RESET_IO_PIN, OUTPUT_HIGH); //reset + 10044ca: 2180 movs r1, #128 ; 0x80 + 10044cc: 223f movs r2, #63 ; 0x3f + 10044ce: 01c9 lsls r1, r1, #7 + } + else + { + GPIO_Config(SCI17816_RESET_PORT, SCI17816_RESET_IO_PIN, OUTPUT_HIGH); //reset + 10044d0: 2004 movs r0, #4 + 10044d2: f7fc fbb9 bl 1000c48 + } + + //icc response atr firstbyte max time 42020 clk + SCIx->SCI_Tran_StateCB.time3_cnt_last = SCI7816_TIMX_CNT; + 10044d6: 5de3 ldrb r3, [r4, r7] + 10044d8: 3314 adds r3, #20 + 10044da: 009b lsls r3, r3, #2 + 10044dc: 58ea ldr r2, [r5, r3] + 10044de: 23a7 movs r3, #167 ; 0xa7 + 10044e0: 00db lsls r3, r3, #3 + 10044e2: 50e2 str r2, [r4, r3] + SCIx->SCI_Tran_StateCB.contact_atr_rfb_overtime_falg = 0; + 10044e4: 2200 movs r2, #0 + 10044e6: 4b16 ldr r3, [pc, #88] ; (1004540 ) + 10044e8: 54e2 strb r2, [r4, r3] + SCIx->SCI_Tran_StateCB.contact_atr_rab_overtime_falg = 1; + 10044ea: 4b16 ldr r3, [pc, #88] ; (1004544 ) + 10044ec: 3201 adds r2, #1 + 10044ee: 54e2 strb r2, [r4, r3] +} + 10044f0: bdf8 pop {r3, r4, r5, r6, r7, pc} + SCIx->SCIx7816->MODE.bit.CLK_SEL = SCI17816_PWMClK4M_TIMX; //SCI时钟源 TIMx + 10044f2: 4666 mov r6, ip + 10044f4: 5ca5 ldrb r5, [r4, r2] + 10044f6: 681a ldr r2, [r3, #0] + 10044f8: 4035 ands r5, r6 + 10044fa: 032d lsls r5, r5, #12 + 10044fc: 403a ands r2, r7 + 10044fe: 432a orrs r2, r5 + 1004500: 601a str r2, [r3, #0] + GPIO_Config(SCI17816_RESET_PORT, SCI17816_RESET_IO_PIN, OUTPUT_LOW); //reset + 1004502: 223e movs r2, #62 ; 0x3e + 1004504: e7c2 b.n 100448c + SCIx->SCI_Tran_StateCB.time3_cnt_new = SCI7816_TIMX_CNT; + 1004506: 5de2 ldrb r2, [r4, r7] + 1004508: 3214 adds r2, #20 + 100450a: 0092 lsls r2, r2, #2 + 100450c: 58aa ldr r2, [r5, r2] + 100450e: 50e2 str r2, [r4, r3] + SCIx->SCI_Tran_StateCB.time3_cnt_new = SCIx->SCI_Tran_StateCB.time3_cnt_last - SCIx->SCI_Tran_StateCB.time3_cnt_new; + 1004510: 5862 ldr r2, [r4, r1] + 1004512: 58e6 ldr r6, [r4, r3] + 1004514: 1b92 subs r2, r2, r6 + 1004516: 50e2 str r2, [r4, r3] + 1004518: e7c9 b.n 10044ae + GPIO_Config(SCI17816_RESET_PORT, SCI17816_RESET_IO_PIN, OUTPUT_HIGH); //reset + 100451a: 2180 movs r1, #128 ; 0x80 + 100451c: 223f movs r2, #63 ; 0x3f + 100451e: 00c9 lsls r1, r1, #3 + 1004520: e7d6 b.n 10044d0 + 1004522: 46c0 nop ; (mov r8, r8) + 1004524: 000002e2 .word 0x000002e2 + 1004528: ffff8fff .word 0xffff8fff + 100452c: 000f0400 .word 0x000f0400 + 1004530: 00000543 .word 0x00000543 + 1004534: 00000542 .word 0x00000542 + 1004538: 000f0c00 .word 0x000f0c00 + 100453c: 0000053c .word 0x0000053c + 1004540: 000002e5 .word 0x000002e5 + 1004544: 000002e6 .word 0x000002e6 + +01004548 : + * @param None + * @retval None + */ +void ISO7816_Config_Mode_Fun(SCI_Struct_Type* SCIx) +{ + if (SCIx->g_7816Para.bProlType == PROTOCOL_T0) + 1004548: 0002 movs r2, r0 +{ + 100454a: b510 push {r4, lr} + if (SCIx->g_7816Para.bProlType == PROTOCOL_T0) + 100454c: 3228 adds r2, #40 ; 0x28 + 100454e: 7814 ldrb r4, [r2, #0] + 1004550: 6803 ldr r3, [r0, #0] + 1004552: 2c00 cmp r4, #0 + 1004554: d114 bne.n 1004580 + { + SCIx->SCIx7816->MODE.bit.RET_EN = 1; + 1004556: 2280 movs r2, #128 ; 0x80 + 1004558: 6819 ldr r1, [r3, #0] + 100455a: 0052 lsls r2, r2, #1 + 100455c: 430a orrs r2, r1 + SCIx->SCIx7816->MODE.bit.RET_TIME = 4; + 100455e: 21e0 movs r1, #224 ; 0xe0 + SCIx->SCIx7816->MODE.bit.RET_EN = 1; + 1004560: 601a str r2, [r3, #0] + SCIx->SCIx7816->MODE.bit.RET_TIME = 4; + 1004562: 681a ldr r2, [r3, #0] + 1004564: 438a bics r2, r1 + 1004566: 0011 movs r1, r2 + 1004568: 2280 movs r2, #128 ; 0x80 + 100456a: 430a orrs r2, r1 + SCIx->SCIx7816->MODE.bit.TPS &=~1; + 100456c: 2101 movs r1, #1 + SCIx->SCIx7816->MODE.bit.RET_TIME = 4; + 100456e: 601a str r2, [r3, #0] + SCIx->SCIx7816->MODE.bit.TPS &=~1; + 1004570: 681a ldr r2, [r3, #0] + 1004572: 681a ldr r2, [r3, #0] + 1004574: 438a bics r2, r1 + 1004576: 601a str r2, [r3, #0] + SCIx->SCI_Tran_StateCB.Card_Type = 0; + 1004578: 23b8 movs r3, #184 ; 0xb8 + 100457a: 009b lsls r3, r3, #2 + 100457c: 54c4 strb r4, [r0, r3] + { + SCIx->SCIx7816->MODE.bit.TPS = 1; + SCIx->SCI_Tran_StateCB.Card_Type = 1; + + } +} + 100457e: bd10 pop {r4, pc} + SCIx->SCIx7816->MODE.bit.TPS = 1; + 1004580: 2101 movs r1, #1 + 1004582: 681a ldr r2, [r3, #0] + 1004584: 430a orrs r2, r1 + 1004586: 601a str r2, [r3, #0] + SCIx->SCI_Tran_StateCB.Card_Type = 1; + 1004588: 23b8 movs r3, #184 ; 0xb8 + 100458a: 009b lsls r3, r3, #2 + 100458c: 54c1 strb r1, [r0, r3] +} + 100458e: e7f6 b.n 100457e + +01004590 : + * @param pAtr: ATR data storage unit + * @param pLength: ATR data length + * @retval OK: 0 on success + */ +uint16_t ISO7816_GetAtr_LOOP(SCI_Struct_Type* SCIx,uint8_t *pAtr, uint8_t *pLength) +{ + 1004590: b5f0 push {r4, r5, r6, r7, lr} + 1004592: b087 sub sp, #28 + 1004594: 0007 movs r7, r0 + 1004596: 9100 str r1, [sp, #0] + 1004598: 9205 str r2, [sp, #20] + uint8_t TDn = 0; + uint8_t TD2Flag = 0; + + if ((NULL == pAtr) || (NULL == pLength)) + { + return ISO7816_PARA_ERROR; + 100459a: 2559 movs r5, #89 ; 0x59 + if ((NULL == pAtr) || (NULL == pLength)) + 100459c: 2900 cmp r1, #0 + 100459e: d00a beq.n 10045b6 + 10045a0: 2a00 cmp r2, #0 + 10045a2: d008 beq.n 10045b6 + } + + ret = ISO7816_RecAtrBytes(SCIx,pAtr, 1); //Ts + 10045a4: 2201 movs r2, #1 + 10045a6: f7ff fbc9 bl 1003d3c + 10045aa: 1e05 subs r5, r0, #0 + + if (OK != ret) + 10045ac: d006 beq.n 10045bc + { + #ifdef DEBUG_7816_EMV + MyPrintf("rec atr erro %2x\r\n",ret); + 10045ae: 0001 movs r1, r0 + 10045b0: 488d ldr r0, [pc, #564] ; (10047e8 ) + 10045b2: f7fb fde1 bl 1000178 + + } + while (i--); + + return OK; +} + 10045b6: 0028 movs r0, r5 + 10045b8: b007 add sp, #28 + 10045ba: bdf0 pop {r4, r5, r6, r7, pc} + SCIx->SCIx7816->CTRL.reg &= 0XFB; + 10045bc: 21fb movs r1, #251 ; 0xfb + 10045be: 683b ldr r3, [r7, #0] + 10045c0: 689a ldr r2, [r3, #8] + 10045c2: 400a ands r2, r1 + 10045c4: 609a str r2, [r3, #8] + if ((pAtr[0] != 0x3b) && (pAtr[0] != 0x3f)) + 10045c6: 9a00 ldr r2, [sp, #0] + 10045c8: 39f7 subs r1, #247 ; 0xf7 + 10045ca: 7812 ldrb r2, [r2, #0] + 10045cc: 0010 movs r0, r2 + 10045ce: 4388 bics r0, r1 + 10045d0: 283b cmp r0, #59 ; 0x3b + 10045d2: d005 beq.n 10045e0 + if (pAtr[0] == 0x23) + 10045d4: 2a23 cmp r2, #35 ; 0x23 + 10045d6: d15c bne.n 1004692 + SCIx->SCIx7816->MODE.bit.CODE_DRT =0; //正向卡片 + 10045d8: 2102 movs r1, #2 + 10045da: 681a ldr r2, [r3, #0] + 10045dc: 438a bics r2, r1 + SCIx->SCIx7816->MODE.bit.CODE_DRT =1; //反向卡片 + 10045de: 601a str r2, [r3, #0] + SCIx->SCI_Tran_StateCB.contact_atr_rfb_overtime_falg = 1; + 10045e0: 2201 movs r2, #1 + 10045e2: 4b82 ldr r3, [pc, #520] ; (10047ec ) + SCIx->SCI_Tran_StateCB.time3_cnt_last = SCI7816_TIMX_CNT; + 10045e4: 4982 ldr r1, [pc, #520] ; (10047f0 ) + SCIx->SCI_Tran_StateCB.contact_atr_rfb_overtime_falg = 1; + 10045e6: 54fa strb r2, [r7, r3] + SCIx->SCI_Tran_StateCB.time3_cnt_last = SCI7816_TIMX_CNT; + 10045e8: 4b82 ldr r3, [pc, #520] ; (10047f4 ) + ret = ISO7816_RecAtrBytes(SCIx,pAtr + 1, 1); //T0 + 10045ea: 0038 movs r0, r7 + SCIx->SCI_Tran_StateCB.time3_cnt_last = SCI7816_TIMX_CNT; + 10045ec: 5cfb ldrb r3, [r7, r3] + 10045ee: 3314 adds r3, #20 + 10045f0: 009b lsls r3, r3, #2 + 10045f2: 5859 ldr r1, [r3, r1] + 10045f4: 23a7 movs r3, #167 ; 0xa7 + 10045f6: 00db lsls r3, r3, #3 + 10045f8: 50f9 str r1, [r7, r3] + SCIx->SCI_Tran_StateCB.contact_atr_rab_overtime_falg = 0; + 10045fa: 2100 movs r1, #0 + 10045fc: 4b7e ldr r3, [pc, #504] ; (10047f8 ) + 10045fe: 54f9 strb r1, [r7, r3] + SCIx->SCI_Tran_StateCB.atr_cwt_valid_flag = 1; + 1004600: 4b7e ldr r3, [pc, #504] ; (10047fc ) + 1004602: 54fa strb r2, [r7, r3] + ret = ISO7816_RecAtrBytes(SCIx,pAtr + 1, 1); //T0 + 1004604: 9b00 ldr r3, [sp, #0] + 1004606: 1899 adds r1, r3, r2 + 1004608: f7ff fb98 bl 1003d3c + COMPARE_RETURN(ret); + 100460c: 1e05 subs r5, r0, #0 + 100460e: d1d2 bne.n 10045b6 + Y = pAtr[1] & 0xF0; + 1004610: 9b00 ldr r3, [sp, #0] + Len = 2; + 1004612: 2402 movs r4, #2 + Y = pAtr[1] & 0xF0; + 1004614: 785b ldrb r3, [r3, #1] + uint8_t TD2Flag = 0; + 1004616: 9003 str r0, [sp, #12] + Y = pAtr[1] & 0xF0; + 1004618: 9304 str r3, [sp, #16] + 100461a: 230f movs r3, #15 + 100461c: 9a04 ldr r2, [sp, #16] + uint8_t TDn = 0; + 100461e: 9002 str r0, [sp, #8] + Y = pAtr[1] & 0xF0; + 1004620: 439a bics r2, r3 + SCIx->g_7816Para.bProlType = 0xff; + 1004622: 003b movs r3, r7 + Y = pAtr[1] & 0xF0; + 1004624: 9201 str r2, [sp, #4] + SCIx->g_7816Para.bProlType = 0xff; + 1004626: 22ff movs r2, #255 ; 0xff + 1004628: 3328 adds r3, #40 ; 0x28 + 100462a: 701a strb r2, [r3, #0] + while (Y) + 100462c: 9b01 ldr r3, [sp, #4] + 100462e: 2b00 cmp r3, #0 + 1004630: d137 bne.n 10046a2 + K = pAtr[1] & 0x0F; + 1004632: 260f movs r6, #15 + 1004634: 9b04 ldr r3, [sp, #16] + 1004636: 4033 ands r3, r6 + 1004638: 001e movs r6, r3 + if (SCIx->g_7816Para.bProlType == 0xff) + 100463a: 003b movs r3, r7 + 100463c: 3328 adds r3, #40 ; 0x28 + 100463e: 781a ldrb r2, [r3, #0] + 1004640: 2aff cmp r2, #255 ; 0xff + 1004642: d000 beq.n 1004646 + 1004644: e089 b.n 100475a + SCIx->g_7816Para.bProlType = 0; + 1004646: 9a01 ldr r2, [sp, #4] + 1004648: 701a strb r2, [r3, #0] + if (K) + 100464a: 2e00 cmp r6, #0 + 100464c: d00f beq.n 100466e + ret = ISO7816_RecAtrBytes(SCIx,&pAtr[Len], K); + 100464e: 9b00 ldr r3, [sp, #0] + 1004650: b2b2 uxth r2, r6 + 1004652: 1919 adds r1, r3, r4 + 1004654: 0038 movs r0, r7 + 1004656: f7ff fb71 bl 1003d3c + Len += K; + 100465a: 1934 adds r4, r6, r4 + ret = ISO7816_RecAtrBytes(SCIx,&pAtr[Len], K); + 100465c: 0005 movs r5, r0 + Len += K; + 100465e: b2e4 uxtb r4, r4 + COMPARE_RETURN(ret); + 1004660: 2800 cmp r0, #0 + 1004662: d1a8 bne.n 10045b6 + if (SCIx->g_7816Para.bProlType || (TD2Flag == 1)) + 1004664: 003b movs r3, r7 + 1004666: 3328 adds r3, #40 ; 0x28 + 1004668: 781b ldrb r3, [r3, #0] + 100466a: 2b00 cmp r3, #0 + 100466c: d103 bne.n 1004676 + 100466e: 9b03 ldr r3, [sp, #12] + 1004670: 2b01 cmp r3, #1 + 1004672: d000 beq.n 1004676 + 1004674: e0b3 b.n 10047de + ret = ISO7816_RecAtrBytes(SCIx,&pAtr[Len], 1); + 1004676: 9b00 ldr r3, [sp, #0] + 1004678: 2201 movs r2, #1 + 100467a: 1919 adds r1, r3, r4 + 100467c: 0038 movs r0, r7 + 100467e: f7ff fb5d bl 1003d3c + 1004682: 1e05 subs r5, r0, #0 + COMPARE_RETURN(ret); + 1004684: d197 bne.n 10045b6 + Len++; + 1004686: 3401 adds r4, #1 + 1004688: b2e4 uxtb r4, r4 + if ((ATR_SIZE_MAX - 1) < Len) + 100468a: 2c32 cmp r4, #50 ; 0x32 + 100468c: d969 bls.n 1004762 + return ISO7816_ATR_LEN_ERROR; + 100468e: 2550 movs r5, #80 ; 0x50 + 1004690: e791 b.n 10045b6 + return ISO7816_ATR_ERROR; + 1004692: 254f movs r5, #79 ; 0x4f + else if (pAtr[0] == 0x03) + 1004694: 2a03 cmp r2, #3 + 1004696: d000 beq.n 100469a + 1004698: e78d b.n 10045b6 + SCIx->SCIx7816->MODE.bit.CODE_DRT =1; //反向卡片 + 100469a: 6819 ldr r1, [r3, #0] + 100469c: 3a01 subs r2, #1 + 100469e: 430a orrs r2, r1 + 10046a0: e79d b.n 10045de + if (Y & BIT4) + 10046a2: 2210 movs r2, #16 + TDn++; + 10046a4: 9b02 ldr r3, [sp, #8] + 10046a6: 3301 adds r3, #1 + 10046a8: b2db uxtb r3, r3 + 10046aa: 9302 str r3, [sp, #8] + if (Y & BIT4) + 10046ac: 9b01 ldr r3, [sp, #4] + 10046ae: 4213 tst r3, r2 + 10046b0: d00b beq.n 10046ca + ret = ISO7816_RecAtrBytes(SCIx,&pAtr[Len++], 1); + 10046b2: 9b00 ldr r3, [sp, #0] + 10046b4: 3a0f subs r2, #15 + 10046b6: 1919 adds r1, r3, r4 + 10046b8: 0038 movs r0, r7 + 10046ba: f7ff fb3f bl 1003d3c + 10046be: 1c66 adds r6, r4, #1 + 10046c0: b2f6 uxtb r6, r6 + 10046c2: 1e05 subs r5, r0, #0 + COMPARE_RETURN(ret); + 10046c4: d000 beq.n 10046c8 + 10046c6: e776 b.n 10045b6 + ret = ISO7816_RecAtrBytes(SCIx,&pAtr[Len++], 1); + 10046c8: 0034 movs r4, r6 + if (Y & BIT5) + 10046ca: 2220 movs r2, #32 + 10046cc: 9b01 ldr r3, [sp, #4] + 10046ce: 4213 tst r3, r2 + 10046d0: d00b beq.n 10046ea + ret = ISO7816_RecAtrBytes(SCIx,&pAtr[Len++], 1); + 10046d2: 9b00 ldr r3, [sp, #0] + 10046d4: 3a1f subs r2, #31 + 10046d6: 1919 adds r1, r3, r4 + 10046d8: 0038 movs r0, r7 + 10046da: f7ff fb2f bl 1003d3c + 10046de: 1c66 adds r6, r4, #1 + 10046e0: b2f6 uxtb r6, r6 + 10046e2: 1e05 subs r5, r0, #0 + COMPARE_RETURN(ret); + 10046e4: d000 beq.n 10046e8 + 10046e6: e766 b.n 10045b6 + ret = ISO7816_RecAtrBytes(SCIx,&pAtr[Len++], 1); + 10046e8: 0034 movs r4, r6 + if (Y & BIT6) + 10046ea: 9b01 ldr r3, [sp, #4] + 10046ec: 065b lsls r3, r3, #25 + 10046ee: d50b bpl.n 1004708 + ret = ISO7816_RecAtrBytes(SCIx,&pAtr[Len++], 1); + 10046f0: 9b00 ldr r3, [sp, #0] + 10046f2: 2201 movs r2, #1 + 10046f4: 1919 adds r1, r3, r4 + 10046f6: 0038 movs r0, r7 + 10046f8: f7ff fb20 bl 1003d3c + 10046fc: 1c66 adds r6, r4, #1 + 10046fe: b2f6 uxtb r6, r6 + 1004700: 1e05 subs r5, r0, #0 + COMPARE_RETURN(ret); + 1004702: d000 beq.n 1004706 + 1004704: e757 b.n 10045b6 + ret = ISO7816_RecAtrBytes(SCIx,&pAtr[Len++], 1); + 1004706: 0034 movs r4, r6 + if (Y & BIT7) + 1004708: 466b mov r3, sp + Y = 0; + 100470a: 2200 movs r2, #0 + if (Y & BIT7) + 100470c: 791b ldrb r3, [r3, #4] + Y = 0; + 100470e: 9201 str r2, [sp, #4] + if (Y & BIT7) + 1004710: b25b sxtb r3, r3 + 1004712: 4293 cmp r3, r2 + 1004714: da8d bge.n 1004632 + ret = ISO7816_RecAtrBytes(SCIx,&pAtr[Len], 1); + 1004716: 9b00 ldr r3, [sp, #0] + 1004718: 3201 adds r2, #1 + 100471a: 191e adds r6, r3, r4 + 100471c: 0031 movs r1, r6 + 100471e: 0038 movs r0, r7 + 1004720: f7ff fb0c bl 1003d3c + 1004724: 1e05 subs r5, r0, #0 + COMPARE_RETURN(ret); + 1004726: d000 beq.n 100472a + 1004728: e745 b.n 10045b6 + Y = pAtr[Len] & 0xF0; + 100472a: 7833 ldrb r3, [r6, #0] + 100472c: 210f movs r1, #15 + 100472e: 001a movs r2, r3 + 1004730: 438a bics r2, r1 + 1004732: 9201 str r2, [sp, #4] + if (SCIx->g_7816Para.bProlType == 0xff) + 1004734: 003a movs r2, r7 + 1004736: 3228 adds r2, #40 ; 0x28 + 1004738: 7815 ldrb r5, [r2, #0] + 100473a: 2dff cmp r5, #255 ; 0xff + 100473c: d103 bne.n 1004746 + SCIx->g_7816Para.bProlType = pAtr[Len] & 0x0F; + 100473e: 400b ands r3, r1 + if (1 < SCIx->g_7816Para.bProlType) + 1004740: 2b01 cmp r3, #1 + 1004742: d808 bhi.n 1004756 + SCIx->g_7816Para.bProlType = pAtr[Len] & 0x0F; + 1004744: 7013 strb r3, [r2, #0] + if (TDn == 2) /*&& (((pAtr[Len] & 0x0F) == 1) || ((pAtr[Len] & 0x0F) == 14))*/ + 1004746: 9b02 ldr r3, [sp, #8] + 1004748: 2b02 cmp r3, #2 + 100474a: d101 bne.n 1004750 + TD2Flag = 1; + 100474c: 3b01 subs r3, #1 + 100474e: 9303 str r3, [sp, #12] + Len++; + 1004750: 3401 adds r4, #1 + 1004752: b2e4 uxtb r4, r4 + 1004754: e76a b.n 100462c + SCIx->g_7816Para.bProlType = 0; + 1004756: 7010 strb r0, [r2, #0] + 1004758: e7f5 b.n 1004746 + if (K) + 100475a: 2e00 cmp r6, #0 + 100475c: d100 bne.n 1004760 + 100475e: e781 b.n 1004664 + 1004760: e775 b.n 100464e + if (SCIx->g_7816Para.bProlType) + 1004762: 003b movs r3, r7 + 1004764: 3328 adds r3, #40 ; 0x28 + 1004766: 781b ldrb r3, [r3, #0] + 1004768: 2b00 cmp r3, #0 + 100476a: d11c bne.n 10047a6 + *pLength = Len; + 100476c: 9b05 ldr r3, [sp, #20] + delay_ms(6); + 100476e: 2006 movs r0, #6 + *pLength = Len; + 1004770: 701c strb r4, [r3, #0] + delay_ms(6); + 1004772: f7fe f85f bl 1002834 + ret = 0; + 1004776: 2500 movs r5, #0 + i = 3; + 1004778: 2603 movs r6, #3 + while ((SCIx->SCIx7816->STATUS.bit.RFIFO_N & 1) || (SCIx->SCIx7816->FIFO_CTRL.bit.R_ITEMS)) + 100477a: 683b ldr r3, [r7, #0] + 100477c: 68da ldr r2, [r3, #12] + 100477e: 07d2 lsls r2, r2, #31 + 1004780: d41a bmi.n 10047b8 + 1004782: 338c adds r3, #140 ; 0x8c + 1004784: 681b ldr r3, [r3, #0] + 1004786: 041b lsls r3, r3, #16 + 1004788: 0f1b lsrs r3, r3, #28 + 100478a: d115 bne.n 10047b8 + if (ret == 1) + 100478c: 2d01 cmp r5, #1 + 100478e: d100 bne.n 1004792 + 1004790: e77d b.n 100468e + while (i--); + 1004792: 1e73 subs r3, r6, #1 + 1004794: b2db uxtb r3, r3 + 1004796: 2e00 cmp r6, #0 + 1004798: d11d bne.n 10047d6 + 100479a: e70c b.n 10045b6 + Tck ^= pAtr[i]; + 100479c: 9b00 ldr r3, [sp, #0] + 100479e: 9a01 ldr r2, [sp, #4] + 10047a0: 5d5b ldrb r3, [r3, r5] + 10047a2: 405a eors r2, r3 + 10047a4: 9201 str r2, [sp, #4] + 10047a6: 3501 adds r5, #1 + for (i = 1, Tck = 0; i < Len; i++) + 10047a8: b2eb uxtb r3, r5 + 10047aa: 429c cmp r4, r3 + 10047ac: d8f6 bhi.n 100479c + if (Tck) + 10047ae: 9b01 ldr r3, [sp, #4] + return ISO7816_ATR_TCK_ERROR; + 10047b0: 2551 movs r5, #81 ; 0x51 + if (Tck) + 10047b2: 2b00 cmp r3, #0 + 10047b4: d0da beq.n 100476c + 10047b6: e6fe b.n 10045b6 + ISO7816_RecAtrBytes(SCIx,&pAtr[Len], 1); + 10047b8: 9b00 ldr r3, [sp, #0] + 10047ba: 2201 movs r2, #1 + 10047bc: 1919 adds r1, r3, r4 + 10047be: 0038 movs r0, r7 + 10047c0: f7ff fabc bl 1003d3c + if (ISO7816_Detect_Io_State() == SCIx->SCI_Tran_StateCB.Sci_Pin_Detect_State) + 10047c4: f7ff f924 bl 1003a10 + 10047c8: 23b7 movs r3, #183 ; 0xb7 + 10047ca: 009b lsls r3, r3, #2 + 10047cc: 5cfb ldrb r3, [r7, r3] + 10047ce: 4298 cmp r0, r3 + 10047d0: d003 beq.n 10047da + 10047d2: 0033 movs r3, r6 + ret = 1; + 10047d4: 2501 movs r5, #1 + 10047d6: 001e movs r6, r3 + 10047d8: e7cf b.n 100477a + return ISO7816_CARD_ABSENT; + 10047da: 2562 movs r5, #98 ; 0x62 + 10047dc: e6eb b.n 10045b6 + if ((ATR_SIZE_MAX - 1) < Len) + 10047de: 2c32 cmp r4, #50 ; 0x32 + 10047e0: d900 bls.n 10047e4 + 10047e2: e754 b.n 100468e + 10047e4: e7c2 b.n 100476c + 10047e6: 46c0 nop ; (mov r8, r8) + 10047e8: 0100713d .word 0x0100713d + 10047ec: 000002e5 .word 0x000002e5 + 10047f0: 000f0c00 .word 0x000f0c00 + 10047f4: 00000542 .word 0x00000542 + 10047f8: 000002e6 .word 0x000002e6 + 10047fc: 000002e2 .word 0x000002e2 + +01004800 : + * @param pATR: ATR data storage unit + * @param ATRLen: ATR data length + * @retval OK: 0 on success + */ +uint16_t ISO7816_DisposeATR(SCI_Struct_Type *SCIx,uint8_t *pATR, uint8_t ATRLen) +{ + 1004800: b5f8 push {r3, r4, r5, r6, r7, lr} + uint8_t TC1_N = 0; + uint8_t TD1_N = 0, TD1_Flag = 0; + uint8_t tmpCWI, tmpBWI; + + //IFSC IC卡信息域大小 默认值32 + SCIx->g_T1.bIFSC = 32; + 1004802: 2320 movs r3, #32 + SCIx->g_7816Para.bFlag &= (~BIT0); + 1004804: 1d46 adds r6, r0, #5 + SCIx->g_T1.bIFSC = 32; + 1004806: 7103 strb r3, [r0, #4] + SCIx->g_7816Para.bFlag &= (~BIT0); + 1004808: 7ff4 ldrb r4, [r6, #31] + 100480a: 3b1f subs r3, #31 + 100480c: 439c bics r4, r3 + 100480e: 46a4 mov ip, r4 + 1004810: 77f4 strb r4, [r6, #31] + if ((pATR == NULL) || (ATRLen < 3) || (ATRLen > ATR_SIZE_MAX)) + { + return ISO7816_PARA_ERROR; + 1004812: 2759 movs r7, #89 ; 0x59 + if ((pATR == NULL) || (ATRLen < 3) || (ATRLen > ATR_SIZE_MAX)) + 1004814: 2900 cmp r1, #0 + 1004816: d100 bne.n 100481a + 1004818: e09d b.n 1004956 + 100481a: 3a03 subs r2, #3 + 100481c: 2a30 cmp r2, #48 ; 0x30 + 100481e: d900 bls.n 1004822 + 1004820: e099 b.n 1004956 + } + + tmpTDx = pATR[1] & 0xF0; //高4位 + 1004822: 784c ldrb r4, [r1, #1] + 1004824: 220f movs r2, #15 + 1004826: 0025 movs r5, r4 + 1004828: 4395 bics r5, r2 + + offset = 2; + 100482a: 3a0d subs r2, #13 + //TA1--TD1 + //TA1 BIT4 + if ((tmpTDx & BIT4) != 0) + 100482c: 06e7 lsls r7, r4, #27 + 100482e: d506 bpl.n 100483e + { + offset++; + SCIx->g_7816Para.bFlag |= BIT0; //BIT0为1时表示收到TA1 + 1004830: 4662 mov r2, ip + 1004832: 4313 orrs r3, r2 + 1004834: 77f3 strb r3, [r6, #31] + SCIx->g_7816Para.bTA1 = pATR[2]; + 1004836: 788a ldrb r2, [r1, #2] + 1004838: 1d83 adds r3, r0, #6 + 100483a: 77da strb r2, [r3, #31] + offset++; + 100483c: 2203 movs r2, #3 + //不发PPS + //return ISO7816_ATR_TA1_ERROR; + } + } + //TB1 + if ((tmpTDx & BIT5) != 0) + 100483e: 06a3 lsls r3, r4, #26 + 1004840: d501 bpl.n 1004846 + { + #ifndef EMV_L1_43D + return ISO7816_ATR_TB1_ERROR; + #endif + } + offset++; + 1004842: 3201 adds r2, #1 + 1004844: b2d2 uxtb r2, r2 + #endif + } + } + + //TC1 + if ((tmpTDx & BIT6) != 0) + 1004846: 2340 movs r3, #64 ; 0x40 + 1004848: 401c ands r4, r3 + 100484a: 23a3 movs r3, #163 ; 0xa3 + 100484c: 00db lsls r3, r3, #3 + 100484e: 2c00 cmp r4, #0 + 1004850: d023 beq.n 100489a + { + if (pATR[offset] == 0xFF) + 1004852: 188f adds r7, r1, r2 + 1004854: 783c ldrb r4, [r7, #0] + 1004856: 2cff cmp r4, #255 ; 0xff + 1004858: d11d bne.n 1004896 + 100485a: 3cf3 subs r4, #243 ; 0xf3 + SCIx->SCI_Tran_StateCB.terminal_send_cwt = 12; + } + } + else + { + SCIx->SCI_Tran_StateCB.terminal_send_cwt = pATR[offset] + 12; + 100485c: 50c4 str r4, [r0, r3] + } + //保存N值，后面会用到 + TC1_N = pATR[offset]; + //TC1_Flag = 1; + offset++; + 100485e: 3201 adds r2, #1 + TC1_N = pATR[offset]; + 1004860: 783c ldrb r4, [r7, #0] + offset++; + 1004862: b2d2 uxtb r2, r2 + } + } + + + //TD1 + if ((tmpTDx & BIT7) != 0) + 1004864: b26d sxtb r5, r5 + 1004866: 2d00 cmp r5, #0 + 1004868: da1a bge.n 10048a0 + 100486a: 260f movs r6, #15 + { + //只支持T=0 T=1 + TD1_N = pATR[offset]; + 100486c: 188b adds r3, r1, r2 + 100486e: 781d ldrb r5, [r3, #0] + if ((TD1_N & 0x0F) == 1) + { + TD1_Flag = 1; + } + SCIx->g_7816Para.bProlType = pATR[offset] & 0x0f; + 1004870: 0007 movs r7, r0 + 1004872: 402e ands r6, r5 + 1004874: 0005 movs r5, r0 + 1004876: 3528 adds r5, #40 ; 0x28 + 1004878: 702e strb r6, [r5, #0] + tmpTDx = pATR[offset]; + 100487a: 781d ldrb r5, [r3, #0] + offset++; + 100487c: 1c53 adds r3, r2, #1 + 100487e: 46b4 mov ip, r6 + SCIx->g_7816Para.bProlType = pATR[offset] & 0x0f; + 1004880: 3708 adds r7, #8 + offset++; + 1004882: b2db uxtb r3, r3 + tmpTDx = 0; + SCIx->g_7816Para.bTA1 = 0x11; + } + + //TA2-TD2 + if (tmpTDx != 0) + 1004884: 2d00 cmp r5, #0 + 1004886: d10f bne.n 10048a8 + } + } + else + { + //如果是T1协议，没有TB3，则需要复位操作 + if (SCIx->g_7816Para.bProlType == 1) + 1004888: 0003 movs r3, r0 + 100488a: 3328 adds r3, #40 ; 0x28 + 100488c: 781b ldrb r3, [r3, #0] + 100488e: 2b01 cmp r3, #1 + 1004890: d000 beq.n 1004894 + 1004892: e0cc b.n 1004a2e + 1004894: e05e b.n 1004954 + SCIx->SCI_Tran_StateCB.terminal_send_cwt = pATR[offset] + 12; + 1004896: 340c adds r4, #12 + 1004898: e7e0 b.n 100485c + 100489a: 260c movs r6, #12 + SCIx->SCI_Tran_StateCB.terminal_send_cwt = 12; + 100489c: 50c6 str r6, [r0, r3] + 100489e: e7e1 b.n 1004864 + SCIx->g_7816Para.bTA1 = 0x11; + 10048a0: 2211 movs r2, #17 + 10048a2: 1d83 adds r3, r0, #6 + 10048a4: 77da strb r2, [r3, #31] + 10048a6: e7ef b.n 1004888 + if ((tmpTDx & BIT4) != 0) + 10048a8: 2610 movs r6, #16 + 10048aa: 4235 tst r5, r6 + 10048ac: d055 beq.n 100495a + SCIx->g_7816Para.bTA2Flag = 1; + 10048ae: 3e0f subs r6, #15 + 10048b0: 77fe strb r6, [r7, #31] + SCIx->g_7816Para.bTA2 = pATR[offset]; + 10048b2: 18cb adds r3, r1, r3 + 10048b4: 781f ldrb r7, [r3, #0] + 10048b6: 003e movs r6, r7 + 10048b8: 1dc7 adds r7, r0, #7 + 10048ba: 77fe strb r6, [r7, #31] + if ((pATR[offset] & 0x10) != 0) //b5 + 10048bc: 2610 movs r6, #16 + 10048be: 781b ldrb r3, [r3, #0] + return ISO7816_ATR_TA2_ERROR; + 10048c0: 2777 movs r7, #119 ; 0x77 + if ((pATR[offset] & 0x10) != 0) //b5 + 10048c2: 4233 tst r3, r6 + 10048c4: d147 bne.n 1004956 + offset++; + 10048c6: 3202 adds r2, #2 + 10048c8: b2d3 uxtb r3, r2 + if ((SCIx->g_7816Para.bFlag & BIT0) && (SCIx->g_7816Para.bTA1 != 0x11)) + 10048ca: 1d42 adds r2, r0, #5 + 10048cc: 7fd2 ldrb r2, [r2, #31] + 10048ce: 3e0f subs r6, #15 + 10048d0: 4232 tst r2, r6 + 10048d2: d00f beq.n 10048f4 + 10048d4: 1d82 adds r2, r0, #6 + 10048d6: 7fd2 ldrb r2, [r2, #31] + 10048d8: 2a11 cmp r2, #17 + 10048da: d00b beq.n 10048f4 + 10048dc: 360e adds r6, #14 + 10048de: 4032 ands r2, r6 + 10048e0: 4e63 ldr r6, [pc, #396] ; (1004a70 ) + tmpTimer = 10080; + 10048e2: 0037 movs r7, r6 + if ((SCIx->g_7816Para.bTA1 & 0xF) > 1) + 10048e4: 2a01 cmp r2, #1 + 10048e6: d903 bls.n 10048f0 + tmpTimer *= SCIx->SCI_Tran_StateCB.di_table[SCIx->g_7816Para.bTA1 & 0xF]; // * DI + 10048e8: 32c4 adds r2, #196 ; 0xc4 + 10048ea: 0052 lsls r2, r2, #1 + 10048ec: 5a17 ldrh r7, [r2, r0] + 10048ee: 4377 muls r7, r6 + SCIx->SCI_Tran_StateCB.terminal_rec_cwt = tmpTimer; + 10048f0: 4a60 ldr r2, [pc, #384] ; (1004a74 ) + 10048f2: 5087 str r7, [r0, r2] + if ((tmpTDx & BIT5) != 0) + 10048f4: 06aa lsls r2, r5, #26 + 10048f6: d505 bpl.n 1004904 + if (pATR[offset] == 0x31) + 10048f8: 5cca ldrb r2, [r1, r3] + return ISO7816_ATR_TB2_ERROR; + 10048fa: 2780 movs r7, #128 ; 0x80 + if (pATR[offset] == 0x31) + 10048fc: 2a31 cmp r2, #49 ; 0x31 + 10048fe: d02a beq.n 1004956 + offset++; + 1004900: 3301 adds r3, #1 + 1004902: b2db uxtb r3, r3 + if ((tmpTDx & BIT6) != 0) //专用T=0协议 WI + 1004904: 066a lsls r2, r5, #25 + 1004906: d51a bpl.n 100493e + if (SCIx->g_7816Para.bProlType == PROTOCOL_T0) + 1004908: 0002 movs r2, r0 + 100490a: 3228 adds r2, #40 ; 0x28 + 100490c: 7812 ldrb r2, [r2, #0] + 100490e: 2a00 cmp r2, #0 + 1004910: d113 bne.n 100493a + if (10 != pATR[offset]) + 1004912: 5cca ldrb r2, [r1, r3] + return ISO7816_ATR_TC2_ERROR; + 1004914: 2775 movs r7, #117 ; 0x75 + if (10 != pATR[offset]) + 1004916: 2a0a cmp r2, #10 + 1004918: d11d bne.n 1004956 + if (SCIx->g_7816Para.bFlag & BIT0) + 100491a: 1d42 adds r2, r0, #5 + 100491c: 7fd7 ldrb r7, [r2, #31] + 100491e: 4e54 ldr r6, [pc, #336] ; (1004a70 ) + tmpTimer = 960 * pATR[offset] + 480; //默认9600 + 480 + 1004920: 0032 movs r2, r6 + if (SCIx->g_7816Para.bFlag & BIT0) + 1004922: 07ff lsls r7, r7, #31 + 1004924: d507 bpl.n 1004936 + tmpTimer *= SCIx->SCI_Tran_StateCB.di_table[SCIx->g_7816Para.bTA1 & 0xF]; // * DI + 1004926: 270f movs r7, #15 + 1004928: 1d82 adds r2, r0, #6 + 100492a: 7fd2 ldrb r2, [r2, #31] + 100492c: 403a ands r2, r7 + 100492e: 32c4 adds r2, #196 ; 0xc4 + 1004930: 0052 lsls r2, r2, #1 + 1004932: 5a12 ldrh r2, [r2, r0] + 1004934: 4372 muls r2, r6 + SCIx->SCI_Tran_StateCB.terminal_rec_cwt = tmpTimer; + 1004936: 4e4f ldr r6, [pc, #316] ; (1004a74 ) + 1004938: 5182 str r2, [r0, r6] + offset++; + 100493a: 3301 adds r3, #1 + 100493c: b2db uxtb r3, r3 + if ((tmpTDx & BIT7) != 0) + 100493e: b26d sxtb r5, r5 + 1004940: 2d00 cmp r5, #0 + 1004942: daa1 bge.n 1004888 + 1004944: 220f movs r2, #15 + if (TD1_Flag) + 1004946: 4666 mov r6, ip + 1004948: 5ccd ldrb r5, [r1, r3] + 100494a: 402a ands r2, r5 + 100494c: 2e01 cmp r6, #1 + 100494e: d108 bne.n 1004962 + if ((pATR[offset] & 0x0f) != 1) + 1004950: 2a01 cmp r2, #1 + 1004952: d00b beq.n 100496c + return ISO7816_ATR_TD2_ERROR; + 1004954: 2779 movs r7, #121 ; 0x79 + MyPrintf("terminal_send_cwt %08x= \r\n", SCIx->SCI_Tran_StateCB.terminal_send_cwt); + #endif + + + return OK; +} + 1004956: 0038 movs r0, r7 + 1004958: bdf8 pop {r3, r4, r5, r6, r7, pc} + SCIx->g_7816Para.bTA1 = 0x11; + 100495a: 2611 movs r6, #17 + 100495c: 1d82 adds r2, r0, #6 + 100495e: 77d6 strb r6, [r2, #31] + 1004960: e7c8 b.n 10048f4 + else if (((pATR[offset] & 0x0f) != 1) && ((pATR[offset] & 0x0f) != 14)) + 1004962: 2a01 cmp r2, #1 + 1004964: d002 beq.n 100496c + return ISO7816_ATR_ERROR; + 1004966: 274f movs r7, #79 ; 0x4f + else if (((pATR[offset] & 0x0f) != 1) && ((pATR[offset] & 0x0f) != 14)) + 1004968: 2a0e cmp r2, #14 + 100496a: d1f4 bne.n 1004956 + offset++; + 100496c: 1c5a adds r2, r3, #1 + 100496e: b2d2 uxtb r2, r2 + if (tmpTDx != 0) + 1004970: 2d00 cmp r5, #0 + 1004972: d100 bne.n 1004976 + 1004974: e788 b.n 1004888 + if ((tmpTDx & BIT4) != 0) + 1004976: 06ee lsls r6, r5, #27 + 1004978: d509 bpl.n 100498e + if ((pATR[offset] < 16) || (pATR[offset] == 0xff)) + 100497a: 5c8e ldrb r6, [r1, r2] + return ISO7816_ATR_TA3_ERROR; + 100497c: 2778 movs r7, #120 ; 0x78 + if ((pATR[offset] < 16) || (pATR[offset] == 0xff)) + 100497e: 0032 movs r2, r6 + 1004980: 3a10 subs r2, #16 + 1004982: b2d2 uxtb r2, r2 + 1004984: 2aee cmp r2, #238 ; 0xee + 1004986: d8e6 bhi.n 1004956 + offset++; + 1004988: 3302 adds r3, #2 + SCIx->g_T1.bIFSC = pATR[offset]; + 100498a: 7106 strb r6, [r0, #4] + offset++; + 100498c: b2da uxtb r2, r3 + 100498e: 0003 movs r3, r0 + 1004990: 3328 adds r3, #40 ; 0x28 + 1004992: 781b ldrb r3, [r3, #0] + if ((tmpTDx & BIT5) != 0) + 1004994: 06ae lsls r6, r5, #26 + 1004996: d558 bpl.n 1004a4a + if (SCIx->g_7816Para.bProlType != 0) + 1004998: 2b00 cmp r3, #0 + 100499a: d044 beq.n 1004a26 + tmpCWI = pATR[offset] & 0x0f; + 100499c: 270f movs r7, #15 + 100499e: 188b adds r3, r1, r2 + 10049a0: 469c mov ip, r3 + 10049a2: 781b ldrb r3, [r3, #0] + 10049a4: 401f ands r7, r3 + if ((tmpCWI > 5) || (tmpBWI > 4)) + 10049a6: 2f05 cmp r7, #5 + 10049a8: d8d4 bhi.n 1004954 + 10049aa: 2b4f cmp r3, #79 ; 0x4f + 10049ac: d8d2 bhi.n 1004954 + if ((TC1_N > 0x1f) && (TC1_N != 0xff)) + 10049ae: 0023 movs r3, r4 + 10049b0: 3b20 subs r3, #32 + 10049b2: b2db uxtb r3, r3 + 10049b4: 2bde cmp r3, #222 ; 0xde + 10049b6: d9cd bls.n 1004954 + 10049b8: 003e movs r6, r7 + tmpLen = 1; + 10049ba: 2301 movs r3, #1 + while (tmpCWI > 0) + 10049bc: 2e00 cmp r6, #0 + 10049be: d13f bne.n 1004a40 + if ((tmpLen < (TC1_N + 1)) && (TC1_N != 0xff)) + 10049c0: 42a3 cmp r3, r4 + 10049c2: d801 bhi.n 10049c8 + 10049c4: 2cff cmp r4, #255 ; 0xff + 10049c6: d1c5 bne.n 1004954 + if ((SCIx->g_7816Para.bFlag & BIT0) != 0) + 10049c8: 2401 movs r4, #1 + 10049ca: 1d43 adds r3, r0, #5 + 10049cc: 7fdb ldrb r3, [r3, #31] + tmpLen = 1; + 10049ce: 0026 movs r6, r4 + if ((SCIx->g_7816Para.bFlag & BIT0) != 0) + 10049d0: 4223 tst r3, r4 + 10049d2: d009 beq.n 10049e8 + tmpLen = SCIx->SCI_Tran_StateCB.di_table[SCIx->g_7816Para.bTA1 & 0x0f]; + 10049d4: 1d83 adds r3, r0, #6 + 10049d6: 7fdb ldrb r3, [r3, #31] + 10049d8: 360e adds r6, #14 + 10049da: 4033 ands r3, r6 + 10049dc: 33c4 adds r3, #196 ; 0xc4 + 10049de: 40a3 lsls r3, r4 + 10049e0: 5cc6 ldrb r6, [r0, r3] + if(tmpLen == 0) + 10049e2: 2e00 cmp r6, #0 + 10049e4: d100 bne.n 10049e8 + tmpLen = 1; + 10049e6: 0026 movs r6, r4 + SCIx->SCI_Tran_StateCB.terminal_rec_cwt = (1 << (pATR[offset] & 0x0F)) + 11 + 4; //YC3121T + 10049e8: 2301 movs r3, #1 + 10049ea: 001c movs r4, r3 + 10049ec: 40bc lsls r4, r7 + 10049ee: 4f21 ldr r7, [pc, #132] ; (1004a74 ) + 10049f0: 340f adds r4, #15 + 10049f2: 51c4 str r4, [r0, r7] + SCIx->SCI_Tran_StateCB.terminal_rec_bwt = (1 << ((pATR[offset] & 0xF0) >> 4)); + 10049f4: 4664 mov r4, ip + 10049f6: 001f movs r7, r3 + 10049f8: 7824 ldrb r4, [r4, #0] + 10049fa: 0924 lsrs r4, r4, #4 + 10049fc: 40a7 lsls r7, r4 + 10049fe: 24a4 movs r4, #164 ; 0xa4 + 1004a00: 00e4 lsls r4, r4, #3 + 1004a02: 5107 str r7, [r0, r4] + if (SCIx->SCI_Tran_StateCB.terminal_rec_bwt == 0) + 1004a04: 5907 ldr r7, [r0, r4] + 1004a06: 2f00 cmp r7, #0 + 1004a08: d100 bne.n 1004a0c + SCIx->SCI_Tran_StateCB.terminal_rec_bwt = 1; + 1004a0a: 5103 str r3, [r0, r4] + SCIx->SCI_Tran_StateCB.terminal_rec_bwt = SCIx->SCI_Tran_StateCB.terminal_rec_bwt * 960 * tmpLen + 11 + 960 * tmpLen; //YC1321T + 20; + 1004a0c: 27f0 movs r7, #240 ; 0xf0 + 1004a0e: 5903 ldr r3, [r0, r4] + 1004a10: 00bf lsls r7, r7, #2 + 1004a12: 437b muls r3, r7 + 1004a14: 4373 muls r3, r6 + 1004a16: 437e muls r6, r7 + 1004a18: 330b adds r3, #11 + 1004a1a: 199b adds r3, r3, r6 + 1004a1c: 5103 str r3, [r0, r4] + SCIx->SCI_Tran_StateCB.terminal_rec_bwt_atr = SCIx->SCI_Tran_StateCB.terminal_rec_bwt; + 1004a1e: 23a5 movs r3, #165 ; 0xa5 + 1004a20: 5904 ldr r4, [r0, r4] + 1004a22: 00db lsls r3, r3, #3 + 1004a24: 50c4 str r4, [r0, r3] + offset++; + 1004a26: 3201 adds r2, #1 + 1004a28: b2d2 uxtb r2, r2 + if ((tmpTDx & BIT6) != 0) + 1004a2a: 066b lsls r3, r5, #25 + 1004a2c: d410 bmi.n 1004a50 + if (SCIx->g_7816Para.bProlType == 0) + 1004a2e: 0003 movs r3, r0 + 1004a30: 3328 adds r3, #40 ; 0x28 + 1004a32: 781a ldrb r2, [r3, #0] + 1004a34: 4b0f ldr r3, [pc, #60] ; (1004a74 ) + 1004a36: 2a00 cmp r2, #0 + 1004a38: d00f beq.n 1004a5a + SCIx->SCI_Tran_StateCB.terminal_rec_cwt += 1; + 1004a3a: 58c2 ldr r2, [r0, r3] + 1004a3c: 3201 adds r2, #1 + 1004a3e: e012 b.n 1004a66 + tmpLen = tmpLen * 2; + 1004a40: 005b lsls r3, r3, #1 + tmpCWI--; + 1004a42: 3e01 subs r6, #1 + tmpLen = tmpLen * 2; + 1004a44: b2db uxtb r3, r3 + tmpCWI--; + 1004a46: b2f6 uxtb r6, r6 + 1004a48: e7b8 b.n 10049bc + if (SCIx->g_7816Para.bProlType == 1) + 1004a4a: 2b01 cmp r3, #1 + 1004a4c: d1ed bne.n 1004a2a + 1004a4e: e781 b.n 1004954 + if (0 != pATR[offset]) + 1004a50: 5c8b ldrb r3, [r1, r2] + return ISO7816_ATR_TC3_ERROR; + 1004a52: 2776 movs r7, #118 ; 0x76 + if (0 != pATR[offset]) + 1004a54: 2b00 cmp r3, #0 + 1004a56: d0ea beq.n 1004a2e + 1004a58: e77d b.n 1004956 + SCIx->SCI_Tran_StateCB.terminal_rec_cwt += 12; + 1004a5a: 58c2 ldr r2, [r0, r3] + 1004a5c: 320c adds r2, #12 + 1004a5e: 50c2 str r2, [r0, r3] + SCIx->SCI_Tran_StateCB.terminal_rec_bwt = SCIx->SCI_Tran_StateCB.terminal_rec_cwt; + 1004a60: 58c2 ldr r2, [r0, r3] + 1004a62: 23a4 movs r3, #164 ; 0xa4 + 1004a64: 00db lsls r3, r3, #3 + SCIx->SCI_Tran_StateCB.terminal_rec_cwt += 1; + 1004a66: 50c2 str r2, [r0, r3] + ISO7816_TXRX_TIME_Init(SCIx); + 1004a68: f7ff f818 bl 1003a9c + return OK; + 1004a6c: 2700 movs r7, #0 + 1004a6e: e772 b.n 1004956 + 1004a70: 00002760 .word 0x00002760 + 1004a74: 0000051c .word 0x0000051c + +01004a78 : + 0x02 ISO7816_DEACTIVE_CARD + * @param SCIx: x=0:sci0 x=1;sci1 + * @retval OK: 0 on success + */ +uint16_t ISO7816_OperateSelect(uint8_t OperateMode, SCI_Struct_Type* SCIx) +{ + 1004a78: b570 push {r4, r5, r6, lr} + 1004a7a: 000c movs r4, r1 + uint16_t ret = 0; + + switch (OperateMode) + 1004a7c: 2801 cmp r0, #1 + 1004a7e: d022 beq.n 1004ac6 + 1004a80: 2800 cmp r0, #0 + 1004a82: d003 beq.n 1004a8c + 1004a84: 2802 cmp r0, #2 + 1004a86: d028 beq.n 1004ada + case ISO7816_DEACTIVE_CARD: + //IC卡下电 + ISO7816_Deactive(SCIx); + break; + default: + return ISO7816_OPERATE_MODE_ERROR; + 1004a88: 2057 movs r0, #87 ; 0x57 + 1004a8a: e010 b.n 1004aae + ret[0] = ISO7816_Detect_Io_State(); + 1004a8c: f7fe ffc0 bl 1003a10 + 1004a90: 0005 movs r5, r0 + delay_ms(2); + 1004a92: 2002 movs r0, #2 + 1004a94: f7fd fece bl 1002834 + ret[1] = ISO7816_Detect_Io_State(); + 1004a98: f7fe ffba bl 1003a10 + if (ret[0] == ret[1]) + 1004a9c: 4285 cmp r5, r0 + 1004a9e: d000 beq.n 1004aa2 + return 2; + 1004aa0: 2502 movs r5, #2 + if (ret == SCIx->SCI_Tran_StateCB.Sci_Pin_Detect_State) + 1004aa2: 23b7 movs r3, #183 ; 0xb7 + 1004aa4: 009b lsls r3, r3, #2 + 1004aa6: 5ce3 ldrb r3, [r4, r3] + 1004aa8: 42ab cmp r3, r5 + 1004aaa: d101 bne.n 1004ab0 + return ISO7816_CARD_STUTES_ERROR; + 1004aac: 2056 movs r0, #86 ; 0x56 + } + return OK; +} + 1004aae: bd70 pop {r4, r5, r6, pc} + ret = ISO7816_Cold_Reset(SCIx); + 1004ab0: 0020 movs r0, r4 + 1004ab2: f7ff faa9 bl 1004008 + if (ret != OK) + 1004ab6: 2800 cmp r0, #0 + 1004ab8: d1f8 bne.n 1004aac + SCIx->g_7816Para.bFlag &= (~BIT1); + 1004aba: 2202 movs r2, #2 + 1004abc: 3405 adds r4, #5 + 1004abe: 7fe3 ldrb r3, [r4, #31] + 1004ac0: 4393 bics r3, r2 + 1004ac2: 77e3 strb r3, [r4, #31] + 1004ac4: e7f3 b.n 1004aae + ISO7816_Warm_Reset(SCIx); + 1004ac6: 0008 movs r0, r1 + 1004ac8: f7ff fc86 bl 10043d8 + SCIx->g_7816Para.bFlag |= BIT1; + 1004acc: 2302 movs r3, #2 + 1004ace: 3405 adds r4, #5 + 1004ad0: 7fe2 ldrb r2, [r4, #31] + 1004ad2: 4313 orrs r3, r2 + 1004ad4: 77e3 strb r3, [r4, #31] + return OK; + 1004ad6: 2000 movs r0, #0 + break; + 1004ad8: e7e9 b.n 1004aae + ISO7816_Deactive(SCIx); + 1004ada: 0008 movs r0, r1 + 1004adc: f7ff f8b4 bl 1003c48 + 1004ae0: e7f9 b.n 1004ad6 + +01004ae2 : + uint16_t f = 0; + uint8_t fi = 0, di = 0; + + fi = GET_4_BITS_H(TA1); + di = GET_4_BITS_L(TA1); + if ((!SCIx->SCI_Tran_StateCB.fi_table[fi]) || (!SCIx->SCI_Tran_StateCB.di_table[di])) + 1004ae2: 090b lsrs r3, r1, #4 + 1004ae4: 33b4 adds r3, #180 ; 0xb4 + 1004ae6: 005b lsls r3, r3, #1 +{ + 1004ae8: b510 push {r4, lr} + 1004aea: 0004 movs r4, r0 + if ((!SCIx->SCI_Tran_StateCB.fi_table[fi]) || (!SCIx->SCI_Tran_StateCB.di_table[di])) + 1004aec: 5a18 ldrh r0, [r3, r0] + { + return ISO7816_PARA_ERROR; + 1004aee: 2359 movs r3, #89 ; 0x59 + if ((!SCIx->SCI_Tran_StateCB.fi_table[fi]) || (!SCIx->SCI_Tran_StateCB.di_table[di])) + 1004af0: 2800 cmp r0, #0 + 1004af2: d01c beq.n 1004b2e + 1004af4: 3b4a subs r3, #74 ; 0x4a + 1004af6: 4019 ands r1, r3 + 1004af8: 31c4 adds r1, #196 ; 0xc4 + 1004afa: 0049 lsls r1, r1, #1 + 1004afc: 5b09 ldrh r1, [r1, r4] + return ISO7816_PARA_ERROR; + 1004afe: 334a adds r3, #74 ; 0x4a + if ((!SCIx->SCI_Tran_StateCB.fi_table[fi]) || (!SCIx->SCI_Tran_StateCB.di_table[di])) + 1004b00: 2900 cmp r1, #0 + 1004b02: d014 beq.n 1004b2e + } + f = SCIx->SCI_Tran_StateCB.fi_table[fi] / SCIx->SCI_Tran_StateCB.di_table[di]; + + if (SCIx->g_7816Para.bTA2Flag == 0) + 1004b04: 0023 movs r3, r4 + 1004b06: 3308 adds r3, #8 + 1004b08: 7fdb ldrb r3, [r3, #31] + 1004b0a: 2b00 cmp r3, #0 + 1004b0c: d011 beq.n 1004b32 + { + f = 372; + } + else + { + if ((SCIx->g_7816Para.bTA2 & 0x10) != 0) + 1004b0e: 1de3 adds r3, r4, #7 + 1004b10: 7fdb ldrb r3, [r3, #31] + 1004b12: 06db lsls r3, r3, #27 + 1004b14: d40d bmi.n 1004b32 + f = SCIx->SCI_Tran_StateCB.fi_table[fi] / SCIx->SCI_Tran_StateCB.di_table[di]; + 1004b16: f001 fd2d bl 1006574 <__udivsi3> + 1004b1a: b280 uxth r0, r0 + f = 372; + } + } + + //设置通讯速率寄存器 + SCIx->SCIx7816->ETU.bit.VAL = f; + 1004b1c: 6822 ldr r2, [r4, #0] + 1004b1e: 04c0 lsls r0, r0, #19 + 1004b20: 8d13 ldrh r3, [r2, #40] ; 0x28 + 1004b22: 0cc0 lsrs r0, r0, #19 + 1004b24: 0b5b lsrs r3, r3, #13 + 1004b26: 035b lsls r3, r3, #13 + 1004b28: 4318 orrs r0, r3 + + return OK; + 1004b2a: 2300 movs r3, #0 + SCIx->SCIx7816->ETU.bit.VAL = f; + 1004b2c: 8510 strh r0, [r2, #40] ; 0x28 +} + 1004b2e: 0018 movs r0, r3 + 1004b30: bd10 pop {r4, pc} + f = 372; + 1004b32: 20ba movs r0, #186 ; 0xba + 1004b34: 0040 lsls r0, r0, #1 + 1004b36: e7f1 b.n 1004b1c + +01004b38 : + * @param pResp： Receive data storage unit + * @param pRespLen：Length of receive data + * @retval None + */ +uint16_t ISO7816_Dispose_CMD_LOOP(SCI_Struct_Type *SCIx,uint8_t *pCmd, uint16_t CmdLen, uint8_t *pResp, uint16_t *pRespLen) +{ + 1004b38: b537 push {r0, r1, r2, r4, r5, lr} + + tmpOffset = 0; + tmp61Flag = 0; + tmpCmdLen = CmdLen; + + if (PROTOCOL_T0 == SCIx->g_7816Para.bProlType) + 1004b3a: 0005 movs r5, r0 + 1004b3c: 3528 adds r5, #40 ; 0x28 + 1004b3e: 782d ldrb r5, [r5, #0] +{ + 1004b40: 9c06 ldr r4, [sp, #24] + if (PROTOCOL_T0 == SCIx->g_7816Para.bProlType) + 1004b42: 2d00 cmp r5, #0 + 1004b44: d10a bne.n 1004b5c + { + //处理61xx 6cxx 也可以返回给上层应用处理 + if ((SCIx->g_7816Para.bFlag & BIT2) != 0) //T0 Process + 1004b46: 1d45 adds r5, r0, #5 + 1004b48: 7fed ldrb r5, [r5, #31] + 1004b4a: 9400 str r4, [sp, #0] + 1004b4c: 076d lsls r5, r5, #29 + 1004b4e: d502 bpl.n 1004b56 + 1004b50: f000 f8f6 bl 1004d40 + { + SCIx->g_T1.bIFSD = 254; + return ISO7816_TPDU_T1(SCIx, pCmd, CmdLen, pResp, pRespLen); + } + +} + 1004b54: bd3e pop {r1, r2, r3, r4, r5, pc} + return ISO7816_TPDU_T0_LOOP(SCIx, pCmd, CmdLen, pResp, pRespLen); + 1004b56: f000 fbb7 bl 10052c8 + 1004b5a: e7fb b.n 1004b54 + SCIx->g_T1.bIFSD = 254; + 1004b5c: 25fe movs r5, #254 ; 0xfe + 1004b5e: 7145 strb r5, [r0, #5] + return ISO7816_TPDU_T1(SCIx, pCmd, CmdLen, pResp, pRespLen); + 1004b60: 9400 str r4, [sp, #0] + 1004b62: f001 faab bl 10060bc + 1004b66: e7f5 b.n 1004b54 + +01004b68 : + * @brief 7816 main loop function + * @param None + * @retval None + */ +uint16_t ISO7816_LoopBack(SCI_Struct_Type *SCIx) +{ + 1004b68: b5f0 push {r4, r5, r6, r7, lr} + 1004b6a: 0004 movs r4, r0 + 1004b6c: b08d sub sp, #52 ; 0x34 + uint8_t ATRLen; + + uint16_t Ret; + uint8_t SELECT_PSE[] = {0x00, 0xA4, 0x04, 0x00, 0x0E, + 1004b6e: 2214 movs r2, #20 + 1004b70: 496e ldr r1, [pc, #440] ; (1004d2c ) + 1004b72: a807 add r0, sp, #28 + 1004b74: f001 fc58 bl 1006428 + 0x31, 0x50, 0x41, 0x59, 0x2E, 0x53, 0x59, 0x53, 0x2E, 0x44, 0x44, 0x46, 0x30, 0x31, 0x00 + }; /* SELECT_PPSE */ + + ISO7816_Atr_Timer_Start(SCIx); //开始计时 + 1004b78: 0020 movs r0, r4 + 1004b7a: f7ff f8b9 bl 1003cf0 + +TOResetCard: +#if 1 + delay_ms(5000); //延时5s + 1004b7e: 486c ldr r0, [pc, #432] ; (1004d30 ) + 1004b80: f7fd fe58 bl 1002834 +#endif + + //激活卡片 + Ret = ISO7816_OperateSelect(ISO7816_ACTIVE_CARD, SCIx); //激活卡片内涵冷复位 + 1004b84: 0021 movs r1, r4 + 1004b86: 2000 movs r0, #0 + 1004b88: f7ff ff76 bl 1004a78 + if (Ret == ISO7816_CARD_STUTES_ERROR) + 1004b8c: 2856 cmp r0, #86 ; 0x56 + 1004b8e: d0f6 beq.n 1004b7e + goto TOResetCard; + } + +TOWarmResetCard: + // 接收ATR + ATRLen = 0; + 1004b90: 260b movs r6, #11 + 1004b92: ab02 add r3, sp, #8 + 1004b94: 18f6 adds r6, r6, r3 + 1004b96: 2300 movs r3, #0 + 1004b98: 7033 strb r3, [r6, #0] + Ret = ISO7816_GetAtr_LOOP(SCIx,&SCIx->g_7816Para.aAtr[1], &ATRLen); + 1004b9a: 0023 movs r3, r4 + 1004b9c: 332a adds r3, #42 ; 0x2a + 1004b9e: 0032 movs r2, r6 + 1004ba0: 0019 movs r1, r3 + 1004ba2: 0020 movs r0, r4 + 1004ba4: 9303 str r3, [sp, #12] + 1004ba6: f7ff fcf3 bl 1004590 + 1004baa: 1e07 subs r7, r0, #0 + if (OK != Ret) + 1004bac: d014 beq.n 1004bd8 + { + if ((ISO7816_ATR_LEN_ERROR == Ret)) + 1004bae: 2850 cmp r0, #80 ; 0x50 + 1004bb0: d10b bne.n 1004bca + { + if ((SCIx->g_7816Para.bFlag & BIT1) == 0) //BIT1 为1时表示热复位、为0时表示冷复位 + 1004bb2: 1d63 adds r3, r4, #5 + 1004bb4: 7fdb ldrb r3, [r3, #31] + 1004bb6: 079b lsls r3, r3, #30 + 1004bb8: d407 bmi.n 1004bca + { + delay_ms(10); + 1004bba: 200a movs r0, #10 + 1004bbc: f7fd fe3a bl 1002834 + || (Ret == ISO7816_ATR_TA2_ERROR) || (Ret == ISO7816_ATR_TD2_ERROR) + || (Ret == ISO7816_ATR_TB2_ERROR)) + { + if ((SCIx->g_7816Para.bFlag & BIT1) == 0) + { + ISO7816_OperateSelect(ISO7816_WARM_RESET, SCIx); + 1004bc0: 0021 movs r1, r4 + 1004bc2: 2001 movs r0, #1 + 1004bc4: f7ff ff58 bl 1004a78 + goto TOWarmResetCard; + 1004bc8: e7e2 b.n 1004b90 + ISO7816_Deactive(SCIx); + 1004bca: 0020 movs r0, r4 + 1004bcc: f7ff f83c bl 1003c48 + delay_ms(5); + 1004bd0: 2005 movs r0, #5 + if (SCIx->SCI_Tran_StateCB.SCI_RecLen >= 6) + { + if (SCIx->g_7816Para.aRecBuff[1] == 0x70) + { + ISO7816_OperateSelect(ISO7816_DEACTIVE_CARD, SCIx); + delay_ms(100); + 1004bd2: f7fd fe2f bl 1002834 + goto TOResetCard; + 1004bd6: e7d2 b.n 1004b7e + SCIx->g_7816Para.aAtr[0] = ATRLen; + 1004bd8: 0023 movs r3, r4 + 1004bda: 7832 ldrb r2, [r6, #0] + 1004bdc: 3329 adds r3, #41 ; 0x29 + 1004bde: 701a strb r2, [r3, #0] + delay_ms(50); + 1004be0: 2032 movs r0, #50 ; 0x32 + 1004be2: f7fd fe27 bl 1002834 + SCIx->g_7816Para.bFlag |= BIT2; + 1004be6: 2204 movs r2, #4 + 1004be8: 1d65 adds r5, r4, #5 + 1004bea: 7feb ldrb r3, [r5, #31] + memset(&SCIx->g_T1.bIFSC, 0, sizeof(SCIx->g_T1)); + 1004bec: 18a0 adds r0, r4, r2 + SCIx->g_7816Para.bFlag |= BIT2; + 1004bee: 4313 orrs r3, r2 + 1004bf0: 77eb strb r3, [r5, #31] + memset(&SCIx->g_T1.bIFSC, 0, sizeof(SCIx->g_T1)); + 1004bf2: 321c adds r2, #28 + 1004bf4: 0039 movs r1, r7 + 1004bf6: f001 fc5b bl 10064b0 + SCIx->g_T1.bIFSC = 32; //IC卡信息域大小 + 1004bfa: 2320 movs r3, #32 + Ret = ISO7816_DisposeATR(SCIx,&SCIx->g_7816Para.aAtr[1], ATRLen); + 1004bfc: 7832 ldrb r2, [r6, #0] + SCIx->g_T1.bIFSC = 32; //IC卡信息域大小 + 1004bfe: 7123 strb r3, [r4, #4] + Ret = ISO7816_DisposeATR(SCIx,&SCIx->g_7816Para.aAtr[1], ATRLen); + 1004c00: 9903 ldr r1, [sp, #12] + 1004c02: 0020 movs r0, r4 + 1004c04: f7ff fdfc bl 1004800 + if (OK != Ret) + 1004c08: 2800 cmp r0, #0 + 1004c0a: d012 beq.n 1004c32 + if ((Ret == ISO7816_ATR_TA1_ERROR) || (Ret == ISO7816_ATR_TB1_ERROR) + 1004c0c: 0003 movs r3, r0 + 1004c0e: 3b74 subs r3, #116 ; 0x74 + 1004c10: b29b uxth r3, r3 + 1004c12: 2b05 cmp r3, #5 + 1004c14: d905 bls.n 1004c22 + 1004c16: 2310 movs r3, #16 + 1004c18: 3870 subs r0, #112 ; 0x70 + 1004c1a: 4398 bics r0, r3 + 1004c1c: b280 uxth r0, r0 + 1004c1e: 2800 cmp r0, #0 + 1004c20: d102 bne.n 1004c28 + if ((SCIx->g_7816Para.bFlag & BIT1) == 0) + 1004c22: 7feb ldrb r3, [r5, #31] + 1004c24: 079b lsls r3, r3, #30 + 1004c26: d5cb bpl.n 1004bc0 + ISO7816_Deactive(SCIx); + 1004c28: 0020 movs r0, r4 + 1004c2a: f7ff f80d bl 1003c48 + delay_ms(10); + 1004c2e: 200a movs r0, #10 + 1004c30: e7cf b.n 1004bd2 + ISO7816_Config_Mode_Fun(SCIx); + 1004c32: 0020 movs r0, r4 + 1004c34: f7ff fc88 bl 1004548 + MyPrintf("reset ok\n"); + 1004c38: 483e ldr r0, [pc, #248] ; (1004d34 ) + 1004c3a: f7fb fa9d bl 1000178 + if ((SCIx->g_7816Para.bFlag & BIT0) == 1) + 1004c3e: 7feb ldrb r3, [r5, #31] + 1004c40: 07db lsls r3, r3, #31 + 1004c42: d508 bpl.n 1004c56 + if (SCIx->g_7816Para.bTA1 != 0x11) + 1004c44: 1da3 adds r3, r4, #6 + 1004c46: 7fd9 ldrb r1, [r3, #31] + 1004c48: 2911 cmp r1, #17 + 1004c4a: d004 beq.n 1004c56 + Ret = ISO7816_DisposePPS(SCIx,SCIx->g_7816Para.bTA1); + 1004c4c: 0020 movs r0, r4 + 1004c4e: f7ff ff48 bl 1004ae2 + if (OK != Ret) + 1004c52: 2800 cmp r0, #0 + 1004c54: d1e8 bne.n 1004c28 + memcpy(SCIx->SCI_Tran_StateCB.SCI_ApduCmd, SELECT_PSE, 20); + 1004c56: 0020 movs r0, r4 + 1004c58: 2514 movs r5, #20 + 1004c5a: 30c5 adds r0, #197 ; 0xc5 + 1004c5c: 002a movs r2, r5 + 1004c5e: a907 add r1, sp, #28 + 1004c60: 30ff adds r0, #255 ; 0xff + 1004c62: f001 fbe1 bl 1006428 + SCIx->SCI_Tran_StateCB.SCI_SendLen = 20; + 1004c66: 23e0 movs r3, #224 ; 0xe0 + 1004c68: 005b lsls r3, r3, #1 + 1004c6a: 52e5 strh r5, [r4, r3] + if (SCIx->g_7816Para.bProlType == PROTOCOL_T1) + 1004c6c: 0023 movs r3, r4 + 1004c6e: 3328 adds r3, #40 ; 0x28 + 1004c70: 781a ldrb r2, [r3, #0] + 1004c72: 2a01 cmp r2, #1 + 1004c74: d109 bne.n 1004c8a + SCIx->g_T1.bIFSD = 254; + 1004c76: 23fe movs r3, #254 ; 0xfe + TmpCmd[0] = 254; + 1004c78: a905 add r1, sp, #20 + SCIx->g_T1.bIFSD = 254; + 1004c7a: 7163 strb r3, [r4, #5] + TmpCmd[0] = 254; + 1004c7c: 700b strb r3, [r1, #0] + Ret = ISO7816_TPDU_T1Send_LOOP(SCIx , TmpCmd, 1, T_S_IFS); + 1004c7e: 0020 movs r0, r4 + 1004c80: 3bfc subs r3, #252 ; 0xfc + 1004c82: f001 f863 bl 1005d4c + if (Ret != OK) + 1004c86: 2800 cmp r0, #0 + 1004c88: d1ce bne.n 1004c28 + Ret = ISO7816_Dispose_CMD_LOOP(SCIx,SCIx->SCI_Tran_StateCB.SCI_ApduCmd, SCIx->SCI_Tran_StateCB.SCI_SendLen, SCIx->g_7816Para.aRecBuff, &SCIx->SCI_Tran_StateCB.SCI_RecLen); + 1004c8a: 25e0 movs r5, #224 ; 0xe0 + 1004c8c: 006d lsls r5, r5, #1 + delay_ms(2); + 1004c8e: 2002 movs r0, #2 + 1004c90: f7fd fdd0 bl 1002834 + MyPrintf("cmd\n"); + 1004c94: 4828 ldr r0, [pc, #160] ; (1004d38 ) + 1004c96: f7fb fa6f bl 1000178 + Ret = ISO7816_Dispose_CMD_LOOP(SCIx,SCIx->SCI_Tran_StateCB.SCI_ApduCmd, SCIx->SCI_Tran_StateCB.SCI_SendLen, SCIx->g_7816Para.aRecBuff, &SCIx->SCI_Tran_StateCB.SCI_RecLen); + 1004c9a: 0026 movs r6, r4 + 1004c9c: 0023 movs r3, r4 + 1004c9e: 0027 movs r7, r4 + 1004ca0: 36c5 adds r6, #197 ; 0xc5 + 1004ca2: 33c3 adds r3, #195 ; 0xc3 + 1004ca4: 33ff adds r3, #255 ; 0xff + 1004ca6: 36ff adds r6, #255 ; 0xff + 1004ca8: 375c adds r7, #92 ; 0x5c + 1004caa: 9300 str r3, [sp, #0] + 1004cac: 5b62 ldrh r2, [r4, r5] + 1004cae: 003b movs r3, r7 + 1004cb0: 0031 movs r1, r6 + 1004cb2: 0020 movs r0, r4 + 1004cb4: f7ff ff40 bl 1004b38 + if (OK != Ret) + 1004cb8: 2800 cmp r0, #0 + 1004cba: d009 beq.n 1004cd0 + if ((ISO7816_PARITY_ERROR == Ret)) + 1004cbc: 2873 cmp r0, #115 ; 0x73 + 1004cbe: d1b3 bne.n 1004c28 + ISO7816_OperateSelect(ISO7816_WARM_RESET, SCIx); + 1004cc0: 0021 movs r1, r4 + 1004cc2: 3872 subs r0, #114 ; 0x72 + 1004cc4: f7ff fed8 bl 1004a78 + delay_ms(10); + 1004cc8: 200a movs r0, #10 + 1004cca: f7fd fdb3 bl 1002834 + goto TOWarmResetCard; + 1004cce: e75f b.n 1004b90 + MyPrintf("cmd ok\n"); + 1004cd0: 481a ldr r0, [pc, #104] ; (1004d3c ) + 1004cd2: f7fb fa51 bl 1000178 + delay_ms(2); + 1004cd6: 2002 movs r0, #2 + 1004cd8: f7fd fdac bl 1002834 + if (SCIx->SCI_Tran_StateCB.SCI_RecLen >= 6) + 1004cdc: 23e1 movs r3, #225 ; 0xe1 + 1004cde: 005b lsls r3, r3, #1 + 1004ce0: 5ae2 ldrh r2, [r4, r3] + 1004ce2: 2a05 cmp r2, #5 + 1004ce4: d914 bls.n 1004d10 + if (SCIx->g_7816Para.aRecBuff[1] == 0x70) + 1004ce6: 0023 movs r3, r4 + 1004ce8: 335d adds r3, #93 ; 0x5d + 1004cea: 781b ldrb r3, [r3, #0] + 1004cec: 2b70 cmp r3, #112 ; 0x70 + 1004cee: d104 bne.n 1004cfa + ISO7816_Deactive(SCIx); + 1004cf0: 0020 movs r0, r4 + 1004cf2: f7fe ffa9 bl 1003c48 + delay_ms(100); + 1004cf6: 2064 movs r0, #100 ; 0x64 + 1004cf8: e76b b.n 1004bd2 + } + else + { + SCIx->SCI_Tran_StateCB.SCI_SendLen = SCIx->SCI_Tran_StateCB.SCI_RecLen - 2; + 1004cfa: 3a02 subs r2, #2 + 1004cfc: b292 uxth r2, r2 + 1004cfe: 5362 strh r2, [r4, r5] + memcpy(SCIx->SCI_Tran_StateCB.SCI_ApduCmd, SCIx->g_7816Para.aRecBuff, SCIx->SCI_Tran_StateCB.SCI_SendLen); + 1004d00: 0039 movs r1, r7 + 1004d02: 0030 movs r0, r6 + 1004d04: f001 fb90 bl 1006428 + + delay_ms(2); + 1004d08: 2002 movs r0, #2 + 1004d0a: f7fd fd93 bl 1002834 + goto TOSendCMD; + 1004d0e: e7be b.n 1004c8e + } + } + else + { + if (SCIx->g_7816Para.aRecBuff[0] == 0xff) + 1004d10: 783b ldrb r3, [r7, #0] + 1004d12: 2bff cmp r3, #255 ; 0xff + 1004d14: d088 beq.n 1004c28 + } + } + + delay_ms(2); + + memcpy(SCIx->SCI_Tran_StateCB.SCI_ApduCmd, SELECT_PSE, 20); + 1004d16: 2714 movs r7, #20 + delay_ms(2); + 1004d18: 2002 movs r0, #2 + 1004d1a: f7fd fd8b bl 1002834 + memcpy(SCIx->SCI_Tran_StateCB.SCI_ApduCmd, SELECT_PSE, 20); + 1004d1e: 003a movs r2, r7 + 1004d20: a907 add r1, sp, #28 + 1004d22: 0030 movs r0, r6 + 1004d24: f001 fb80 bl 1006428 + SCIx->SCI_Tran_StateCB.SCI_SendLen = 20; + 1004d28: 5367 strh r7, [r4, r5] + goto TOSendCMD ; + 1004d2a: e7b0 b.n 1004c8e + 1004d2c: 01007124 .word 0x01007124 + 1004d30: 00001388 .word 0x00001388 + 1004d34: 01007150 .word 0x01007150 + 1004d38: 0100715a .word 0x0100715a + 1004d3c: 0100715f .word 0x0100715f + +01004d40 : +uint16_t ISO7816_Dispose_CMD_LOOP(SCI_Struct_Type *SCIx,uint8_t *pCmd, uint16_t CmdLen, uint8_t *pResp, uint16_t *pRespLen) + 1004d40: b5f0 push {r4, r5, r6, r7, lr} + ret = ISO7816_TPDU_T0_LOOP(SCIx, pCmd, tmpCmdLen, tmpRECBuf + tmpOffset, &tmpRespLen); + 1004d42: 240e movs r4, #14 +uint16_t ISO7816_Dispose_CMD_LOOP(SCI_Struct_Type *SCIx,uint8_t *pCmd, uint16_t CmdLen, uint8_t *pResp, uint16_t *pRespLen) + 1004d44: 000d movs r5, r1 + 1004d46: 0006 movs r6, r0 + 1004d48: b0d3 sub sp, #332 ; 0x14c + 1004d4a: 9204 str r2, [sp, #16] + memcpy(tmpCMDBuf, pCmd, 5); + 1004d4c: a808 add r0, sp, #32 + 1004d4e: 2205 movs r2, #5 +uint16_t ISO7816_Dispose_CMD_LOOP(SCI_Struct_Type *SCIx,uint8_t *pCmd, uint16_t CmdLen, uint8_t *pResp, uint16_t *pRespLen) + 1004d50: 9305 str r3, [sp, #20] + memcpy(tmpCMDBuf, pCmd, 5); + 1004d52: f001 fb69 bl 1006428 + ret = ISO7816_TPDU_T0_LOOP(SCIx, pCmd, tmpCmdLen, tmpRECBuf + tmpOffset, &tmpRespLen); + 1004d56: ab04 add r3, sp, #16 + 1004d58: 18e4 adds r4, r4, r3 + 1004d5a: 0029 movs r1, r5 + 1004d5c: 9400 str r4, [sp, #0] + 1004d5e: ab0a add r3, sp, #40 ; 0x28 + 1004d60: 9a04 ldr r2, [sp, #16] + 1004d62: 0030 movs r0, r6 + 1004d64: f000 fab0 bl 10052c8 + 1004d68: 1e05 subs r5, r0, #0 + COMPARE_RETURN(ret); + 1004d6a: d16c bne.n 1004e46 + tmpOffset += tmpRespLen; + 1004d6c: 8824 ldrh r4, [r4, #0] + tmp61Flag = 0; + 1004d6e: 9003 str r0, [sp, #12] + if (tmpRespLen >= 2) + 1004d70: 270e movs r7, #14 + 1004d72: ab04 add r3, sp, #16 + 1004d74: 18ff adds r7, r7, r3 + 1004d76: 883b ldrh r3, [r7, #0] + 1004d78: 2b01 cmp r3, #1 + 1004d7a: d95d bls.n 1004e38 + if (tmpRECBuf[tmpOffset - 2] == 0x61) + 1004d7c: ab0a add r3, sp, #40 ; 0x28 + 1004d7e: 191b adds r3, r3, r4 + 1004d80: 1e9a subs r2, r3, #2 + 1004d82: 7812 ldrb r2, [r2, #0] + 1004d84: 2a61 cmp r2, #97 ; 0x61 + 1004d86: d117 bne.n 1004db8 + tmpCMDBuf[0] = 0; + 1004d88: 22c0 movs r2, #192 ; 0xc0 + tmpCMDBuf[4] = tmpRECBuf[tmpOffset - 1]; + 1004d8a: 3b01 subs r3, #1 + 1004d8c: 781b ldrb r3, [r3, #0] + 1004d8e: a908 add r1, sp, #32 + tmpOffset -= 2; + 1004d90: 3c02 subs r4, #2 + tmpCMDBuf[0] = 0; + 1004d92: 0212 lsls r2, r2, #8 + tmpCMDBuf[4] = tmpRECBuf[tmpOffset - 1]; + 1004d94: 710b strb r3, [r1, #4] + tmpOffset -= 2; + 1004d96: b2a4 uxth r4, r4 + ret = ISO7816_TPDU_T0_LOOP(SCIx, tmpCMDBuf, 5, tmpRECBuf + tmpOffset, &tmpRespLen); + 1004d98: ab0a add r3, sp, #40 ; 0x28 + tmpCMDBuf[0] = 0; + 1004d9a: 9208 str r2, [sp, #32] + ret = ISO7816_TPDU_T0_LOOP(SCIx, tmpCMDBuf, 5, tmpRECBuf + tmpOffset, &tmpRespLen); + 1004d9c: 191b adds r3, r3, r4 + 1004d9e: 9700 str r7, [sp, #0] + 1004da0: 2205 movs r2, #5 + 1004da2: 0030 movs r0, r6 + 1004da4: f000 fa90 bl 10052c8 + COMPARE_RETURN(ret); + 1004da8: 2800 cmp r0, #0 + 1004daa: d14f bne.n 1004e4c + tmpOffset += tmpRespLen; + 1004dac: 883b ldrh r3, [r7, #0] + 1004dae: 18e4 adds r4, r4, r3 + tmp61Flag = 1; + 1004db0: 2301 movs r3, #1 + tmpOffset += tmpRespLen; + 1004db2: b2a4 uxth r4, r4 + tmp61Flag = 1; + 1004db4: 9303 str r3, [sp, #12] + 1004db6: e7db b.n 1004d70 + else if (tmpRECBuf[tmpOffset - 2] == 0x6C) + 1004db8: 2a6c cmp r2, #108 ; 0x6c + 1004dba: d112 bne.n 1004de2 + tmpCMDBuf[4] = tmpRECBuf[tmpOffset - 1]; + 1004dbc: 3b01 subs r3, #1 + 1004dbe: 781b ldrb r3, [r3, #0] + 1004dc0: a908 add r1, sp, #32 + tmpOffset -= 2; + 1004dc2: 3c02 subs r4, #2 + tmpCMDBuf[4] = tmpRECBuf[tmpOffset - 1]; + 1004dc4: 710b strb r3, [r1, #4] + tmpOffset -= 2; + 1004dc6: b2a4 uxth r4, r4 + ret = ISO7816_TPDU_T0_LOOP(SCIx, tmpCMDBuf, 5, tmpRECBuf + tmpOffset, &tmpRespLen); + 1004dc8: ab0a add r3, sp, #40 ; 0x28 + 1004dca: 191b adds r3, r3, r4 + 1004dcc: 9700 str r7, [sp, #0] + 1004dce: 3a67 subs r2, #103 ; 0x67 + ret = ISO7816_TPDU_T0_LOOP(SCIx, tmpCMDBuf, 5, tmpRECBuf + tmpOffset, &tmpRespLen); + 1004dd0: 0030 movs r0, r6 + 1004dd2: f000 fa79 bl 10052c8 + COMPARE_RETURN(ret); + 1004dd6: 2800 cmp r0, #0 + 1004dd8: d138 bne.n 1004e4c + tmpOffset += tmpRespLen; + 1004dda: 883b ldrh r3, [r7, #0] + 1004ddc: 18e4 adds r4, r4, r3 + 1004dde: b2a4 uxth r4, r4 + 1004de0: e7c6 b.n 1004d70 + else if ((tmpRECBuf[tmpOffset - 2] == 0x90) && (tmpRECBuf[tmpOffset - 1] == 0x00)) + 1004de2: 2a90 cmp r2, #144 ; 0x90 + 1004de4: d103 bne.n 1004dee + 1004de6: 3b01 subs r3, #1 + 1004de8: 781b ldrb r3, [r3, #0] + 1004dea: 2b00 cmp r3, #0 + 1004dec: d024 beq.n 1004e38 + else if ((tmpRECBuf[tmpOffset - 2] == 0x62) || (tmpRECBuf[tmpOffset - 2] == 0x63) || ((tmpRECBuf[tmpOffset - 2] & 0xF0) == 0x90)) + 1004dee: 0013 movs r3, r2 + 1004df0: 3b62 subs r3, #98 ; 0x62 + 1004df2: 2b01 cmp r3, #1 + 1004df4: d903 bls.n 1004dfe + 1004df6: 230f movs r3, #15 + 1004df8: 439a bics r2, r3 + 1004dfa: 2a90 cmp r2, #144 ; 0x90 + 1004dfc: d11c bne.n 1004e38 + if (tmp61Flag == 1) + 1004dfe: 9b03 ldr r3, [sp, #12] + 1004e00: 2b01 cmp r3, #1 + 1004e02: d019 beq.n 1004e38 + if ((SCIx->g_7816Para.bFlag & BIT3) != 0) + 1004e04: 2208 movs r2, #8 + 1004e06: 1d73 adds r3, r6, #5 + 1004e08: 7fdb ldrb r3, [r3, #31] + 1004e0a: 4013 ands r3, r2 + 1004e0c: d114 bne.n 1004e38 + if ((CmdLen > 5) && (tmpCMDBuf[1] == 0xA4)) + 1004e0e: 9a04 ldr r2, [sp, #16] + 1004e10: 2a05 cmp r2, #5 + 1004e12: d911 bls.n 1004e38 + 1004e14: a908 add r1, sp, #32 + 1004e16: 784a ldrb r2, [r1, #1] + 1004e18: 2aa4 cmp r2, #164 ; 0xa4 + 1004e1a: d10d bne.n 1004e38 + tmpCMDBuf[0] = 0; + 1004e1c: 22c0 movs r2, #192 ; 0xc0 + ret = ISO7816_TPDU_T0_LOOP(SCIx, tmpCMDBuf, 5, tmpRECBuf + tmpOffset, &tmpRespLen); + 1004e1e: 270e movs r7, #14 + tmpCMDBuf[0] = 0; + 1004e20: 0212 lsls r2, r2, #8 + 1004e22: 9208 str r2, [sp, #32] + tmpOffset -= 2; + 1004e24: 3c02 subs r4, #2 + ret = ISO7816_TPDU_T0_LOOP(SCIx, tmpCMDBuf, 5, tmpRECBuf + tmpOffset, &tmpRespLen); + 1004e26: aa04 add r2, sp, #16 + tmpCMDBuf[3] = 0; + 1004e28: 710b strb r3, [r1, #4] + ret = ISO7816_TPDU_T0_LOOP(SCIx, tmpCMDBuf, 5, tmpRECBuf + tmpOffset, &tmpRespLen); + 1004e2a: 18bf adds r7, r7, r2 + tmpOffset -= 2; + 1004e2c: b2a4 uxth r4, r4 + ret = ISO7816_TPDU_T0_LOOP(SCIx, tmpCMDBuf, 5, tmpRECBuf + tmpOffset, &tmpRespLen); + 1004e2e: ab0a add r3, sp, #40 ; 0x28 + 1004e30: 191b adds r3, r3, r4 + 1004e32: 9700 str r7, [sp, #0] + 1004e34: 2205 movs r2, #5 + 1004e36: e7cb b.n 1004dd0 + memcpy(pResp, tmpRECBuf, tmpOffset); + 1004e38: 0022 movs r2, r4 + 1004e3a: a90a add r1, sp, #40 ; 0x28 + 1004e3c: 9805 ldr r0, [sp, #20] + 1004e3e: f001 faf3 bl 1006428 + *pRespLen = tmpOffset; + 1004e42: 9b58 ldr r3, [sp, #352] ; 0x160 + 1004e44: 801c strh r4, [r3, #0] +} + 1004e46: 0028 movs r0, r5 + 1004e48: b053 add sp, #332 ; 0x14c + 1004e4a: bdf0 pop {r4, r5, r6, r7, pc} + ret = ISO7816_TPDU_T0_LOOP(SCIx, tmpCMDBuf, 5, tmpRECBuf + tmpOffset, &tmpRespLen); + 1004e4c: 0005 movs r5, r0 + 1004e4e: e7fa b.n 1004e46 + +01004e50 : + * @param RxBuf: Receiving data storage unit + * @param RxLen: Length of received data + * @retval OK: 0 on success + */ +uint16_t ISO7816_RecBytes(SCI_Struct_Type *SCIx ,uint8_t *RxBuf, uint16_t RxLen) +{ + 1004e50: b5f0 push {r4, r5, r6, r7, lr} + 1004e52: b087 sub sp, #28 + 1004e54: 0004 movs r4, r0 + 1004e56: 9102 str r1, [sp, #8] + 1004e58: 9200 str r2, [sp, #0] + uint16_t val = 0; + uint8_t rx_num = 0; + + if ((!(RxLen)) || (NULL == RxBuf)) + { + return ISO7816_PARA_ERROR; + 1004e5a: 2059 movs r0, #89 ; 0x59 + if ((!(RxLen)) || (NULL == RxBuf)) + 1004e5c: 2a00 cmp r2, #0 + 1004e5e: d100 bne.n 1004e62 + 1004e60: e0ea b.n 1005038 + 1004e62: 2900 cmp r1, #0 + 1004e64: d100 bne.n 1004e68 + 1004e66: e0e7 b.n 1005038 + } + + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[0] = RxLen/0x100; + 1004e68: 4890 ldr r0, [pc, #576] ; (10050ac ) + 1004e6a: 0a13 lsrs r3, r2, #8 + 1004e6c: 5423 strb r3, [r4, r0] + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[1] = RxLen%0x100; + 1004e6e: 466b mov r3, sp + 1004e70: 7819 ldrb r1, [r3, #0] + 1004e72: 23ba movs r3, #186 ; 0xba + 1004e74: 009b lsls r3, r3, #2 + 1004e76: 54e1 strb r1, [r4, r3] + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2] = 0; + 1004e78: 2300 movs r3, #0 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3] = 0; + 1004e7a: 4a8d ldr r2, [pc, #564] ; (10050b0 ) + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2] = 0; + 1004e7c: 4d8d ldr r5, [pc, #564] ; (10050b4 ) + 1004e7e: 9204 str r2, [sp, #16] + 1004e80: 5563 strb r3, [r4, r5] + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3] = 0; + 1004e82: 54a3 strb r3, [r4, r2] + if (RxLen >= 8) + 1004e84: 9a00 ldr r2, [sp, #0] + 1004e86: 9005 str r0, [sp, #20] + 1004e88: 9503 str r5, [sp, #12] + 1004e8a: 2a07 cmp r2, #7 + 1004e8c: d900 bls.n 1004e90 + { + waterlevel = 4; + 1004e8e: 2104 movs r1, #4 + else + { + waterlevel = RxLen; + } + + SCIx->SCI_Tran_StateCB.Card_Type = 0; + 1004e90: 22b8 movs r2, #184 ; 0xb8 + 1004e92: 0092 lsls r2, r2, #2 + 1004e94: 54a3 strb r3, [r4, r2] + ISO7816_RX_APDU_Config(SCIx,waterlevel); + 1004e96: 0020 movs r0, r4 + 1004e98: f7fe fe74 bl 1003b84 + do + { + + if (SCIx->SCIx7816->IS.bit.RFIFO_HA ) + 1004e9c: 6822 ldr r2, [r4, #0] + 1004e9e: 6e13 ldr r3, [r2, #96] ; 0x60 + 1004ea0: 065b lsls r3, r3, #25 + 1004ea2: d54d bpl.n 1004f40 + { + + len = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[0]*0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[1]; + 1004ea4: 9b05 ldr r3, [sp, #20] + index = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2]*0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3]; + + rx_num = SCIx->SCIx7816->FIFO_CTRL.bit.R_ITEMS; + 1004ea6: 0016 movs r6, r2 + len = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[0]*0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[1]; + 1004ea8: 5ce1 ldrb r1, [r4, r3] + 1004eaa: 23ba movs r3, #186 ; 0xba + 1004eac: 009b lsls r3, r3, #2 + 1004eae: 5ce3 ldrb r3, [r4, r3] + 1004eb0: 0209 lsls r1, r1, #8 + 1004eb2: 18c9 adds r1, r1, r3 + index = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2]*0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3]; + 1004eb4: 9b03 ldr r3, [sp, #12] + 1004eb6: 9804 ldr r0, [sp, #16] + 1004eb8: 5ce3 ldrb r3, [r4, r3] + 1004eba: 5c20 ldrb r0, [r4, r0] + 1004ebc: 021b lsls r3, r3, #8 + rx_num = SCIx->SCIx7816->FIFO_CTRL.bit.R_ITEMS; + 1004ebe: 368c adds r6, #140 ; 0x8c + index = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2]*0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3]; + 1004ec0: 181b adds r3, r3, r0 + rx_num = SCIx->SCIx7816->FIFO_CTRL.bit.R_ITEMS; + 1004ec2: 6830 ldr r0, [r6, #0] + len = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[0]*0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[1]; + 1004ec4: b289 uxth r1, r1 + rx_num = SCIx->SCIx7816->FIFO_CTRL.bit.R_ITEMS; + 1004ec6: 0400 lsls r0, r0, #16 + index = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2]*0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3]; + 1004ec8: b29b uxth r3, r3 + rx_num = SCIx->SCIx7816->FIFO_CTRL.bit.R_ITEMS; + 1004eca: 0f00 lsrs r0, r0, #28 + if(len > index) + 1004ecc: 4299 cmp r1, r3 + 1004ece: d91d bls.n 1004f0c + { + val = len - index; + 1004ed0: 1acd subs r5, r1, r3 + if (val <= rx_num) + 1004ed2: b280 uxth r0, r0 + 1004ed4: b2ad uxth r5, r5 + 1004ed6: 9001 str r0, [sp, #4] + 1004ed8: 4285 cmp r5, r0 + 1004eda: d911 bls.n 1004f00 + 1004edc: 001d movs r5, r3 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[4 + index++] = SCIx->SCIx7816->DATA.reg; + } + } + else + { + for (i = 0; i < rx_num; i++) + 1004ede: 1aef subs r7, r5, r3 + 1004ee0: 9801 ldr r0, [sp, #4] + 1004ee2: b2bf uxth r7, r7 + 1004ee4: 42b8 cmp r0, r7 + 1004ee6: d900 bls.n 1004eea + 1004ee8: e0a8 b.n 100503c + 1004eea: 181b adds r3, r3, r0 + 1004eec: b29b uxth r3, r3 + 1004eee: e00a b.n 1004f06 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[4 + index++] = SCIx->SCIx7816->DATA.reg; + 1004ef0: 6a10 ldr r0, [r2, #32] + 1004ef2: 4f71 ldr r7, [pc, #452] ; (10050b8 ) + 1004ef4: 1c5d adds r5, r3, #1 + 1004ef6: 18e3 adds r3, r4, r3 + 1004ef8: 19db adds r3, r3, r7 + 1004efa: b2c0 uxtb r0, r0 + 1004efc: 7018 strb r0, [r3, #0] + 1004efe: b2ab uxth r3, r5 + for (i = 0; i + 1004f04: 000b movs r3, r1 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[4 + index++] = SCIx->SCIx7816->DATA.reg; + } + } + } + + if(index >= len) + 1004f06: 4299 cmp r1, r3 + 1004f08: d900 bls.n 1004f0c + 1004f0a: e0a2 b.n 1005052 + { + SCIx->SCI_Tran_StateCB.SCI_RX_Result = 1; //接收完成 + 1004f0c: 2001 movs r0, #1 + 1004f0e: 496b ldr r1, [pc, #428] ; (10050bc ) + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &= ~0x0f; + SCIx->SCIx7816->IS.bit.RFIFO_HA = 1; + 1004f10: 2540 movs r5, #64 ; 0x40 + SCIx->SCI_Tran_StateCB.SCI_RX_Result = 1; //接收完成 + 1004f12: 5460 strb r0, [r4, r1] + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &= ~0x0f; + 1004f14: 6831 ldr r1, [r6, #0] + 1004f16: 8831 ldrh r1, [r6, #0] + 1004f18: 30ef adds r0, #239 ; 0xef + 1004f1a: 4381 bics r1, r0 + SCIx->SCIx7816->IS.bit.RFIFO_HA = 1; + 1004f1c: 0010 movs r0, r2 + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &= ~0x0f; + 1004f1e: 8031 strh r1, [r6, #0] + SCIx->SCIx7816->IS.bit.RFIFO_HA = 1; + 1004f20: 3060 adds r0, #96 ; 0x60 + 1004f22: 8801 ldrh r1, [r0, #0] + 1004f24: 4329 orrs r1, r5 + } + else if (((len - index) > 0) && ((len - index) < 4)) + { + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &=~0x0f; + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL = (len - index); + 1004f26: 8001 strh r1, [r0, #0] + } + + SCIx->SCIx7816->IS.bit.RFIFO_HA = 1; + 1004f28: 0010 movs r0, r2 + 1004f2a: 2540 movs r5, #64 ; 0x40 + 1004f2c: 3060 adds r0, #96 ; 0x60 + 1004f2e: 8801 ldrh r1, [r0, #0] + 1004f30: 4329 orrs r1, r5 + 1004f32: 8001 strh r1, [r0, #0] + + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2] = index/0x100; + 1004f34: 9803 ldr r0, [sp, #12] + 1004f36: 0a19 lsrs r1, r3, #8 + 1004f38: 5421 strb r1, [r4, r0] + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3] = index%0x100; + 1004f3a: 9904 ldr r1, [sp, #16] + 1004f3c: b2db uxtb r3, r3 + 1004f3e: 5463 strb r3, [r4, r1] + } + + //rx flag + if ((SCIx->SCIx7816->IS.bit.CWT_TO == 1) || (SCIx->SCIx7816->IS.bit.BWT_TO == 1)) + 1004f40: 6e13 ldr r3, [r2, #96] ; 0x60 + 1004f42: 075b lsls r3, r3, #29 + 1004f44: d402 bmi.n 1004f4c + 1004f46: 6e13 ldr r3, [r2, #96] ; 0x60 + 1004f48: 071b lsls r3, r3, #28 + 1004f4a: d50c bpl.n 1004f66 + { + SCIx->SCI_Tran_StateCB.SCI_RX_Result = ISO7816_REC_TIMEOUT; //5a + 1004f4c: 215a movs r1, #90 ; 0x5a + 1004f4e: 4b5b ldr r3, [pc, #364] ; (10050bc ) + 1004f50: 54e1 strb r1, [r4, r3] + + SCIx->SCIx7816->IS.bit.CWT_TO = 1; + 1004f52: 0013 movs r3, r2 + 1004f54: 3360 adds r3, #96 ; 0x60 + 1004f56: 8818 ldrh r0, [r3, #0] + 1004f58: 3956 subs r1, #86 ; 0x56 + 1004f5a: 4301 orrs r1, r0 + 1004f5c: 8019 strh r1, [r3, #0] + SCIx->SCIx7816->IS.bit.BWT_TO = 1; + 1004f5e: 2108 movs r1, #8 + 1004f60: 8818 ldrh r0, [r3, #0] + 1004f62: 4301 orrs r1, r0 + 1004f64: 8019 strh r1, [r3, #0] + } + if ((SCIx->SCIx7816->IS.bit.R_ERR == 1) && (SCIx->SCI_Tran_StateCB.Card_Type == 0)) + 1004f66: 6e13 ldr r3, [r2, #96] ; 0x60 + 1004f68: 079b lsls r3, r3, #30 + 1004f6a: d50d bpl.n 1004f88 + 1004f6c: 23b8 movs r3, #184 ; 0xb8 + 1004f6e: 009b lsls r3, r3, #2 + 1004f70: 5ce3 ldrb r3, [r4, r3] + 1004f72: 2b00 cmp r3, #0 + 1004f74: d108 bne.n 1004f88 + { + SCIx->SCI_Tran_StateCB.SCI_RX_Result = ISO7816_ERR_NUM_OVER; + 1004f76: 215c movs r1, #92 ; 0x5c + 1004f78: 4b50 ldr r3, [pc, #320] ; (10050bc ) + 1004f7a: 54e1 strb r1, [r4, r3] + + SCIx->SCIx7816->IS.bit.R_ERR = 1; + 1004f7c: 0011 movs r1, r2 + 1004f7e: 2302 movs r3, #2 + 1004f80: 3160 adds r1, #96 ; 0x60 + 1004f82: 8808 ldrh r0, [r1, #0] + 1004f84: 4303 orrs r3, r0 + 1004f86: 800b strh r3, [r1, #0] + } + if ((SCIx->SCIx7816->IS.bit.R_ERR == 1) && (SCIx->SCI_Tran_StateCB.Card_Type == 1)) + 1004f88: 6e13 ldr r3, [r2, #96] ; 0x60 + 1004f8a: 079b lsls r3, r3, #30 + 1004f8c: d50d bpl.n 1004faa + 1004f8e: 23b8 movs r3, #184 ; 0xb8 + 1004f90: 009b lsls r3, r3, #2 + 1004f92: 5ce3 ldrb r3, [r4, r3] + 1004f94: b2db uxtb r3, r3 + 1004f96: 2b01 cmp r3, #1 + 1004f98: d107 bne.n 1004faa + { + SCIx->SCI_Tran_StateCB.T1_parity_flag = 1; + 1004f9a: 4949 ldr r1, [pc, #292] ; (10050c0 ) + 1004f9c: 5463 strb r3, [r4, r1] + SCIx->SCIx7816->IS.bit.R_ERR = 1; + 1004f9e: 0011 movs r1, r2 + 1004fa0: 3160 adds r1, #96 ; 0x60 + 1004fa2: 8808 ldrh r0, [r1, #0] + 1004fa4: 3301 adds r3, #1 + 1004fa6: 4303 orrs r3, r0 + 1004fa8: 800b strh r3, [r1, #0] + } + if (SCIx->SCIx7816->IS.bit.RFIFO_OVF == 1 ) + 1004faa: 6e13 ldr r3, [r2, #96] ; 0x60 + 1004fac: 05db lsls r3, r3, #23 + 1004fae: d509 bpl.n 1004fc4 + { + #ifdef DEBUG_7816_FPGA + MyPrintf("sci isr %08x \r\n", SCIx->SCIx7816->IS.reg); + #endif + SCIx->SCI_Tran_StateCB.SCI_RX_Result = ISO7816_ERR_NUM_OVER; + 1004fb0: 215c movs r1, #92 ; 0x5c + 1004fb2: 4b42 ldr r3, [pc, #264] ; (10050bc ) + 1004fb4: 54e1 strb r1, [r4, r3] + + SCIx->SCIx7816->IS.bit.RFIFO_OVF = 1; + 1004fb6: 0011 movs r1, r2 + 1004fb8: 3160 adds r1, #96 ; 0x60 + 1004fba: 8808 ldrh r0, [r1, #0] + 1004fbc: 3bdf subs r3, #223 ; 0xdf + 1004fbe: 3bff subs r3, #255 ; 0xff + 1004fc0: 4303 orrs r3, r0 + 1004fc2: 800b strh r3, [r1, #0] + } + + if ((SCIx->SCIx7816->IS.bit.TFIFO_OVF == 1) | (SCIx->SCIx7816->IS.bit.TFIFO_LA == 1 ) | (SCIx->SCIx7816->IS.bit.T_ERR== 1) | (SCIx->SCIx7816->IS.bit.T_DONE == 1)) + 1004fc4: 6e11 ldr r1, [r2, #96] ; 0x60 + 1004fc6: 6e13 ldr r3, [r2, #96] ; 0x60 + 1004fc8: 0589 lsls r1, r1, #22 + 1004fca: 061b lsls r3, r3, #24 + 1004fcc: 430b orrs r3, r1 + 1004fce: 6e10 ldr r0, [r2, #96] ; 0x60 + 1004fd0: 6e11 ldr r1, [r2, #96] ; 0x60 + 1004fd2: 0680 lsls r0, r0, #26 + 1004fd4: 06c9 lsls r1, r1, #27 + 1004fd6: 0fc9 lsrs r1, r1, #31 + 1004fd8: 4303 orrs r3, r0 + 1004fda: d401 bmi.n 1004fe0 + 1004fdc: 2900 cmp r1, #0 + 1004fde: d009 beq.n 1004ff4 + MyPrintf("irq_sci isr= %08x \r\n", SCIx->SCIx7816->IS.reg); + MyPrintf("irq_sci iesr= %08x \r\n", SCIx->SCIx7816->IE.reg); + MyPrintf("irq_sci iesr= %08x \r\n", SCIx->SCIx7816->IES.reg); + MyPrintf("irq_sci ctrl2= %08x \r\n", SCIx->SCIx7816->CTRL2.reg); + #endif + SCIx->SCIx7816->FIFO_CTRL.bit.TL_WTL &=~0x0f; + 1004fe0: 0013 movs r3, r2 + 1004fe2: 200f movs r0, #15 + 1004fe4: 338c adds r3, #140 ; 0x8c + 1004fe6: 6819 ldr r1, [r3, #0] + 1004fe8: 8819 ldrh r1, [r3, #0] + 1004fea: 4381 bics r1, r0 + 1004fec: 8019 strh r1, [r3, #0] + SCIx->SCIx7816->IS.reg = 0XFFFFFFFF; + 1004fee: 2301 movs r3, #1 + 1004ff0: 425b negs r3, r3 + 1004ff2: 6613 str r3, [r2, #96] ; 0x60 + } + + if (ISO7816_Detect_Io_State() == SCIx->SCI_Tran_StateCB.Sci_Pin_Detect_State) + 1004ff4: f7fe fd0c bl 1003a10 + 1004ff8: 23b7 movs r3, #183 ; 0xb7 + 1004ffa: 009b lsls r3, r3, #2 + 1004ffc: 5ce3 ldrb r3, [r4, r3] + 1004ffe: 4298 cmp r0, r3 + 1005000: d13a bne.n 1005078 + { + //config sci + SCIx->SCIx7816->IE.reg = 0; + SCIx->SCIx7816->IS.reg = 0xffffffff; + 1005002: 2601 movs r6, #1 + SCIx->SCIx7816->IE.reg = 0; + 1005004: 2200 movs r2, #0 + SCIx->SCIx7816->CTRL2.bit.RX_EN &=~1; + 1005006: 2502 movs r5, #2 + SCIx->SCIx7816->IE.reg = 0; + 1005008: 6823 ldr r3, [r4, #0] + SCIx->SCIx7816->IS.reg = 0xffffffff; + 100500a: 4276 negs r6, r6 + SCIx->SCIx7816->IE.reg = 0; + 100500c: 665a str r2, [r3, #100] ; 0x64 + SCIx->SCIx7816->IS.reg = 0xffffffff; + 100500e: 661e str r6, [r3, #96] ; 0x60 + SCIx->SCIx7816->CTRL2.bit.RX_EN &=~1; + 1005010: 6eda ldr r2, [r3, #108] ; 0x6c + 1005012: 6eda ldr r2, [r3, #108] ; 0x6c + delay_ms(2); //至少1字节时间 + 1005014: 0028 movs r0, r5 + SCIx->SCIx7816->CTRL2.bit.RX_EN &=~1; + 1005016: 43aa bics r2, r5 + 1005018: 66da str r2, [r3, #108] ; 0x6c + delay_ms(2); //至少1字节时间 + 100501a: f7fd fc0b bl 1002834 + SCIx->SCIx7816->CTRL.bit.RFIFO_CL = 1;//clear tx/rx fifo + 100501e: 2001 movs r0, #1 + 1005020: 6823 ldr r3, [r4, #0] + 1005022: 7a1a ldrb r2, [r3, #8] + 1005024: 4302 orrs r2, r0 + 1005026: 721a strb r2, [r3, #8] + SCIx->SCIx7816->CTRL.bit.TFIFO_CL = 1;//clear tx/rx fifo + 1005028: 7a1a ldrb r2, [r3, #8] + 100502a: 4315 orrs r5, r2 + 100502c: 721d strb r5, [r3, #8] + delay_ms(1); //至少大于100us + 100502e: f7fd fc01 bl 1002834 + SCIx->SCIx7816->IS.reg = 0xffffffff; + + return ISO7816_CARD_ABSENT; + 1005032: 2062 movs r0, #98 ; 0x62 + SCIx->SCIx7816->IS.reg = 0xffffffff; + 1005034: 6823 ldr r3, [r4, #0] + 1005036: 661e str r6, [r3, #96] ; 0x60 + + } + while (RemainLen < (RxLen)); + + return OK; +} + 1005038: b007 add sp, #28 + 100503a: bdf0 pop {r4, r5, r6, r7, pc} + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[4 + index++] = SCIx->SCIx7816->DATA.reg; + 100503c: 1c68 adds r0, r5, #1 + 100503e: 4684 mov ip, r0 + 1005040: 481d ldr r0, [pc, #116] ; (10050b8 ) + 1005042: 1965 adds r5, r4, r5 + 1005044: 182d adds r5, r5, r0 + 1005046: 4660 mov r0, ip + 1005048: 6a17 ldr r7, [r2, #32] + 100504a: b2ff uxtb r7, r7 + 100504c: 702f strb r7, [r5, #0] + 100504e: b285 uxth r5, r0 + 1005050: e745 b.n 1004ede + else if (((len - index) > 0) && ((len - index) < 4)) + 1005052: 1ac9 subs r1, r1, r3 + 1005054: 1e48 subs r0, r1, #1 + 1005056: 2802 cmp r0, #2 + 1005058: d900 bls.n 100505c + 100505a: e765 b.n 1004f28 + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &=~0x0f; + 100505c: 0010 movs r0, r2 + 100505e: 308c adds r0, #140 ; 0x8c + 1005060: 6805 ldr r5, [r0, #0] + 1005062: 25f0 movs r5, #240 ; 0xf0 + 1005064: 8806 ldrh r6, [r0, #0] + 1005066: 43ae bics r6, r5 + 1005068: 8006 strh r6, [r0, #0] + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL = (len - index); + 100506a: 260f movs r6, #15 + 100506c: 4031 ands r1, r6 + 100506e: 8806 ldrh r6, [r0, #0] + 1005070: 0109 lsls r1, r1, #4 + 1005072: 43ae bics r6, r5 + 1005074: 4331 orrs r1, r6 + 1005076: e756 b.n 1004f26 + if (SCIx->SCI_Tran_StateCB.SCI_RX_Result == 1) + 1005078: 4b10 ldr r3, [pc, #64] ; (10050bc ) + 100507a: 5ce2 ldrb r2, [r4, r3] + 100507c: 2a01 cmp r2, #1 + 100507e: d10e bne.n 100509e + 1005080: 2300 movs r3, #0 + 1005082: e006 b.n 1005092 + *RxBuf++ = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[4+i]; + 1005084: 490c ldr r1, [pc, #48] ; (10050b8 ) + 1005086: 18e2 adds r2, r4, r3 + 1005088: 1852 adds r2, r2, r1 + 100508a: 7812 ldrb r2, [r2, #0] + 100508c: 9902 ldr r1, [sp, #8] + 100508e: 54ca strb r2, [r1, r3] + 1005090: 3301 adds r3, #1 + for (i=0; i + return OK; + 100509a: 2000 movs r0, #0 + 100509c: e7cc b.n 1005038 + else if (SCIx->SCI_Tran_StateCB.SCI_RX_Result > 1) + 100509e: 5ce2 ldrb r2, [r4, r3] + 10050a0: 2a01 cmp r2, #1 + 10050a2: d800 bhi.n 10050a6 + 10050a4: e6fa b.n 1004e9c + return SCIx->SCI_Tran_StateCB.SCI_RX_Result; + 10050a6: 5ce0 ldrb r0, [r4, r3] + 10050a8: e7c6 b.n 1005038 + 10050aa: 46c0 nop ; (mov r8, r8) + 10050ac: 000002e7 .word 0x000002e7 + 10050b0: 000002ea .word 0x000002ea + 10050b4: 000002e9 .word 0x000002e9 + 10050b8: 000002eb .word 0x000002eb + 10050bc: 000002de .word 0x000002de + 10050c0: 000002e1 .word 0x000002e1 + +010050c4 : + * @param pBuff: Receiving data storage unit + * @param Len: Length of received data + * @retval OK: 0 on success + */ +uint16_t ISO7816_SendBytes_T0(SCI_Struct_Type *SCIx,uint8_t *pBuff, uint16_t Len) +{ + 10050c4: b5f0 push {r4, r5, r6, r7, lr} + 10050c6: 0007 movs r7, r0 + 10050c8: b087 sub sp, #28 + uint16_t i = 0; + + if ((!Len) || (NULL == pBuff)) + { + return ISO7816_PARA_ERROR; + 10050ca: 2059 movs r0, #89 ; 0x59 + if ((!Len) || (NULL == pBuff)) + 10050cc: 2a00 cmp r2, #0 + 10050ce: d002 beq.n 10050d6 + 10050d0: 2300 movs r3, #0 + 10050d2: 2900 cmp r1, #0 + 10050d4: d107 bne.n 10050e6 +#ifdef DEBUG_7816 + MyPrintf("\n"); +#endif + + return SCIx->SCI_Tran_StateCB.SCI_TX_Result; +} + 10050d6: b007 add sp, #28 + 10050d8: bdf0 pop {r4, r5, r6, r7, pc} + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[4+i] = *pBuff++; + 10050da: 4d76 ldr r5, [pc, #472] ; (10052b4 ) + 10050dc: 5ccc ldrb r4, [r1, r3] + 10050de: 18f8 adds r0, r7, r3 + 10050e0: 1940 adds r0, r0, r5 + 10050e2: 7004 strb r4, [r0, #0] + 10050e4: 3301 adds r3, #1 + for(i=0; i + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[0] = Len/0x100; + 10050ec: 4972 ldr r1, [pc, #456] ; (10052b8 ) + 10050ee: 0a13 lsrs r3, r2, #8 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[1] = Len%0x100; + 10050f0: 2480 movs r4, #128 ; 0x80 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[0] = Len/0x100; + 10050f2: 547b strb r3, [r7, r1] + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[2] = 0; + 10050f4: 2300 movs r3, #0 + 10050f6: 4e71 ldr r6, [pc, #452] ; (10052bc ) + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[3] = 0; + 10050f8: 4d71 ldr r5, [pc, #452] ; (10052c0 ) + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[1] = Len%0x100; + 10050fa: b2d2 uxtb r2, r2 + 10050fc: 00e4 lsls r4, r4, #3 + 10050fe: 553a strb r2, [r7, r4] + ISO7816_TX_APDU_Config(SCIx); + 1005100: 0038 movs r0, r7 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[2] = 0; + 1005102: 55bb strb r3, [r7, r6] + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[3] = 0; + 1005104: 557b strb r3, [r7, r5] + ISO7816_TX_APDU_Config(SCIx); + 1005106: f7fe fd63 bl 1003bd0 + 100510a: 4b6b ldr r3, [pc, #428] ; (10052b8 ) + 100510c: 9601 str r6, [sp, #4] + 100510e: 9304 str r3, [sp, #16] + 1005110: 9502 str r5, [sp, #8] + len = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[0]*0x100 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[1]; + 1005112: 9405 str r4, [sp, #20] + while (SCIx->SCI_Tran_StateCB.SCI_TX_Result == 0xff) + 1005114: 486b ldr r0, [pc, #428] ; (10052c4 ) + 1005116: 5c3b ldrb r3, [r7, r0] + 1005118: 2bff cmp r3, #255 ; 0xff + 100511a: d001 beq.n 1005120 + return SCIx->SCI_Tran_StateCB.SCI_TX_Result; + 100511c: 5c38 ldrb r0, [r7, r0] + 100511e: e7da b.n 10050d6 + tx_fifo_level = SCIx->SCIx7816->FIFO_CTRL.reg & 0x0f; + 1005120: 683b ldr r3, [r7, #0] + 1005122: 0019 movs r1, r3 + 1005124: 318c adds r1, #140 ; 0x8c + 1005126: 680a ldr r2, [r1, #0] + 1005128: 9203 str r2, [sp, #12] + if (SCIx->SCIx7816->IS.bit.TFIFO_LA == 1) + 100512a: 6e1a ldr r2, [r3, #96] ; 0x60 + 100512c: 0612 lsls r2, r2, #24 + 100512e: d555 bpl.n 10051dc + len = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[0]*0x100 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[1]; + 1005130: 9a04 ldr r2, [sp, #16] + index = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[2]*0x100 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[3]; + 1005132: 9e02 ldr r6, [sp, #8] + len = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[0]*0x100 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[1]; + 1005134: 5cbd ldrb r5, [r7, r2] + 1005136: 9a05 ldr r2, [sp, #20] + 1005138: 022d lsls r5, r5, #8 + 100513a: 5cba ldrb r2, [r7, r2] + 100513c: 18ad adds r5, r5, r2 + index = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[2]*0x100 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[3]; + 100513e: 9a01 ldr r2, [sp, #4] + len = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[0]*0x100 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[1]; + 1005140: b2ad uxth r5, r5 + index = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[2]*0x100 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[3]; + 1005142: 5cba ldrb r2, [r7, r2] + 1005144: 5dbe ldrb r6, [r7, r6] + 1005146: 0212 lsls r2, r2, #8 + 1005148: 1992 adds r2, r2, r6 + 100514a: b292 uxth r2, r2 + if (len > index) + 100514c: 4295 cmp r5, r2 + 100514e: d91b bls.n 1005188 + val = len - index; + 1005150: 1aad subs r5, r5, r2 + 1005152: b2ad uxth r5, r5 + if(val > (8-tx_fifo_level)) + 1005154: 240f movs r4, #15 + 1005156: 9e03 ldr r6, [sp, #12] + 1005158: 4026 ands r6, r4 + 100515a: 0034 movs r4, r6 + 100515c: 2608 movs r6, #8 + 100515e: 1b34 subs r4, r6, r4 + 1005160: 42a5 cmp r5, r4 + 1005162: dd00 ble.n 1005166 + 1005164: e09a b.n 100529c + 1005166: 1955 adds r5, r2, r5 + 1005168: b2ad uxth r5, r5 + for (i = 0; i < val; i++) + 100516a: 42aa cmp r2, r5 + 100516c: d000 beq.n 1005170 + 100516e: e097 b.n 10052a0 + SCIx->SCIx7816->FIFO_CTRL.bit.TL_WTL &=~0x0f; + 1005170: 240f movs r4, #15 + 1005172: 680a ldr r2, [r1, #0] + 1005174: 880a ldrh r2, [r1, #0] + 1005176: 43a2 bics r2, r4 + SCIx->SCIx7816->IS.bit.TFIFO_LA = 1; + 1005178: 001c movs r4, r3 + SCIx->SCIx7816->FIFO_CTRL.bit.TL_WTL &=~0x0f; + 100517a: 800a strh r2, [r1, #0] + SCIx->SCIx7816->IS.bit.TFIFO_LA = 1; + 100517c: 2280 movs r2, #128 ; 0x80 + 100517e: 3460 adds r4, #96 ; 0x60 + 1005180: 8826 ldrh r6, [r4, #0] + 1005182: 4332 orrs r2, r6 + 1005184: 8022 strh r2, [r4, #0] + 1005186: e01c b.n 10051c2 + SCIx->SCIx7816->FIFO_CTRL.bit.TL_WTL &=~0x0f; + 1005188: 260f movs r6, #15 + 100518a: 680d ldr r5, [r1, #0] + 100518c: 880d ldrh r5, [r1, #0] + 100518e: 43b5 bics r5, r6 + SCIx->SCIx7816->IS.bit.TFIFO_LA = 1; + 1005190: 001e movs r6, r3 + SCIx->SCIx7816->FIFO_CTRL.bit.TL_WTL &=~0x0f; + 1005192: 800d strh r5, [r1, #0] + SCIx->SCIx7816->IS.bit.TFIFO_LA = 1; + 1005194: 3660 adds r6, #96 ; 0x60 + 1005196: 8835 ldrh r5, [r6, #0] + 1005198: 46ac mov ip, r5 + 100519a: 2580 movs r5, #128 ; 0x80 + 100519c: 4664 mov r4, ip + 100519e: 4325 orrs r5, r4 + 10051a0: 8035 strh r5, [r6, #0] + uint16_t val = 0; + 10051a2: 2500 movs r5, #0 + 10051a4: e7d6 b.n 1005154 + SCIx->SCIx7816->DATA.reg = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[4 + index++]; + 10051a6: 1c6e adds r6, r5, #1 + 10051a8: 46b4 mov ip, r6 + 10051aa: 4e42 ldr r6, [pc, #264] ; (10052b4 ) + 10051ac: 197d adds r5, r7, r5 + 10051ae: 19ad adds r5, r5, r6 + 10051b0: 782d ldrb r5, [r5, #0] + 10051b2: b2ed uxtb r5, r5 + 10051b4: 621d str r5, [r3, #32] + 10051b6: 4665 mov r5, ip + 10051b8: b2ad uxth r5, r5 + for (i = 0; i < (8-tx_fifo_level); i++) + 10051ba: 1aae subs r6, r5, r2 + 10051bc: b2b6 uxth r6, r6 + 10051be: 42b4 cmp r4, r6 + 10051c0: dcf1 bgt.n 10051a6 + SCIx->SCIx7816->IS.bit.TFIFO_LA = 1; + 10051c2: 001c movs r4, r3 + 10051c4: 2280 movs r2, #128 ; 0x80 + 10051c6: 3460 adds r4, #96 ; 0x60 + 10051c8: 8826 ldrh r6, [r4, #0] + 10051ca: 4332 orrs r2, r6 + 10051cc: 8022 strh r2, [r4, #0] + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[2] = index/0x100; + 10051ce: 9c01 ldr r4, [sp, #4] + 10051d0: 0a2a lsrs r2, r5, #8 + 10051d2: b2d2 uxtb r2, r2 + 10051d4: 553a strb r2, [r7, r4] + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[3] = index%0x100; + 10051d6: 9a02 ldr r2, [sp, #8] + 10051d8: b2ed uxtb r5, r5 + 10051da: 54bd strb r5, [r7, r2] + if (SCIx->SCIx7816->IS.bit.T_DONE == 1) + 10051dc: 6e1a ldr r2, [r3, #96] ; 0x60 + 10051de: 06d2 lsls r2, r2, #27 + 10051e0: d507 bpl.n 10051f2 + SCIx->SCI_Tran_StateCB.SCI_TX_Result = 0; + 10051e2: 2200 movs r2, #0 + SCIx->SCIx7816->IS.bit.T_DONE = 1; + 10051e4: 001c movs r4, r3 + SCIx->SCI_Tran_StateCB.SCI_TX_Result = 0; + 10051e6: 543a strb r2, [r7, r0] + SCIx->SCIx7816->IS.bit.T_DONE = 1; + 10051e8: 3460 adds r4, #96 ; 0x60 + 10051ea: 8825 ldrh r5, [r4, #0] + 10051ec: 3210 adds r2, #16 + 10051ee: 432a orrs r2, r5 + 10051f0: 8022 strh r2, [r4, #0] + if (SCIx->SCIx7816->IS.bit.T_ERR == 1) + 10051f2: 6e1a ldr r2, [r3, #96] ; 0x60 + 10051f4: 0692 lsls r2, r2, #26 + 10051f6: d507 bpl.n 1005208 + SCIx->SCI_Tran_StateCB.SCI_TX_Result = ISO7816_ERR_NUM_OVER; + 10051f8: 225c movs r2, #92 ; 0x5c + SCIx->SCIx7816->IS.bit.T_ERR = 1; + 10051fa: 001c movs r4, r3 + SCIx->SCI_Tran_StateCB.SCI_TX_Result = ISO7816_ERR_NUM_OVER; + 10051fc: 543a strb r2, [r7, r0] + SCIx->SCIx7816->IS.bit.T_ERR = 1; + 10051fe: 3460 adds r4, #96 ; 0x60 + 1005200: 8825 ldrh r5, [r4, #0] + 1005202: 3a3c subs r2, #60 ; 0x3c + 1005204: 432a orrs r2, r5 + 1005206: 8022 strh r2, [r4, #0] + if (SCIx->SCIx7816->IS.bit.TFIFO_OVF == 1) + 1005208: 6e1a ldr r2, [r3, #96] ; 0x60 + 100520a: 0592 lsls r2, r2, #22 + 100520c: d508 bpl.n 1005220 + SCIx->SCI_Tran_StateCB.SCI_TX_Result = ISO7816_ERR_NUM_OVER; + 100520e: 225c movs r2, #92 ; 0x5c + 1005210: 543a strb r2, [r7, r0] + SCIx->SCIx7816->IS.bit.TFIFO_OVF = 1; + 1005212: 0018 movs r0, r3 + 1005214: 3060 adds r0, #96 ; 0x60 + 1005216: 8804 ldrh r4, [r0, #0] + 1005218: 32a5 adds r2, #165 ; 0xa5 + 100521a: 32ff adds r2, #255 ; 0xff + 100521c: 4322 orrs r2, r4 + 100521e: 8002 strh r2, [r0, #0] + if ((SCIx->SCIx7816->IS.bit.RFIFO_OVF == 1) | (SCIx->SCIx7816->IS.bit.RFIFO_HA == 1 ) | (SCIx->SCIx7816->IS.bit.R_ERR == 1) \ + 1005220: 6e18 ldr r0, [r3, #96] ; 0x60 + 1005222: 6e1a ldr r2, [r3, #96] ; 0x60 + 1005224: 05c0 lsls r0, r0, #23 + 1005226: 6e1d ldr r5, [r3, #96] ; 0x60 + 1005228: 0652 lsls r2, r2, #25 + 100522a: 4302 orrs r2, r0 + | (SCIx->SCIx7816->IS.bit.BWT_TO == 1) | (SCIx->SCIx7816->IS.bit.CWT_TO)) + 100522c: 6e1c ldr r4, [r3, #96] ; 0x60 + 100522e: 6e18 ldr r0, [r3, #96] ; 0x60 + if ((SCIx->SCIx7816->IS.bit.RFIFO_OVF == 1) | (SCIx->SCIx7816->IS.bit.RFIFO_HA == 1 ) | (SCIx->SCIx7816->IS.bit.R_ERR == 1) \ + 1005230: 07ad lsls r5, r5, #30 + | (SCIx->SCIx7816->IS.bit.BWT_TO == 1) | (SCIx->SCIx7816->IS.bit.CWT_TO)) + 1005232: 0724 lsls r4, r4, #28 + 1005234: 0740 lsls r0, r0, #29 + if ((SCIx->SCIx7816->IS.bit.RFIFO_OVF == 1) | (SCIx->SCIx7816->IS.bit.RFIFO_HA == 1 ) | (SCIx->SCIx7816->IS.bit.R_ERR == 1) \ + 1005236: 432a orrs r2, r5 + | (SCIx->SCIx7816->IS.bit.BWT_TO == 1) | (SCIx->SCIx7816->IS.bit.CWT_TO)) + 1005238: 0fc0 lsrs r0, r0, #31 + if ((SCIx->SCIx7816->IS.bit.RFIFO_OVF == 1) | (SCIx->SCIx7816->IS.bit.RFIFO_HA == 1 ) | (SCIx->SCIx7816->IS.bit.R_ERR == 1) \ + 100523a: 4314 orrs r4, r2 + 100523c: d401 bmi.n 1005242 + 100523e: 2800 cmp r0, #0 + 1005240: d007 beq.n 1005252 + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &=~0x0f; + 1005242: 20f0 movs r0, #240 ; 0xf0 + 1005244: 680a ldr r2, [r1, #0] + 1005246: 880a ldrh r2, [r1, #0] + 1005248: 4382 bics r2, r0 + 100524a: 800a strh r2, [r1, #0] + SCIx->SCIx7816->IS.reg = 0XFFFFFFFF; + 100524c: 2201 movs r2, #1 + 100524e: 4252 negs r2, r2 + 1005250: 661a str r2, [r3, #96] ; 0x60 + if (ISO7816_Detect_Io_State() == SCIx->SCI_Tran_StateCB.Sci_Pin_Detect_State) + 1005252: f7fe fbdd bl 1003a10 + 1005256: 23b7 movs r3, #183 ; 0xb7 + 1005258: 009b lsls r3, r3, #2 + 100525a: 5cfb ldrb r3, [r7, r3] + 100525c: 4298 cmp r0, r3 + 100525e: d000 beq.n 1005262 + 1005260: e758 b.n 1005114 + SCIx->SCIx7816->IS.reg = 0xffffffff; + 1005262: 2501 movs r5, #1 + SCIx->SCIx7816->IE.reg = 0; + 1005264: 2200 movs r2, #0 + SCIx->SCIx7816->CTRL2.bit.TX_EN &=~1; + 1005266: 2401 movs r4, #1 + SCIx->SCIx7816->IE.reg = 0; + 1005268: 683b ldr r3, [r7, #0] + SCIx->SCIx7816->IS.reg = 0xffffffff; + 100526a: 426d negs r5, r5 + SCIx->SCIx7816->IE.reg = 0; + 100526c: 665a str r2, [r3, #100] ; 0x64 + SCIx->SCIx7816->IS.reg = 0xffffffff; + 100526e: 661d str r5, [r3, #96] ; 0x60 + SCIx->SCIx7816->CTRL2.bit.TX_EN &=~1; + 1005270: 6eda ldr r2, [r3, #108] ; 0x6c + 1005272: 6eda ldr r2, [r3, #108] ; 0x6c + delay_ms(2); //至少1字节时间 + 1005274: 2002 movs r0, #2 + SCIx->SCIx7816->CTRL2.bit.TX_EN &=~1; + 1005276: 43a2 bics r2, r4 + 1005278: 66da str r2, [r3, #108] ; 0x6c + delay_ms(2); //至少1字节时间 + 100527a: f7fd fadb bl 1002834 + SCIx->SCIx7816->CTRL.bit.RFIFO_CL = 1; //clear tx/rx fifo + 100527e: 683b ldr r3, [r7, #0] + delay_ms(1); //至少大于100us + 1005280: 0020 movs r0, r4 + SCIx->SCIx7816->CTRL.bit.RFIFO_CL = 1; //clear tx/rx fifo + 1005282: 7a1a ldrb r2, [r3, #8] + 1005284: 4322 orrs r2, r4 + 1005286: 721a strb r2, [r3, #8] + SCIx->SCIx7816->CTRL.bit.TFIFO_CL = 1; //clear tx/rx fifo + 1005288: 2202 movs r2, #2 + 100528a: 7a19 ldrb r1, [r3, #8] + 100528c: 430a orrs r2, r1 + 100528e: 721a strb r2, [r3, #8] + delay_ms(1); //至少大于100us + 1005290: f7fd fad0 bl 1002834 + SCIx->SCIx7816->IS.reg = 0xffffffff; + 1005294: 683b ldr r3, [r7, #0] + return ISO7816_CARD_ABSENT; + 1005296: 2062 movs r0, #98 ; 0x62 + SCIx->SCIx7816->IS.reg = 0xffffffff; + 1005298: 661d str r5, [r3, #96] ; 0x60 + 100529a: e71c b.n 10050d6 + index = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[2]*0x100 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[3]; + 100529c: 0015 movs r5, r2 + 100529e: e78c b.n 10051ba + SCIx->SCIx7816->DATA.reg = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[4 + index++]; + 10052a0: 4e04 ldr r6, [pc, #16] ; (10052b4 ) + 10052a2: 1c54 adds r4, r2, #1 + 10052a4: 18ba adds r2, r7, r2 + 10052a6: 1992 adds r2, r2, r6 + 10052a8: 7812 ldrb r2, [r2, #0] + 10052aa: b2d2 uxtb r2, r2 + 10052ac: 621a str r2, [r3, #32] + 10052ae: b2a2 uxth r2, r4 + 10052b0: e75b b.n 100516a + 10052b2: 46c0 nop ; (mov r8, r8) + 10052b4: 00000403 .word 0x00000403 + 10052b8: 000003ff .word 0x000003ff + 10052bc: 00000401 .word 0x00000401 + 10052c0: 00000402 .word 0x00000402 + 10052c4: 000002df .word 0x000002df + +010052c8 : + * @retval OK: 0 on success + */ +uint16_t ISO7816_TPDU_T0_LOOP(SCI_Struct_Type *SCIx, uint8_t *pCommand, uint16_t CommandLength, + uint8_t *pResponse, uint16_t *pResponseLength) + +{ + 10052c8: b5f0 push {r4, r5, r6, r7, lr} + 10052ca: b087 sub sp, #28 + 10052cc: 0005 movs r5, r0 + 10052ce: 9101 str r1, [sp, #4] + 10052d0: 9204 str r2, [sp, #16] + 10052d2: 001e movs r6, r3 + tmpRecLen = 0; + + if ((NULL == pCommand) || (NULL == pResponse) || + (CommandLength < 4) || (NULL == pResponseLength)) + { + return ISO7816_PARA_ERROR; + 10052d4: 2059 movs r0, #89 ; 0x59 + if ((NULL == pCommand) || (NULL == pResponse) || + 10052d6: 2900 cmp r1, #0 + 10052d8: d079 beq.n 10053ce + 10052da: 2e00 cmp r6, #0 + 10052dc: d077 beq.n 10053ce + 10052de: 2a03 cmp r2, #3 + 10052e0: d975 bls.n 10053ce + (CommandLength < 4) || (NULL == pResponseLength)) + 10052e2: 9b0c ldr r3, [sp, #48] ; 0x30 + 10052e4: 2b00 cmp r3, #0 + 10052e6: d072 beq.n 10053ce + } + + if (CommandLength == 4) + 10052e8: 2a04 cmp r2, #4 + 10052ea: d101 bne.n 10052f0 + { + pCommand[4] = 0; + 10052ec: 2300 movs r3, #0 + 10052ee: 710b strb r3, [r1, #4] + } + Ins = pCommand[1]; + + SCIx->g_7816Para.bFlag &= (~BIT3); + 10052f0: 2108 movs r1, #8 + Ins = pCommand[1]; + 10052f2: 9b01 ldr r3, [sp, #4] + SCIx->g_7816Para.bFlag &= (~BIT3); + 10052f4: 1d6a adds r2, r5, #5 + Ins = pCommand[1]; + 10052f6: 785b ldrb r3, [r3, #1] + + ret = ISO7816_SendBytes_T0(SCIx, pCommand, 5); + 10052f8: 0028 movs r0, r5 + Ins = pCommand[1]; + 10052fa: 9305 str r3, [sp, #20] + SCIx->g_7816Para.bFlag &= (~BIT3); + 10052fc: 7fd3 ldrb r3, [r2, #31] + 10052fe: 438b bics r3, r1 + 1005300: 77d3 strb r3, [r2, #31] + ret = ISO7816_SendBytes_T0(SCIx, pCommand, 5); + 1005302: 9901 ldr r1, [sp, #4] + 1005304: 2205 movs r2, #5 + 1005306: f7ff fedd bl 10050c4 + COMPARE_RETURN(ret); + 100530a: 2800 cmp r0, #0 + 100530c: d15f bne.n 10053ce + + //接收过程字节 + pResponse[tmpRecLen] = ISO7816_NULL_T0; + 100530e: 2360 movs r3, #96 ; 0x60 + 1005310: 7033 strb r3, [r6, #0] + do + { + ret = ISO7816_RecBytes(SCIx, &pResponse[tmpRecLen], 1); + 1005312: 2201 movs r2, #1 + 1005314: 0031 movs r1, r6 + 1005316: 0028 movs r0, r5 + 1005318: f7ff fd9a bl 1004e50 + COMPARE_RETURN(ret); + 100531c: 2800 cmp r0, #0 + 100531e: d156 bne.n 10053ce + } + while (pResponse[tmpRecLen] == ISO7816_NULL_T0); //如果是60的话等待 + 1005320: 7833 ldrb r3, [r6, #0] + 1005322: 2b60 cmp r3, #96 ; 0x60 + 1005324: d0f5 beq.n 1005312 + + sw1 = pResponse[0]; + p3 = pCommand[4]; + 1005326: 9a01 ldr r2, [sp, #4] + tmpRecLen = 0; + 1005328: 0004 movs r4, r0 + p3 = pCommand[4]; + 100532a: 7912 ldrb r2, [r2, #4] + 100532c: 9202 str r2, [sp, #8] + tmpSendOffset = 5; + 100532e: 2205 movs r2, #5 + 1005330: 9203 str r2, [sp, #12] + 1005332: 001a movs r2, r3 + 1005334: 210f movs r1, #15 + 1005336: 438a bics r2, r1 + + //过程字节判断 + do + { + //错误码或执行正确 + if ((0x60 == (sw1 & 0xF0)) || (0x90 == (sw1 & 0xF0))) + 1005338: 2a60 cmp r2, #96 ; 0x60 + 100533a: d001 beq.n 1005340 + 100533c: 2a90 cmp r2, #144 ; 0x90 + 100533e: d111 bne.n 1005364 + { + tmpRecLen++; + 1005340: 1c61 adds r1, r4, #1 + ret = ISO7816_RecBytes(SCIx,&pResponse[tmpRecLen++], 1); + 1005342: b289 uxth r1, r1 + 1005344: 1871 adds r1, r6, r1 + 1005346: 2201 movs r2, #1 + 1005348: 0028 movs r0, r5 + 100534a: f7ff fd81 bl 1004e50 + if (ret != OK) + 100534e: 2800 cmp r0, #0 + 1005350: d13d bne.n 10053ce + { + return ret; + } + + //错误码 + SCIx->g_7816Para.bFlag |= BIT3; + 1005352: 2308 movs r3, #8 + 1005354: 3505 adds r5, #5 + 1005356: 7fea ldrb r2, [r5, #31] + 1005358: 4313 orrs r3, r2 + 100535a: 77eb strb r3, [r5, #31] + while (pResponse[tmpRecLen] == ISO7816_NULL_T0); + tmpRecLen++; + + ret = ISO7816_RecBytes(SCIx,&pResponse[tmpRecLen++], 1); + COMPARE_RETURN(ret); + *pResponseLength = tmpRecLen; + 100535c: 9b0c ldr r3, [sp, #48] ; 0x30 + ret = ISO7816_RecBytes(SCIx,&pResponse[tmpRecLen++], 1); + 100535e: 3402 adds r4, #2 + *pResponseLength = tmpRecLen; + 1005360: 801c strh r4, [r3, #0] + return OK; + 1005362: e034 b.n 10053ce + if (Ins == sw1) + 1005364: 9a05 ldr r2, [sp, #20] + 1005366: 4293 cmp r3, r2 + 1005368: d133 bne.n 10053d2 + if (5 == CommandLength) + 100536a: 9b04 ldr r3, [sp, #16] + 100536c: 2b05 cmp r3, #5 + 100536e: d10d bne.n 100538c + 1005370: 9f02 ldr r7, [sp, #8] + ret = ISO7816_RecBytes(SCIx,&pResponse[tmpRecLen], p3 + 2 - tmpRecLen); + 1005372: 1931 adds r1, r6, r4 + 1005374: 3702 adds r7, #2 + 1005376: b2bf uxth r7, r7 + 1005378: 1b3a subs r2, r7, r4 + 100537a: b292 uxth r2, r2 + 100537c: 0028 movs r0, r5 + 100537e: f7ff fd67 bl 1004e50 + COMPARE_RETURN(ret); + 1005382: 2800 cmp r0, #0 + 1005384: d123 bne.n 10053ce + ret = ISO7816_RecBytes(SCIx,&pResponse[tmpRecLen++], 1); + COMPARE_RETURN(ret); + + if (tmpRecLen >= (p3 + 2)) + { + *pResponseLength = tmpRecLen; + 1005386: 9b0c ldr r3, [sp, #48] ; 0x30 + 1005388: 801f strh r7, [r3, #0] + return OK; + 100538a: e020 b.n 10053ce + ret = ISO7816_SendBytes_T0(SCIx, pCommand + tmpSendOffset, p3); + 100538c: 9a03 ldr r2, [sp, #12] + 100538e: 9b01 ldr r3, [sp, #4] + 1005390: 4694 mov ip, r2 + 1005392: 4463 add r3, ip + 1005394: 0019 movs r1, r3 + 1005396: 9a02 ldr r2, [sp, #8] + 1005398: 0028 movs r0, r5 + 100539a: f7ff fe93 bl 10050c4 + COMPARE_RETURN(ret); + 100539e: 2800 cmp r0, #0 + 10053a0: d115 bne.n 10053ce + pResponse[tmpRecLen] = ISO7816_NULL_T0; + 10053a2: 2360 movs r3, #96 ; 0x60 + 10053a4: 1937 adds r7, r6, r4 + 10053a6: 703b strb r3, [r7, #0] + ret = ISO7816_RecBytes(SCIx,&pResponse[tmpRecLen], 1); + 10053a8: 2201 movs r2, #1 + 10053aa: 0039 movs r1, r7 + 10053ac: 0028 movs r0, r5 + 10053ae: f7ff fd4f bl 1004e50 + COMPARE_RETURN(ret); + 10053b2: 2800 cmp r0, #0 + 10053b4: d10b bne.n 10053ce + while (pResponse[tmpRecLen] == ISO7816_NULL_T0); + 10053b6: 783b ldrb r3, [r7, #0] + 10053b8: 2b60 cmp r3, #96 ; 0x60 + 10053ba: d0f5 beq.n 10053a8 + tmpRecLen++; + 10053bc: 1c61 adds r1, r4, #1 + ret = ISO7816_RecBytes(SCIx,&pResponse[tmpRecLen++], 1); + 10053be: b289 uxth r1, r1 + 10053c0: 1871 adds r1, r6, r1 + 10053c2: 2201 movs r2, #1 + 10053c4: 0028 movs r0, r5 + 10053c6: f7ff fd43 bl 1004e50 + COMPARE_RETURN(ret); + 10053ca: 2800 cmp r0, #0 + 10053cc: d0c6 beq.n 100535c + return ISO7816_PROCEDURE_INS_ERROR; + } + + } + while (1); +} + 10053ce: b007 add sp, #28 + 10053d0: bdf0 pop {r4, r5, r6, r7, pc} + else if (sw1 == (uint8_t)(~Ins)) //如果是INS的补码 + 10053d2: 9a05 ldr r2, [sp, #20] + 10053d4: 43d2 mvns r2, r2 + 10053d6: b2d2 uxtb r2, r2 + 10053d8: 429a cmp r2, r3 + 10053da: d150 bne.n 100547e + if (5 == CommandLength) + 10053dc: 9b04 ldr r3, [sp, #16] + 10053de: 2b05 cmp r3, #5 + 10053e0: d117 bne.n 1005412 + ret = ISO7816_RecBytes(SCIx,&pResponse[tmpRecLen++], 1); + 10053e2: 1c67 adds r7, r4, #1 + 10053e4: 1931 adds r1, r6, r4 + 10053e6: 2201 movs r2, #1 + 10053e8: 0028 movs r0, r5 + 10053ea: b2bf uxth r7, r7 + 10053ec: f7ff fd30 bl 1004e50 + COMPARE_RETURN(ret); + 10053f0: 2800 cmp r0, #0 + 10053f2: d1ec bne.n 10053ce + if (tmpRecLen >= (p3 + 2)) + 10053f4: 9b02 ldr r3, [sp, #8] + 10053f6: 3301 adds r3, #1 + 10053f8: 42bb cmp r3, r7 + 10053fa: dbc4 blt.n 1005386 + ret = ISO7816_RecBytes(SCIx,&pResponse[tmpRecLen], 1); + 10053fc: 19f4 adds r4, r6, r7 + 10053fe: 2201 movs r2, #1 + 1005400: 0021 movs r1, r4 + 1005402: 0028 movs r0, r5 + 1005404: f7ff fd24 bl 1004e50 + COMPARE_RETURN(ret); + 1005408: 2800 cmp r0, #0 + 100540a: d1e0 bne.n 10053ce + sw1 = pResponse[tmpRecLen]; + 100540c: 7823 ldrb r3, [r4, #0] + ret = ISO7816_RecBytes(SCIx,&pResponse[tmpRecLen++], 1); + 100540e: 003c movs r4, r7 + 1005410: e78f b.n 1005332 + if (p3) + 1005412: 9b02 ldr r3, [sp, #8] + 1005414: 2b00 cmp r3, #0 + 1005416: d01c beq.n 1005452 + ret = ISO7816_SendBytes_T0(SCIx, pCommand + tmpSendOffset, 1); + 1005418: 9a03 ldr r2, [sp, #12] + 100541a: 9b01 ldr r3, [sp, #4] + 100541c: 0028 movs r0, r5 + 100541e: 1899 adds r1, r3, r2 + 1005420: 2201 movs r2, #1 + 1005422: f7ff fe4f bl 10050c4 + COMPARE_RETURN(ret); + 1005426: 2800 cmp r0, #0 + 1005428: d1d1 bne.n 10053ce + tmpSendOffset++; + 100542a: 9903 ldr r1, [sp, #12] + 100542c: 3101 adds r1, #1 + 100542e: b28b uxth r3, r1 + 1005430: 9303 str r3, [sp, #12] + p3--; + 1005432: 9b02 ldr r3, [sp, #8] + 1005434: 3b01 subs r3, #1 + 1005436: b29b uxth r3, r3 + 1005438: 9302 str r3, [sp, #8] + ret = ISO7816_RecBytes(SCIx,&pResponse[tmpRecLen], 1); + 100543a: 1937 adds r7, r6, r4 + 100543c: 2201 movs r2, #1 + 100543e: 0039 movs r1, r7 + 1005440: 0028 movs r0, r5 + 1005442: f7ff fd05 bl 1004e50 + COMPARE_RETURN(ret); + 1005446: 2800 cmp r0, #0 + 1005448: d1c1 bne.n 10053ce + while (pResponse[tmpRecLen] == ISO7816_NULL_T0); + 100544a: 783b ldrb r3, [r7, #0] + 100544c: 2b60 cmp r3, #96 ; 0x60 + 100544e: d0f4 beq.n 100543a + 1005450: e76f b.n 1005332 + ret = ISO7816_RecBytes(SCIx,&pResponse[tmpRecLen], 1); + 1005452: 1937 adds r7, r6, r4 + 1005454: 2201 movs r2, #1 + 1005456: 0039 movs r1, r7 + 1005458: 0028 movs r0, r5 + 100545a: f7ff fcf9 bl 1004e50 + COMPARE_RETURN(ret); + 100545e: 2800 cmp r0, #0 + 1005460: d1b5 bne.n 10053ce + while (pResponse[tmpRecLen] == ISO7816_NULL_T0); + 1005462: 783b ldrb r3, [r7, #0] + 1005464: 2b60 cmp r3, #96 ; 0x60 + 1005466: d0f4 beq.n 1005452 + ret = ISO7816_RecBytes(SCIx,pResponse + 1, 1); + 1005468: 1c71 adds r1, r6, #1 + 100546a: 2201 movs r2, #1 + 100546c: 0028 movs r0, r5 + 100546e: f7ff fcef bl 1004e50 + COMPARE_RETURN(ret); + 1005472: 2800 cmp r0, #0 + 1005474: d1ab bne.n 10053ce + *pResponseLength = 2; + 1005476: 2302 movs r3, #2 + 1005478: 9a0c ldr r2, [sp, #48] ; 0x30 + 100547a: 8013 strh r3, [r2, #0] + return OK; + 100547c: e7a7 b.n 10053ce + return ISO7816_PROCEDURE_INS_ERROR; + 100547e: 2071 movs r0, #113 ; 0x71 + 1005480: e7a5 b.n 10053ce + +01005482 : + * @param I_Len: I-block length + * @param pLRC: pLRC + * @retval None + */ +uint16_t ISO7816_CalcLRC(uint8_t *pBuff, uint16_t I_Len, uint8_t *pLRC) +{ + 1005482: b530 push {r4, r5, lr} + uint16_t i; + + if ((pBuff == NULL) || (pLRC == NULL)) + { + return ISO7816_PARA_ERROR; + 1005484: 2359 movs r3, #89 ; 0x59 + if ((pBuff == NULL) || (pLRC == NULL)) + 1005486: 2800 cmp r0, #0 + 1005488: d007 beq.n 100549a + 100548a: 2a00 cmp r2, #0 + 100548c: d005 beq.n 100549a + } + *pLRC = 0; + 100548e: 2300 movs r3, #0 + 1005490: 7013 strb r3, [r2, #0] + for (i = 0; i < I_Len; i++) + 1005492: b29c uxth r4, r3 + 1005494: 42a1 cmp r1, r4 + 1005496: d802 bhi.n 100549e + 1005498: 2300 movs r3, #0 + { + *pLRC ^= pBuff[i]; + } + return OK; +} + 100549a: 0018 movs r0, r3 + 100549c: bd30 pop {r4, r5, pc} + *pLRC ^= pBuff[i]; + 100549e: 5cc5 ldrb r5, [r0, r3] + 10054a0: 7814 ldrb r4, [r2, #0] + 10054a2: 3301 adds r3, #1 + 10054a4: 406c eors r4, r5 + 10054a6: 7014 strb r4, [r2, #0] + 10054a8: e7f3 b.n 1005492 + +010054aa : + * @param I_Len: I-block length + * @param LRC: LRC + * @retval None + */ +uint16_t ISO7816_CheckLRC(uint8_t *pBuff, uint16_t I_Len, uint8_t LRC) +{ + 10054aa: b537 push {r0, r1, r2, r4, r5, lr} + uint8_t tmpLRC = 0; + 10054ac: 466b mov r3, sp + 10054ae: 1ddc adds r4, r3, #7 + 10054b0: 2300 movs r3, #0 +{ + 10054b2: 0015 movs r5, r2 + if (OK != ISO7816_CalcLRC(pBuff, I_Len, &tmpLRC)) + 10054b4: 0022 movs r2, r4 + uint8_t tmpLRC = 0; + 10054b6: 7023 strb r3, [r4, #0] + if (OK != ISO7816_CalcLRC(pBuff, I_Len, &tmpLRC)) + 10054b8: f7ff ffe3 bl 1005482 + 10054bc: 2800 cmp r0, #0 + 10054be: d104 bne.n 10054ca + { + return ISO7816_PARA_ERROR; + } + + if (LRC != tmpLRC) + 10054c0: 7823 ldrb r3, [r4, #0] + 10054c2: 42ab cmp r3, r5 + 10054c4: d002 beq.n 10054cc + { + return ISO7816_T1_LRC_ERROR; + 10054c6: 2054 movs r0, #84 ; 0x54 + 10054c8: e000 b.n 10054cc + return ISO7816_PARA_ERROR; + 10054ca: 2059 movs r0, #89 ; 0x59 + } + return OK; +} + 10054cc: bd3e pop {r1, r2, r3, r4, r5, pc} + ... + +010054d0 : + * @param pBuff: Sending data storage unit + * @param Len: Sending data length + * @retval SCI_TX_Result: 0-send finsh + */ +uint16_t ISO7816_SendBytes_T1(SCI_Struct_Type* SCIx,uint8_t *pBuff, uint16_t Len) +{ + 10054d0: b5f0 push {r4, r5, r6, r7, lr} + 10054d2: 0007 movs r7, r0 + 10054d4: b087 sub sp, #28 + uint8_t tx_fifo_level = 0; + + + if ((!Len) || (NULL == pBuff)) + { + return ISO7816_PARA_ERROR; + 10054d6: 2059 movs r0, #89 ; 0x59 + if ((!Len) || (NULL == pBuff)) + 10054d8: 2a00 cmp r2, #0 + 10054da: d002 beq.n 10054e2 + 10054dc: 2300 movs r3, #0 + 10054de: 2900 cmp r1, #0 + 10054e0: d107 bne.n 10054f2 + +#ifdef DEBUG_7816 + MyPrintf("\n"); +#endif + return SCIx->SCI_Tran_StateCB.SCI_TX_Result; +} + 10054e2: b007 add sp, #28 + 10054e4: bdf0 pop {r4, r5, r6, r7, pc} + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[4+i] = *pBuff++; + 10054e6: 4d76 ldr r5, [pc, #472] ; (10056c0 ) + 10054e8: 5ccc ldrb r4, [r1, r3] + 10054ea: 18f8 adds r0, r7, r3 + 10054ec: 1940 adds r0, r0, r5 + 10054ee: 7004 strb r4, [r0, #0] + 10054f0: 3301 adds r3, #1 + for(i=0; i + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[0] = Len/0x100; + 10054f8: 4972 ldr r1, [pc, #456] ; (10056c4 ) + 10054fa: 0a13 lsrs r3, r2, #8 + 10054fc: 547b strb r3, [r7, r1] + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[1] = Len%0x100; + 10054fe: 2380 movs r3, #128 ; 0x80 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[2] = 0; + 1005500: 2400 movs r4, #0 + 1005502: 4e71 ldr r6, [pc, #452] ; (10056c8 ) + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[3] = 0; + 1005504: 4d71 ldr r5, [pc, #452] ; (10056cc ) + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[1] = Len%0x100; + 1005506: 00db lsls r3, r3, #3 + 1005508: b2d2 uxtb r2, r2 + 100550a: 54fa strb r2, [r7, r3] + ISO7816_TX_APDU_Config(SCIx); + 100550c: 0038 movs r0, r7 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[2] = 0; + 100550e: 55bc strb r4, [r7, r6] + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[3] = 0; + 1005510: 557c strb r4, [r7, r5] + ISO7816_TX_APDU_Config(SCIx); + 1005512: f7fe fb5d bl 1003bd0 + 1005516: 4b6b ldr r3, [pc, #428] ; (10056c4 ) + uint16_t val = 0; + 1005518: 9400 str r4, [sp, #0] + 100551a: 9304 str r3, [sp, #16] + len = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[0]*0x100 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[1]; + 100551c: 3301 adds r3, #1 + 100551e: 9601 str r6, [sp, #4] + 1005520: 9502 str r5, [sp, #8] + 1005522: 9305 str r3, [sp, #20] + while (SCIx->SCI_Tran_StateCB.SCI_TX_Result == 0xff) + 1005524: 486a ldr r0, [pc, #424] ; (10056d0 ) + 1005526: 5c3b ldrb r3, [r7, r0] + 1005528: 2bff cmp r3, #255 ; 0xff + 100552a: d001 beq.n 1005530 + return SCIx->SCI_Tran_StateCB.SCI_TX_Result; + 100552c: 5c38 ldrb r0, [r7, r0] + 100552e: e7d8 b.n 10054e2 + tx_fifo_level = SCIx->SCIx7816->FIFO_CTRL.reg & 0x0f; + 1005530: 683b ldr r3, [r7, #0] + 1005532: 0019 movs r1, r3 + 1005534: 318c adds r1, #140 ; 0x8c + 1005536: 680a ldr r2, [r1, #0] + 1005538: 9203 str r2, [sp, #12] + if (SCIx->SCIx7816->IS.bit.TFIFO_LA == 1) + 100553a: 6e1a ldr r2, [r3, #96] ; 0x60 + 100553c: 0612 lsls r2, r2, #24 + 100553e: d555 bpl.n 10055ec + len = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[0]*0x100 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[1]; + 1005540: 9a04 ldr r2, [sp, #16] + index = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[2]*0x100 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[3]; + 1005542: 9e02 ldr r6, [sp, #8] + len = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[0]*0x100 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[1]; + 1005544: 5cbc ldrb r4, [r7, r2] + 1005546: 9a05 ldr r2, [sp, #20] + 1005548: 0224 lsls r4, r4, #8 + 100554a: 5cba ldrb r2, [r7, r2] + 100554c: 18a4 adds r4, r4, r2 + index = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[2]*0x100 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[3]; + 100554e: 9a01 ldr r2, [sp, #4] + len = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[0]*0x100 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[1]; + 1005550: b2a4 uxth r4, r4 + index = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[2]*0x100 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[3]; + 1005552: 5cba ldrb r2, [r7, r2] + 1005554: 5dbe ldrb r6, [r7, r6] + 1005556: 0212 lsls r2, r2, #8 + 1005558: 1992 adds r2, r2, r6 + 100555a: b292 uxth r2, r2 + if (len > index) + 100555c: 4294 cmp r4, r2 + 100555e: d91c bls.n 100559a + val = len - index; + 1005560: 1aa4 subs r4, r4, r2 + 1005562: b2a4 uxth r4, r4 + 1005564: 9400 str r4, [sp, #0] + if(val > (8-tx_fifo_level)) + 1005566: 240f movs r4, #15 + 1005568: 9d03 ldr r5, [sp, #12] + 100556a: 4025 ands r5, r4 + 100556c: 3c07 subs r4, #7 + 100556e: 1b65 subs r5, r4, r5 + 1005570: 9c00 ldr r4, [sp, #0] + 1005572: 42ac cmp r4, r5 + 1005574: dd00 ble.n 1005578 + 1005576: e097 b.n 10056a8 + 1005578: 1914 adds r4, r2, r4 + 100557a: b2a4 uxth r4, r4 + for (i = 0; i < val; i++) + 100557c: 42a2 cmp r2, r4 + 100557e: d000 beq.n 1005582 + 1005580: e094 b.n 10056ac + SCIx->SCIx7816->FIFO_CTRL.bit.TL_WTL &=~0x0f; + 1005582: 250f movs r5, #15 + 1005584: 680a ldr r2, [r1, #0] + 1005586: 880a ldrh r2, [r1, #0] + 1005588: 43aa bics r2, r5 + SCIx->SCIx7816->IS.bit.TFIFO_LA = 1; + 100558a: 001d movs r5, r3 + SCIx->SCIx7816->FIFO_CTRL.bit.TL_WTL &=~0x0f; + 100558c: 800a strh r2, [r1, #0] + SCIx->SCIx7816->IS.bit.TFIFO_LA = 1; + 100558e: 2280 movs r2, #128 ; 0x80 + 1005590: 3560 adds r5, #96 ; 0x60 + 1005592: 882e ldrh r6, [r5, #0] + 1005594: 4332 orrs r2, r6 + 1005596: 802a strh r2, [r5, #0] + 1005598: e01b b.n 10055d2 + SCIx->SCIx7816->FIFO_CTRL.bit.TL_WTL &=~0x0f; + 100559a: 260f movs r6, #15 + 100559c: 680c ldr r4, [r1, #0] + 100559e: 880c ldrh r4, [r1, #0] + 10055a0: 43b4 bics r4, r6 + SCIx->SCIx7816->IS.bit.TFIFO_LA = 1; + 10055a2: 001e movs r6, r3 + SCIx->SCIx7816->FIFO_CTRL.bit.TL_WTL &=~0x0f; + 10055a4: 800c strh r4, [r1, #0] + SCIx->SCIx7816->IS.bit.TFIFO_LA = 1; + 10055a6: 3660 adds r6, #96 ; 0x60 + 10055a8: 8834 ldrh r4, [r6, #0] + 10055aa: 46a4 mov ip, r4 + 10055ac: 2480 movs r4, #128 ; 0x80 + 10055ae: 4665 mov r5, ip + 10055b0: 432c orrs r4, r5 + 10055b2: 8034 strh r4, [r6, #0] + 10055b4: e7d7 b.n 1005566 + SCIx->SCIx7816->DATA.reg = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[4 + index++]; + 10055b6: 1c66 adds r6, r4, #1 + 10055b8: 46b4 mov ip, r6 + 10055ba: 4e41 ldr r6, [pc, #260] ; (10056c0 ) + 10055bc: 193c adds r4, r7, r4 + 10055be: 19a4 adds r4, r4, r6 + 10055c0: 7824 ldrb r4, [r4, #0] + 10055c2: b2e4 uxtb r4, r4 + 10055c4: 621c str r4, [r3, #32] + 10055c6: 4664 mov r4, ip + 10055c8: b2a4 uxth r4, r4 + for (i = 0; i < (8-tx_fifo_level); i++) + 10055ca: 1aa6 subs r6, r4, r2 + 10055cc: b2b6 uxth r6, r6 + 10055ce: 42b5 cmp r5, r6 + 10055d0: dcf1 bgt.n 10055b6 + SCIx->SCIx7816->IS.bit.TFIFO_LA = 1; + 10055d2: 001d movs r5, r3 + 10055d4: 2280 movs r2, #128 ; 0x80 + 10055d6: 3560 adds r5, #96 ; 0x60 + 10055d8: 882e ldrh r6, [r5, #0] + 10055da: 4332 orrs r2, r6 + 10055dc: 802a strh r2, [r5, #0] + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[2] = index/0x100; + 10055de: 9d01 ldr r5, [sp, #4] + 10055e0: 0a22 lsrs r2, r4, #8 + 10055e2: b2d2 uxtb r2, r2 + 10055e4: 557a strb r2, [r7, r5] + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[3] = index%0x100; + 10055e6: 9a02 ldr r2, [sp, #8] + 10055e8: b2e4 uxtb r4, r4 + 10055ea: 54bc strb r4, [r7, r2] + if (SCIx->SCIx7816->IS.bit.T_DONE == 1 ) + 10055ec: 6e1a ldr r2, [r3, #96] ; 0x60 + 10055ee: 06d2 lsls r2, r2, #27 + 10055f0: d507 bpl.n 1005602 + SCIx->SCI_Tran_StateCB.SCI_TX_Result = 0; + 10055f2: 2200 movs r2, #0 + SCIx->SCIx7816->IS.bit.T_DONE = 1; + 10055f4: 001c movs r4, r3 + SCIx->SCI_Tran_StateCB.SCI_TX_Result = 0; + 10055f6: 543a strb r2, [r7, r0] + SCIx->SCIx7816->IS.bit.T_DONE = 1; + 10055f8: 3460 adds r4, #96 ; 0x60 + 10055fa: 8825 ldrh r5, [r4, #0] + 10055fc: 3210 adds r2, #16 + 10055fe: 432a orrs r2, r5 + 1005600: 8022 strh r2, [r4, #0] + if (SCIx->SCIx7816->IS.bit.T_ERR == 1 ) + 1005602: 6e1a ldr r2, [r3, #96] ; 0x60 + 1005604: 0692 lsls r2, r2, #26 + 1005606: d507 bpl.n 1005618 + SCIx->SCI_Tran_StateCB.SCI_TX_Result = ISO7816_ERR_NUM_OVER; + 1005608: 225c movs r2, #92 ; 0x5c + SCIx->SCIx7816->IS.bit.T_ERR = 1; + 100560a: 001c movs r4, r3 + SCIx->SCI_Tran_StateCB.SCI_TX_Result = ISO7816_ERR_NUM_OVER; + 100560c: 543a strb r2, [r7, r0] + SCIx->SCIx7816->IS.bit.T_ERR = 1; + 100560e: 3460 adds r4, #96 ; 0x60 + 1005610: 8825 ldrh r5, [r4, #0] + 1005612: 3a3c subs r2, #60 ; 0x3c + 1005614: 432a orrs r2, r5 + 1005616: 8022 strh r2, [r4, #0] + if (SCIx->SCIx7816->IS.bit.TFIFO_OVF == 1 ) + 1005618: 6e1a ldr r2, [r3, #96] ; 0x60 + 100561a: 0592 lsls r2, r2, #22 + 100561c: d508 bpl.n 1005630 + SCIx->SCI_Tran_StateCB.SCI_TX_Result = ISO7816_ERR_NUM_OVER; + 100561e: 225c movs r2, #92 ; 0x5c + 1005620: 543a strb r2, [r7, r0] + SCIx->SCIx7816->IS.bit.TFIFO_OVF = 1; + 1005622: 0018 movs r0, r3 + 1005624: 3060 adds r0, #96 ; 0x60 + 1005626: 8804 ldrh r4, [r0, #0] + 1005628: 32a5 adds r2, #165 ; 0xa5 + 100562a: 32ff adds r2, #255 ; 0xff + 100562c: 4322 orrs r2, r4 + 100562e: 8002 strh r2, [r0, #0] + if ((SCIx->SCIx7816->IS.bit.RFIFO_OVF == 1) | (SCIx->SCIx7816->IS.bit.RFIFO_HA) \ + 1005630: 6e18 ldr r0, [r3, #96] ; 0x60 + 1005632: 6e1a ldr r2, [r3, #96] ; 0x60 + | (SCIx->SCIx7816->IS.bit.R_ERR == 1) | (SCIx->SCIx7816->IS.bit.BWT_TO == 1) |(SCIx->SCIx7816->IS.bit.CWT_TO ==1)) + 1005634: 6e1d ldr r5, [r3, #96] ; 0x60 + if ((SCIx->SCIx7816->IS.bit.RFIFO_OVF == 1) | (SCIx->SCIx7816->IS.bit.RFIFO_HA) \ + 1005636: 05c0 lsls r0, r0, #23 + | (SCIx->SCIx7816->IS.bit.R_ERR == 1) | (SCIx->SCIx7816->IS.bit.BWT_TO == 1) |(SCIx->SCIx7816->IS.bit.CWT_TO ==1)) + 1005638: 6e1c ldr r4, [r3, #96] ; 0x60 + if ((SCIx->SCIx7816->IS.bit.RFIFO_OVF == 1) | (SCIx->SCIx7816->IS.bit.RFIFO_HA) \ + 100563a: 0652 lsls r2, r2, #25 + 100563c: 4302 orrs r2, r0 + | (SCIx->SCIx7816->IS.bit.R_ERR == 1) | (SCIx->SCIx7816->IS.bit.BWT_TO == 1) |(SCIx->SCIx7816->IS.bit.CWT_TO ==1)) + 100563e: 07ad lsls r5, r5, #30 + 1005640: 6e18 ldr r0, [r3, #96] ; 0x60 + 1005642: 0724 lsls r4, r4, #28 + if ((SCIx->SCIx7816->IS.bit.RFIFO_OVF == 1) | (SCIx->SCIx7816->IS.bit.RFIFO_HA) \ + 1005644: 432a orrs r2, r5 + | (SCIx->SCIx7816->IS.bit.R_ERR == 1) | (SCIx->SCIx7816->IS.bit.BWT_TO == 1) |(SCIx->SCIx7816->IS.bit.CWT_TO ==1)) + 1005646: 0740 lsls r0, r0, #29 + if ((SCIx->SCIx7816->IS.bit.RFIFO_OVF == 1) | (SCIx->SCIx7816->IS.bit.RFIFO_HA) \ + 1005648: 4314 orrs r4, r2 + 100564a: 4320 orrs r0, r4 + 100564c: d507 bpl.n 100565e + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &=~0x0f; + 100564e: 20f0 movs r0, #240 ; 0xf0 + 1005650: 680a ldr r2, [r1, #0] + 1005652: 880a ldrh r2, [r1, #0] + 1005654: 4382 bics r2, r0 + 1005656: 800a strh r2, [r1, #0] + SCIx->SCIx7816->IS.reg = 0XFFFFFFFF; + 1005658: 2201 movs r2, #1 + 100565a: 4252 negs r2, r2 + 100565c: 661a str r2, [r3, #96] ; 0x60 + if (ISO7816_Detect_Io_State() == SCIx->SCI_Tran_StateCB.Sci_Pin_Detect_State) + 100565e: f7fe f9d7 bl 1003a10 + 1005662: 23b7 movs r3, #183 ; 0xb7 + 1005664: 009b lsls r3, r3, #2 + 1005666: 5cfb ldrb r3, [r7, r3] + 1005668: 4298 cmp r0, r3 + 100566a: d000 beq.n 100566e + 100566c: e75a b.n 1005524 + SCIx->SCIx7816->IS.reg = 0xffffffff; + 100566e: 2501 movs r5, #1 + SCIx->SCIx7816->IE.reg = 0; + 1005670: 2200 movs r2, #0 + SCIx->SCIx7816->CTRL2.bit.TX_EN &=~1; + 1005672: 2401 movs r4, #1 + SCIx->SCIx7816->IE.reg = 0; + 1005674: 683b ldr r3, [r7, #0] + SCIx->SCIx7816->IS.reg = 0xffffffff; + 1005676: 426d negs r5, r5 + SCIx->SCIx7816->IE.reg = 0; + 1005678: 665a str r2, [r3, #100] ; 0x64 + SCIx->SCIx7816->IS.reg = 0xffffffff; + 100567a: 661d str r5, [r3, #96] ; 0x60 + SCIx->SCIx7816->CTRL2.bit.TX_EN &=~1; + 100567c: 6eda ldr r2, [r3, #108] ; 0x6c + 100567e: 6eda ldr r2, [r3, #108] ; 0x6c + delay_ms(2); //至少1字节时间 + 1005680: 2002 movs r0, #2 + SCIx->SCIx7816->CTRL2.bit.TX_EN &=~1; + 1005682: 43a2 bics r2, r4 + 1005684: 66da str r2, [r3, #108] ; 0x6c + delay_ms(2); //至少1字节时间 + 1005686: f7fd f8d5 bl 1002834 + SCIx->SCIx7816->CTRL.bit.RFIFO_CL = 1;//clear tx/rx fifo + 100568a: 683b ldr r3, [r7, #0] + delay_ms(1); //至少大于100us + 100568c: 0020 movs r0, r4 + SCIx->SCIx7816->CTRL.bit.RFIFO_CL = 1;//clear tx/rx fifo + 100568e: 7a1a ldrb r2, [r3, #8] + 1005690: 4322 orrs r2, r4 + 1005692: 721a strb r2, [r3, #8] + SCIx->SCIx7816->CTRL.bit.TFIFO_CL = 1;//clear tx/rx fifo + 1005694: 2202 movs r2, #2 + 1005696: 7a19 ldrb r1, [r3, #8] + 1005698: 430a orrs r2, r1 + 100569a: 721a strb r2, [r3, #8] + delay_ms(1); //至少大于100us + 100569c: f7fd f8ca bl 1002834 + SCIx->SCIx7816->IS.reg = 0xffffffff; + 10056a0: 683b ldr r3, [r7, #0] + return ISO7816_CARD_ABSENT; + 10056a2: 2062 movs r0, #98 ; 0x62 + SCIx->SCIx7816->IS.reg = 0xffffffff; + 10056a4: 661d str r5, [r3, #96] ; 0x60 + 10056a6: e71c b.n 10054e2 + index = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[2]*0x100 + SCIx->SCI_Tran_StateCB.SCI_TX_Buf[3]; + 10056a8: 0014 movs r4, r2 + 10056aa: e78e b.n 10055ca + SCIx->SCIx7816->DATA.reg = SCIx->SCI_Tran_StateCB.SCI_TX_Buf[4 + index++]; + 10056ac: 4e04 ldr r6, [pc, #16] ; (10056c0 ) + 10056ae: 1c55 adds r5, r2, #1 + 10056b0: 18ba adds r2, r7, r2 + 10056b2: 1992 adds r2, r2, r6 + 10056b4: 7812 ldrb r2, [r2, #0] + 10056b6: b2d2 uxtb r2, r2 + 10056b8: 621a str r2, [r3, #32] + 10056ba: b2aa uxth r2, r5 + 10056bc: e75e b.n 100557c + 10056be: 46c0 nop ; (mov r8, r8) + 10056c0: 00000403 .word 0x00000403 + 10056c4: 000003ff .word 0x000003ff + 10056c8: 00000401 .word 0x00000401 + 10056cc: 00000402 .word 0x00000402 + 10056d0: 000002df .word 0x000002df + +010056d4 : + * @param RxBuf: Receive Data buff + * @param RxLen: Receive Data length + * @retval OK : 0 on success + */ +uint16_t ISO7816_RecBlock_DATA(SCI_Struct_Type *SCIx,uint8_t *RxBuf, uint16_t RxLen) +{ + 10056d4: b5f0 push {r4, r5, r6, r7, lr} + 10056d6: b089 sub sp, #36 ; 0x24 + 10056d8: 0004 movs r4, r0 + 10056da: 9103 str r1, [sp, #12] + 10056dc: 9201 str r2, [sp, #4] + uint16_t val = 0; + uint8_t rx_num = 0; + + if ((!(RxLen)) || (NULL == RxBuf)) + { + return ISO7816_PARA_ERROR; + 10056de: 2059 movs r0, #89 ; 0x59 + if ((!(RxLen)) || (NULL == RxBuf)) + 10056e0: 2a00 cmp r2, #0 + 10056e2: d100 bne.n 10056e6 + 10056e4: e0ec b.n 10058c0 + 10056e6: 2900 cmp r1, #0 + 10056e8: d100 bne.n 10056ec + 10056ea: e0e9 b.n 10058c0 + } + + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[0] = RxLen/0x100; + 10056ec: 4893 ldr r0, [pc, #588] ; (100593c ) + 10056ee: 0a13 lsrs r3, r2, #8 + 10056f0: 5423 strb r3, [r4, r0] + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[1] = RxLen%0x100; + 10056f2: 466b mov r3, sp + 10056f4: 7919 ldrb r1, [r3, #4] + 10056f6: 23ba movs r3, #186 ; 0xba + 10056f8: 009b lsls r3, r3, #2 + 10056fa: 54e1 strb r1, [r4, r3] + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2] = 0; + 10056fc: 2300 movs r3, #0 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3] = 0; + 10056fe: 4a90 ldr r2, [pc, #576] ; (1005940 ) + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2] = 0; + 1005700: 4d90 ldr r5, [pc, #576] ; (1005944 ) + 1005702: 9205 str r2, [sp, #20] + 1005704: 5563 strb r3, [r4, r5] + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3] = 0; + 1005706: 54a3 strb r3, [r4, r2] + if (RxLen >= 8) + 1005708: 9a01 ldr r2, [sp, #4] + 100570a: 9007 str r0, [sp, #28] + 100570c: 9504 str r5, [sp, #16] + 100570e: 2a07 cmp r2, #7 + 1005710: d900 bls.n 1005714 + { + waterlevel = 4; + 1005712: 2104 movs r1, #4 + else + { + waterlevel = RxLen; + } + + SCIx->SCI_Tran_StateCB.T1_parity_flag =0; + 1005714: 4d8c ldr r5, [pc, #560] ; (1005948 ) + SCIx->SCI_Tran_StateCB.Card_Type = 1; + 1005716: 2201 movs r2, #1 + SCIx->SCI_Tran_StateCB.T1_parity_flag =0; + 1005718: 5563 strb r3, [r4, r5] + SCIx->SCI_Tran_StateCB.Card_Type = 1; + 100571a: 23b8 movs r3, #184 ; 0xb8 + 100571c: 009b lsls r3, r3, #2 + 100571e: 54e2 strb r2, [r4, r3] + ISO7816_RX_APDU_Config(SCIx,waterlevel); + 1005720: 0020 movs r0, r4 + 1005722: f7fe fa2f bl 1003b84 + 1005726: 9506 str r5, [sp, #24] + + do + { + if (SCIx->SCIx7816->IS.bit.RFIFO_HA == 1) + 1005728: 6822 ldr r2, [r4, #0] + 100572a: 6e13 ldr r3, [r2, #96] ; 0x60 + 100572c: 065b lsls r3, r3, #25 + 100572e: d54d bpl.n 10057cc + { + len = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[0]*0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[1]; + 1005730: 9b07 ldr r3, [sp, #28] + index = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2]*0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3]; + + rx_num = SCIx->SCIx7816->FIFO_CTRL.bit.R_ITEMS; + 1005732: 0016 movs r6, r2 + len = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[0]*0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[1]; + 1005734: 5ce1 ldrb r1, [r4, r3] + 1005736: 23ba movs r3, #186 ; 0xba + 1005738: 009b lsls r3, r3, #2 + 100573a: 5ce3 ldrb r3, [r4, r3] + 100573c: 0209 lsls r1, r1, #8 + 100573e: 18c9 adds r1, r1, r3 + index = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2]*0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3]; + 1005740: 9b04 ldr r3, [sp, #16] + 1005742: 9805 ldr r0, [sp, #20] + 1005744: 5ce3 ldrb r3, [r4, r3] + 1005746: 5c20 ldrb r0, [r4, r0] + 1005748: 021b lsls r3, r3, #8 + rx_num = SCIx->SCIx7816->FIFO_CTRL.bit.R_ITEMS; + 100574a: 368c adds r6, #140 ; 0x8c + index = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2]*0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3]; + 100574c: 181b adds r3, r3, r0 + rx_num = SCIx->SCIx7816->FIFO_CTRL.bit.R_ITEMS; + 100574e: 6830 ldr r0, [r6, #0] + len = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[0]*0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[1]; + 1005750: b289 uxth r1, r1 + rx_num = SCIx->SCIx7816->FIFO_CTRL.bit.R_ITEMS; + 1005752: 0400 lsls r0, r0, #16 + index = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2]*0x100 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3]; + 1005754: b29b uxth r3, r3 + rx_num = SCIx->SCIx7816->FIFO_CTRL.bit.R_ITEMS; + 1005756: 0f00 lsrs r0, r0, #28 + if(len > index) + 1005758: 4299 cmp r1, r3 + 100575a: d91d bls.n 1005798 + { + val = len - index; + 100575c: 1acd subs r5, r1, r3 + if (val <= rx_num) + 100575e: b280 uxth r0, r0 + 1005760: b2ad uxth r5, r5 + 1005762: 9002 str r0, [sp, #8] + 1005764: 4285 cmp r5, r0 + 1005766: d911 bls.n 100578c + 1005768: 001d movs r5, r3 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[4 + index++] = SCIx->SCIx7816->DATA.reg; + } + } + else + { + for (i = 0; i < rx_num; i++) + 100576a: 1aef subs r7, r5, r3 + 100576c: 9802 ldr r0, [sp, #8] + 100576e: b2bf uxth r7, r7 + 1005770: 42b8 cmp r0, r7 + 1005772: d900 bls.n 1005776 + 1005774: e0a6 b.n 10058c4 + 1005776: 181b adds r3, r3, r0 + 1005778: b29b uxth r3, r3 + 100577a: e00a b.n 1005792 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[4 + index++] = SCIx->SCIx7816->DATA.reg; + 100577c: 6a10 ldr r0, [r2, #32] + 100577e: 4f73 ldr r7, [pc, #460] ; (100594c ) + 1005780: 1c5d adds r5, r3, #1 + 1005782: 18e3 adds r3, r4, r3 + 1005784: 19db adds r3, r3, r7 + 1005786: b2c0 uxtb r0, r0 + 1005788: 7018 strb r0, [r3, #0] + 100578a: b2ab uxth r3, r5 + for (i = 0; i + 1005790: 000b movs r3, r1 + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[4 + index++] = SCIx->SCIx7816->DATA.reg; + } + } + } + + if(index >= len) + 1005792: 4299 cmp r1, r3 + 1005794: d900 bls.n 1005798 + 1005796: e0a0 b.n 10058da + { + SCIx->SCI_Tran_StateCB.SCI_RX_Result = 1; //rec finsh + 1005798: 2001 movs r0, #1 + 100579a: 496d ldr r1, [pc, #436] ; (1005950 ) + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &=~0x0f; + SCIx->SCIx7816->IS.bit.RFIFO_HA = 1; + 100579c: 2540 movs r5, #64 ; 0x40 + SCIx->SCI_Tran_StateCB.SCI_RX_Result = 1; //rec finsh + 100579e: 5460 strb r0, [r4, r1] + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &=~0x0f; + 10057a0: 6831 ldr r1, [r6, #0] + 10057a2: 8831 ldrh r1, [r6, #0] + 10057a4: 30ef adds r0, #239 ; 0xef + 10057a6: 4381 bics r1, r0 + SCIx->SCIx7816->IS.bit.RFIFO_HA = 1; + 10057a8: 0010 movs r0, r2 + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &=~0x0f; + 10057aa: 8031 strh r1, [r6, #0] + SCIx->SCIx7816->IS.bit.RFIFO_HA = 1; + 10057ac: 3060 adds r0, #96 ; 0x60 + 10057ae: 8801 ldrh r1, [r0, #0] + 10057b0: 4329 orrs r1, r5 + } + else if (((len - index) > 0) && ((len - index) < 4)) + { + + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &=~0x0f; + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL = (len - index); + 10057b2: 8001 strh r1, [r0, #0] + } + + SCIx->SCIx7816->IS.bit.RFIFO_HA = 1; + 10057b4: 0010 movs r0, r2 + 10057b6: 2540 movs r5, #64 ; 0x40 + 10057b8: 3060 adds r0, #96 ; 0x60 + 10057ba: 8801 ldrh r1, [r0, #0] + 10057bc: 4329 orrs r1, r5 + 10057be: 8001 strh r1, [r0, #0] + + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[2] = index/0x100; + 10057c0: 9804 ldr r0, [sp, #16] + 10057c2: 0a19 lsrs r1, r3, #8 + 10057c4: 5421 strb r1, [r4, r0] + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[3] = index%0x100; + 10057c6: 9905 ldr r1, [sp, #20] + 10057c8: b2db uxtb r3, r3 + 10057ca: 5463 strb r3, [r4, r1] + } + + //rx flag + if ((SCIx->SCIx7816->IS.bit.CWT_TO ==1) || (SCIx->SCIx7816->IS.bit.BWT_TO == 1)) + 10057cc: 6e13 ldr r3, [r2, #96] ; 0x60 + 10057ce: 075b lsls r3, r3, #29 + 10057d0: d402 bmi.n 10057d8 + 10057d2: 6e13 ldr r3, [r2, #96] ; 0x60 + 10057d4: 071b lsls r3, r3, #28 + 10057d6: d50c bpl.n 10057f2 + { + SCIx->SCI_Tran_StateCB.SCI_RX_Result = ISO7816_REC_TIMEOUT; + 10057d8: 215a movs r1, #90 ; 0x5a + 10057da: 4b5d ldr r3, [pc, #372] ; (1005950 ) + 10057dc: 54e1 strb r1, [r4, r3] + SCIx->SCIx7816->IS.bit.CWT_TO =1; + 10057de: 0013 movs r3, r2 + 10057e0: 3360 adds r3, #96 ; 0x60 + 10057e2: 8818 ldrh r0, [r3, #0] + 10057e4: 3956 subs r1, #86 ; 0x56 + 10057e6: 4301 orrs r1, r0 + 10057e8: 8019 strh r1, [r3, #0] + SCIx->SCIx7816->IS.bit.BWT_TO = 1; + 10057ea: 2108 movs r1, #8 + 10057ec: 8818 ldrh r0, [r3, #0] + 10057ee: 4301 orrs r1, r0 + 10057f0: 8019 strh r1, [r3, #0] + } + if ((SCIx->SCIx7816->IS.bit.R_ERR == 1) && (SCIx->SCI_Tran_StateCB.Card_Type == 0)) + 10057f2: 6e13 ldr r3, [r2, #96] ; 0x60 + 10057f4: 079b lsls r3, r3, #30 + 10057f6: d50d bpl.n 1005814 + 10057f8: 23b8 movs r3, #184 ; 0xb8 + 10057fa: 009b lsls r3, r3, #2 + 10057fc: 5ce3 ldrb r3, [r4, r3] + 10057fe: 2b00 cmp r3, #0 + 1005800: d108 bne.n 1005814 + { + SCIx->SCI_Tran_StateCB.SCI_RX_Result = ISO7816_ERR_NUM_OVER; + 1005802: 215c movs r1, #92 ; 0x5c + 1005804: 4b52 ldr r3, [pc, #328] ; (1005950 ) + 1005806: 54e1 strb r1, [r4, r3] + SCIx->SCIx7816->IS.bit.R_ERR = 1; + 1005808: 0011 movs r1, r2 + 100580a: 2302 movs r3, #2 + 100580c: 3160 adds r1, #96 ; 0x60 + 100580e: 8808 ldrh r0, [r1, #0] + 1005810: 4303 orrs r3, r0 + 1005812: 800b strh r3, [r1, #0] + } + if ((SCIx->SCIx7816->IS.bit.R_ERR == 1) && (SCIx->SCI_Tran_StateCB.Card_Type == 1)) + 1005814: 6e13 ldr r3, [r2, #96] ; 0x60 + 1005816: 079b lsls r3, r3, #30 + 1005818: d50d bpl.n 1005836 + 100581a: 23b8 movs r3, #184 ; 0xb8 + 100581c: 009b lsls r3, r3, #2 + 100581e: 5ce3 ldrb r3, [r4, r3] + 1005820: b2db uxtb r3, r3 + 1005822: 2b01 cmp r3, #1 + 1005824: d107 bne.n 1005836 + { + SCIx->SCI_Tran_StateCB.T1_parity_flag = 1; + 1005826: 9906 ldr r1, [sp, #24] + 1005828: 5463 strb r3, [r4, r1] + SCIx->SCIx7816->IS.bit.R_ERR = 1; + 100582a: 0011 movs r1, r2 + 100582c: 3160 adds r1, #96 ; 0x60 + 100582e: 8808 ldrh r0, [r1, #0] + 1005830: 3301 adds r3, #1 + 1005832: 4303 orrs r3, r0 + 1005834: 800b strh r3, [r1, #0] + } + if (SCIx->SCIx7816->IS.bit.RFIFO_OVF == 1) + 1005836: 6e13 ldr r3, [r2, #96] ; 0x60 + 1005838: 05db lsls r3, r3, #23 + 100583a: d509 bpl.n 1005850 + { + #ifdef DEBUG_7816_FPGA + MyPrintf("sci isr %08x \r\n", SCIx->SCIx7816->IS.reg); + #endif + SCIx->SCI_Tran_StateCB.SCI_RX_Result = ISO7816_ERR_NUM_OVER; + 100583c: 215c movs r1, #92 ; 0x5c + 100583e: 4b44 ldr r3, [pc, #272] ; (1005950 ) + 1005840: 54e1 strb r1, [r4, r3] + SCIx->SCIx7816->IS.bit.RFIFO_OVF = 1; + 1005842: 0011 movs r1, r2 + 1005844: 3160 adds r1, #96 ; 0x60 + 1005846: 8808 ldrh r0, [r1, #0] + 1005848: 3bdf subs r3, #223 ; 0xdf + 100584a: 3bff subs r3, #255 ; 0xff + 100584c: 4303 orrs r3, r0 + 100584e: 800b strh r3, [r1, #0] + } + + if ((SCIx->SCIx7816->IS.bit.TFIFO_OVF == 1) | (SCIx->SCIx7816->IS.bit.TFIFO_LA) | (SCIx->SCIx7816->IS.bit.T_ERR == 1) | (SCIx->SCIx7816->IS.bit.T_DONE == 1 )) + 1005850: 6e11 ldr r1, [r2, #96] ; 0x60 + 1005852: 6e13 ldr r3, [r2, #96] ; 0x60 + 1005854: 0589 lsls r1, r1, #22 + 1005856: 6e10 ldr r0, [r2, #96] ; 0x60 + 1005858: 061b lsls r3, r3, #24 + 100585a: 430b orrs r3, r1 + 100585c: 6e11 ldr r1, [r2, #96] ; 0x60 + 100585e: 0680 lsls r0, r0, #26 + 1005860: 06c9 lsls r1, r1, #27 + 1005862: 4303 orrs r3, r0 + 1005864: 430b orrs r3, r1 + 1005866: d509 bpl.n 100587c + MyPrintf("irq_sci iesr= %08x \r\n", SCIx->SCIx7816->IE.reg); + MyPrintf("irq_sci iesr= %08x \r\n", SCIx->SCIx7816->IES.reg); + MyPrintf("irq_sci ctrl2= %08x \r\n", SCIx->SCIx7816->CTRL2.reg); + #endif + + SCIx->SCIx7816->FIFO_CTRL.bit.TL_WTL &=~0x0f; + 1005868: 0013 movs r3, r2 + 100586a: 200f movs r0, #15 + 100586c: 338c adds r3, #140 ; 0x8c + 100586e: 6819 ldr r1, [r3, #0] + 1005870: 8819 ldrh r1, [r3, #0] + 1005872: 4381 bics r1, r0 + 1005874: 8019 strh r1, [r3, #0] + SCIx->SCIx7816->IS.reg = 0XFFFFFFFF; + 1005876: 2301 movs r3, #1 + 1005878: 425b negs r3, r3 + 100587a: 6613 str r3, [r2, #96] ; 0x60 + } + + if (ISO7816_Detect_Io_State() == SCIx->SCI_Tran_StateCB.Sci_Pin_Detect_State) + 100587c: f7fe f8c8 bl 1003a10 + 1005880: 23b7 movs r3, #183 ; 0xb7 + 1005882: 009b lsls r3, r3, #2 + 1005884: 5ce3 ldrb r3, [r4, r3] + 1005886: 4298 cmp r0, r3 + 1005888: d13a bne.n 1005900 + { + //config sci + SCIx->SCIx7816->IE.reg = 0; + SCIx->SCIx7816->IS.reg = 0xffffffff; + 100588a: 2501 movs r5, #1 + SCIx->SCIx7816->IE.reg = 0; + 100588c: 2200 movs r2, #0 + SCIx->SCIx7816->CTRL2.bit.RX_EN &=~1; + 100588e: 2602 movs r6, #2 + SCIx->SCIx7816->IE.reg = 0; + 1005890: 6823 ldr r3, [r4, #0] + SCIx->SCIx7816->IS.reg = 0xffffffff; + 1005892: 426d negs r5, r5 + SCIx->SCIx7816->IE.reg = 0; + 1005894: 665a str r2, [r3, #100] ; 0x64 + SCIx->SCIx7816->IS.reg = 0xffffffff; + 1005896: 661d str r5, [r3, #96] ; 0x60 + SCIx->SCIx7816->CTRL2.bit.RX_EN &=~1; + 1005898: 6eda ldr r2, [r3, #108] ; 0x6c + 100589a: 6eda ldr r2, [r3, #108] ; 0x6c + delay_ms(2); //至少1字节时间 + 100589c: 0030 movs r0, r6 + SCIx->SCIx7816->CTRL2.bit.RX_EN &=~1; + 100589e: 43b2 bics r2, r6 + 10058a0: 66da str r2, [r3, #108] ; 0x6c + delay_ms(2); //至少1字节时间 + 10058a2: f7fc ffc7 bl 1002834 + SCIx->SCIx7816->CTRL.bit.RFIFO_CL = 1;//clear tx/rx fifo + 10058a6: 2001 movs r0, #1 + 10058a8: 6822 ldr r2, [r4, #0] + 10058aa: 7a13 ldrb r3, [r2, #8] + 10058ac: 4303 orrs r3, r0 + 10058ae: 7213 strb r3, [r2, #8] + SCIx->SCIx7816->CTRL.bit.TFIFO_CL = 1;//clear tx/rx fifo + 10058b0: 7a13 ldrb r3, [r2, #8] + 10058b2: 4333 orrs r3, r6 + 10058b4: 7213 strb r3, [r2, #8] + delay_ms(1); //至少大于100us + 10058b6: f7fc ffbd bl 1002834 + SCIx->SCIx7816->IS.reg = 0xffffffff; + return ISO7816_CARD_ABSENT; + 10058ba: 2062 movs r0, #98 ; 0x62 + SCIx->SCIx7816->IS.reg = 0xffffffff; + 10058bc: 6823 ldr r3, [r4, #0] + 10058be: 661d str r5, [r3, #96] ; 0x60 + if (SCIx->SCI_Tran_StateCB.T1_parity_flag) + { + return ISO7816_PARITY_ERROR; + } + return OK; +} + 10058c0: b009 add sp, #36 ; 0x24 + 10058c2: bdf0 pop {r4, r5, r6, r7, pc} + SCIx->SCI_Tran_StateCB.SCI_RX_Buf[4 + index++] = SCIx->SCIx7816->DATA.reg; + 10058c4: 1c68 adds r0, r5, #1 + 10058c6: 4684 mov ip, r0 + 10058c8: 4820 ldr r0, [pc, #128] ; (100594c ) + 10058ca: 1965 adds r5, r4, r5 + 10058cc: 182d adds r5, r5, r0 + 10058ce: 4660 mov r0, ip + 10058d0: 6a17 ldr r7, [r2, #32] + 10058d2: b2ff uxtb r7, r7 + 10058d4: 702f strb r7, [r5, #0] + 10058d6: b285 uxth r5, r0 + 10058d8: e747 b.n 100576a + else if (((len - index) > 0) && ((len - index) < 4)) + 10058da: 1ac9 subs r1, r1, r3 + 10058dc: 1e48 subs r0, r1, #1 + 10058de: 2802 cmp r0, #2 + 10058e0: d900 bls.n 10058e4 + 10058e2: e767 b.n 10057b4 + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL &=~0x0f; + 10058e4: 0010 movs r0, r2 + 10058e6: 308c adds r0, #140 ; 0x8c + 10058e8: 6805 ldr r5, [r0, #0] + 10058ea: 25f0 movs r5, #240 ; 0xf0 + 10058ec: 8806 ldrh r6, [r0, #0] + 10058ee: 43ae bics r6, r5 + 10058f0: 8006 strh r6, [r0, #0] + SCIx->SCIx7816->FIFO_CTRL.bit.RH_WTL = (len - index); + 10058f2: 260f movs r6, #15 + 10058f4: 4031 ands r1, r6 + 10058f6: 8806 ldrh r6, [r0, #0] + 10058f8: 0109 lsls r1, r1, #4 + 10058fa: 43ae bics r6, r5 + 10058fc: 4331 orrs r1, r6 + 10058fe: e758 b.n 10057b2 + if (SCIx->SCI_Tran_StateCB.SCI_RX_Result == 1) + 1005900: 4b13 ldr r3, [pc, #76] ; (1005950 ) + 1005902: 5ce2 ldrb r2, [r4, r3] + 1005904: 2a01 cmp r2, #1 + 1005906: d113 bne.n 1005930 + 1005908: 2300 movs r3, #0 + 100590a: e006 b.n 100591a + *RxBuf++ = SCIx->SCI_Tran_StateCB.SCI_RX_Buf[4+i]; + 100590c: 490f ldr r1, [pc, #60] ; (100594c ) + 100590e: 18e2 adds r2, r4, r3 + 1005910: 1852 adds r2, r2, r1 + 1005912: 7812 ldrb r2, [r2, #0] + 1005914: 9903 ldr r1, [sp, #12] + 1005916: 54ca strb r2, [r1, r3] + 1005918: 3301 adds r3, #1 + for (i=0; i + return OK; + 1005922: 2000 movs r0, #0 + if (SCIx->SCI_Tran_StateCB.T1_parity_flag) + 1005924: 9b06 ldr r3, [sp, #24] + 1005926: 5ce3 ldrb r3, [r4, r3] + 1005928: 4283 cmp r3, r0 + 100592a: d0c9 beq.n 10058c0 + return ISO7816_PARITY_ERROR; + 100592c: 3073 adds r0, #115 ; 0x73 + 100592e: e7c7 b.n 10058c0 + else if (SCIx->SCI_Tran_StateCB.SCI_RX_Result > 1) + 1005930: 5ce2 ldrb r2, [r4, r3] + 1005932: 2a01 cmp r2, #1 + 1005934: d800 bhi.n 1005938 + 1005936: e6f7 b.n 1005728 + return SCIx->SCI_Tran_StateCB.SCI_RX_Result; + 1005938: 5ce0 ldrb r0, [r4, r3] + 100593a: e7c1 b.n 10058c0 + 100593c: 000002e7 .word 0x000002e7 + 1005940: 000002ea .word 0x000002ea + 1005944: 000002e9 .word 0x000002e9 + 1005948: 000002e1 .word 0x000002e1 + 100594c: 000002eb .word 0x000002eb + 1005950: 000002de .word 0x000002de + +01005954 : + * @param RxBuf: Receive Data buff + * @param RxLen: Receive Data length + * @retval OK : 0 on success + */ +uint16_t ISO7816_SendBlock_Soft(SCI_Struct_Type *SCIx,uint8_t *pBuff, uint16_t I_Len, uint8_t *pHead) +{ + 1005954: b510 push {r4, lr} + 1005956: 0004 movs r4, r0 + uint8_t sendData[SEND_SIZE_MAX]; + uint16_t i = 0; + + if ((NULL == pBuff) || (pHead == NULL)) + { + return ISO7816_PARA_ERROR; + 1005958: 2059 movs r0, #89 ; 0x59 + if ((NULL == pBuff) || (pHead == NULL)) + 100595a: 2900 cmp r1, #0 + 100595c: d004 beq.n 1005968 + 100595e: 2b00 cmp r3, #0 + 1005960: d002 beq.n 1005968 + 1005962: 0020 movs r0, r4 + 1005964: f000 fbe5 bl 1006132 + if ((SCIx->g_T1.bLink != 0) && (I_Len != 0)) + { + pBuff[I_Len] = DataBack; + } + return OK; +} + 1005968: bd10 pop {r4, pc} + +0100596a : + +void ISO7816_read_recfifo(SCI_Struct_Type *SCIx) +{ + uint16_t num = 0; + + while (((SCIx->SCIx7816->STATUS.bit.RFIFO_N & 1) || (SCIx->SCIx7816->FIFO_CTRL.bit.R_ITEMS & 0xf)) && (num < 256)) + 100596a: 6801 ldr r1, [r0, #0] + 100596c: 2302 movs r3, #2 + 100596e: 0008 movs r0, r1 + 1005970: 33ff adds r3, #255 ; 0xff + 1005972: 308c adds r0, #140 ; 0x8c + 1005974: 68ca ldr r2, [r1, #12] + 1005976: 07d2 lsls r2, r2, #31 + 1005978: d403 bmi.n 1005982 + 100597a: 6802 ldr r2, [r0, #0] + 100597c: 0412 lsls r2, r2, #16 + 100597e: 0f12 lsrs r2, r2, #28 + 1005980: d003 beq.n 100598a + 1005982: 3b01 subs r3, #1 + 1005984: b29b uxth r3, r3 + 1005986: 2b00 cmp r3, #0 + 1005988: d100 bne.n 100598c + { + SCIx->SCIx7816->DATA.bit.VAL; + num++; + } +} + 100598a: 4770 bx lr + SCIx->SCIx7816->DATA.bit.VAL; + 100598c: 6a0a ldr r2, [r1, #32] + 100598e: e7f1 b.n 1005974 + +01005990 : + +uint16_t ISO7816_RecBlock_Soft(SCI_Struct_Type *SCIx,uint8_t *RxBuf, uint16_t *pRxLen) +{ + 1005990: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} + 1005992: 0006 movs r6, r0 + 1005994: 000d movs r5, r1 + 1005996: 9201 str r2, [sp, #4] + uint16_t RemainLen; + uint16_t RetBack; + + if ((NULL == pRxLen) || (NULL == RxBuf)) + { + return ISO7816_PARA_ERROR; + 1005998: 2459 movs r4, #89 ; 0x59 + if ((NULL == pRxLen) || (NULL == RxBuf)) + 100599a: 2a00 cmp r2, #0 + 100599c: d015 beq.n 10059ca + 100599e: 2900 cmp r1, #0 + 10059a0: d013 beq.n 10059ca + } + + ret = ISO7816_RecBlock_DATA(SCIx,RxBuf, T1_HEAD_LEN); + 10059a2: 2203 movs r2, #3 + 10059a4: f7ff fe96 bl 10056d4 + if ((ret == ISO7816_REC_TIMEOUT) || (ret == ISO7816_PARA_ERROR)) + 10059a8: 0003 movs r3, r0 + 10059aa: 3b59 subs r3, #89 ; 0x59 + 10059ac: b29b uxth r3, r3 + ret = ISO7816_RecBlock_DATA(SCIx,RxBuf, T1_HEAD_LEN); + 10059ae: 0004 movs r4, r0 + if ((ret == ISO7816_REC_TIMEOUT) || (ret == ISO7816_PARA_ERROR)) + 10059b0: 2b01 cmp r3, #1 + 10059b2: d90a bls.n 10059ca + return ret; + } + + RetBack = ret; + + if (RxBuf[T1_HEAD_LEN - 1] > SCIx->g_T1.bIFSD) + 10059b4: 78af ldrb r7, [r5, #2] + 10059b6: 7973 ldrb r3, [r6, #5] + 10059b8: 42bb cmp r3, r7 + 10059ba: d208 bcs.n 10059ce + { + delay_ms(80); + 10059bc: 2050 movs r0, #80 ; 0x50 + 10059be: f7fc ff39 bl 1002834 + ISO7816_read_recfifo(SCIx); + 10059c2: 0030 movs r0, r6 + 10059c4: f7ff ffd1 bl 100596a + return ISO7816_DATALEN_ERR; + 10059c8: 247f movs r4, #127 ; 0x7f + { + return RetBack; + } + + return ISO7816_CheckLRC(RxBuf, tmpLen, RxBuf[tmpLen]); +} + 10059ca: 0020 movs r0, r4 + 10059cc: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} + RemainLen = RxBuf[T1_HEAD_LEN - 1] + 1; //信息域 + LRC + 10059ce: b2bf uxth r7, r7 + ret = ISO7816_RecBlock_DATA(SCIx,RxBuf + T1_HEAD_LEN, RemainLen); + 10059d0: 1c7a adds r2, r7, #1 + 10059d2: 1ce9 adds r1, r5, #3 + 10059d4: 0030 movs r0, r6 + 10059d6: f7ff fe7d bl 10056d4 + if (ret != OK) + 10059da: 2800 cmp r0, #0 + 10059dc: d109 bne.n 10059f2 + *pRxLen = RemainLen + T1_HEAD_LEN; + 10059de: 9a01 ldr r2, [sp, #4] + 10059e0: 1d3b adds r3, r7, #4 + 10059e2: 8013 strh r3, [r2, #0] + if (RetBack != OK) + 10059e4: 2c00 cmp r4, #0 + 10059e6: d1f0 bne.n 10059ca + tmpLen = *pRxLen - 1; + 10059e8: 1cf9 adds r1, r7, #3 + return ISO7816_CheckLRC(RxBuf, tmpLen, RxBuf[tmpLen]); + 10059ea: 5c6a ldrb r2, [r5, r1] + 10059ec: 0028 movs r0, r5 + 10059ee: f7ff fd5c bl 10054aa + if (ret != OK) + 10059f2: 0004 movs r4, r0 + 10059f4: e7e9 b.n 10059ca + +010059f6 : + +uint8_t ISO7816_T1_Is_Blk_Valid(SCI_Struct_Type *SCIx,uint8_t *pProlg, uint8_t dir) +{ + 10059f6: b5f0 push {r4, r5, r6, r7, lr} + uint8_t Ret = 0; + + if (pProlg[0] > 0) + 10059f8: 780b ldrb r3, [r1, #0] + 10059fa: 2b00 cmp r3, #0 + 10059fc: d113 bne.n 1005a26 + { + Ret |= ERR_PCB; + return Ret; + } + + if (0 == (pProlg[1] & 0x80)) + 10059fe: 784c ldrb r4, [r1, #1] + 1005a00: b265 sxtb r5, r4 + 1005a02: 2d00 cmp r5, #0 + 1005a04: db17 blt.n 1005a36 + { + + if ((pProlg[1] & 0x1F) > 0) + 1005a06: 06e2 lsls r2, r4, #27 + 1005a08: d10d bne.n 1005a26 + { + Ret |= ERR_PCB; + return Ret; + } + if ((pProlg[1] & NS_BIT) != SCIx->g_T1.bNumCard) + 1005a0a: 2240 movs r2, #64 ; 0x40 + 1005a0c: 79c6 ldrb r6, [r0, #7] + 1005a0e: 4014 ands r4, r2 + 1005a10: 42a6 cmp r6, r4 + 1005a12: d108 bne.n 1005a26 + Ret |= ERR_PCB; + return Ret; + } + + //判断长度 + if ((pProlg[2] > SCIx->g_T1.bIFSD) || (pProlg[2] == 0)) + 1005a14: 788a ldrb r2, [r1, #2] + 1005a16: 7941 ldrb r1, [r0, #5] + 1005a18: 4291 cmp r1, r2 + 1005a1a: d306 bcc.n 1005a2a + 1005a1c: 2a00 cmp r2, #0 + 1005a1e: d03f beq.n 1005aa0 + } + + return Ret; + } + + if (SCIx->g_T1.bFlagSendChain) + 1005a20: 7c82 ldrb r2, [r0, #18] + 1005a22: 2a00 cmp r2, #0 + 1005a24: d026 beq.n 1005a74 + return Ret; + 1005a26: 2304 movs r3, #4 + 1005a28: e003 b.n 1005a32 + Ret |= ERR_LEN; + 1005a2a: 2308 movs r3, #8 + if (pProlg[2] == 0xff) + 1005a2c: 2aff cmp r2, #255 ; 0xff + 1005a2e: d100 bne.n 1005a32 + Ret |= ERR_FF; + 1005a30: 3318 adds r3, #24 + return Ret; + } + } + + return Ret; +} + 1005a32: 0018 movs r0, r3 + 1005a34: bdf0 pop {r4, r5, r6, r7, pc} + 1005a36: 263f movs r6, #63 ; 0x3f + 1005a38: 0027 movs r7, r4 + 1005a3a: 43b7 bics r7, r6 + else if (R_BLK == (pProlg[1] & 0xC0)) + 1005a3c: 2f80 cmp r7, #128 ; 0x80 + 1005a3e: d120 bne.n 1005a82 + if ((pProlg[1] & 0x20) != 0) + 1005a40: 06a6 lsls r6, r4, #26 + 1005a42: d4f0 bmi.n 1005a26 + if ((pProlg[1] & 0x0F) > 2) + 1005a44: 260f movs r6, #15 + 1005a46: 4026 ands r6, r4 + 1005a48: 2e02 cmp r6, #2 + 1005a4a: d8ec bhi.n 1005a26 + if (pProlg[2] > 0) + 1005a4c: 7889 ldrb r1, [r1, #2] + 1005a4e: 2900 cmp r1, #0 + 1005a50: d126 bne.n 1005aa0 + 1005a52: 3140 adds r1, #64 ; 0x40 + 1005a54: 00a4 lsls r4, r4, #2 + 1005a56: 400c ands r4, r1 + 1005a58: 7981 ldrb r1, [r0, #6] + if (dir == RECV) + 1005a5a: 2a01 cmp r2, #1 + 1005a5c: d108 bne.n 1005a70 + if (((pProlg[1] & NR_BIT) << 2) == SCIx->g_T1.bNum) + 1005a5e: 428c cmp r4, r1 + 1005a60: d108 bne.n 1005a74 + if (0 == SCIx->g_T1.bLink) + 1005a62: 7a02 ldrb r2, [r0, #8] + 1005a64: 2a00 cmp r2, #0 + 1005a66: d105 bne.n 1005a74 + SCIx->g_T1.bErrNotify = 1; + 1005a68: 2301 movs r3, #1 + 1005a6a: 7443 strb r3, [r0, #17] + return Ret; + 1005a6c: 3303 adds r3, #3 + 1005a6e: e7e0 b.n 1005a32 + if (((pProlg[1] & NR_BIT) << 2) != SCIx->g_T1.bNum) + 1005a70: 428c cmp r4, r1 + 1005a72: d1f9 bne.n 1005a68 + if (SCIx->g_T1.bFlgSBSnd != 0) + 1005a74: 7b02 ldrb r2, [r0, #12] + 1005a76: 2a00 cmp r2, #0 + 1005a78: d020 beq.n 1005abc + if (0 == (pProlg[1] & 0x80)) + 1005a7a: 2d00 cmp r5, #0 + 1005a7c: dbd9 blt.n 1005a32 + return Ret; + 1005a7e: 2310 movs r3, #16 + 1005a80: e7d7 b.n 1005a32 + else if (S_BLK == (pProlg[1] & 0xC0)) + 1005a82: 2fc0 cmp r7, #192 ; 0xc0 + 1005a84: d1f6 bne.n 1005a74 + if ((pProlg[1] & 0x1C) > 0) + 1005a86: 221c movs r2, #28 + 1005a88: 4214 tst r4, r2 + 1005a8a: d1cc bne.n 1005a26 + if (((pProlg[1] & 0x20) > 0) && (0 == SCIx->g_T1.bFlgSBSnd)) + 1005a8c: 06a2 lsls r2, r4, #26 + 1005a8e: d502 bpl.n 1005a96 + 1005a90: 7b02 ldrb r2, [r0, #12] + 1005a92: 2a00 cmp r2, #0 + 1005a94: d0c7 beq.n 1005a26 + 1005a96: 788a ldrb r2, [r1, #2] + if (0 == (pProlg[1] & 0x1)) + 1005a98: 07e6 lsls r6, r4, #31 + 1005a9a: d403 bmi.n 1005aa4 + if (pProlg[2] > 0) + 1005a9c: 2a00 cmp r2, #0 + 1005a9e: d0e9 beq.n 1005a74 + Ret |= ERR_LEN; + 1005aa0: 2308 movs r3, #8 + 1005aa2: e7c6 b.n 1005a32 + if (pProlg[2] != 1) + 1005aa4: 2a01 cmp r2, #1 + 1005aa6: d1fb bne.n 1005aa0 + if ((1 == (pProlg[1] & 0x03)) && ((pProlg[3] == 0xff) || (pProlg[3] < 0x10))) + 1005aa8: 3202 adds r2, #2 + 1005aaa: 4014 ands r4, r2 + 1005aac: 2c01 cmp r4, #1 + 1005aae: d1e1 bne.n 1005a74 + 1005ab0: 78ca ldrb r2, [r1, #3] + 1005ab2: 3a10 subs r2, #16 + 1005ab4: b2d2 uxtb r2, r2 + 1005ab6: 2aee cmp r2, #238 ; 0xee + 1005ab8: d9dc bls.n 1005a74 + 1005aba: e7f1 b.n 1005aa0 + return Ret; + 1005abc: 0013 movs r3, r2 + 1005abe: e7b8 b.n 1005a32 + +01005ac0 : + * @param *pRec: Receiving data storage unit + * @param *RecLen: Receiving data length + * @retval OK: 0 on success + */ +uint16_t ISO7816_TPDU_T1Rec_LOOP(SCI_Struct_Type *SCIx,uint8_t *pRec, uint16_t *RecLen) +{ + 1005ac0: b5f0 push {r4, r5, r6, r7, lr} + 1005ac2: 2500 movs r5, #0 + 1005ac4: b089 sub sp, #36 ; 0x24 + 1005ac6: 9101 str r1, [sp, #4] + 1005ac8: 9202 str r2, [sp, #8] + uint8_t ifs_cnt = 0; + uint8_t s_blk[5]; + uint16_t tmpRecLen; + uint8_t SWTXFlag = 0; + + if (SCIx->g_T1.bFlgIRec == 1) + 1005aca: 7b83 ldrb r3, [r0, #14] +{ + 1005acc: 0004 movs r4, r0 + uint8_t ifs_cnt = 0; + 1005ace: 002f movs r7, r5 + if (SCIx->g_T1.bFlgIRec == 1) + 1005ad0: 2b01 cmp r3, #1 + 1005ad2: d179 bne.n 1005bc8 + { + SCIx->g_T1.bFlgIRec = 0; + 1005ad4: 7385 strb r5, [r0, #14] + continue; + } + } + else + { + memcpy(pRec, &SCIx->g_7816Para.aRecBuff[3], SCIx->g_7816Para.aRecBuff[2]); + 1005ad6: 0025 movs r5, r4 + 1005ad8: 0021 movs r1, r4 + 1005ada: 355e adds r5, #94 ; 0x5e + 1005adc: 782a ldrb r2, [r5, #0] + 1005ade: 315f adds r1, #95 ; 0x5f + 1005ae0: 9801 ldr r0, [sp, #4] + 1005ae2: f000 fca1 bl 1006428 + *RecLen = SCIx->g_7816Para.aRecBuff[2]; + 1005ae6: 782b ldrb r3, [r5, #0] + 1005ae8: 9a02 ldr r2, [sp, #8] + 1005aea: 8013 strh r3, [r2, #0] + break; + } + } + r_cnt = 0; + + if (R_BLK == (SCIx->g_7816Para.aRecBuff[1] & 0xC0)) + 1005aec: 0023 movs r3, r4 + 1005aee: 335d adds r3, #93 ; 0x5d + 1005af0: 7818 ldrb r0, [r3, #0] + 1005af2: b243 sxtb r3, r0 + 1005af4: 2b00 cmp r3, #0 + 1005af6: da00 bge.n 1005afa + 1005af8: e118 b.n 1005d2c + { + + } + else + { + SCIx->g_T1.bNumCard ^= BIT6; + 1005afa: 2240 movs r2, #64 ; 0x40 + 1005afc: 79e3 ldrb r3, [r4, #7] + SCIx->g_T1.bErrCnt = 0; + 1005afe: 2100 movs r1, #0 + SCIx->g_T1.bNumCard ^= BIT6; + 1005b00: 4053 eors r3, r2 + 1005b02: 71e3 strb r3, [r4, #7] + + if (M_BIT == (SCIx->g_7816Para.aRecBuff[1] & M_BIT)) + 1005b04: 2320 movs r3, #32 + SCIx->g_T1.bErrCnt = 0; + 1005b06: 7421 strb r1, [r4, #16] + if (M_BIT == (SCIx->g_7816Para.aRecBuff[1] & M_BIT)) + 1005b08: 4003 ands r3, r0 + 1005b0a: 428b cmp r3, r1 + 1005b0c: d100 bne.n 1005b10 + 1005b0e: e10c b.n 1005d2a + { + SCIx->g_T1.bRecRBLink = 1; + 1005b10: 2301 movs r3, #1 + + SCIx->g_T1.aRBlk[0] = 0 ; + 1005b12: 74e1 strb r1, [r4, #19] + SCIx->g_T1.bRecRBLink = 1; + 1005b14: 73e3 strb r3, [r4, #15] + SCIx->g_T1.aRBlk[1] = 0x80; + 1005b16: 337f adds r3, #127 ; 0x7f + if ((SCIx->g_7816Para.aRecBuff[1] & NS_BIT) == 0) + 1005b18: 4210 tst r0, r2 + 1005b1a: d100 bne.n 1005b1e + { + SCIx->g_T1.aRBlk[1] |= NR_BIT; + 1005b1c: 2390 movs r3, #144 ; 0x90 + 1005b1e: 7523 strb r3, [r4, #20] + } + SCIx->g_T1.aRBlk[2] = 0; + 1005b20: 2200 movs r2, #0 + + Ret = ISO7816_SendBlock_Soft(SCIx , &SCIx->g_T1.aRBlk[3], 0, SCIx->g_T1.aRBlk); + 1005b22: 0023 movs r3, r4 + 1005b24: 0021 movs r1, r4 + SCIx->g_T1.aRBlk[2] = 0; + 1005b26: 7562 strb r2, [r4, #21] + Ret = ISO7816_SendBlock_Soft(SCIx , &SCIx->g_T1.aRBlk[3], 0, SCIx->g_T1.aRBlk); + 1005b28: 3313 adds r3, #19 + 1005b2a: 3116 adds r1, #22 + 1005b2c: 0020 movs r0, r4 + 1005b2e: f7ff ff11 bl 1005954 + COMPARE_RETURN(Ret); + 1005b32: 2800 cmp r0, #0 + 1005b34: d171 bne.n 1005c1a + + return ISO7816_RET_CHAIN; + 1005b36: 307e adds r0, #126 ; 0x7e + 1005b38: e06f b.n 1005c1a + Ret = ISO7816_RecBlock_Soft(SCIx , SCIx->g_7816Para.aRecBuff, &tmpRecLen); + 1005b3a: 0026 movs r6, r4 + 1005b3c: ab04 add r3, sp, #16 + 1005b3e: 365c adds r6, #92 ; 0x5c + 1005b40: 1d9a adds r2, r3, #6 + 1005b42: 0031 movs r1, r6 + 1005b44: 0020 movs r0, r4 + 1005b46: f7ff ff23 bl 1005990 + if (Ret == OK) + 1005b4a: 2800 cmp r0, #0 + 1005b4c: d15c bne.n 1005c08 + Ret = ISO7816_T1_Is_Blk_Valid(SCIx , SCIx->g_7816Para.aRecBuff, RECV); + 1005b4e: 0031 movs r1, r6 + 1005b50: 2201 movs r2, #1 + 1005b52: 0020 movs r0, r4 + 1005b54: f7ff ff4f bl 10059f6 + 1005b58: b286 uxth r6, r0 + if (SWTXFlag == 1) + 1005b5a: 2d01 cmp r5, #1 + 1005b5c: d107 bne.n 1005b6e + SCIx->SCI_Tran_StateCB.terminal_rec_bwt = SCIx->SCI_Tran_StateCB.terminal_rec_bwt_atr; + 1005b5e: 23a5 movs r3, #165 ; 0xa5 + 1005b60: 00db lsls r3, r3, #3 + 1005b62: 58e2 ldr r2, [r4, r3] + 1005b64: 3b08 subs r3, #8 + 1005b66: 50e2 str r2, [r4, r3] + ISO7816_TXRX_TIME_Init(SCIx); + 1005b68: 0020 movs r0, r4 + 1005b6a: f7fd ff97 bl 1003a9c + if (Ret != 0) + 1005b6e: 2e00 cmp r6, #0 + 1005b70: d06a beq.n 1005c48 + SCIx->g_T1.bErrCnt++; + 1005b72: 7c23 ldrb r3, [r4, #16] + 1005b74: 3301 adds r3, #1 + 1005b76: b2db uxtb r3, r3 + if ((ifs_cnt + SCIx->g_T1.bErrCnt) <= 1) + 1005b78: 18fa adds r2, r7, r3 + SCIx->g_T1.bErrCnt++; + 1005b7a: 7423 strb r3, [r4, #16] + if ((ifs_cnt + SCIx->g_T1.bErrCnt) <= 1) + 1005b7c: 2a01 cmp r2, #1 + 1005b7e: dc11 bgt.n 1005ba4 + SCIx->g_T1.aRBlk[1] = 0x80 | (SCIx->g_T1.bNumCard >> 2); + 1005b80: 2180 movs r1, #128 ; 0x80 + SCIx->g_T1.aRBlk[0] = 0; //g_Nad; + 1005b82: 2000 movs r0, #0 + SCIx->g_T1.aRBlk[1] = 0x80 | (SCIx->g_T1.bNumCard >> 2); + 1005b84: 79e2 ldrb r2, [r4, #7] + 1005b86: 4249 negs r1, r1 + 1005b88: 0892 lsrs r2, r2, #2 + 1005b8a: 4311 orrs r1, r2 + 1005b8c: 7521 strb r1, [r4, #20] + if (SCIx->g_T1.bRecRBLink == 0) + 1005b8e: 7be1 ldrb r1, [r4, #15] + SCIx->g_T1.aRBlk[0] = 0; //g_Nad; + 1005b90: 74e0 strb r0, [r4, #19] + SCIx->g_T1.aRBlk[2] = 0; + 1005b92: 7560 strb r0, [r4, #21] + if (SCIx->g_T1.bRecRBLink == 0) + 1005b94: 4281 cmp r1, r0 + 1005b96: d149 bne.n 1005c2c + if (Ret & (ERR_PCB | ERR_LEN | ERR_RELVNT_S)) + 1005b98: 211c movs r1, #28 + 1005b9a: 420e tst r6, r1 + 1005b9c: d03f beq.n 1005c1e + SCIx->g_T1.aRBlk[1] |= 2; + 1005b9e: 399a subs r1, #154 ; 0x9a + SCIx->g_T1.aRBlk[1] |= 1; + 1005ba0: 430a orrs r2, r1 + 1005ba2: 7522 strb r2, [r4, #20] + if (SCIx->g_T1.bErrCnt < ERR_SEND_CNT) + 1005ba4: 2b02 cmp r3, #2 + 1005ba6: d83c bhi.n 1005c22 + if (SCIx->g_7816Para.aRecBuff[1] & 0x80) + 1005ba8: 0022 movs r2, r4 + 1005baa: 325d adds r2, #93 ; 0x5d + 1005bac: 7812 ldrb r2, [r2, #0] + 1005bae: 2a7f cmp r2, #127 ; 0x7f + 1005bb0: d944 bls.n 1005c3c + Ret = ISO7816_SendBlock_Soft(SCIx , &SCIx->g_T1.aRBlk[3], 0, SCIx->g_T1.aRBlk); + 1005bb2: 0023 movs r3, r4 + 1005bb4: 0021 movs r1, r4 + 1005bb6: 3313 adds r3, #19 + 1005bb8: 2200 movs r2, #0 + 1005bba: 3116 adds r1, #22 + 1005bbc: 0020 movs r0, r4 + 1005bbe: f7ff fec9 bl 1005954 + COMPARE_RETURN(Ret); + 1005bc2: 2800 cmp r0, #0 + 1005bc4: d129 bne.n 1005c1a + 1005bc6: 0005 movs r5, r0 + if (SCIx->g_T1.bFlgSRec == 1) + 1005bc8: 7b63 ldrb r3, [r4, #13] + 1005bca: 2b01 cmp r3, #1 + 1005bcc: d1b5 bne.n 1005b3a + SCIx->g_T1.bFlgSRec = 0; + 1005bce: 2300 movs r3, #0 + 1005bd0: 7363 strb r3, [r4, #13] + if (R_BLK == (SCIx->g_7816Para.aRecBuff[1] & 0xC0)) + 1005bd2: 0023 movs r3, r4 + 1005bd4: 335d adds r3, #93 ; 0x5d + 1005bd6: 781a ldrb r2, [r3, #0] + 1005bd8: 213f movs r1, #63 ; 0x3f + 1005bda: 0013 movs r3, r2 + 1005bdc: 438b bics r3, r1 + 1005bde: 2b80 cmp r3, #128 ; 0x80 + 1005be0: d135 bne.n 1005c4e + SCIx->g_T1.aRBlk[1] = 0x80 | (SCIx->g_T1.bNumCard >> 2); + 1005be2: 79e1 ldrb r1, [r4, #7] + 1005be4: 3b01 subs r3, #1 + 1005be6: 0889 lsrs r1, r1, #2 + 1005be8: 3bff subs r3, #255 ; 0xff + 1005bea: 430b orrs r3, r1 + SCIx->g_T1.aRBlk[0] = 0; + 1005bec: 2200 movs r2, #0 + SCIx->g_T1.aRBlk[1] = 0x80 | (SCIx->g_T1.bNumCard >> 2); + 1005bee: 7523 strb r3, [r4, #20] + Ret = ISO7816_SendBlock_Soft(SCIx , &SCIx->g_T1.aRBlk[3], 0, SCIx->g_T1.aRBlk); + 1005bf0: 0023 movs r3, r4 + SCIx->g_T1.aRBlk[0] = 0; + 1005bf2: 74e2 strb r2, [r4, #19] + SCIx->g_T1.aRBlk[2] = 0; + 1005bf4: 7562 strb r2, [r4, #21] + Ret = ISO7816_SendBlock_Soft(SCIx , &SCIx->g_T1.aRBlk[3], 0, SCIx->g_T1.aRBlk); + 1005bf6: 3313 adds r3, #19 + 1005bf8: 0021 movs r1, r4 + 1005bfa: 0020 movs r0, r4 + 1005bfc: 3116 adds r1, #22 + 1005bfe: f7ff fea9 bl 1005954 + COMPARE_RETURN(Ret); + 1005c02: 2800 cmp r0, #0 + 1005c04: d109 bne.n 1005c1a + 1005c06: e7df b.n 1005bc8 + else if ((Ret == ISO7816_T1_LRC_ERROR) || (Ret == ISO7816_PARITY_ERROR)) + 1005c08: 2854 cmp r0, #84 ; 0x54 + 1005c0a: d100 bne.n 1005c0e + 1005c0c: e091 b.n 1005d32 + 1005c0e: 2873 cmp r0, #115 ; 0x73 + 1005c10: d100 bne.n 1005c14 + 1005c12: e08e b.n 1005d32 + else if (Ret == ISO7816_DATALEN_ERR) + 1005c14: 287f cmp r0, #127 ; 0x7f + 1005c16: d100 bne.n 1005c1a + 1005c18: e090 b.n 1005d3c + } + + } + SCIx->g_T1.bErrCnt = 0; + return OK; +} + 1005c1a: b009 add sp, #36 ; 0x24 + 1005c1c: bdf0 pop {r4, r5, r6, r7, pc} + else if (Ret & (ERR_PARITY | ERR_CHKSUM)) + 1005c1e: 07b1 lsls r1, r6, #30 + 1005c20: d101 bne.n 1005c26 + return ISO7816_ERR_NUM_OVER; + 1005c22: 205c movs r0, #92 ; 0x5c + 1005c24: e7f9 b.n 1005c1a + SCIx->g_T1.aRBlk[1] |= 1; + 1005c26: 217f movs r1, #127 ; 0x7f + 1005c28: 4249 negs r1, r1 + 1005c2a: e7b9 b.n 1005ba0 + if ((Ret == ERR_FF) && (SCIx->g_7816Para.aRecBuff[2] == 0xff)) + 1005c2c: 2e20 cmp r6, #32 + 1005c2e: d1b9 bne.n 1005ba4 + 1005c30: 0022 movs r2, r4 + 1005c32: 325e adds r2, #94 ; 0x5e + 1005c34: 7812 ldrb r2, [r2, #0] + 1005c36: 2aff cmp r2, #255 ; 0xff + 1005c38: d1b4 bne.n 1005ba4 + 1005c3a: e7f2 b.n 1005c22 + if (SCIx->g_T1.bRecRBLink != 0) + 1005c3c: 7be5 ldrb r5, [r4, #15] + 1005c3e: 2d00 cmp r5, #0 + 1005c40: d039 beq.n 1005cb6 + if (SCIx->g_T1.bErrCnt < (ERR_SEND_CNT - 1)) + 1005c42: 2b02 cmp r3, #2 + 1005c44: d1b5 bne.n 1005bb2 + 1005c46: e7ec b.n 1005c22 + SCIx->g_T1.bErrCnt = 0; + 1005c48: 7426 strb r6, [r4, #16] + 1005c4a: 0035 movs r5, r6 + 1005c4c: e7c1 b.n 1005bd2 + else if (S_BLK == (SCIx->g_7816Para.aRecBuff[1] & 0xC0)) + 1005c4e: 2bc0 cmp r3, #192 ; 0xc0 + 1005c50: d000 beq.n 1005c54 + 1005c52: e740 b.n 1005ad6 + s_blk[0] = 0; + 1005c54: 4b3a ldr r3, [pc, #232] ; (1005d40 ) + 1005c56: ae06 add r6, sp, #24 + 1005c58: 8033 strh r3, [r6, #0] + 1005c5a: 233f movs r3, #63 ; 0x3f + 1005c5c: 401a ands r2, r3 + if (0 == (SCIx->g_7816Para.aRecBuff[1] & S_RQS_MSK)) + 1005c5e: d10d bne.n 1005c7c + s_blk[1] |= 0x20; + 1005c60: 33a1 adds r3, #161 ; 0xa1 + 1005c62: 7073 strb r3, [r6, #1] + SCIx->g_T1.bIFSC = IFSC; + 1005c64: 4b37 ldr r3, [pc, #220] ; (1005d44 ) + s_blk[2] = 0; + 1005c66: 70b2 strb r2, [r6, #2] + SCIx->g_T1.bIFSC = IFSC; + 1005c68: 6063 str r3, [r4, #4] + SCIx->g_T1.bNumCard = 0; + 1005c6a: 7222 strb r2, [r4, #8] + 1005c6c: 0033 movs r3, r6 + 1005c6e: 210b movs r1, #11 + 1005c70: a804 add r0, sp, #16 + 1005c72: 1809 adds r1, r1, r0 + 1005c74: 0020 movs r0, r4 + 1005c76: f000 fa5c bl 1006132 + 1005c7a: e7c2 b.n 1005c02 + else if (1 == (SCIx->g_7816Para.aRecBuff[1] & S_RQS_MSK)) + 1005c7c: 2a01 cmp r2, #1 + 1005c7e: d123 bne.n 1005cc8 + s_blk[1] |= 0x21; + 1005c80: 23e1 movs r3, #225 ; 0xe1 + 1005c82: 7073 strb r3, [r6, #1] + s_blk[3] = SCIx->g_7816Para.aRecBuff[3]; + 1005c84: 0023 movs r3, r4 + s_blk[2] = 1; + 1005c86: 70b2 strb r2, [r6, #2] + s_blk[3] = SCIx->g_7816Para.aRecBuff[3]; + 1005c88: 335f adds r3, #95 ; 0x5f + 1005c8a: 781b ldrb r3, [r3, #0] + if ((0x10 > SCIx->g_7816Para.aRecBuff[3]) || (0xFF == SCIx->g_7816Para.aRecBuff[3])) + 1005c8c: 0019 movs r1, r3 + 1005c8e: 3910 subs r1, #16 + 1005c90: b2c9 uxtb r1, r1 + s_blk[3] = SCIx->g_7816Para.aRecBuff[3]; + 1005c92: 70f3 strb r3, [r6, #3] + if ((0x10 > SCIx->g_7816Para.aRecBuff[3]) || (0xFF == SCIx->g_7816Para.aRecBuff[3])) + 1005c94: 29ee cmp r1, #238 ; 0xee + 1005c96: d912 bls.n 1005cbe + if (SCIx->g_T1.bErrCnt < 1) + 1005c98: 7c23 ldrb r3, [r4, #16] + ifs_cnt++; + 1005c9a: 3701 adds r7, #1 + 1005c9c: b2ff uxtb r7, r7 + if (SCIx->g_T1.bErrCnt < 1) + 1005c9e: 2b00 cmp r3, #0 + 1005ca0: d106 bne.n 1005cb0 + SCIx->g_T1.aRBlk[1] = 0x82 | (SCIx->g_T1.bNumCard >> 2); + 1005ca2: 79e1 ldrb r1, [r4, #7] + 1005ca4: 3a7f subs r2, #127 ; 0x7f + 1005ca6: 0889 lsrs r1, r1, #2 + 1005ca8: 430a orrs r2, r1 + SCIx->g_T1.aRBlk[0] = 0; + 1005caa: 74e3 strb r3, [r4, #19] + SCIx->g_T1.aRBlk[1] = 0x82 | (SCIx->g_T1.bNumCard >> 2); + 1005cac: 7522 strb r2, [r4, #20] + SCIx->g_T1.aRBlk[2] = 0; + 1005cae: 7563 strb r3, [r4, #21] + if ((ifs_cnt + SCIx->g_T1.bErrCnt) < ERR_SEND_CNT) + 1005cb0: 18fb adds r3, r7, r3 + 1005cb2: 2b02 cmp r3, #2 + 1005cb4: dcb5 bgt.n 1005c22 + Ret = ISO7816_SendBlock_Soft(SCIx , &SCIx->g_T1.aRBlk[3], 0, SCIx->g_T1.aRBlk); + 1005cb6: 0023 movs r3, r4 + 1005cb8: 2200 movs r2, #0 + 1005cba: 3313 adds r3, #19 + 1005cbc: e79c b.n 1005bf8 + SCIx->g_T1.bIFSC = SCIx->g_7816Para.aRecBuff[3]; + 1005cbe: 7123 strb r3, [r4, #4] + if (ifs_cnt < ERR_SEND_CNT) + 1005cc0: 2f02 cmp r7, #2 + 1005cc2: d900 bls.n 1005cc6 + 1005cc4: e780 b.n 1005bc8 + 1005cc6: e7d1 b.n 1005c6c + else if (2 == (SCIx->g_7816Para.aRecBuff[1] & S_RQS_MSK)) + 1005cc8: 2a02 cmp r2, #2 + 1005cca: d10e bne.n 1005cea + s_blk[1] |= 0x22; + 1005ccc: 23e2 movs r3, #226 ; 0xe2 + 1005cce: 210b movs r1, #11 + s_blk[2] = 0; + 1005cd0: 2200 movs r2, #0 + 1005cd2: a804 add r0, sp, #16 + s_blk[1] |= 0x22; + 1005cd4: 7073 strb r3, [r6, #1] + 1005cd6: 1809 adds r1, r1, r0 + 1005cd8: 0033 movs r3, r6 + 1005cda: 0020 movs r0, r4 + s_blk[2] = 0; + 1005cdc: 70b2 strb r2, [r6, #2] + 1005cde: f000 fa28 bl 1006132 + COMPARE_RETURN(Ret); + 1005ce2: 2800 cmp r0, #0 + 1005ce4: d199 bne.n 1005c1a + return ISO7816_RET_BROKEN_CHAIN; + 1005ce6: 307d adds r0, #125 ; 0x7d + 1005ce8: e797 b.n 1005c1a + else if ((SCIx->g_7816Para.aRecBuff[1] & 0x3F) == 3) + 1005cea: 2a03 cmp r2, #3 + 1005cec: d000 beq.n 1005cf0 + 1005cee: e76b b.n 1005bc8 + SCIx->SCI_Tran_StateCB.terminal_change_rec_bwt_num = SCIx->SCI_Tran_StateCB.terminal_rec_bwt_atr * SCIx->g_7816Para.aRecBuff[3]; + 1005cf0: 0022 movs r2, r4 + 1005cf2: 23a5 movs r3, #165 ; 0xa5 + 1005cf4: 325f adds r2, #95 ; 0x5f + 1005cf6: 9203 str r2, [sp, #12] + 1005cf8: 00db lsls r3, r3, #3 + 1005cfa: 58e3 ldr r3, [r4, r3] + 1005cfc: 7812 ldrb r2, [r2, #0] + ISO7816_TXRX_TIME_Init(SCIx); + 1005cfe: 0020 movs r0, r4 + SCIx->SCI_Tran_StateCB.terminal_change_rec_bwt_num = SCIx->SCI_Tran_StateCB.terminal_rec_bwt_atr * SCIx->g_7816Para.aRecBuff[3]; + 1005d00: 4353 muls r3, r2 + 1005d02: 4a11 ldr r2, [pc, #68] ; (1005d48 ) + s_blk[2] = 1; + 1005d04: 2501 movs r5, #1 + SCIx->SCI_Tran_StateCB.terminal_change_rec_bwt_num = SCIx->SCI_Tran_StateCB.terminal_rec_bwt_atr * SCIx->g_7816Para.aRecBuff[3]; + 1005d06: 50a3 str r3, [r4, r2] + SCIx->SCI_Tran_StateCB.terminal_rec_bwt = SCIx->SCI_Tran_StateCB.terminal_change_rec_bwt_num; + 1005d08: 23a4 movs r3, #164 ; 0xa4 + 1005d0a: 58a2 ldr r2, [r4, r2] + 1005d0c: 00db lsls r3, r3, #3 + 1005d0e: 50e2 str r2, [r4, r3] + ISO7816_TXRX_TIME_Init(SCIx); + 1005d10: f7fd fec4 bl 1003a9c + s_blk[1] |= 0x23; + 1005d14: 2323 movs r3, #35 ; 0x23 + 1005d16: 7872 ldrb r2, [r6, #1] + s_blk[2] = 1; + 1005d18: 70b5 strb r5, [r6, #2] + s_blk[1] |= 0x23; + 1005d1a: 4313 orrs r3, r2 + 1005d1c: 7073 strb r3, [r6, #1] + s_blk[3] = SCIx->g_7816Para.aRecBuff[3]; + 1005d1e: 9b03 ldr r3, [sp, #12] + 1005d20: 002a movs r2, r5 + 1005d22: 781b ldrb r3, [r3, #0] + 1005d24: 70f3 strb r3, [r6, #3] + 1005d26: 0033 movs r3, r6 + 1005d28: e7a1 b.n 1005c6e + SCIx->g_T1.bRecRBLink = 0; + 1005d2a: 73e3 strb r3, [r4, #15] + SCIx->g_T1.bErrCnt = 0; + 1005d2c: 2000 movs r0, #0 + 1005d2e: 7420 strb r0, [r4, #16] + return OK; + 1005d30: e773 b.n 1005c1a + Ret = ERR_CHKSUM; + 1005d32: 2602 movs r6, #2 + if (SWTXFlag == 1) + 1005d34: 2d01 cmp r5, #1 + 1005d36: d000 beq.n 1005d3a + 1005d38: e71b b.n 1005b72 + 1005d3a: e710 b.n 1005b5e + Ret = ERR_FF;//ERR_LEN;; + 1005d3c: 2620 movs r6, #32 + 1005d3e: e7f9 b.n 1005d34 + 1005d40: ffffc000 .word 0xffffc000 + 1005d44: 0000fefe .word 0x0000fefe + 1005d48: 0000052c .word 0x0000052c + +01005d4c : + * @param CommandLength: Sending data length + * @param Type: Link block type + * @retval OK: 0 on success + */ +uint16_t ISO7816_TPDU_T1Send_LOOP(SCI_Struct_Type *SCIx , uint8_t *pCommand, uint16_t CommandLength, uint8_t Type) +{ + 1005d4c: b5f0 push {r4, r5, r6, r7, lr} + 1005d4e: b08f sub sp, #60 ; 0x3c + 1005d50: 9301 str r3, [sp, #4] + + uint8_t IFS_issued = 1; + + uint16_t CmdLen = CommandLength; + + SCIx->g_T1.bFlagSendChain = 0; + 1005d52: 2300 movs r3, #0 +{ + 1005d54: 0004 movs r4, r0 + 1005d56: 9103 str r1, [sp, #12] + 1005d58: 0017 movs r7, r2 + SCIx->g_T1.bFlagSendChain = 0; + 1005d5a: 7483 strb r3, [r0, #18] + + if ((NULL == pCommand) || (Type > 4)) + { + return ISO7816_PARA_ERROR; + 1005d5c: 2559 movs r5, #89 ; 0x59 + if ((NULL == pCommand) || (Type > 4)) + 1005d5e: 4299 cmp r1, r3 + 1005d60: d100 bne.n 1005d64 + 1005d62: e0c2 b.n 1005eea + 1005d64: 9a01 ldr r2, [sp, #4] + 1005d66: 2a04 cmp r2, #4 + 1005d68: d900 bls.n 1005d6c + 1005d6a: e0be b.n 1005eea + } + + //初始化化 + if (Type == I_BLOCK_C) + 1005d6c: 429a cmp r2, r3 + 1005d6e: d136 bne.n 1005dde + { + prolHead[0] = 0; //nad + 1005d70: ab0b add r3, sp, #44 ; 0x2c + 1005d72: 701a strb r2, [r3, #0] + prolHead[1] = 0; //pcd + + //设置序号 bNum 为BIT6 + prolHead[1] ^= SCIx->g_T1.bNum; + 1005d74: 7980 ldrb r0, [r0, #6] + 1005d76: 7058 strb r0, [r3, #1] + + //计算I块长度 + if (SCIx->g_T1.bIFSC < CmdLen) + 1005d78: 7921 ldrb r1, [r4, #4] + 1005d7a: b28a uxth r2, r1 + 1005d7c: 9202 str r2, [sp, #8] + 1005d7e: 4297 cmp r7, r2 + 1005d80: d927 bls.n 1005dd2 + { + //需要连接 + prolHead[1] |= BIT5; + 1005d82: 2220 movs r2, #32 + 1005d84: 4302 orrs r2, r0 + 1005d86: 705a strb r2, [r3, #1] + prolHead[2] = SCIx->g_T1.bIFSC; + 1005d88: 7099 strb r1, [r3, #2] + CmdLen -= SCIx->g_T1.bIFSC; + 1005d8a: 9b02 ldr r3, [sp, #8] + 1005d8c: 1aff subs r7, r7, r3 + SendLen = SCIx->g_T1.bIFSC; + SCIx->g_T1.bFlagSendChain = 1; + 1005d8e: 2301 movs r3, #1 + 1005d90: 74a3 strb r3, [r4, #18] + SCIx->g_T1.bLink = 1; + 1005d92: 7223 strb r3, [r4, #8] + 1005d94: 9b03 ldr r3, [sp, #12] + CmdLen -= SCIx->g_T1.bIFSC; + 1005d96: b2bf uxth r7, r7 + SCIx->g_T1.bLink = 1; + 1005d98: 9304 str r3, [sp, #16] + } + + pSend = pCommand; + } + + SCIx->g_T1.bFlgSBSnd = 0; + 1005d9a: 2600 movs r6, #0 + uint8_t IFS_issued = 1; + 1005d9c: 2301 movs r3, #1 + SCIx->g_T1.bFlgSBSnd = 0; + 1005d9e: 7326 strb r6, [r4, #12] + uint8_t IFS_issued = 1; + 1005da0: 9308 str r3, [sp, #32] + uint8_t r_chain_cnt = 0; + 1005da2: 9607 str r6, [sp, #28] + uint8_t r_cnt = 0; + 1005da4: 9606 str r6, [sp, #24] + uint16_t TmpLen = 0; + 1005da6: 9605 str r6, [sp, #20] + //发送数据 + while (1) + { + if (Type < S_BLOCK_C) + 1005da8: 9b01 ldr r3, [sp, #4] + 1005daa: 2b01 cmp r3, #1 + 1005dac: d81e bhi.n 1005dec + { + Ret = ISO7816_SendBlock_Soft(SCIx , pSend, SendLen, prolHead); + 1005dae: ab0b add r3, sp, #44 ; 0x2c + 1005db0: 9a02 ldr r2, [sp, #8] + 1005db2: 9904 ldr r1, [sp, #16] + 1005db4: 0020 movs r0, r4 + 1005db6: f7ff fdcd bl 1005954 + 1005dba: 1e05 subs r5, r0, #0 + COMPARE_RETURN(Ret); + 1005dbc: d000 beq.n 1005dc0 + 1005dbe: e094 b.n 1005eea + + if (resendflag == 0) + 1005dc0: 2e00 cmp r6, #0 + 1005dc2: d131 bne.n 1005e28 + { + SCIx->g_T1.bNum ^= BIT6; + 1005dc4: 2340 movs r3, #64 ; 0x40 + 1005dc6: 79a2 ldrb r2, [r4, #6] + 1005dc8: 4053 eors r3, r2 + 1005dca: 71a3 strb r3, [r4, #6] + + SCIx->g_T1.bFlgSBSnd = 1; + } + if (!resendflag) + { + SCIx->g_T1.bErrCnt = 0; + 1005dcc: 2300 movs r3, #0 + 1005dce: 7423 strb r3, [r4, #16] + 1005dd0: e02a b.n 1005e28 + prolHead[2] = CmdLen; + 1005dd2: 709f strb r7, [r3, #2] + 1005dd4: 9b03 ldr r3, [sp, #12] + 1005dd6: 9702 str r7, [sp, #8] + 1005dd8: 9304 str r3, [sp, #16] + CmdLen = 0; + 1005dda: 9f01 ldr r7, [sp, #4] + 1005ddc: e7dd b.n 1005d9a + uint8_t *pSend = NULL; + 1005dde: 9304 str r3, [sp, #16] + uint16_t SendLen = 0; + 1005de0: 9302 str r3, [sp, #8] + 1005de2: e7da b.n 1005d9a + IFS_issued = 0; + } + + if (0x21 == (SCIx->g_7816Para.aRecBuff[1] & S_RSP_MSK)) + { + if (SCIx->g_7816Para.aRecBuff[3] == pCommand[0]) + 1005de4: 2300 movs r3, #0 + { + SCIx->g_T1.bIFSD = pCommand[0]; + } + else + { + resendflag = 1; + 1005de6: 2601 movs r6, #1 + if (SCIx->g_7816Para.aRecBuff[3] == pCommand[0]) + 1005de8: 9308 str r3, [sp, #32] + 1005dea: e7dd b.n 1005da8 + s_blk[0] = 0; + 1005dec: 2200 movs r2, #0 + if (T_S_IFS == Type) + 1005dee: 9901 ldr r1, [sp, #4] + s_blk[0] = 0; + 1005df0: ab0c add r3, sp, #48 ; 0x30 + 1005df2: 701a strb r2, [r3, #0] + if (T_S_IFS == Type) + 1005df4: 2902 cmp r1, #2 + 1005df6: d161 bne.n 1005ebc + s_blk[1] |= 0x1; + 1005df8: 32c1 adds r2, #193 ; 0xc1 + 1005dfa: 705a strb r2, [r3, #1] + s_blk[2] = 1; + 1005dfc: 3ac0 subs r2, #192 ; 0xc0 + 1005dfe: 709a strb r2, [r3, #2] + s_blk[3] = pCommand[0]; + 1005e00: 9a03 ldr r2, [sp, #12] + 1005e02: 7812 ldrb r2, [r2, #0] + 1005e04: 70da strb r2, [r3, #3] + TmpLen++; + 1005e06: 2301 movs r3, #1 + SCIx->g_T1.bIFSD = pCommand[0]; + 1005e08: 7162 strb r2, [r4, #5] + TmpLen++; + 1005e0a: 9305 str r3, [sp, #20] + 1005e0c: 210b movs r1, #11 + 1005e0e: a80a add r0, sp, #40 ; 0x28 + 1005e10: 1809 adds r1, r1, r0 + 1005e12: ab0c add r3, sp, #48 ; 0x30 + 1005e14: 9a05 ldr r2, [sp, #20] + 1005e16: 0020 movs r0, r4 + 1005e18: f000 f98b bl 1006132 + 1005e1c: 1e05 subs r5, r0, #0 + COMPARE_RETURN(Ret); + 1005e1e: d164 bne.n 1005eea + SCIx->g_T1.bFlgSBSnd = 1; + 1005e20: 2301 movs r3, #1 + 1005e22: 7323 strb r3, [r4, #12] + if (!resendflag) + 1005e24: 2e00 cmp r6, #0 + 1005e26: d0d1 beq.n 1005dcc + TmpLen = 0; + 1005e28: 2600 movs r6, #0 + Ret = ISO7816_RecBlock_Soft(SCIx , SCIx->g_7816Para.aRecBuff, &RecLen); + 1005e2a: 0023 movs r3, r4 + 1005e2c: 335c adds r3, #92 ; 0x5c + 1005e2e: 9309 str r3, [sp, #36] ; 0x24 + 1005e30: ab0a add r3, sp, #40 ; 0x28 + 1005e32: 1c9a adds r2, r3, #2 + 1005e34: 9909 ldr r1, [sp, #36] ; 0x24 + 1005e36: 0020 movs r0, r4 + 1005e38: f7ff fdaa bl 1005990 + SCIx->g_T1.bErrNotify = 0; + 1005e3c: 2300 movs r3, #0 + Ret = ISO7816_RecBlock_Soft(SCIx , SCIx->g_7816Para.aRecBuff, &RecLen); + 1005e3e: 0005 movs r5, r0 + SCIx->g_T1.bErrNotify = 0; + 1005e40: 7463 strb r3, [r4, #17] + if (Ret == OK) + 1005e42: 4298 cmp r0, r3 + 1005e44: d145 bne.n 1005ed2 + Ret = ISO7816_T1_Is_Blk_Valid(SCIx , SCIx->g_7816Para.aRecBuff, RECV); + 1005e46: 2201 movs r2, #1 + 1005e48: 9909 ldr r1, [sp, #36] ; 0x24 + 1005e4a: 0020 movs r0, r4 + 1005e4c: f7ff fdd3 bl 10059f6 + 1005e50: b285 uxth r5, r0 + if (SWTXFlag == 1) + 1005e52: 2e01 cmp r6, #1 + 1005e54: d107 bne.n 1005e66 + SCIx->SCI_Tran_StateCB.terminal_rec_bwt = SCIx->SCI_Tran_StateCB.terminal_rec_bwt_atr; + 1005e56: 23a5 movs r3, #165 ; 0xa5 + 1005e58: 00db lsls r3, r3, #3 + 1005e5a: 58e2 ldr r2, [r4, r3] + 1005e5c: 3b08 subs r3, #8 + 1005e5e: 50e2 str r2, [r4, r3] + ISO7816_TXRX_TIME_Init(SCIx); + 1005e60: 0020 movs r0, r4 + 1005e62: f7fd fe1b bl 1003a9c + if (Ret != 0) + 1005e66: 2d00 cmp r5, #0 + 1005e68: d05b beq.n 1005f22 + if (!SCIx->g_T1.bErrNotify) + 1005e6a: 7c62 ldrb r2, [r4, #17] + 1005e6c: 2a00 cmp r2, #0 + 1005e6e: d102 bne.n 1005e76 + SCIx->g_T1.bErrCnt++; + 1005e70: 7c23 ldrb r3, [r4, #16] + 1005e72: 3301 adds r3, #1 + 1005e74: 7423 strb r3, [r4, #16] + if (Type < S_BLOCK_C) + 1005e76: 9901 ldr r1, [sp, #4] + 1005e78: 7c23 ldrb r3, [r4, #16] + 1005e7a: 2901 cmp r1, #1 + 1005e7c: d846 bhi.n 1005f0c + if (((SCIx->g_T1.bErrCnt <= 1) && ((!SCIx->g_T1.bErrNotify))) + 1005e7e: 2b01 cmp r3, #1 + 1005e80: d83d bhi.n 1005efe + 1005e82: 2a00 cmp r2, #0 + 1005e84: d000 beq.n 1005e88 + 1005e86: e105 b.n 1006094 + SCIx->g_T1.aRBlk[1] = 0x80 | (SCIx->g_T1.bNumCard >> 2); + 1005e88: 2180 movs r1, #128 ; 0x80 + SCIx->g_T1.aRBlk[0] = 0; + 1005e8a: 2200 movs r2, #0 + SCIx->g_T1.aRBlk[1] = 0x80 | (SCIx->g_T1.bNumCard >> 2); + 1005e8c: 79e3 ldrb r3, [r4, #7] + 1005e8e: 4249 negs r1, r1 + 1005e90: 089b lsrs r3, r3, #2 + SCIx->g_T1.aRBlk[0] = 0; + 1005e92: 74e2 strb r2, [r4, #19] + SCIx->g_T1.aRBlk[1] = 0x80 | (SCIx->g_T1.bNumCard >> 2); + 1005e94: 4319 orrs r1, r3 + SCIx->g_T1.aRBlk[2] = 0; + 1005e96: 7562 strb r2, [r4, #21] + if (Ret & (ERR_PCB | ERR_LEN | ERR_RELVNT_S)) + 1005e98: 321c adds r2, #28 + SCIx->g_T1.aRBlk[1] = 0x80 | (SCIx->g_T1.bNumCard >> 2); + 1005e9a: 7521 strb r1, [r4, #20] + if (Ret & (ERR_PCB | ERR_LEN | ERR_RELVNT_S)) + 1005e9c: 4215 tst r5, r2 + 1005e9e: d027 beq.n 1005ef0 + SCIx->g_T1.aRBlk[1] |= 2; + 1005ea0: 3a9a subs r2, #154 ; 0x9a + SCIx->g_T1.aRBlk[1] |= 1; + 1005ea2: 4313 orrs r3, r2 + 1005ea4: 7523 strb r3, [r4, #20] + Ret = ISO7816_SendBlock_Soft(SCIx , &SCIx->g_T1.aRBlk[3], 0, SCIx->g_T1.aRBlk); + 1005ea6: 0023 movs r3, r4 + 1005ea8: 0021 movs r1, r4 + 1005eaa: 3313 adds r3, #19 + 1005eac: 2200 movs r2, #0 + 1005eae: 3116 adds r1, #22 + 1005eb0: 0020 movs r0, r4 + 1005eb2: f7ff fd4f bl 1005954 + 1005eb6: 1e05 subs r5, r0, #0 + COMPARE_RETURN(Ret); + 1005eb8: d023 beq.n 1005f02 + 1005eba: e016 b.n 1005eea + else if (T_S_ABORT == Type) + 1005ebc: 9901 ldr r1, [sp, #4] + 1005ebe: 2903 cmp r1, #3 + 1005ec0: d003 beq.n 1005eca + s_blk[1] = 0xC0; + 1005ec2: 21c0 movs r1, #192 ; 0xc0 + 1005ec4: 7059 strb r1, [r3, #1] + TmpLen = 0; + 1005ec6: 9205 str r2, [sp, #20] + 1005ec8: e7a0 b.n 1005e0c + s_blk[1] |= 0x2; + 1005eca: 21c2 movs r1, #194 ; 0xc2 + s_blk[2] = 0; + 1005ecc: 709a strb r2, [r3, #2] + s_blk[1] |= 0x2; + 1005ece: 7059 strb r1, [r3, #1] + 1005ed0: e7f9 b.n 1005ec6 + else if ((Ret == ISO7816_T1_LRC_ERROR) || (Ret == ISO7816_PARITY_ERROR)) + 1005ed2: 2854 cmp r0, #84 ; 0x54 + 1005ed4: d100 bne.n 1005ed8 + 1005ed6: e0e1 b.n 100609c + 1005ed8: 2873 cmp r0, #115 ; 0x73 + 1005eda: d100 bne.n 1005ede + 1005edc: e0de b.n 100609c + else if (Ret == ISO7816_DATALEN_ERR) + 1005ede: 287f cmp r0, #127 ; 0x7f + 1005ee0: d100 bne.n 1005ee4 + 1005ee2: e0e0 b.n 10060a6 + else if (Ret == ISO7816_NOTLRC_ERROR) + 1005ee4: 2881 cmp r0, #129 ; 0x81 + 1005ee6: d100 bne.n 1005eea + 1005ee8: e0df b.n 10060aa + break; + } + } + + return OK; +} + 1005eea: 0028 movs r0, r5 + 1005eec: b00f add sp, #60 ; 0x3c + 1005eee: bdf0 pop {r4, r5, r6, r7, pc} + else if (Ret & (ERR_PARITY | ERR_CHKSUM)) + 1005ef0: 07aa lsls r2, r5, #30 + 1005ef2: d101 bne.n 1005ef8 + return ISO7816_ERR_NUM_OVER; + 1005ef4: 255c movs r5, #92 ; 0x5c + 1005ef6: e7f8 b.n 1005eea + SCIx->g_T1.aRBlk[1] |= 1; + 1005ef8: 227f movs r2, #127 ; 0x7f + 1005efa: 4252 negs r2, r2 + 1005efc: e7d1 b.n 1005ea2 + if (SCIx->g_T1.bErrCnt < ERR_SEND_CNT) + 1005efe: 2b02 cmp r3, #2 + 1005f00: d9d1 bls.n 1005ea6 + if (SCIx->g_T1.bErrCnt >= ERR_SEND_CNT) + 1005f02: 7c23 ldrb r3, [r4, #16] + 1005f04: 2b02 cmp r3, #2 + 1005f06: d800 bhi.n 1005f0a + 1005f08: e78e b.n 1005e28 + 1005f0a: e7f3 b.n 1005ef4 + if (SCIx->g_T1.bErrCnt < ERR_SEND_CNT) + 1005f0c: 2b02 cmp r3, #2 + 1005f0e: d8f8 bhi.n 1005f02 + 1005f10: 210b movs r1, #11 + 1005f12: a80a add r0, sp, #40 ; 0x28 + 1005f14: 1809 adds r1, r1, r0 + 1005f16: ab0c add r3, sp, #48 ; 0x30 + 1005f18: 9a05 ldr r2, [sp, #20] + 1005f1a: 0020 movs r0, r4 + 1005f1c: f000 f909 bl 1006132 + 1005f20: e7c9 b.n 1005eb6 + if ((0xC2 == SCIx->g_7816Para.aRecBuff[1]) && (SCIx->g_T1.bFlagSendChain)) + 1005f22: 0023 movs r3, r4 + 1005f24: 335d adds r3, #93 ; 0x5d + 1005f26: 781b ldrb r3, [r3, #0] + 1005f28: 2bc2 cmp r3, #194 ; 0xc2 + 1005f2a: d110 bne.n 1005f4e + 1005f2c: 7ca2 ldrb r2, [r4, #18] + 1005f2e: 2a00 cmp r2, #0 + 1005f30: d034 beq.n 1005f9c + 1005f32: 210b movs r1, #11 + s_blk[0] = 0; + 1005f34: 4a5e ldr r2, [pc, #376] ; (10060b0 ) + 1005f36: ab0c add r3, sp, #48 ; 0x30 + 1005f38: a80a add r0, sp, #40 ; 0x28 + 1005f3a: 801a strh r2, [r3, #0] + s_blk[1] = 0xE2; + 1005f3c: 709d strb r5, [r3, #2] + 1005f3e: 002a movs r2, r5 + 1005f40: 1809 adds r1, r1, r0 + 1005f42: 0020 movs r0, r4 + 1005f44: f000 f8f5 bl 1006132 + 1005f48: 1e05 subs r5, r0, #0 + COMPARE_RETURN(Ret); + 1005f4a: d1ce bne.n 1005eea + 1005f4c: e76c b.n 1005e28 + if ((SCIx->g_7816Para.aRecBuff[1] == 0xc3) && (SCIx->g_T1.bFlagSendChain != 0)) + 1005f4e: 2bc3 cmp r3, #195 ; 0xc3 + 1005f50: d124 bne.n 1005f9c + 1005f52: 7ca2 ldrb r2, [r4, #18] + 1005f54: 2a00 cmp r2, #0 + 1005f56: d021 beq.n 1005f9c + SCIx->SCI_Tran_StateCB.terminal_change_rec_bwt_num = SCIx->SCI_Tran_StateCB.terminal_rec_bwt_atr * SCIx->g_7816Para.aRecBuff[3]; + 1005f58: 23a5 movs r3, #165 ; 0xa5 + 1005f5a: 0025 movs r5, r4 + 1005f5c: 00db lsls r3, r3, #3 + 1005f5e: 355f adds r5, #95 ; 0x5f + 1005f60: 782a ldrb r2, [r5, #0] + 1005f62: 58e3 ldr r3, [r4, r3] + ISO7816_TXRX_TIME_Init(SCIx); + 1005f64: 0020 movs r0, r4 + SCIx->SCI_Tran_StateCB.terminal_change_rec_bwt_num = SCIx->SCI_Tran_StateCB.terminal_rec_bwt_atr * SCIx->g_7816Para.aRecBuff[3]; + 1005f66: 4353 muls r3, r2 + 1005f68: 4a52 ldr r2, [pc, #328] ; (10060b4 ) + 1005f6a: 50a3 str r3, [r4, r2] + SCIx->SCI_Tran_StateCB.terminal_rec_bwt = SCIx->SCI_Tran_StateCB.terminal_change_rec_bwt_num; + 1005f6c: 23a4 movs r3, #164 ; 0xa4 + 1005f6e: 58a2 ldr r2, [r4, r2] + 1005f70: 00db lsls r3, r3, #3 + 1005f72: 50e2 str r2, [r4, r3] + ISO7816_TXRX_TIME_Init(SCIx); + 1005f74: f7fd fd92 bl 1003a9c + s_blk[0] = 0x0; + 1005f78: 4a4f ldr r2, [pc, #316] ; (10060b8 ) + 1005f7a: ab0c add r3, sp, #48 ; 0x30 + 1005f7c: 801a strh r2, [r3, #0] + s_blk[1] = 0xE3; + 1005f7e: 2201 movs r2, #1 + 1005f80: 210b movs r1, #11 + 1005f82: 709a strb r2, [r3, #2] + s_blk[3] = SCIx->g_7816Para.aRecBuff[3]; + 1005f84: 782a ldrb r2, [r5, #0] + 1005f86: a80a add r0, sp, #40 ; 0x28 + 1005f88: 70da strb r2, [r3, #3] + 1005f8a: 1809 adds r1, r1, r0 + 1005f8c: 2201 movs r2, #1 + 1005f8e: 0020 movs r0, r4 + 1005f90: f000 f8cf bl 1006132 + 1005f94: 1e05 subs r5, r0, #0 + COMPARE_RETURN(Ret); + 1005f96: d1a8 bne.n 1005eea + SWTXFlag = 1; + 1005f98: 2601 movs r6, #1 + 1005f9a: e746 b.n 1005e2a + 1005f9c: 223f movs r2, #63 ; 0x3f + 1005f9e: 0019 movs r1, r3 + 1005fa0: 4391 bics r1, r2 + if (R_BLK == (SCIx->g_7816Para.aRecBuff[1] & 0xC0)) + 1005fa2: 2980 cmp r1, #128 ; 0x80 + 1005fa4: d140 bne.n 1006028 + if (SCIx->g_T1.bFlagSendChain) + 1005fa6: 7ca2 ldrb r2, [r4, #18] + 1005fa8: 2a00 cmp r2, #0 + 1005faa: d034 beq.n 1006016 + if ((SCIx->g_7816Para.aRecBuff[1] & NR_BIT) == (SCIx->g_T1.bNum >> 2)) /*nr!=ns, 对方请求下一个frame*/ + 1005fac: 2110 movs r1, #16 + 1005fae: 79a2 ldrb r2, [r4, #6] + 1005fb0: 400b ands r3, r1 + 1005fb2: 0891 lsrs r1, r2, #2 + 1005fb4: 428b cmp r3, r1 + 1005fb6: d11f bne.n 1005ff8 + pSend += SendLen; + 1005fb8: 9902 ldr r1, [sp, #8] + 1005fba: 9b04 ldr r3, [sp, #16] + 1005fbc: 468c mov ip, r1 + prolHead[0] = 0; + 1005fbe: 2100 movs r1, #0 + pSend += SendLen; + 1005fc0: 4463 add r3, ip + 1005fc2: 9304 str r3, [sp, #16] + prolHead[0] = 0; + 1005fc4: ab0b add r3, sp, #44 ; 0x2c + 1005fc6: 7019 strb r1, [r3, #0] + prolHead[1] |= SCIx->g_T1.bNum; + 1005fc8: 705a strb r2, [r3, #1] + if (SCIx->g_T1.bIFSC < CmdLen) + 1005fca: 7920 ldrb r0, [r4, #4] + 1005fcc: b286 uxth r6, r0 + 1005fce: 9602 str r6, [sp, #8] + 1005fd0: 42be cmp r6, r7 + 1005fd2: d20c bcs.n 1005fee + prolHead[1] |= BIT5; + 1005fd4: 3120 adds r1, #32 + 1005fd6: 430a orrs r2, r1 + 1005fd8: 705a strb r2, [r3, #1] + prolHead[2] = SCIx->g_T1.bIFSC; + 1005fda: 7098 strb r0, [r3, #2] + SCIx->g_T1.bLink = 1; + 1005fdc: 2301 movs r3, #1 + CmdLen -= SCIx->g_T1.bIFSC; + 1005fde: 1bbd subs r5, r7, r6 + 1005fe0: b2ad uxth r5, r5 + SCIx->g_T1.bLink = 1; + 1005fe2: 7223 strb r3, [r4, #8] + resendflag = 1; + 1005fe4: 2600 movs r6, #0 + 1005fe6: 002f movs r7, r5 + 1005fe8: 9607 str r6, [sp, #28] + 1005fea: 9606 str r6, [sp, #24] + 1005fec: e6dc b.n 1005da8 + prolHead[2] = CmdLen; + 1005fee: 709f strb r7, [r3, #2] + SCIx->g_T1.bFlagSendChain = 0; + 1005ff0: 74a1 strb r1, [r4, #18] + SCIx->g_T1.bLink = 0; + 1005ff2: 7221 strb r1, [r4, #8] + 1005ff4: 9702 str r7, [sp, #8] + 1005ff6: e7f5 b.n 1005fe4 + r_chain_cnt++; + 1005ff8: 9b07 ldr r3, [sp, #28] + 1005ffa: 3301 adds r3, #1 + 1005ffc: b2db uxtb r3, r3 + 1005ffe: 9307 str r3, [sp, #28] + SCIx->g_T1.bNum ^= BIT6; + 1006000: 2340 movs r3, #64 ; 0x40 + 1006002: 405a eors r2, r3 + 1006004: 2300 movs r3, #0 + 1006006: 001e movs r6, r3 + 1006008: 71a2 strb r2, [r4, #6] + 100600a: 9306 str r3, [sp, #24] + if ((r_cnt >= ERR_SEND_CNT) || (r_chain_cnt >= ERR_SEND_CNT)) + 100600c: 9b07 ldr r3, [sp, #28] + 100600e: 2b02 cmp r3, #2 + 1006010: d800 bhi.n 1006014 + 1006012: e6c9 b.n 1005da8 + 1006014: e76e b.n 1005ef4 + r_cnt++; + 1006016: 9b06 ldr r3, [sp, #24] + 1006018: 3301 adds r3, #1 + 100601a: b2db uxtb r3, r3 + 100601c: 9306 str r3, [sp, #24] + if ((r_cnt >= ERR_SEND_CNT) || (r_chain_cnt >= ERR_SEND_CNT)) + 100601e: 2b02 cmp r3, #2 + 1006020: d900 bls.n 1006024 + 1006022: e767 b.n 1005ef4 + resendflag = 1; + 1006024: 2601 movs r6, #1 + 1006026: e7f1 b.n 100600c + else if (S_BLK == (SCIx->g_7816Para.aRecBuff[1] & 0xC0)) + 1006028: 29c0 cmp r1, #192 ; 0xc0 + 100602a: d130 bne.n 100608e + if (Type < S_BLOCK_C) + 100602c: 9a01 ldr r2, [sp, #4] + 100602e: 2a01 cmp r2, #1 + 1006030: d802 bhi.n 1006038 + SCIx->g_T1.bFlgSRec = 1; + 1006032: 2301 movs r3, #1 + 1006034: 7363 strb r3, [r4, #13] + 1006036: e758 b.n 1005eea + 1006038: 2223 movs r2, #35 ; 0x23 + 100603a: 4013 ands r3, r2 + if (IFS_issued) + 100603c: 9a08 ldr r2, [sp, #32] + 100603e: 2a00 cmp r2, #0 + 1006040: d00d beq.n 100605e + if ((0x21 != (SCIx->g_7816Para.aRecBuff[1] & S_RSP_MSK)) + 1006042: 2b21 cmp r3, #33 ; 0x21 + 1006044: d106 bne.n 1006054 + || (SCIx->g_7816Para.aRecBuff[3] != pCommand[0])) + 1006046: 0023 movs r3, r4 + 1006048: 335f adds r3, #95 ; 0x5f + 100604a: 781a ldrb r2, [r3, #0] + 100604c: 9b03 ldr r3, [sp, #12] + 100604e: 781b ldrb r3, [r3, #0] + 1006050: 429a cmp r2, r3 + 1006052: d006 beq.n 1006062 + SCIx->g_T1.bErrCnt++; + 1006054: 7c23 ldrb r3, [r4, #16] + resendflag = 1; + 1006056: 9e08 ldr r6, [sp, #32] + SCIx->g_T1.bErrCnt++; + 1006058: 3301 adds r3, #1 + 100605a: 7423 strb r3, [r4, #16] + 100605c: e6a4 b.n 1005da8 + if (0x21 == (SCIx->g_7816Para.aRecBuff[1] & S_RSP_MSK)) + 100605e: 2b21 cmp r3, #33 ; 0x21 + 1006060: d109 bne.n 1006076 + if (SCIx->g_7816Para.aRecBuff[3] == pCommand[0]) + 1006062: 0023 movs r3, r4 + 1006064: 335f adds r3, #95 ; 0x5f + 1006066: 781a ldrb r2, [r3, #0] + 1006068: 9b03 ldr r3, [sp, #12] + 100606a: 781b ldrb r3, [r3, #0] + 100606c: 4293 cmp r3, r2 + 100606e: d000 beq.n 1006072 + 1006070: e6b8 b.n 1005de4 + SCIx->g_T1.bIFSD = pCommand[0]; + 1006072: 7163 strb r3, [r4, #5] + 1006074: e739 b.n 1005eea + else if (0x23 == (SCIx->g_7816Para.aRecBuff[1] & S_RSP_MSK)) + 1006076: 2b23 cmp r3, #35 ; 0x23 + 1006078: d000 beq.n 100607c + 100607a: e736 b.n 1005eea + if (SCIx->g_7816Para.aRecBuff[3] == pCommand[0]) + 100607c: 9b03 ldr r3, [sp, #12] + 100607e: 345f adds r4, #95 ; 0x5f + 1006080: 7822 ldrb r2, [r4, #0] + 1006082: 781b ldrb r3, [r3, #0] + 1006084: 429a cmp r2, r3 + 1006086: d000 beq.n 100608a + 1006088: e72f b.n 1005eea + return ISO7816_RET_RESPONSE_DIFFERENT; + 100608a: 257c movs r5, #124 ; 0x7c + 100608c: e72d b.n 1005eea + SCIx->g_T1.bFlgIRec = 1; + 100608e: 2301 movs r3, #1 + 1006090: 73a3 strb r3, [r4, #14] + 1006092: e72a b.n 1005eea + || ((SCIx->g_T1.bErrCnt == 0) && ((SCIx->g_T1.bErrNotify)))) + 1006094: 2b00 cmp r3, #0 + 1006096: d100 bne.n 100609a + 1006098: e6f6 b.n 1005e88 + 100609a: e704 b.n 1005ea6 + Ret = ERR_CHKSUM; + 100609c: 2502 movs r5, #2 + if (SWTXFlag == 1) + 100609e: 2e01 cmp r6, #1 + 10060a0: d000 beq.n 10060a4 + 10060a2: e6e2 b.n 1005e6a + 10060a4: e6d7 b.n 1005e56 + Ret = ERR_FF;//ERR_LEN; + 10060a6: 2520 movs r5, #32 + 10060a8: e7f9 b.n 100609e + Ret = ERR_LEN; + 10060aa: 2508 movs r5, #8 + 10060ac: e7f7 b.n 100609e + 10060ae: 46c0 nop ; (mov r8, r8) + 10060b0: ffffe200 .word 0xffffe200 + 10060b4: 0000052c .word 0x0000052c + 10060b8: ffffe300 .word 0xffffe300 + +010060bc : + +uint16_t ISO7816_TPDU_T1(SCI_Struct_Type *SCIx,uint8_t *pCommand, uint16_t CommandLength, + uint8_t *pResponse, uint16_t *pResponseLength) +{ + 10060bc: b5f0 push {r4, r5, r6, r7, lr} + 10060be: b0c7 sub sp, #284 ; 0x11c + 10060c0: 9301 str r3, [sp, #4] + uint16_t Ret; + uint16_t RecLen = 0; + 10060c2: ab02 add r3, sp, #8 + 10060c4: 1c9e adds r6, r3, #2 + 10060c6: 2300 movs r3, #0 +{ + 10060c8: 0007 movs r7, r0 + uint16_t RecLen = 0; + 10060ca: 8033 strh r3, [r6, #0] + uint8_t *pRecBuf = RecvBuf; + + if ((NULL == pCommand) || (NULL == pResponse) || + (CommandLength < 1) || (NULL == pResponseLength)) + { + return ISO7816_PARA_ERROR; + 10060cc: 2459 movs r4, #89 ; 0x59 + if ((NULL == pCommand) || (NULL == pResponse) || + 10060ce: 4299 cmp r1, r3 + 10060d0: d02a beq.n 1006128 + 10060d2: 9801 ldr r0, [sp, #4] + 10060d4: 4298 cmp r0, r3 + 10060d6: d027 beq.n 1006128 + 10060d8: 429a cmp r2, r3 + 10060da: d025 beq.n 1006128 + (CommandLength < 1) || (NULL == pResponseLength)) + 10060dc: 984c ldr r0, [sp, #304] ; 0x130 + 10060de: 4298 cmp r0, r3 + 10060e0: d022 beq.n 1006128 + } + + Ret = ISO7816_TPDU_T1Send_LOOP(SCIx , pCommand, CommandLength, I_BLOCK_C); + 10060e2: 0038 movs r0, r7 + 10060e4: f7ff fe32 bl 1005d4c + 10060e8: 1e04 subs r4, r0, #0 + COMPARE_RETURN(Ret); + 10060ea: d11d bne.n 1006128 + + *pResponseLength = 0; + 10060ec: 9b4c ldr r3, [sp, #304] ; 0x130 + uint8_t *pRecBuf = RecvBuf; + 10060ee: ad03 add r5, sp, #12 + *pResponseLength = 0; + 10060f0: 8018 strh r0, [r3, #0] + do + { + Ret = ISO7816_TPDU_T1Rec_LOOP(SCIx,pRecBuf, &RecLen); + 10060f2: 0032 movs r2, r6 + 10060f4: 0029 movs r1, r5 + 10060f6: 0038 movs r0, r7 + 10060f8: f7ff fce2 bl 1005ac0 + if ((OK != Ret) && (ISO7816_RET_CHAIN != Ret)) + 10060fc: 2800 cmp r0, #0 + 10060fe: d001 beq.n 1006104 + 1006100: 287e cmp r0, #126 ; 0x7e + 1006102: d114 bne.n 100612e + { + return ISO7816_T1_TRANSFER_ERROR; + } + if (REC_SIZE_MAX < RecLen) + 1006104: 2385 movs r3, #133 ; 0x85 + 1006106: 8832 ldrh r2, [r6, #0] + 1006108: 005b lsls r3, r3, #1 + 100610a: 429a cmp r2, r3 + 100610c: d80f bhi.n 100612e + { + return ISO7816_T1_TRANSFER_ERROR; + } + pRecBuf += RecLen; + *pResponseLength += RecLen; + 100610e: 9b4c ldr r3, [sp, #304] ; 0x130 + pRecBuf += RecLen; + 1006110: 18ad adds r5, r5, r2 + *pResponseLength += RecLen; + 1006112: 881b ldrh r3, [r3, #0] + 1006114: 18d2 adds r2, r2, r3 + 1006116: 9b4c ldr r3, [sp, #304] ; 0x130 + 1006118: b292 uxth r2, r2 + 100611a: 801a strh r2, [r3, #0] + } + while (ISO7816_RET_CHAIN == Ret); + 100611c: 287e cmp r0, #126 ; 0x7e + 100611e: d0e8 beq.n 10060f2 + + memcpy(pResponse, RecvBuf, *pResponseLength); + 1006120: a903 add r1, sp, #12 + 1006122: 9801 ldr r0, [sp, #4] + 1006124: f000 f980 bl 1006428 + + return OK; +} + 1006128: 0020 movs r0, r4 + 100612a: b047 add sp, #284 ; 0x11c + 100612c: bdf0 pop {r4, r5, r6, r7, pc} + return ISO7816_T1_TRANSFER_ERROR; + 100612e: 2460 movs r4, #96 ; 0x60 + 1006130: e7fa b.n 1006128 + +01006132 : +uint16_t ISO7816_SendBlock_Soft(SCI_Struct_Type *SCIx,uint8_t *pBuff, uint16_t I_Len, uint8_t *pHead) + 1006132: b5f0 push {r4, r5, r6, r7, lr} + 1006134: 001d movs r5, r3 + 1006136: b0c7 sub sp, #284 ; 0x11c + ISO7816_CalcLRC(pHead, 3, &Lrc1); + 1006138: ab02 add r3, sp, #8 +uint16_t ISO7816_SendBlock_Soft(SCI_Struct_Type *SCIx,uint8_t *pBuff, uint16_t I_Len, uint8_t *pHead) + 100613a: 9001 str r0, [sp, #4] + 100613c: 000f movs r7, r1 + 100613e: 0014 movs r4, r2 + ISO7816_CalcLRC(pHead, 3, &Lrc1); + 1006140: 2103 movs r1, #3 + 1006142: 1d9a adds r2, r3, #6 + 1006144: 0028 movs r0, r5 + 1006146: f7ff f99c bl 1005482 + ISO7816_CalcLRC(pBuff, I_Len, &Lrc2); + 100614a: ab02 add r3, sp, #8 + if (I_Len != 0) + 100614c: 2c00 cmp r4, #0 + 100614e: d02b beq.n 10061a8 + ISO7816_CalcLRC(pBuff, I_Len, &Lrc2); + 1006150: 1dda adds r2, r3, #7 + 1006152: 0021 movs r1, r4 + 1006154: 0038 movs r0, r7 + 1006156: f7ff f994 bl 1005482 + if (SCIx->g_T1.bLink != 0) + 100615a: 9b01 ldr r3, [sp, #4] + 100615c: 193a adds r2, r7, r4 + 100615e: 7a1e ldrb r6, [r3, #8] + 1006160: 2e00 cmp r6, #0 + 1006162: d000 beq.n 1006166 + DataBack = pBuff[I_Len]; + 1006164: 7816 ldrb r6, [r2, #0] + pBuff[I_Len] = Lrc1 ^ Lrc2; + 1006166: ab02 add r3, sp, #8 + 1006168: a902 add r1, sp, #8 + 100616a: 79c9 ldrb r1, [r1, #7] + 100616c: 799b ldrb r3, [r3, #6] + 100616e: 404b eors r3, r1 + 1006170: 7013 strb r3, [r2, #0] + sendData[i] = *pHead++; + 1006172: 782b ldrb r3, [r5, #0] + 1006174: a904 add r1, sp, #16 + 1006176: 700b strb r3, [r1, #0] + 1006178: 786b ldrb r3, [r5, #1] + sendLen = I_Len + 1; + 100617a: 1c62 adds r2, r4, #1 + sendData[i] = *pHead++; + 100617c: 704b strb r3, [r1, #1] + 100617e: 78ab ldrb r3, [r5, #2] + sendLen = I_Len + 1; + 1006180: b292 uxth r2, r2 + sendData[i] = *pHead++; + 1006182: 708b strb r3, [r1, #2] + 1006184: 2300 movs r3, #0 + for (i=0; i + ret = ISO7816_SendBytes_T1(SCIx,sendData, 3+sendLen); + 100618c: 1d22 adds r2, r4, #4 + 100618e: b292 uxth r2, r2 + 1006190: 9801 ldr r0, [sp, #4] + 1006192: f7ff f99d bl 10054d0 + COMPARE_RETURN(ret); + 1006196: 2800 cmp r0, #0 + 1006198: d010 beq.n 10061bc +} + 100619a: b047 add sp, #284 ; 0x11c + 100619c: bdf0 pop {r4, r5, r6, r7, pc} + sendData[i+3] = *pAddr++; + 100619e: 5cfd ldrb r5, [r7, r3] + 10061a0: 18c8 adds r0, r1, r3 + 10061a2: 70c5 strb r5, [r0, #3] + 10061a4: 3301 adds r3, #1 + 10061a6: e7ee b.n 1006186 + pHead[3] = Lrc1; + 10061a8: 799b ldrb r3, [r3, #6] + ret = ISO7816_SendBytes_T1(SCIx,pAddr, sendLen); + 10061aa: 2204 movs r2, #4 + pHead[3] = Lrc1; + 10061ac: 70eb strb r3, [r5, #3] + ret = ISO7816_SendBytes_T1(SCIx,pAddr, sendLen); + 10061ae: 0029 movs r1, r5 + 10061b0: 9801 ldr r0, [sp, #4] + 10061b2: f7ff f98d bl 10054d0 + COMPARE_RETURN(ret); + 10061b6: 2800 cmp r0, #0 + 10061b8: d1ef bne.n 100619a + uint8_t DataBack = 0; + 10061ba: 0026 movs r6, r4 + return OK; + 10061bc: 2000 movs r0, #0 + if ((SCIx->g_T1.bLink != 0) && (I_Len != 0)) + 10061be: 9b01 ldr r3, [sp, #4] + 10061c0: 7a1b ldrb r3, [r3, #8] + 10061c2: 4283 cmp r3, r0 + 10061c4: d0e9 beq.n 100619a + 10061c6: 4284 cmp r4, r0 + 10061c8: d0e7 beq.n 100619a + pBuff[I_Len] = DataBack; + 10061ca: 553e strb r6, [r7, r4] + 10061cc: e7e5 b.n 100619a + ... + +010061d0
: + * @param None + * @retval None + */ +//通过宏定义#define EMV_L1_43D来区别4.3c、4.3d +int main(void) +{ + 10061d0: b570 push {r4, r5, r6, lr} + Board_Init(); //UART + 10061d2: f7fa f907 bl 10003e4 + */ +static void ISO7816_Scix_Init(void) +{ + #ifdef SCI0_ENABLE + /*enable sci0, pwm, clock*/ + SYSCTRL_APBPeriphClockCmd(SYSCTRL_APBPeriph_7816CTRL | SYSCTRL_APBPeriph_PWM, ENABLE); + 10061d6: 2101 movs r1, #1 + 10061d8: 480f ldr r0, [pc, #60] ; (1006218 ) + 10061da: f7fb f8b5 bl 1001348 + + SCI_Struct0.SCIx7816 = MSCI0; //sci0 接口 + 10061de: 4c0f ldr r4, [pc, #60] ; (100621c ) + 10061e0: 4b0f ldr r3, [pc, #60] ; (1006220 ) + ISO7816_Init(&SCI_Struct0); //sci07816 相关参数初始化 + 10061e2: 0020 movs r0, r4 + SCI_Struct0.SCIx7816 = MSCI0; //sci0 接口 + 10061e4: 6023 str r3, [r4, #0] + ISO7816_Init(&SCI_Struct0); //sci07816 相关参数初始化 + 10061e6: f7fd fb85 bl 10038f4 + Sci7816_Adapter_FW_HW(&SCI_Struct0); + 10061ea: 0020 movs r0, r4 + 10061ec: f000 f822 bl 1006234 + * @param None + * @retval pclk freq + */ +static uint32_t Get_Timer_Clock_Freq(void) +{ + return SYSCTRL_GetClocksFreq(PCLK_FRE); + 10061f0: 200a movs r0, #10 + 10061f2: f7fb ffaf bl 1002154 + PllClockFreq = Get_Timer_Clock_Freq(); + 10061f6: 4d0b ldr r5, [pc, #44] ; (1006224 ) + 10061f8: 6028 str r0, [r5, #0] + MyPrintf("YC3122 sci7816 poll receive demo V1.0.0!\r\n"); + 10061fa: 480b ldr r0, [pc, #44] ; (1006228 ) + 10061fc: f7f9 ffbc bl 1000178 + MyPrintf("\r\n\r\n"); + 1006200: 480a ldr r0, [pc, #40] ; (100622c ) + 1006202: f7f9 ffb9 bl 1000178 + MyPrintf("\" Now Timer Clock Freq : %d Hz\n",PllClockFreq); + 1006206: 6829 ldr r1, [r5, #0] + 1006208: 4809 ldr r0, [pc, #36] ; (1006230 ) + 100620a: f7f9 ffb5 bl 1000178 + ISO7816_LoopBack(&SCI_Struct0); + 100620e: 0020 movs r0, r4 + 1006210: f7fe fcaa bl 1004b68 + 1006214: e7fb b.n 100620e + 1006216: 46c0 nop ; (mov r8, r8) + 1006218: 00001010 .word 0x00001010 + 100621c: 0002103c .word 0x0002103c + 1006220: 000f0400 .word 0x000f0400 + 1006224: 00021014 .word 0x00021014 + 1006228: 01007167 .word 0x01007167 + 100622c: 01007192 .word 0x01007192 + 1006230: 01007197 .word 0x01007197 + +01006234 : + GPIO_Config(SCI7816_DETECT_PORT, SCI7816_DETECT_IO_PIN, INPUT|PULL_PU); + 1006234: 2102 movs r1, #2 +{ + 1006236: b510 push {r4, lr} + GPIO_Config(SCI7816_DETECT_PORT, SCI7816_DETECT_IO_PIN, INPUT|PULL_PU); + 1006238: 2240 movs r2, #64 ; 0x40 +{ + 100623a: 0004 movs r4, r0 + GPIO_Config(SCI7816_DETECT_PORT, SCI7816_DETECT_IO_PIN, INPUT|PULL_PU); + 100623c: 0008 movs r0, r1 + 100623e: f7fa fd03 bl 1000c48 + SCIx->SCI_Tran_StateCB.Sci_Pin_Detect_State = 1; //卡到位引脚电压状态。此变量配置为不插卡时此引脚状态。1代表高电平、0代表低电平 + 1006242: 23b7 movs r3, #183 ; 0xb7 + 1006244: 2201 movs r2, #1 + 1006246: 009b lsls r3, r3, #2 + 1006248: 54e2 strb r2, [r4, r3] + SCIx->SCI_Tran_StateCB.atrovertime_index = TIM3; + 100624a: 4b11 ldr r3, [pc, #68] ; (1006290 ) + 100624c: 3202 adds r2, #2 + 100624e: 54e2 strb r2, [r4, r3] + SCIx->SCI_Tran_StateCB.contact_reset_l_cnt = 42000 * (48000000 / 1000000)/4.8; + 1006250: 23d4 movs r3, #212 ; 0xd4 + 1006252: 4a10 ldr r2, [pc, #64] ; (1006294 ) + 1006254: 005b lsls r3, r3, #1 + 1006256: 50e2 str r2, [r4, r3] + SCIx->SCI_Tran_StateCB.contact_atr_rfb_time_cnt = 47000 * (48000000 / 1000000)/4.8; + 1006258: 4a0f ldr r2, [pc, #60] ; (1006298 ) + 100625a: 3304 adds r3, #4 + 100625c: 50e2 str r2, [r4, r3] + SCIx->SCI_Tran_StateCB.contact_atr_rab_time_cnt = (20164 * (48000000 / 1000000)/4.8) * 372; + 100625e: 4a0f ldr r2, [pc, #60] ; (100629c ) + 1006260: 3304 adds r3, #4 + 1006262: 50e2 str r2, [r4, r3] + SCIx->SCI_Tran_StateCB.pwmclk_index = TIM7; //要根据所使用的gpio对应的定时器初始化此变量 + 1006264: 2207 movs r2, #7 + 1006266: 4b0e ldr r3, [pc, #56] ; (10062a0 ) + 1006268: 54e2 strb r2, [r4, r3] + SCIx->SCI_Tran_StateCB.pwmclk_num = 4800000*2;//CLK=4.8Mhz + 100626a: 4b0e ldr r3, [pc, #56] ; (10062a4 ) + 100626c: 4a0e ldr r2, [pc, #56] ; (10062a8 ) + 100626e: 50e2 str r2, [r4, r3] + if(SCIx->SCIx7816 == MSCI0) + 1006270: 4b0e ldr r3, [pc, #56] ; (10062ac ) + 1006272: 6822 ldr r2, [r4, #0] + 1006274: 429a cmp r2, r3 + 1006276: d103 bne.n 1006280 + ISO7816_Vcard_Control(ISO7816_VCC_0V); //CARD0 供电 + 1006278: 2000 movs r0, #0 + 100627a: f7fd fbcf bl 1003a1c +} + 100627e: bd10 pop {r4, pc} + GPIO_Config(SCI17816_CARD1_EN_PORT, SCI17816_CARD1_EN_IO_PIN, OUTPUT_HIGH); //CARD1 供电 + 1006280: 2180 movs r1, #128 ; 0x80 + 1006282: 223f movs r2, #63 ; 0x3f + 1006284: 0109 lsls r1, r1, #4 + 1006286: 2004 movs r0, #4 + 1006288: f7fa fcde bl 1000c48 +} + 100628c: e7f7 b.n 100627e + 100628e: 46c0 nop ; (mov r8, r8) + 1006290: 00000542 .word 0x00000542 + 1006294: 000668a0 .word 0x000668a0 + 1006298: 00072bf0 .word 0x00072bf0 + 100629c: 04789020 .word 0x04789020 + 10062a0: 00000543 .word 0x00000543 + 10062a4: 00000544 .word 0x00000544 + 10062a8: 00927c00 .word 0x00927c00 + 10062ac: 000f0400 .word 0x000f0400 + +010062b0 : + * @brief Timer0 interrupt service function + * @param None + * @retval None + */ +void TIMER0_IRQHandler(void) +{ + 10062b0: b510 push {r4, lr} + tick_Timer[0]++; + 10062b2: 4a04 ldr r2, [pc, #16] ; (10062c4 ) + TIM_ClearITPendingBit(MTIM, TIM0); + 10062b4: 2100 movs r1, #0 + tick_Timer[0]++; + 10062b6: 6813 ldr r3, [r2, #0] + TIM_ClearITPendingBit(MTIM, TIM0); + 10062b8: 4803 ldr r0, [pc, #12] ; (10062c8 ) + tick_Timer[0]++; + 10062ba: 3301 adds r3, #1 + 10062bc: 6013 str r3, [r2, #0] + TIM_ClearITPendingBit(MTIM, TIM0); + 10062be: f7fc fc55 bl 1002b6c +} + 10062c2: bd10 pop {r4, pc} + 10062c4: 00021018 .word 0x00021018 + 10062c8: 000f0c00 .word 0x000f0c00 + +010062cc : + * @brief Timer1 interrupt service function + * @param None + * @retval None + */ +void TIMER1_IRQHandler(void) +{ + 10062cc: b510 push {r4, lr} + tick_Timer[1]++; + 10062ce: 4a04 ldr r2, [pc, #16] ; (10062e0 ) + TIM_ClearITPendingBit(MTIM, TIM1); + 10062d0: 2101 movs r1, #1 + tick_Timer[1]++; + 10062d2: 6853 ldr r3, [r2, #4] + TIM_ClearITPendingBit(MTIM, TIM1); + 10062d4: 4803 ldr r0, [pc, #12] ; (10062e4 ) + tick_Timer[1]++; + 10062d6: 3301 adds r3, #1 + 10062d8: 6053 str r3, [r2, #4] + TIM_ClearITPendingBit(MTIM, TIM1); + 10062da: f7fc fc47 bl 1002b6c +} + 10062de: bd10 pop {r4, pc} + 10062e0: 00021018 .word 0x00021018 + 10062e4: 000f0c00 .word 0x000f0c00 + +010062e8 : + * @brief Timer2 interrupt service function + * @param None + * @retval None + */ +void TIMER2_IRQHandler(void) +{ + 10062e8: b510 push {r4, lr} + tick_Timer[2]++; + 10062ea: 4a04 ldr r2, [pc, #16] ; (10062fc ) + TIM_ClearITPendingBit(MTIM, TIM2); + 10062ec: 2102 movs r1, #2 + tick_Timer[2]++; + 10062ee: 6893 ldr r3, [r2, #8] + TIM_ClearITPendingBit(MTIM, TIM2); + 10062f0: 4803 ldr r0, [pc, #12] ; (1006300 ) + tick_Timer[2]++; + 10062f2: 3301 adds r3, #1 + 10062f4: 6093 str r3, [r2, #8] + TIM_ClearITPendingBit(MTIM, TIM2); + 10062f6: f7fc fc39 bl 1002b6c +} + 10062fa: bd10 pop {r4, pc} + 10062fc: 00021018 .word 0x00021018 + 1006300: 000f0c00 .word 0x000f0c00 + +01006304 : + * @brief Timer3 interrupt service function + * @param None + * @retval None + */ +void TIMER3_IRQHandler(void) +{ + 1006304: b510 push {r4, lr} + tick_Timer[3]++; + 1006306: 4a04 ldr r2, [pc, #16] ; (1006318 ) + TIM_ClearITPendingBit(MTIM, TIM3); + 1006308: 2103 movs r1, #3 + tick_Timer[3]++; + 100630a: 68d3 ldr r3, [r2, #12] + TIM_ClearITPendingBit(MTIM, TIM3); + 100630c: 4803 ldr r0, [pc, #12] ; (100631c ) + tick_Timer[3]++; + 100630e: 3301 adds r3, #1 + 1006310: 60d3 str r3, [r2, #12] + TIM_ClearITPendingBit(MTIM, TIM3); + 1006312: f7fc fc2b bl 1002b6c +} + 1006316: bd10 pop {r4, pc} + 1006318: 00021018 .word 0x00021018 + 100631c: 000f0c00 .word 0x000f0c00 + +01006320 : + * @brief Timer4 interrupt service function + * @param None + * @retval None + */ +void TIMER4_IRQHandler(void) +{ + 1006320: b510 push {r4, lr} + tick_Timer[4]++; + 1006322: 4a04 ldr r2, [pc, #16] ; (1006334 ) + TIM_ClearITPendingBit(MTIM, TIM4); + 1006324: 2104 movs r1, #4 + tick_Timer[4]++; + 1006326: 6913 ldr r3, [r2, #16] + TIM_ClearITPendingBit(MTIM, TIM4); + 1006328: 4803 ldr r0, [pc, #12] ; (1006338 ) + tick_Timer[4]++; + 100632a: 3301 adds r3, #1 + 100632c: 6113 str r3, [r2, #16] + TIM_ClearITPendingBit(MTIM, TIM4); + 100632e: f7fc fc1d bl 1002b6c +} + 1006332: bd10 pop {r4, pc} + 1006334: 00021018 .word 0x00021018 + 1006338: 000f0c00 .word 0x000f0c00 + +0100633c : + * @brief Timer5 interrupt service function + * @param None + * @retval None + */ +void TIMER5_IRQHandler(void) +{ + 100633c: b510 push {r4, lr} + tick_Timer[5]++; + 100633e: 4a04 ldr r2, [pc, #16] ; (1006350 ) + TIM_ClearITPendingBit(MTIM, TIM5); + 1006340: 2105 movs r1, #5 + tick_Timer[5]++; + 1006342: 6953 ldr r3, [r2, #20] + TIM_ClearITPendingBit(MTIM, TIM5); + 1006344: 4803 ldr r0, [pc, #12] ; (1006354 ) + tick_Timer[5]++; + 1006346: 3301 adds r3, #1 + 1006348: 6153 str r3, [r2, #20] + TIM_ClearITPendingBit(MTIM, TIM5); + 100634a: f7fc fc0f bl 1002b6c +} + 100634e: bd10 pop {r4, pc} + 1006350: 00021018 .word 0x00021018 + 1006354: 000f0c00 .word 0x000f0c00 + +01006358 : + * @brief Timer6 interrupt service function + * @param None + * @retval None + */ +void TIMER6_IRQHandler(void) +{ + 1006358: b510 push {r4, lr} + tick_Timer[6]++; + 100635a: 4a04 ldr r2, [pc, #16] ; (100636c ) + TIM_ClearITPendingBit(MTIM, TIM6); + 100635c: 2106 movs r1, #6 + tick_Timer[6]++; + 100635e: 6993 ldr r3, [r2, #24] + TIM_ClearITPendingBit(MTIM, TIM6); + 1006360: 4803 ldr r0, [pc, #12] ; (1006370 ) + tick_Timer[6]++; + 1006362: 3301 adds r3, #1 + 1006364: 6193 str r3, [r2, #24] + TIM_ClearITPendingBit(MTIM, TIM6); + 1006366: f7fc fc01 bl 1002b6c +} + 100636a: bd10 pop {r4, pc} + 100636c: 00021018 .word 0x00021018 + 1006370: 000f0c00 .word 0x000f0c00 + +01006374 : + * @brief Timer7 interrupt service function + * @param None + * @retval None + */ +void TIMER7_IRQHandler(void) +{ + 1006374: b510 push {r4, lr} + tick_Timer[7]++; + 1006376: 4a04 ldr r2, [pc, #16] ; (1006388 ) + TIM_ClearITPendingBit(MTIM, TIM7); + 1006378: 2107 movs r1, #7 + tick_Timer[7]++; + 100637a: 69d3 ldr r3, [r2, #28] + TIM_ClearITPendingBit(MTIM, TIM7); + 100637c: 4803 ldr r0, [pc, #12] ; (100638c ) + tick_Timer[7]++; + 100637e: 3301 adds r3, #1 + 1006380: 61d3 str r3, [r2, #28] + TIM_ClearITPendingBit(MTIM, TIM7); + 1006382: f7fc fbf3 bl 1002b6c +} + 1006386: bd10 pop {r4, pc} + 1006388: 00021018 .word 0x00021018 + 100638c: 000f0c00 .word 0x000f0c00 + +01006390 : + * @brief Timer8 interrupt service function + * @param None + * @retval None + */ +void TIMER8_IRQHandler(void) +{ + 1006390: b510 push {r4, lr} + tick_Timer[8]++; + 1006392: 4a04 ldr r2, [pc, #16] ; (10063a4 ) + TIM_ClearITPendingBit(MTIM, TIM8); + 1006394: 2108 movs r1, #8 + tick_Timer[8]++; + 1006396: 6a13 ldr r3, [r2, #32] + TIM_ClearITPendingBit(MTIM, TIM8); + 1006398: 4803 ldr r0, [pc, #12] ; (10063a8 ) + tick_Timer[8]++; + 100639a: 3301 adds r3, #1 + 100639c: 6213 str r3, [r2, #32] + TIM_ClearITPendingBit(MTIM, TIM8); + 100639e: f7fc fbe5 bl 1002b6c +} + 10063a2: bd10 pop {r4, pc} + 10063a4: 00021018 .word 0x00021018 + 10063a8: 000f0c00 .word 0x000f0c00 + +010063ac : + * @brief Timer0~3 interrupt entry function + * @param None + * @retval None + */ +void TMRG0_IRQHandler(void) +{ + 10063ac: b510 push {r4, lr} + uint32_t TIM_IRQ_pend = 0; + + TIM_IRQ_pend = TIM_GetAllITStatus(MTIM); + 10063ae: 480a ldr r0, [pc, #40] ; (10063d8 ) + 10063b0: f7fc fc2c bl 1002c0c + 10063b4: 0004 movs r4, r0 + + if(TIM_IRQ_pend & BIT0) + 10063b6: 07c3 lsls r3, r0, #31 + 10063b8: d501 bpl.n 10063be + { + TIMER0_IRQHandler(); + 10063ba: f7ff ff79 bl 10062b0 + } + if(TIM_IRQ_pend & BIT1) + 10063be: 07a3 lsls r3, r4, #30 + 10063c0: d501 bpl.n 10063c6 + { + TIMER1_IRQHandler(); + 10063c2: f7ff ff83 bl 10062cc + } + if(TIM_IRQ_pend & BIT2) + 10063c6: 0763 lsls r3, r4, #29 + 10063c8: d501 bpl.n 10063ce + { + TIMER2_IRQHandler(); + 10063ca: f7ff ff8d bl 10062e8 + } + if(TIM_IRQ_pend & BIT3) + 10063ce: 0723 lsls r3, r4, #28 + 10063d0: d501 bpl.n 10063d6 + { + TIMER3_IRQHandler(); + 10063d2: f7ff ff97 bl 1006304 + } +} + 10063d6: bd10 pop {r4, pc} + 10063d8: 000f0c00 .word 0x000f0c00 + +010063dc : + * @brief Timer4~8 interrupt entry function + * @param None + * @retval None + */ +void TMRG1_IRQHandler(void) +{ + 10063dc: b510 push {r4, lr} + uint32_t TIM_IRQ_pend = 0; + + TIM_IRQ_pend = TIM_GetAllITStatus(MTIM); + 10063de: 480c ldr r0, [pc, #48] ; (1006410 ) + 10063e0: f7fc fc14 bl 1002c0c + 10063e4: 0004 movs r4, r0 + + if(TIM_IRQ_pend & BIT4) + 10063e6: 06c3 lsls r3, r0, #27 + 10063e8: d501 bpl.n 10063ee + { + TIMER4_IRQHandler(); + 10063ea: f7ff ff99 bl 1006320 + } + if(TIM_IRQ_pend & BIT5) + 10063ee: 06a3 lsls r3, r4, #26 + 10063f0: d501 bpl.n 10063f6 + { + TIMER5_IRQHandler(); + 10063f2: f7ff ffa3 bl 100633c + } + if(TIM_IRQ_pend & BIT6) + 10063f6: 0663 lsls r3, r4, #25 + 10063f8: d501 bpl.n 10063fe + { + TIMER6_IRQHandler(); + 10063fa: f7ff ffad bl 1006358 + } + if(TIM_IRQ_pend & BIT7) + 10063fe: 0623 lsls r3, r4, #24 + 1006400: d501 bpl.n 1006406 + { + TIMER7_IRQHandler(); + 1006402: f7ff ffb7 bl 1006374 + } + if(TIM_IRQ_pend & BIT8) + 1006406: 05e3 lsls r3, r4, #23 + 1006408: d501 bpl.n 100640e + { + TIMER8_IRQHandler(); + 100640a: f7ff ffc1 bl 1006390 + } +} + 100640e: bd10 pop {r4, pc} + 1006410: 000f0c00 .word 0x000f0c00 + +01006414 : + * @brief Protocol of sending and receiving data and processing in interrupt + * @param None + * @retval None + */ +void SCI0_IRQHandler(void) +{ + 1006414: b510 push {r4, lr} + MyPrintf("irq\r\n"); + 1006416: 4802 ldr r0, [pc, #8] ; (1006420 ) + 1006418: f7f9 feae bl 1000178 +// ISO7816_IRQ(&SCI_Struct0); +} + 100641c: bd10 pop {r4, pc} + 100641e: 46c0 nop ; (mov r8, r8) + 1006420: 010071b7 .word 0x010071b7 + +01006424 : + * @retval None + */ +void SCI1_IRQHandler(void) +{ + //ISO7816_IRQ(&SCI_Struct1); +} + 1006424: 4770 bx lr + ... + +01006428 : + 1006428: b5f0 push {r4, r5, r6, r7, lr} + 100642a: 2a0f cmp r2, #15 + 100642c: d937 bls.n 100649e + 100642e: 000d movs r5, r1 + 1006430: 4305 orrs r5, r0 + 1006432: 000c movs r4, r1 + 1006434: 0003 movs r3, r0 + 1006436: 07ad lsls r5, r5, #30 + 1006438: d135 bne.n 10064a6 + 100643a: 0015 movs r5, r2 + 100643c: 3d10 subs r5, #16 + 100643e: 092d lsrs r5, r5, #4 + 1006440: 012e lsls r6, r5, #4 + 1006442: 1836 adds r6, r6, r0 + 1006444: 3610 adds r6, #16 + 1006446: 6827 ldr r7, [r4, #0] + 1006448: 601f str r7, [r3, #0] + 100644a: 6867 ldr r7, [r4, #4] + 100644c: 605f str r7, [r3, #4] + 100644e: 68a7 ldr r7, [r4, #8] + 1006450: 609f str r7, [r3, #8] + 1006452: 68e7 ldr r7, [r4, #12] + 1006454: 3410 adds r4, #16 + 1006456: 60df str r7, [r3, #12] + 1006458: 3310 adds r3, #16 + 100645a: 42b3 cmp r3, r6 + 100645c: d1f3 bne.n 1006446 + 100645e: 240f movs r4, #15 + 1006460: 3501 adds r5, #1 + 1006462: 012d lsls r5, r5, #4 + 1006464: 1949 adds r1, r1, r5 + 1006466: 4014 ands r4, r2 + 1006468: 1945 adds r5, r0, r5 + 100646a: 2c03 cmp r4, #3 + 100646c: d91d bls.n 10064aa + 100646e: 2300 movs r3, #0 + 1006470: 58ce ldr r6, [r1, r3] + 1006472: 50ee str r6, [r5, r3] + 1006474: 3304 adds r3, #4 + 1006476: 1ae6 subs r6, r4, r3 + 1006478: 2e03 cmp r6, #3 + 100647a: d8f9 bhi.n 1006470 + 100647c: 2303 movs r3, #3 + 100647e: 3c04 subs r4, #4 + 1006480: 08a4 lsrs r4, r4, #2 + 1006482: 3401 adds r4, #1 + 1006484: 00a4 lsls r4, r4, #2 + 1006486: 401a ands r2, r3 + 1006488: 192d adds r5, r5, r4 + 100648a: 1909 adds r1, r1, r4 + 100648c: 2a00 cmp r2, #0 + 100648e: d005 beq.n 100649c + 1006490: 2300 movs r3, #0 + 1006492: 5ccc ldrb r4, [r1, r3] + 1006494: 54ec strb r4, [r5, r3] + 1006496: 3301 adds r3, #1 + 1006498: 4293 cmp r3, r2 + 100649a: d1fa bne.n 1006492 + 100649c: bdf0 pop {r4, r5, r6, r7, pc} + 100649e: 0005 movs r5, r0 + 10064a0: 2a00 cmp r2, #0 + 10064a2: d1f5 bne.n 1006490 + 10064a4: e7fa b.n 100649c + 10064a6: 0005 movs r5, r0 + 10064a8: e7f2 b.n 1006490 + 10064aa: 0022 movs r2, r4 + 10064ac: e7f8 b.n 10064a0 + 10064ae: 46c0 nop ; (mov r8, r8) + +010064b0 : + 10064b0: b5f0 push {r4, r5, r6, r7, lr} + 10064b2: 0783 lsls r3, r0, #30 + 10064b4: d046 beq.n 1006544 + 10064b6: 1e54 subs r4, r2, #1 + 10064b8: 2a00 cmp r2, #0 + 10064ba: d042 beq.n 1006542 + 10064bc: b2ce uxtb r6, r1 + 10064be: 0002 movs r2, r0 + 10064c0: 2503 movs r5, #3 + 10064c2: e002 b.n 10064ca + 10064c4: 001a movs r2, r3 + 10064c6: 3c01 subs r4, #1 + 10064c8: d33b bcc.n 1006542 + 10064ca: 1c53 adds r3, r2, #1 + 10064cc: 7016 strb r6, [r2, #0] + 10064ce: 422b tst r3, r5 + 10064d0: d1f8 bne.n 10064c4 + 10064d2: 2c03 cmp r4, #3 + 10064d4: d92d bls.n 1006532 + 10064d6: 22ff movs r2, #255 ; 0xff + 10064d8: 400a ands r2, r1 + 10064da: 0215 lsls r5, r2, #8 + 10064dc: 4315 orrs r5, r2 + 10064de: 042a lsls r2, r5, #16 + 10064e0: 4315 orrs r5, r2 + 10064e2: 2c0f cmp r4, #15 + 10064e4: d916 bls.n 1006514 + 10064e6: 0027 movs r7, r4 + 10064e8: 3f10 subs r7, #16 + 10064ea: 093f lsrs r7, r7, #4 + 10064ec: 013e lsls r6, r7, #4 + 10064ee: 46b4 mov ip, r6 + 10064f0: 001e movs r6, r3 + 10064f2: 001a movs r2, r3 + 10064f4: 3610 adds r6, #16 + 10064f6: 4466 add r6, ip + 10064f8: 6015 str r5, [r2, #0] + 10064fa: 6055 str r5, [r2, #4] + 10064fc: 6095 str r5, [r2, #8] + 10064fe: 60d5 str r5, [r2, #12] + 1006500: 3210 adds r2, #16 + 1006502: 42b2 cmp r2, r6 + 1006504: d1f8 bne.n 10064f8 + 1006506: 220f movs r2, #15 + 1006508: 3701 adds r7, #1 + 100650a: 013f lsls r7, r7, #4 + 100650c: 19db adds r3, r3, r7 + 100650e: 4014 ands r4, r2 + 1006510: 2c03 cmp r4, #3 + 1006512: d90e bls.n 1006532 + 1006514: 1f26 subs r6, r4, #4 + 1006516: 08b6 lsrs r6, r6, #2 + 1006518: 00b7 lsls r7, r6, #2 + 100651a: 46bc mov ip, r7 + 100651c: 001a movs r2, r3 + 100651e: 1d1f adds r7, r3, #4 + 1006520: 4467 add r7, ip + 1006522: c220 stmia r2!, {r5} + 1006524: 42ba cmp r2, r7 + 1006526: d1fc bne.n 1006522 + 1006528: 2203 movs r2, #3 + 100652a: 3601 adds r6, #1 + 100652c: 00b6 lsls r6, r6, #2 + 100652e: 199b adds r3, r3, r6 + 1006530: 4014 ands r4, r2 + 1006532: 2c00 cmp r4, #0 + 1006534: d005 beq.n 1006542 + 1006536: b2c9 uxtb r1, r1 + 1006538: 191c adds r4, r3, r4 + 100653a: 7019 strb r1, [r3, #0] + 100653c: 3301 adds r3, #1 + 100653e: 429c cmp r4, r3 + 1006540: d1fb bne.n 100653a + 1006542: bdf0 pop {r4, r5, r6, r7, pc} + 1006544: 0014 movs r4, r2 + 1006546: 0003 movs r3, r0 + 1006548: e7c3 b.n 10064d2 + 100654a: 46c0 nop ; (mov r8, r8) + +0100654c <__gnu_thumb1_case_sqi>: + 100654c: b402 push {r1} + 100654e: 4671 mov r1, lr + 1006550: 0849 lsrs r1, r1, #1 + 1006552: 0049 lsls r1, r1, #1 + 1006554: 5609 ldrsb r1, [r1, r0] + 1006556: 0049 lsls r1, r1, #1 + 1006558: 448e add lr, r1 + 100655a: bc02 pop {r1} + 100655c: 4770 bx lr + 100655e: 46c0 nop ; (mov r8, r8) + +01006560 <__gnu_thumb1_case_uqi>: + 1006560: b402 push {r1} + 1006562: 4671 mov r1, lr + 1006564: 0849 lsrs r1, r1, #1 + 1006566: 0049 lsls r1, r1, #1 + 1006568: 5c09 ldrb r1, [r1, r0] + 100656a: 0049 lsls r1, r1, #1 + 100656c: 448e add lr, r1 + 100656e: bc02 pop {r1} + 1006570: 4770 bx lr + 1006572: 46c0 nop ; (mov r8, r8) + +01006574 <__udivsi3>: + 1006574: 2200 movs r2, #0 + 1006576: 0843 lsrs r3, r0, #1 + 1006578: 428b cmp r3, r1 + 100657a: d374 bcc.n 1006666 <__udivsi3+0xf2> + 100657c: 0903 lsrs r3, r0, #4 + 100657e: 428b cmp r3, r1 + 1006580: d35f bcc.n 1006642 <__udivsi3+0xce> + 1006582: 0a03 lsrs r3, r0, #8 + 1006584: 428b cmp r3, r1 + 1006586: d344 bcc.n 1006612 <__udivsi3+0x9e> + 1006588: 0b03 lsrs r3, r0, #12 + 100658a: 428b cmp r3, r1 + 100658c: d328 bcc.n 10065e0 <__udivsi3+0x6c> + 100658e: 0c03 lsrs r3, r0, #16 + 1006590: 428b cmp r3, r1 + 1006592: d30d bcc.n 10065b0 <__udivsi3+0x3c> + 1006594: 22ff movs r2, #255 ; 0xff + 1006596: 0209 lsls r1, r1, #8 + 1006598: ba12 rev r2, r2 + 100659a: 0c03 lsrs r3, r0, #16 + 100659c: 428b cmp r3, r1 + 100659e: d302 bcc.n 10065a6 <__udivsi3+0x32> + 10065a0: 1212 asrs r2, r2, #8 + 10065a2: 0209 lsls r1, r1, #8 + 10065a4: d065 beq.n 1006672 <__udivsi3+0xfe> + 10065a6: 0b03 lsrs r3, r0, #12 + 10065a8: 428b cmp r3, r1 + 10065aa: d319 bcc.n 10065e0 <__udivsi3+0x6c> + 10065ac: e000 b.n 10065b0 <__udivsi3+0x3c> + 10065ae: 0a09 lsrs r1, r1, #8 + 10065b0: 0bc3 lsrs r3, r0, #15 + 10065b2: 428b cmp r3, r1 + 10065b4: d301 bcc.n 10065ba <__udivsi3+0x46> + 10065b6: 03cb lsls r3, r1, #15 + 10065b8: 1ac0 subs r0, r0, r3 + 10065ba: 4152 adcs r2, r2 + 10065bc: 0b83 lsrs r3, r0, #14 + 10065be: 428b cmp r3, r1 + 10065c0: d301 bcc.n 10065c6 <__udivsi3+0x52> + 10065c2: 038b lsls r3, r1, #14 + 10065c4: 1ac0 subs r0, r0, r3 + 10065c6: 4152 adcs r2, r2 + 10065c8: 0b43 lsrs r3, r0, #13 + 10065ca: 428b cmp r3, r1 + 10065cc: d301 bcc.n 10065d2 <__udivsi3+0x5e> + 10065ce: 034b lsls r3, r1, #13 + 10065d0: 1ac0 subs r0, r0, r3 + 10065d2: 4152 adcs r2, r2 + 10065d4: 0b03 lsrs r3, r0, #12 + 10065d6: 428b cmp r3, r1 + 10065d8: d301 bcc.n 10065de <__udivsi3+0x6a> + 10065da: 030b lsls r3, r1, #12 + 10065dc: 1ac0 subs r0, r0, r3 + 10065de: 4152 adcs r2, r2 + 10065e0: 0ac3 lsrs r3, r0, #11 + 10065e2: 428b cmp r3, r1 + 10065e4: d301 bcc.n 10065ea <__udivsi3+0x76> + 10065e6: 02cb lsls r3, r1, #11 + 10065e8: 1ac0 subs r0, r0, r3 + 10065ea: 4152 adcs r2, r2 + 10065ec: 0a83 lsrs r3, r0, #10 + 10065ee: 428b cmp r3, r1 + 10065f0: d301 bcc.n 10065f6 <__udivsi3+0x82> + 10065f2: 028b lsls r3, r1, #10 + 10065f4: 1ac0 subs r0, r0, r3 + 10065f6: 4152 adcs r2, r2 + 10065f8: 0a43 lsrs r3, r0, #9 + 10065fa: 428b cmp r3, r1 + 10065fc: d301 bcc.n 1006602 <__udivsi3+0x8e> + 10065fe: 024b lsls r3, r1, #9 + 1006600: 1ac0 subs r0, r0, r3 + 1006602: 4152 adcs r2, r2 + 1006604: 0a03 lsrs r3, r0, #8 + 1006606: 428b cmp r3, r1 + 1006608: d301 bcc.n 100660e <__udivsi3+0x9a> + 100660a: 020b lsls r3, r1, #8 + 100660c: 1ac0 subs r0, r0, r3 + 100660e: 4152 adcs r2, r2 + 1006610: d2cd bcs.n 10065ae <__udivsi3+0x3a> + 1006612: 09c3 lsrs r3, r0, #7 + 1006614: 428b cmp r3, r1 + 1006616: d301 bcc.n 100661c <__udivsi3+0xa8> + 1006618: 01cb lsls r3, r1, #7 + 100661a: 1ac0 subs r0, r0, r3 + 100661c: 4152 adcs r2, r2 + 100661e: 0983 lsrs r3, r0, #6 + 1006620: 428b cmp r3, r1 + 1006622: d301 bcc.n 1006628 <__udivsi3+0xb4> + 1006624: 018b lsls r3, r1, #6 + 1006626: 1ac0 subs r0, r0, r3 + 1006628: 4152 adcs r2, r2 + 100662a: 0943 lsrs r3, r0, #5 + 100662c: 428b cmp r3, r1 + 100662e: d301 bcc.n 1006634 <__udivsi3+0xc0> + 1006630: 014b lsls r3, r1, #5 + 1006632: 1ac0 subs r0, r0, r3 + 1006634: 4152 adcs r2, r2 + 1006636: 0903 lsrs r3, r0, #4 + 1006638: 428b cmp r3, r1 + 100663a: d301 bcc.n 1006640 <__udivsi3+0xcc> + 100663c: 010b lsls r3, r1, #4 + 100663e: 1ac0 subs r0, r0, r3 + 1006640: 4152 adcs r2, r2 + 1006642: 08c3 lsrs r3, r0, #3 + 1006644: 428b cmp r3, r1 + 1006646: d301 bcc.n 100664c <__udivsi3+0xd8> + 1006648: 00cb lsls r3, r1, #3 + 100664a: 1ac0 subs r0, r0, r3 + 100664c: 4152 adcs r2, r2 + 100664e: 0883 lsrs r3, r0, #2 + 1006650: 428b cmp r3, r1 + 1006652: d301 bcc.n 1006658 <__udivsi3+0xe4> + 1006654: 008b lsls r3, r1, #2 + 1006656: 1ac0 subs r0, r0, r3 + 1006658: 4152 adcs r2, r2 + 100665a: 0843 lsrs r3, r0, #1 + 100665c: 428b cmp r3, r1 + 100665e: d301 bcc.n 1006664 <__udivsi3+0xf0> + 1006660: 004b lsls r3, r1, #1 + 1006662: 1ac0 subs r0, r0, r3 + 1006664: 4152 adcs r2, r2 + 1006666: 1a41 subs r1, r0, r1 + 1006668: d200 bcs.n 100666c <__udivsi3+0xf8> + 100666a: 4601 mov r1, r0 + 100666c: 4152 adcs r2, r2 + 100666e: 4610 mov r0, r2 + 1006670: 4770 bx lr + 1006672: e7ff b.n 1006674 <__udivsi3+0x100> + 1006674: b501 push {r0, lr} + 1006676: 2000 movs r0, #0 + 1006678: f000 f8f0 bl 100685c <__aeabi_idiv0> + 100667c: bd02 pop {r1, pc} + 100667e: 46c0 nop ; (mov r8, r8) + +01006680 <__aeabi_uidivmod>: + 1006680: 2900 cmp r1, #0 + 1006682: d0f7 beq.n 1006674 <__udivsi3+0x100> + 1006684: e776 b.n 1006574 <__udivsi3> + 1006686: 4770 bx lr + +01006688 <__divsi3>: + 1006688: 4603 mov r3, r0 + 100668a: 430b orrs r3, r1 + 100668c: d47f bmi.n 100678e <__divsi3+0x106> + 100668e: 2200 movs r2, #0 + 1006690: 0843 lsrs r3, r0, #1 + 1006692: 428b cmp r3, r1 + 1006694: d374 bcc.n 1006780 <__divsi3+0xf8> + 1006696: 0903 lsrs r3, r0, #4 + 1006698: 428b cmp r3, r1 + 100669a: d35f bcc.n 100675c <__divsi3+0xd4> + 100669c: 0a03 lsrs r3, r0, #8 + 100669e: 428b cmp r3, r1 + 10066a0: d344 bcc.n 100672c <__divsi3+0xa4> + 10066a2: 0b03 lsrs r3, r0, #12 + 10066a4: 428b cmp r3, r1 + 10066a6: d328 bcc.n 10066fa <__divsi3+0x72> + 10066a8: 0c03 lsrs r3, r0, #16 + 10066aa: 428b cmp r3, r1 + 10066ac: d30d bcc.n 10066ca <__divsi3+0x42> + 10066ae: 22ff movs r2, #255 ; 0xff + 10066b0: 0209 lsls r1, r1, #8 + 10066b2: ba12 rev r2, r2 + 10066b4: 0c03 lsrs r3, r0, #16 + 10066b6: 428b cmp r3, r1 + 10066b8: d302 bcc.n 10066c0 <__divsi3+0x38> + 10066ba: 1212 asrs r2, r2, #8 + 10066bc: 0209 lsls r1, r1, #8 + 10066be: d065 beq.n 100678c <__divsi3+0x104> + 10066c0: 0b03 lsrs r3, r0, #12 + 10066c2: 428b cmp r3, r1 + 10066c4: d319 bcc.n 10066fa <__divsi3+0x72> + 10066c6: e000 b.n 10066ca <__divsi3+0x42> + 10066c8: 0a09 lsrs r1, r1, #8 + 10066ca: 0bc3 lsrs r3, r0, #15 + 10066cc: 428b cmp r3, r1 + 10066ce: d301 bcc.n 10066d4 <__divsi3+0x4c> + 10066d0: 03cb lsls r3, r1, #15 + 10066d2: 1ac0 subs r0, r0, r3 + 10066d4: 4152 adcs r2, r2 + 10066d6: 0b83 lsrs r3, r0, #14 + 10066d8: 428b cmp r3, r1 + 10066da: d301 bcc.n 10066e0 <__divsi3+0x58> + 10066dc: 038b lsls r3, r1, #14 + 10066de: 1ac0 subs r0, r0, r3 + 10066e0: 4152 adcs r2, r2 + 10066e2: 0b43 lsrs r3, r0, #13 + 10066e4: 428b cmp r3, r1 + 10066e6: d301 bcc.n 10066ec <__divsi3+0x64> + 10066e8: 034b lsls r3, r1, #13 + 10066ea: 1ac0 subs r0, r0, r3 + 10066ec: 4152 adcs r2, r2 + 10066ee: 0b03 lsrs r3, r0, #12 + 10066f0: 428b cmp r3, r1 + 10066f2: d301 bcc.n 10066f8 <__divsi3+0x70> + 10066f4: 030b lsls r3, r1, #12 + 10066f6: 1ac0 subs r0, r0, r3 + 10066f8: 4152 adcs r2, r2 + 10066fa: 0ac3 lsrs r3, r0, #11 + 10066fc: 428b cmp r3, r1 + 10066fe: d301 bcc.n 1006704 <__divsi3+0x7c> + 1006700: 02cb lsls r3, r1, #11 + 1006702: 1ac0 subs r0, r0, r3 + 1006704: 4152 adcs r2, r2 + 1006706: 0a83 lsrs r3, r0, #10 + 1006708: 428b cmp r3, r1 + 100670a: d301 bcc.n 1006710 <__divsi3+0x88> + 100670c: 028b lsls r3, r1, #10 + 100670e: 1ac0 subs r0, r0, r3 + 1006710: 4152 adcs r2, r2 + 1006712: 0a43 lsrs r3, r0, #9 + 1006714: 428b cmp r3, r1 + 1006716: d301 bcc.n 100671c <__divsi3+0x94> + 1006718: 024b lsls r3, r1, #9 + 100671a: 1ac0 subs r0, r0, r3 + 100671c: 4152 adcs r2, r2 + 100671e: 0a03 lsrs r3, r0, #8 + 1006720: 428b cmp r3, r1 + 1006722: d301 bcc.n 1006728 <__divsi3+0xa0> + 1006724: 020b lsls r3, r1, #8 + 1006726: 1ac0 subs r0, r0, r3 + 1006728: 4152 adcs r2, r2 + 100672a: d2cd bcs.n 10066c8 <__divsi3+0x40> + 100672c: 09c3 lsrs r3, r0, #7 + 100672e: 428b cmp r3, r1 + 1006730: d301 bcc.n 1006736 <__divsi3+0xae> + 1006732: 01cb lsls r3, r1, #7 + 1006734: 1ac0 subs r0, r0, r3 + 1006736: 4152 adcs r2, r2 + 1006738: 0983 lsrs r3, r0, #6 + 100673a: 428b cmp r3, r1 + 100673c: d301 bcc.n 1006742 <__divsi3+0xba> + 100673e: 018b lsls r3, r1, #6 + 1006740: 1ac0 subs r0, r0, r3 + 1006742: 4152 adcs r2, r2 + 1006744: 0943 lsrs r3, r0, #5 + 1006746: 428b cmp r3, r1 + 1006748: d301 bcc.n 100674e <__divsi3+0xc6> + 100674a: 014b lsls r3, r1, #5 + 100674c: 1ac0 subs r0, r0, r3 + 100674e: 4152 adcs r2, r2 + 1006750: 0903 lsrs r3, r0, #4 + 1006752: 428b cmp r3, r1 + 1006754: d301 bcc.n 100675a <__divsi3+0xd2> + 1006756: 010b lsls r3, r1, #4 + 1006758: 1ac0 subs r0, r0, r3 + 100675a: 4152 adcs r2, r2 + 100675c: 08c3 lsrs r3, r0, #3 + 100675e: 428b cmp r3, r1 + 1006760: d301 bcc.n 1006766 <__divsi3+0xde> + 1006762: 00cb lsls r3, r1, #3 + 1006764: 1ac0 subs r0, r0, r3 + 1006766: 4152 adcs r2, r2 + 1006768: 0883 lsrs r3, r0, #2 + 100676a: 428b cmp r3, r1 + 100676c: d301 bcc.n 1006772 <__divsi3+0xea> + 100676e: 008b lsls r3, r1, #2 + 1006770: 1ac0 subs r0, r0, r3 + 1006772: 4152 adcs r2, r2 + 1006774: 0843 lsrs r3, r0, #1 + 1006776: 428b cmp r3, r1 + 1006778: d301 bcc.n 100677e <__divsi3+0xf6> + 100677a: 004b lsls r3, r1, #1 + 100677c: 1ac0 subs r0, r0, r3 + 100677e: 4152 adcs r2, r2 + 1006780: 1a41 subs r1, r0, r1 + 1006782: d200 bcs.n 1006786 <__divsi3+0xfe> + 1006784: 4601 mov r1, r0 + 1006786: 4152 adcs r2, r2 + 1006788: 4610 mov r0, r2 + 100678a: 4770 bx lr + 100678c: e05d b.n 100684a <__divsi3+0x1c2> + 100678e: 0fca lsrs r2, r1, #31 + 1006790: d000 beq.n 1006794 <__divsi3+0x10c> + 1006792: 4249 negs r1, r1 + 1006794: 1003 asrs r3, r0, #32 + 1006796: d300 bcc.n 100679a <__divsi3+0x112> + 1006798: 4240 negs r0, r0 + 100679a: 4053 eors r3, r2 + 100679c: 2200 movs r2, #0 + 100679e: 469c mov ip, r3 + 10067a0: 0903 lsrs r3, r0, #4 + 10067a2: 428b cmp r3, r1 + 10067a4: d32d bcc.n 1006802 <__divsi3+0x17a> + 10067a6: 0a03 lsrs r3, r0, #8 + 10067a8: 428b cmp r3, r1 + 10067aa: d312 bcc.n 10067d2 <__divsi3+0x14a> + 10067ac: 22fc movs r2, #252 ; 0xfc + 10067ae: 0189 lsls r1, r1, #6 + 10067b0: ba12 rev r2, r2 + 10067b2: 0a03 lsrs r3, r0, #8 + 10067b4: 428b cmp r3, r1 + 10067b6: d30c bcc.n 10067d2 <__divsi3+0x14a> + 10067b8: 0189 lsls r1, r1, #6 + 10067ba: 1192 asrs r2, r2, #6 + 10067bc: 428b cmp r3, r1 + 10067be: d308 bcc.n 10067d2 <__divsi3+0x14a> + 10067c0: 0189 lsls r1, r1, #6 + 10067c2: 1192 asrs r2, r2, #6 + 10067c4: 428b cmp r3, r1 + 10067c6: d304 bcc.n 10067d2 <__divsi3+0x14a> + 10067c8: 0189 lsls r1, r1, #6 + 10067ca: d03a beq.n 1006842 <__divsi3+0x1ba> + 10067cc: 1192 asrs r2, r2, #6 + 10067ce: e000 b.n 10067d2 <__divsi3+0x14a> + 10067d0: 0989 lsrs r1, r1, #6 + 10067d2: 09c3 lsrs r3, r0, #7 + 10067d4: 428b cmp r3, r1 + 10067d6: d301 bcc.n 10067dc <__divsi3+0x154> + 10067d8: 01cb lsls r3, r1, #7 + 10067da: 1ac0 subs r0, r0, r3 + 10067dc: 4152 adcs r2, r2 + 10067de: 0983 lsrs r3, r0, #6 + 10067e0: 428b cmp r3, r1 + 10067e2: d301 bcc.n 10067e8 <__divsi3+0x160> + 10067e4: 018b lsls r3, r1, #6 + 10067e6: 1ac0 subs r0, r0, r3 + 10067e8: 4152 adcs r2, r2 + 10067ea: 0943 lsrs r3, r0, #5 + 10067ec: 428b cmp r3, r1 + 10067ee: d301 bcc.n 10067f4 <__divsi3+0x16c> + 10067f0: 014b lsls r3, r1, #5 + 10067f2: 1ac0 subs r0, r0, r3 + 10067f4: 4152 adcs r2, r2 + 10067f6: 0903 lsrs r3, r0, #4 + 10067f8: 428b cmp r3, r1 + 10067fa: d301 bcc.n 1006800 <__divsi3+0x178> + 10067fc: 010b lsls r3, r1, #4 + 10067fe: 1ac0 subs r0, r0, r3 + 1006800: 4152 adcs r2, r2 + 1006802: 08c3 lsrs r3, r0, #3 + 1006804: 428b cmp r3, r1 + 1006806: d301 bcc.n 100680c <__divsi3+0x184> + 1006808: 00cb lsls r3, r1, #3 + 100680a: 1ac0 subs r0, r0, r3 + 100680c: 4152 adcs r2, r2 + 100680e: 0883 lsrs r3, r0, #2 + 1006810: 428b cmp r3, r1 + 1006812: d301 bcc.n 1006818 <__divsi3+0x190> + 1006814: 008b lsls r3, r1, #2 + 1006816: 1ac0 subs r0, r0, r3 + 1006818: 4152 adcs r2, r2 + 100681a: d2d9 bcs.n 10067d0 <__divsi3+0x148> + 100681c: 0843 lsrs r3, r0, #1 + 100681e: 428b cmp r3, r1 + 1006820: d301 bcc.n 1006826 <__divsi3+0x19e> + 1006822: 004b lsls r3, r1, #1 + 1006824: 1ac0 subs r0, r0, r3 + 1006826: 4152 adcs r2, r2 + 1006828: 1a41 subs r1, r0, r1 + 100682a: d200 bcs.n 100682e <__divsi3+0x1a6> + 100682c: 4601 mov r1, r0 + 100682e: 4663 mov r3, ip + 1006830: 4152 adcs r2, r2 + 1006832: 105b asrs r3, r3, #1 + 1006834: 4610 mov r0, r2 + 1006836: d301 bcc.n 100683c <__divsi3+0x1b4> + 1006838: 4240 negs r0, r0 + 100683a: 2b00 cmp r3, #0 + 100683c: d500 bpl.n 1006840 <__divsi3+0x1b8> + 100683e: 4249 negs r1, r1 + 1006840: 4770 bx lr + 1006842: 4663 mov r3, ip + 1006844: 105b asrs r3, r3, #1 + 1006846: d300 bcc.n 100684a <__divsi3+0x1c2> + 1006848: 4240 negs r0, r0 + 100684a: b501 push {r0, lr} + 100684c: 2000 movs r0, #0 + 100684e: f000 f805 bl 100685c <__aeabi_idiv0> + 1006852: bd02 pop {r1, pc} + +01006854 <__aeabi_idivmod>: + 1006854: 2900 cmp r1, #0 + 1006856: d0f8 beq.n 100684a <__divsi3+0x1c2> + 1006858: e716 b.n 1006688 <__divsi3> + 100685a: 4770 bx lr + +0100685c <__aeabi_idiv0>: + 100685c: 4770 bx lr + 100685e: 46c0 nop ; (mov r8, r8) + 1006860: 33323130 .word 0x33323130 + 1006864: 37363534 .word 0x37363534 + 1006868: 62613938 .word 0x62613938 + 100686c: 66656463 .word 0x66656463 + 1006870: 32313000 .word 0x32313000 + 1006874: 36353433 .word 0x36353433 + 1006878: 41393837 .word 0x41393837 + 100687c: 45444342 .word 0x45444342 + 1006880: 52450046 .word 0x52450046 + 1006884: 00524f52 .word 0x00524f52 + 1006888: 73250a0d .word 0x73250a0d + 100688c: 0a0d003a .word 0x0a0d003a + 1006890: 78383025 .word 0x78383025 + 1006894: 3025003a .word 0x3025003a + 1006898: 00207832 .word 0x00207832 + 100689c: 65737341 .word 0x65737341 + 10068a0: 74207472 .word 0x74207472 + 10068a4: 67676972 .word 0x67676972 + 10068a8: 61207265 .word 0x61207265 + 10068ac: 69662074 .word 0x69662074 + 10068b0: 203a656c .word 0x203a656c + 10068b4: 6c207325 .word 0x6c207325 + 10068b8: 3a656e69 .word 0x3a656e69 + 10068bc: 66206425 .word 0x66206425 + 10068c0: 3a636e75 .word 0x3a636e75 + 10068c4: 0a732520 .word 0x0a732520 + 10068c8: 00000020 .word 0x00000020 + +010068cc : + 10068cc: 01006871 qh.. + +010068d0 : + 10068d0: 01006860 `h.. + +010068d4 : + 10068d4: 000f8b1c 000f8c1c 000f8d1c 000f8e1c ................ + 10068e4: 2e2f2e2e 2e2e2f2e 2f2e2e2f 4c2f2e2e ../../../../../L + 10068f4: 61726269 73656972 6b64732f 5f63792f ibraries/sdk/yc_ + 1006904: 74726175 0000632e 00020014 00020414 uart.c.......... + 1006914: 00020814 00020c14 ........ + +0100691c <__FUNCTION__.9139>: + 100691c: 54524155 4965445f 0074696e UART_DeInit. + +01006928 <__FUNCTION__.9147>: + 1006928: 54524155 696e495f UART_Init. + +01006932 <__FUNCTION__.9130>: + 1006932: 54524155 6675425f 5f726566 656c6553 UART_Buffer_Sele + 1006942: ct. + +01006945 <__FUNCTION__.9156>: + 1006945: 54524155 4354495f 69666e6f UART_ITConfig. + +01006953 <__FUNCTION__.9161>: + 1006953: 54524155 6e65535f 74614464 UART_SendData. + +01006961 <__FUNCTION__.9172>: + 1006961: 54524155 6e65535f 66754264 UART_SendBuf. + +0100696e <__FUNCTION__.9180>: + 100696e: 54524155 6365525f 65766965 61746144 UART_ReceiveData + ... + +0100697f <__FUNCTION__.9186>: + 100697f: 54524155 6365525f 65766965 00667542 UART_ReceiveBuf. + +0100698f <__FUNCTION__.9195>: + 100698f: 54524155 7475415f 6f6c466f 72744377 UART_AutoFlowCtr + 100699f: 646d436c lCmd. + +010069a4 <__FUNCTION__.9199>: + 10069a4: 54524155 7465475f 64495449 69746e65 UART_GetITIdenti + 10069b4: ty. + +010069b7 <__FUNCTION__.9203>: + 10069b7: 54524155 5273495f 46494658 6c75464f UART_IsRXFIFOFul + 10069c7: l. + +010069c9 <__FUNCTION__.9207>: + 10069c9: 54524155 5273495f 46494658 746f4e4f UART_IsRXFIFONot + 10069d9: 74706d45 Empty. + +010069df <__FUNCTION__.9211>: + 10069df: 54524155 4273495f 00797375 UART_IsBusy. + +010069eb <__FUNCTION__.9216>: + 10069eb: 54524155 7465535f 69545449 756f656d UART_SetITTimeou + 10069fb: t. + +010069fd <__FUNCTION__.9221>: + 10069fd: 54524155 7465535f 54497852 006d754e UART_SetRxITNum. + +01006a0d <__FUNCTION__.9225>: + 1006a0d: 54524155 6365525f 65766965 61746144 UART_ReceiveData + 1006a1d: 006e654c Len. + +01006a21 : + 1006a21: 00010000 00010002 00010003 00010002 ................ + 1006a31: 00010004 00010002 00010003 00010002 ................ + 1006a41: 00010005 00010002 00010003 00010002 ................ + 1006a51: 00010004 00010002 00010003 00010002 ................ + 1006a61: 00010006 00010002 00010003 00010002 ................ + 1006a71: 00010004 00010002 00010003 00010002 ................ + 1006a81: 00010005 00010002 00010003 00010002 ................ + 1006a91: 00010004 00010002 00010003 00010002 ................ + 1006aa1: 00010007 00010002 00010003 00010002 ................ + 1006ab1: 00010004 00010002 00010003 00010002 ................ + 1006ac1: 00010005 00010002 00010003 00010002 ................ + 1006ad1: 00010004 00010002 00010003 00010002 ................ + 1006ae1: 00010006 00010002 00010003 00010002 ................ + 1006af1: 00010004 00010002 00010003 00010002 ................ + 1006b01: 00010005 00010002 00010003 00010002 ................ + 1006b11: 00010004 00010002 00010003 00010002 ................ + 1006b21: 2e2f2e2e 2e2e2f2e 2f2e2e2f 4c2f2e2e ../../../../../L + 1006b31: 61726269 73656972 6b64732f 5f63792f ibraries/sdk/yc_ + 1006b41: 6f697067 gpio.c. + +01006b48 <__FUNCTION__.9133>: + 1006b48: 4f495047 6e6f435f 00676966 GPIO_Config. + +01006b54 <__FUNCTION__.9138>: + 1006b54: 4f495047 696e495f GPIO_Init. + +01006b5e <__FUNCTION__.9148>: + 1006b5e: 4f495047 6c75505f 4370556c GPIO_PullUpCmd. + +01006b6d <__FUNCTION__.9159>: + 1006b6d: 4f495047 6165525f 706e4964 61447475 GPIO_ReadInputDa + 1006b7d: ta. + +01006b80 <__FUNCTION__.9164>: + 1006b80: 4f495047 6165525f 706e4964 61447475 GPIO_ReadInputDa + 1006b90: 69426174 taBit. + +01006b96 <__FUNCTION__.9168>: + 1006b96: 4f495047 6165525f 74754f64 44747570 GPIO_ReadOutputD + 1006ba6: 00617461 ata. + +01006baa <__FUNCTION__.9173>: + 1006baa: 4f495047 6165525f 74754f64 44747570 GPIO_ReadOutputD + 1006bba: 42617461 ataBit. + +01006bc1 <__FUNCTION__.9178>: + 1006bc1: 4f495047 7365525f 69427465 GPIO_ResetBit. + +01006bcf <__FUNCTION__.9183>: + 1006bcf: 4f495047 7365525f 69427465 GPIO_ResetBits. + +01006bde <__FUNCTION__.9192>: + 1006bde: 4f495047 7465535f 00746942 GPIO_SetBit. + +01006bea <__FUNCTION__.9197>: + 1006bea: 4f495047 7465535f 73746942 GPIO_SetBits. + +01006bf7 <__FUNCTION__.9206>: + 1006bf7: 4f495047 6972575f GPIO_Write. + +01006c02 <__FUNCTION__.9212>: + 1006c02: 4f495047 6972575f 69426574 GPIO_WriteBit. + +01006c10 <__FUNCTION__.9217>: + 1006c10: 4f495047 53444f5f 2e007465 2e2e2f2e GPIO_ODSet.../.. + 1006c20: 2f2e2e2f 2e2f2e2e 694c2f2e 72617262 /../../../Librar + 1006c30: 2f736569 2f6b6473 735f6379 74637379 ies/sdk/yc_sysct + 1006c40: 632e6c72 00000000 rl.c.... + +01006c48 : + 1006c48: 01002599 01002605 01002619 0100262d .%...&...&..-&.. + 1006c58: 01002641 0100266d 01002699 A&..m&...&.. + +01006c64 <__FUNCTION__.9492>: + 1006c64: 43535953 5f4c5254 50424841 70697265 SYSCTRL_AHBPerip + 1006c74: 6f6c4368 6d436b63 hClockCmd. + +01006c7e <__FUNCTION__.9497>: + 1006c7e: 43535953 5f4c5254 50425041 70697265 SYSCTRL_APBPerip + 1006c8e: 6f6c4368 6d436b63 hClockCmd. + +01006c98 <__FUNCTION__.9502>: + 1006c98: 43535953 5f4c5254 65505652 68706972 SYSCTRL_RVPeriph + 1006ca8: 636f6c43 646d436b ClockCmd. + +01006cb1 <__FUNCTION__.9510>: + 1006cb1: 43535953 5f4c5254 4b4c4348 69726550 SYSCTRL_HCLKPeri + 1006cc1: 65536870 7463656c phSelect. + +01006cca <__FUNCTION__.9517>: + 1006cca: 43535953 5f4c5254 4355434d 61526b6c SYSCTRL_MCUClkRa + 1006cda: 614d646e ndMask. + +01006ce1 <__FUNCTION__.9533>: + 1006ce1: 43535953 5f4c5254 4f4c4c50 006e6570 SYSCTRL_PLLOpen. + +01006cf1 <__FUNCTION__.9564>: + 1006cf1: 43535953 5f4c5254 4355434d 74436b6c SYSCTRL_MCUClkCt + 1006d01: rl. + +01006d04 <__FUNCTION__.9550>: + 1006d04: 43535953 5f4c5254 4355434d 6c506b6c SYSCTRL_MCUClkPl + 1006d14: 6c65536c 00746365 lSelect. + +01006d1c <__FUNCTION__.9554>: + 1006d1c: 43535953 5f4c5254 4355434d 6f536b6c SYSCTRL_MCUClkSo + 1006d2c: 65637275 656c6553 urceSelect. + +01006d37 <__FUNCTION__.9558>: + 1006d37: 43535953 5f4c5254 4355434d 69446b6c SYSCTRL_MCUClkDi + 1006d47: v. + +01006d49 <__FUNCTION__.9573>: + 1006d49: 43535953 5f4c5254 31524550 43626841 SYSCTRL_PER1AhbC + 1006d59: 74436b6c lkCtrl. + +01006d60 <__FUNCTION__.9580>: + 1006d60: 43535953 5f4c5254 31524550 69707351 SYSCTRL_PER1Qspi + 1006d70: 436b6c43 006c7274 ClkCtrl. + +01006d78 <__FUNCTION__.9587>: + 1006d78: 43535953 5f4c5254 32524550 61727350 SYSCTRL_PER2Psra + 1006d88: 6b6c436d 6c727443 mClkCtrl. + +01006d91 <__FUNCTION__.9594>: + 1006d91: 43535953 5f4c5254 32524550 69707348 SYSCTRL_PER2Hspi + 1006da1: 436b6c43 006c7274 ClkCtrl. + +01006da9 <__FUNCTION__.9603>: + 1006da9: 43535953 5f4c5254 33524550 43656349 SYSCTRL_PER3IceC + 1006db9: 74436b6c lkCtrl. + +01006dc0 <__FUNCTION__.9608>: + 1006dc0: 43535953 5f4c5254 33524550 63616441 SYSCTRL_PER3Adac + 1006dd0: 436b6c43 006c7274 ClkCtrl. + +01006dd8 <__FUNCTION__.9613>: + 1006dd8: 43535953 5f4c5254 33524550 6f697047 SYSCTRL_PER3Gpio + 1006de8: 6b6c4330 6c727443 0ClkCtrl. + +01006df1 <__FUNCTION__.9618>: + 1006df1: 43535953 5f4c5254 33524550 6f697047 SYSCTRL_PER3Gpio + 1006e01: 6b6c4331 6c727443 1ClkCtrl. + +01006e0a <__FUNCTION__.9625>: + 1006e0a: 43535953 5f4c5254 43415352 61526b6c SYSCTRL_RSAClkRa + 1006e1a: 614d646e ndMask. + +01006e21 <__FUNCTION__.9631>: + 1006e21: 43535953 5f4c5254 43415352 74436b6c SYSCTRL_RSAClkCt + 1006e31: rl. + +01006e34 <__FUNCTION__.9688>: + 1006e34: 43535953 5f4c5254 43746547 6b636f6c SYSCTRL_GetClock + 1006e44: 65724673 sFreq. + +01006e4a <__FUNCTION__.9652>: + 1006e4a: 43535953 5f4c5254 4d746547 6c437563 SYSCTRL_GetMcuCl + 1006e5a: 736b636f 72756f53 ocksSource. + +01006e65 <__FUNCTION__.9545>: + 1006e65: 43535953 5f4c5254 50746547 72466c6c SYSCTRL_GetPllFr + 1006e75: eq. + +01006e78 <__FUNCTION__.9668>: + 1006e78: 43535953 5f4c5254 50746547 43315245 SYSCTRL_GetPER1C + 1006e88: 6b636f6c 756f5373 00656372 locksSource. + +01006e94 <__FUNCTION__.9678>: + 1006e94: 43535953 5f4c5254 50746547 43325245 SYSCTRL_GetPER2C + 1006ea4: 6b636f6c 756f5373 00656372 2e2f2e2e locksSource.../. + 1006eb4: 2e2e2f2e 2f2e2e2f 4c2f2e2e 61726269 ./../../../Libra + 1006ec4: 73656972 6b64732f 5f63792f 656d6974 ries/sdk/yc_time + 1006ed4: 00632e72 r.c. + +01006ed8 <__FUNCTION__.9205>: + 1006ed8: 5f4d4954 74696e49 TIM_Init. + +01006ee1 <__FUNCTION__.9209>: + 1006ee1: 5f4d4954 6e496544 TIM_DeInit. + +01006eec <__FUNCTION__.9215>: + 1006eec: 5f4d4954 00646d43 TIM_Cmd. + +01006ef4 <__FUNCTION__.9221>: + 1006ef4: 5f4d4954 65646f4d 666e6f43 TIM_ModeConfig. + +01006f03 <__FUNCTION__.9227>: + 1006f03: 5f4d4954 50746553 6f697265 TIM_SetPeriod. + +01006f11 <__FUNCTION__.9232>: + 1006f11: 5f4d4954 494d5750 0074696e TIM_PWMInit. + +01006f1d <__FUNCTION__.9239>: + 1006f1d: 5f4d4954 50746553 65504d57 646f6972 TIM_SetPWMPeriod + ... + +01006f2e <__FUNCTION__.9245>: + 1006f2e: 5f4d4954 6f435449 6769666e TIM_ITConfig. + +01006f3b <__FUNCTION__.9250>: + 1006f3b: 5f4d4954 61656c43 50544972 69646e65 TIM_ClearITPendi + 1006f4b: 6942676e ngBit. + +01006f51 <__FUNCTION__.9255>: + 1006f51: 5f4d4954 49746547 61745354 00737574 TIM_GetITStatus. + +01006f61 <__FUNCTION__.9259>: + 1006f61: 5f4d4954 41746547 54496c6c 74617453 TIM_GetAllITStat + 1006f71: 2e007375 2e2e2f2e 2f2e2e2f 2e2f2e2e us.../../../../. + 1006f81: 694c2f2e 72617262 2f736569 2f6b6473 ./Libraries/sdk/ + 1006f91: 625f6379 632e7570 yc_bpu.c. + +01006f9a <__FUNCTION__.9268>: + 1006f9a: 5f4b5042 4379654b 7261656c BPK_KeyClear. + +01006fa7 <__FUNCTION__.9272>: + 1006fa7: 5f4b5042 65746c41 656c4372 654b7261 BPK_AlterClearKe + 1006fb7: y. + +01006fb9 <__FUNCTION__.9277>: + 1006fb9: 5f4b5042 5779654b 65746972 6b636f4c BPK_KeyWriteLock + ... + +01006fca <__FUNCTION__.9282>: + 1006fca: 5f4b5042 5279654b 4c646165 006b636f BPK_KeyReadLock. + +01006fda <__FUNCTION__.9287>: + 1006fda: 5f4b5042 6b636f4c BPK_Lock. + +01006fe3 <__FUNCTION__.9294>: + 1006fe3: 5f4b5042 4c746547 536b636f 75746174 BPK_GetLockStatu + 1006ff3: s. + +01006ff5 <__FUNCTION__.9298>: + 1006ff5: 534e4553 455f524f 6e495458 SENSOR_EXTInit. + +01007004 <__FUNCTION__.9323>: + 1007004: 534e4553 455f524f 6f505458 6d437472 SENSOR_EXTPortCm + 1007014: d. + +01007016 <__FUNCTION__.9331>: + 1007016: 534e4553 415f524f 6f43414e 6769666e SENSOR_ANAConfig + ... + +01007027 <__FUNCTION__.9336>: + 1007027: 534e4553 415f524f 6d43414e SENSOR_ANACmd. + +01007035 <__FUNCTION__.9345>: + 1007035: 534e4553 435f524f 6f436b68 6769666e SENSOR_ChkConfig + ... + +01007046 <__FUNCTION__.9354>: + 1007046: 534e4553 435f524f 69666e6f SENSOR_Config. + +01007054 <__FUNCTION__.9370>: + 1007054: 534e4553 535f524f 6c656968 6e6f4364 SENSOR_ShieldCon + 1007064: 00676966 fig. + +01007068 <__FUNCTION__.9375>: + 1007068: 534e4553 535f524f 6c656968 726f5064 SENSOR_ShieldPor + 1007078: 646d4374 tCmd. + +0100707d <__FUNCTION__.9385>: + 100707d: 534e4553 535f524f 6f4c6365 6f436b63 SENSOR_SecLockCo + 100708d: 6769666e nfig. + +01007092 <__FUNCTION__.9389>: + 1007092: 534e4553 475f524f 54497465 74617453 SENSOR_GetITStat + 10070a2: us. + +010070a5 <__FUNCTION__.9397>: + 10070a5: 534e4553 495f524f 6d435152 SENSOR_IRQCmd. + +010070b3 <__FUNCTION__.9404>: + 10070b3: 534e4553 435f524f 7261656c 65505449 SENSOR_ClearITPe + 10070c3: 6e69646e 74694267 ndingBit. + +010070cc <__FUNCTION__.9408>: + 10070cc: 534e4553 535f524f 65537465 72685463 SENSOR_SetSecThr + 10070dc: 6f687365 0000646c 01740174 02e8022e eshold..t.t..... + 10070ec: 05d0045c 00000744 02000000 04000300 \...D........... + 10070fc: 08000600 00000000 00010000 00040002 ................ + 100710c: 00100008 00400020 0014000c 00000000 .... .@......... + ... + 1007124: 0004a400 4150310e 59532e59 44442e53 .....1PAY.SYS.DD + 1007134: 00313046 78323025 63657200 72746120 F01.%02x.rec atr + 1007144: 72726520 3225206f 000a0d78 65736572 erro %2x...rese + 1007154: 6b6f2074 6d63000a 63000a64 6f20646d t ok..cmd..cmd o + 1007164: 59000a6b 32313343 63732032 31383769 k..YC3122 sci781 + 1007174: 6f702036 72206c6c 69656365 64206576 6 poll receive d + 1007184: 206f6d65 302e3156 0d21302e 0a0d000a emo V1.0.0!..... + 1007194: 22000a0d 776f4e20 6d695420 43207265 ..." Now Timer C + 10071a4: 6b636f6c 65724620 203a2071 48206425 lock Freq : %d H + 10071b4: 69000a7a 0a0d7172 z..irq... Index: SCI7816_EMV_L1/prj/GCC/output/ld.script =================================================================== --- /public/yc3122/trunk/SDK/ModuleDemo/SCI/SCI7816_EMV_L1/prj/GCC/output/ld.script (nonexistent) +++ /public/yc3122/trunk/SDK/ModuleDemo/SCI/SCI7816_EMV_L1/prj/GCC/output/ld.script (working copy) @@ -0,0 +1,158 @@ + /* Linker script to configure memory regions. + * Need modifying for a specific board. + * FLASH.ORIGIN: starting address of flash + * FLASH.LENGTH: length of flash + * RAM.ORIGIN: starting address of RAM bank 0 + * RAM.LENGTH: length of RAM bank 0 + */ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x1000000, LENGTH = 0x80000 /* 512K */ + RAM (rwx) : ORIGIN = 0x20004, LENGTH = 0x1FFFC /* 128K */ +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __copy_table_start__ + * __copy_table_end__ + * __zero_table_start__ + * __zero_table_end__ + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + *flash_start*.o + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > FLASH + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + + . = ALIGN(4); + __exidx_start = .; + + __etext = .; + + .data : AT (__etext) + { + __data_start__ = .; + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > RAM + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM + + .heap (COPY): + { + __end__ = .; + PROVIDE(end = .); + *(.heap*) + __HeapLimit = .; + } > RAM + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + *(.stack*) + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") +} Index: SCI7816_EMV_L1/prj/GCC/output/memmap =================================================================== --- /public/yc3122/trunk/SDK/ModuleDemo/SCI/SCI7816_EMV_L1/prj/GCC/output/memmap (nonexistent) +++ /public/yc3122/trunk/SDK/ModuleDemo/SCI/SCI7816_EMV_L1/prj/GCC/output/memmap (working copy) @@ -0,0 +1,1256 @@ +Archive member included to satisfy reference by file (symbol) + +C:/gcc-arm-none-eabi-7-2018-q2-update-win32/arm-none-eabi/lib/thumb/v6-m\libc.a(lib_a-memcpy-stub.o) + output/obj/yc_7816.o (memcpy) +C:/gcc-arm-none-eabi-7-2018-q2-update-win32/arm-none-eabi/lib/thumb/v6-m\libc.a(lib_a-memset.o) + output/obj/system.o (memset) +C:/gcc-arm-none-eabi-7-2018-q2-update-win32/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_thumb1_case_sqi.o) + output/obj/yc_sysctrl.o (__gnu_thumb1_case_sqi) +C:/gcc-arm-none-eabi-7-2018-q2-update-win32/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_thumb1_case_uqi.o) + output/obj/yc_sysctrl.o (__gnu_thumb1_case_uqi) +C:/gcc-arm-none-eabi-7-2018-q2-update-win32/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_udivsi3.o) + output/obj/system.o (__aeabi_uidiv) +C:/gcc-arm-none-eabi-7-2018-q2-update-win32/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_divsi3.o) + output/obj/yc_sysctrl.o (__aeabi_idiv) +C:/gcc-arm-none-eabi-7-2018-q2-update-win32/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_dvmd_tls.o) + C:/gcc-arm-none-eabi-7-2018-q2-update-win32/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_udivsi3.o) (__aeabi_idiv0) + +Allocating common symbols +Common symbol size file + +SCI_Struct0 0x770 output/obj/main.o +SCI_Struct1 0x770 output/obj/main.o + +Memory Configuration + +Name Origin Length Attributes +FLASH 0x01000000 0x00080000 xr +RAM 0x00020004 0x0001fffc xrw +*default* 0x00000000 0xffffffff + +Linker script and memory map + +LOAD output/obj/startup_yc3122.o +LOAD output/obj/system_yc3122.o +LOAD output/obj/system.o +LOAD output/obj/yc_uart.o +LOAD output/obj/yc_gpio.o +LOAD output/obj/yc_sysctrl.o +LOAD output/obj/yc_timer.o +LOAD output/obj/yc_bpu.o +LOAD output/obj/yc_otp.o +LOAD output/obj/yc_7816.o +LOAD output/obj/yc_7816_T0.o +LOAD output/obj/yc_7816_T1.o +LOAD output/obj/main.o +LOAD C:/gcc-arm-none-eabi-7-2018-q2-update-win32/arm-none-eabi/lib/thumb/v6-m\libm.a +LOAD C:/gcc-arm-none-eabi-7-2018-q2-update-win32/arm-none-eabi/lib/thumb/v6-m\libc.a +LOAD C:/gcc-arm-none-eabi-7-2018-q2-update-win32/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a +START GROUP +LOAD C:/gcc-arm-none-eabi-7-2018-q2-update-win32/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a +LOAD C:/gcc-arm-none-eabi-7-2018-q2-update-win32/arm-none-eabi/lib/thumb/v6-m\libc.a +END GROUP + +.text 0x01000000 0x71bd + *flash_start*.o() + *(.text*) + .text 0x01000000 0x130 output/obj/startup_yc3122.o + 0x010000cc Reset_Handler + 0x010000fe delay + 0x01000106 I2C0_IRQHandler + 0x01000106 CHGRIN_IRQHandler + 0x01000106 SDIO_IRQHandler + 0x01000106 EXTI3_IRQHandler + 0x01000106 I2C1_IRQHandler + 0x01000106 UART1_IRQHandler + 0x01000106 UART0_IRQHandler + 0x01000106 EXTI2_IRQHandler + 0x01000106 EXTI0_IRQHandler + 0x01000106 MEMCP_IRQHandler + 0x01000106 SEC_IRQHandler + 0x01000106 SPI1_IRQHandler + 0x01000106 SYSTICK_IRQHandler + 0x01000106 DCMI_IRQHandler + 0x01000106 RTC_IRQHandler + 0x01000106 POWER_IRQHandler + 0x01000106 SOFTWARE_IRQHandler + 0x01000106 UART2_IRQHandler + 0x01000106 PENDSV_IRQHandler + 0x01000106 Default_Handler + 0x01000106 ADC_IRQHandler + 0x01000106 SM4_IRQHandler + 0x01000106 USB_IRQHandler + 0x01000106 RISCV_IRQHandler + 0x01000106 WDT_IRQHandler + 0x01000106 EXTI4_IRQHandler + 0x01000106 GPIO_IRQHandler + 0x01000106 BIN_IRQHandler + 0x01000106 PSARM_IRQHandler + 0x01000106 VBAT_IRQHandler + 0x01000106 RSA_IRQHandler + 0x01000106 MSR_IRQHandler + 0x01000106 EXTI1_IRQHandler + 0x01000106 SPI0_IRQHandler + 0x01000106 HSPI_IRQHandler + 0x01000106 UART3_IRQHandler + 0x01000106 QSPI_IRQHandler + 0x01000106 SVC_IRQHandler + 0x01000106 TRNG_IRQHandler + 0x01000106 HARD_FAULT_IRQHandler + .text 0x01000130 0x0 output/obj/system_yc3122.o + .text.SystemCoreClockUpdate + 0x01000130 0x10 output/obj/system_yc3122.o + 0x01000130 SystemCoreClockUpdate + .text.SystemInit + 0x01000140 0x2 output/obj/system_yc3122.o + 0x01000140 SystemInit + .text 0x01000142 0x0 output/obj/system.o + *fill* 0x01000142 0x2 + .text.print_char + 0x01000144 0xc output/obj/system.o + 0x01000144 print_char + .text.printfsend + 0x01000150 0x28 output/obj/system.o + 0x01000150 printfsend + .text.MyPrintf + 0x01000178 0x1f4 output/obj/system.o + 0x01000178 MyPrintf + .text.printv 0x0100036c 0x54 output/obj/system.o + 0x0100036c printv + .text.PrintPort_Set + 0x010003c0 0x24 output/obj/system.o + 0x010003c0 PrintPort_Set + .text.Board_Init + 0x010003e4 0x11c output/obj/system.o + 0x010003e4 Board_Init + .text._assert_handler + 0x01000500 0x20 output/obj/system.o + 0x01000500 _assert_handler + .text 0x01000520 0x0 output/obj/yc_uart.o + .text.UART_DeInit + 0x01000520 0x44 output/obj/yc_uart.o + 0x01000520 UART_DeInit + .text.UART_Init + 0x01000564 0x210 output/obj/yc_uart.o + 0x01000564 UART_Init + .text.UART_StructInit + 0x01000774 0x12 output/obj/yc_uart.o + 0x01000774 UART_StructInit + *fill* 0x01000786 0x2 + .text.UART_ITConfig + 0x01000788 0x70 output/obj/yc_uart.o + 0x01000788 UART_ITConfig + .text.UART_SendData + 0x010007f8 0x68 output/obj/yc_uart.o + 0x010007f8 UART_SendData + .text.UART_SendBuf + 0x01000860 0x98 output/obj/yc_uart.o + 0x01000860 UART_SendBuf + .text.UART_ReceiveData + 0x010008f8 0x44 output/obj/yc_uart.o + 0x010008f8 UART_ReceiveData + .text.UART_ReceiveBuf + 0x0100093c 0x88 output/obj/yc_uart.o + 0x0100093c UART_ReceiveBuf + .text.UART_AutoFlowCtrlCmd + 0x010009c4 0x54 output/obj/yc_uart.o + 0x010009c4 UART_AutoFlowCtrlCmd + .text.UART_GetITIdentity + 0x01000a18 0x54 output/obj/yc_uart.o + 0x01000a18 UART_GetITIdentity + .text.UART_IsRXFIFOFull + 0x01000a6c 0x48 output/obj/yc_uart.o + 0x01000a6c UART_IsRXFIFOFull + .text.UART_IsRXFIFONotEmpty + 0x01000ab4 0x4c output/obj/yc_uart.o + 0x01000ab4 UART_IsRXFIFONotEmpty + .text.UART_IsBusy + 0x01000b00 0x4c output/obj/yc_uart.o + 0x01000b00 UART_IsBusy + .text.UART_SetITTimeout + 0x01000b4c 0x48 output/obj/yc_uart.o + 0x01000b4c UART_SetITTimeout + .text.UART_SetRxITNum + 0x01000b94 0x48 output/obj/yc_uart.o + 0x01000b94 UART_SetRxITNum + .text.UART_ReceiveDataLen + 0x01000bdc 0x50 output/obj/yc_uart.o + 0x01000bdc UART_ReceiveDataLen + .text 0x01000c2c 0x0 output/obj/yc_gpio.o + .text.UnMap 0x01000c2c 0x1c output/obj/yc_gpio.o + 0x01000c2c UnMap + .text.GPIO_Config + 0x01000c48 0xb0 output/obj/yc_gpio.o + 0x01000c48 GPIO_Config + .text.GPIO_Init + 0x01000cf8 0x74 output/obj/yc_gpio.o + 0x01000cf8 GPIO_Init + .text.GPIO_PullUpCmd + 0x01000d6c 0x90 output/obj/yc_gpio.o + 0x01000d6c GPIO_PullUpCmd + .text.GPIO_ReadInputData + 0x01000dfc 0x2c output/obj/yc_gpio.o + 0x01000dfc GPIO_ReadInputData + .text.GPIO_ReadInputDataBit + 0x01000e28 0xb0 output/obj/yc_gpio.o + 0x01000e28 GPIO_ReadInputDataBit + .text.GPIO_ReadOutputData + 0x01000ed8 0x2c output/obj/yc_gpio.o + 0x01000ed8 GPIO_ReadOutputData + .text.GPIO_ReadOutputDataBit + 0x01000f04 0xb0 output/obj/yc_gpio.o + 0x01000f04 GPIO_ReadOutputDataBit + .text.GPIO_ResetBit + 0x01000fb4 0xb0 output/obj/yc_gpio.o + 0x01000fb4 GPIO_ResetBit + .text.GPIO_ResetBits + 0x01001064 0x5c output/obj/yc_gpio.o + 0x01001064 GPIO_ResetBits + .text.GPIO_SetBit + 0x010010c0 0xb0 output/obj/yc_gpio.o + 0x010010c0 GPIO_SetBit + .text.GPIO_SetBits + 0x01001170 0x5c output/obj/yc_gpio.o + 0x01001170 GPIO_SetBits + .text.GPIO_Write + 0x010011cc 0x44 output/obj/yc_gpio.o + 0x010011cc GPIO_Write + .text.GPIO_WriteBit + 0x01001210 0xbc output/obj/yc_gpio.o + 0x01001210 GPIO_WriteBit + .text.GPIO_ODSet + 0x010012cc 0x40 output/obj/yc_gpio.o + 0x010012cc GPIO_ODSet + .text 0x0100130c 0x0 output/obj/yc_sysctrl.o + .text.SYSCTRL_AHBPeriphClockCmd + 0x0100130c 0x3c output/obj/yc_sysctrl.o + 0x0100130c SYSCTRL_AHBPeriphClockCmd + .text.SYSCTRL_APBPeriphClockCmd + 0x01001348 0x3c output/obj/yc_sysctrl.o + 0x01001348 SYSCTRL_APBPeriphClockCmd + .text.SYSCTRL_RVPeriphClockCmd + 0x01001384 0x3c output/obj/yc_sysctrl.o + 0x01001384 SYSCTRL_RVPeriphClockCmd + .text.SYSCTRL_RC48MPeriphClockCmd + 0x010013c0 0x24 output/obj/yc_sysctrl.o + 0x010013c0 SYSCTRL_RC48MPeriphClockCmd + .text.SYSCTRL_HCLKPeriphSelect + 0x010013e4 0x68 output/obj/yc_sysctrl.o + 0x010013e4 SYSCTRL_HCLKPeriphSelect + .text.SYSCTRL_MCUClkRandCmd + 0x0100144c 0x1c output/obj/yc_sysctrl.o + 0x0100144c SYSCTRL_MCUClkRandCmd + .text.SYSCTRL_MCUClkRandMask + 0x01001468 0x3c output/obj/yc_sysctrl.o + 0x01001468 SYSCTRL_MCUClkRandMask + .text.SYSCTRL_PLLFreqConfig + 0x010014a4 0x28 output/obj/yc_sysctrl.o + 0x010014a4 SYSCTRL_PLLFreqConfig + .text.SYSCTRL_PLLCrystalConfig + 0x010014cc 0xa4 output/obj/yc_sysctrl.o + 0x010014cc SYSCTRL_PLLCrystalConfig + .text.SYSCTRL_PLLOpen + 0x01001570 0x17c output/obj/yc_sysctrl.o + 0x01001570 SYSCTRL_PLLOpen + .text.SYSCTRL_PLLClose + 0x010016ec 0x70 output/obj/yc_sysctrl.o + 0x010016ec SYSCTRL_PLLClose + .text.SYSCTRL_PLLDeInit + 0x0100175c 0x90 output/obj/yc_sysctrl.o + 0x0100175c SYSCTRL_PLLDeInit + .text.SYSCTRL_GetPllFreq + 0x010017ec 0x44 output/obj/yc_sysctrl.o + .text.SYSCTRL_MCUClkCtrl + 0x01001830 0x1ac output/obj/yc_sysctrl.o + 0x01001830 SYSCTRL_MCUClkCtrl + .text.SYSCTRL_PER1AhbClkCtrl + 0x010019dc 0xe4 output/obj/yc_sysctrl.o + 0x010019dc SYSCTRL_PER1AhbClkCtrl + .text.SYSCTRL_PER1QspiClkCtrl + 0x01001ac0 0xe8 output/obj/yc_sysctrl.o + 0x01001ac0 SYSCTRL_PER1QspiClkCtrl + .text.SYSCTRL_PER2PsramClkCtrl + 0x01001ba8 0xec output/obj/yc_sysctrl.o + 0x01001ba8 SYSCTRL_PER2PsramClkCtrl + .text.SYSCTRL_PER2HspiClkCtrl + 0x01001c94 0x100 output/obj/yc_sysctrl.o + 0x01001c94 SYSCTRL_PER2HspiClkCtrl + .text.SYSCTRL_EnableFixed48MConfig + 0x01001d94 0x1e output/obj/yc_sysctrl.o + *fill* 0x01001db2 0x2 + .text.SYSCTRL_PER3IceClkCtrl + 0x01001db4 0x7c output/obj/yc_sysctrl.o + 0x01001db4 SYSCTRL_PER3IceClkCtrl + .text.SYSCTRL_PER3AdacClkCtrl + 0x01001e30 0x8c output/obj/yc_sysctrl.o + 0x01001e30 SYSCTRL_PER3AdacClkCtrl + .text.SYSCTRL_PER3Gpio0ClkCtrl + 0x01001ebc 0x8c output/obj/yc_sysctrl.o + 0x01001ebc SYSCTRL_PER3Gpio0ClkCtrl + .text.SYSCTRL_PER3Gpio1ClkCtrl + 0x01001f48 0x88 output/obj/yc_sysctrl.o + 0x01001f48 SYSCTRL_PER3Gpio1ClkCtrl + .text.SYSCTRL_RSAClkRandCmd + 0x01001fd0 0x18 output/obj/yc_sysctrl.o + 0x01001fd0 SYSCTRL_RSAClkRandCmd + .text.SYSCTRL_RSAClkRandMask + 0x01001fe8 0x3c output/obj/yc_sysctrl.o + 0x01001fe8 SYSCTRL_RSAClkRandMask + .text.SYSCTRL_RSAClkCtrl + 0x01002024 0xcc output/obj/yc_sysctrl.o + 0x01002024 SYSCTRL_RSAClkCtrl + .text.SYSCTRL_GetMcuClkFreq + 0x010020f0 0x64 output/obj/yc_sysctrl.o + .text.SYSCTRL_GetClocksFreq + 0x01002154 0x24c output/obj/yc_sysctrl.o + 0x01002154 SYSCTRL_GetClocksFreq + .text.SYSCTRL_DeepSleep_flashPowerDown + 0x010023a0 0x70 output/obj/yc_sysctrl.o + 0x010023a0 SYSCTRL_DeepSleep_flashPowerDown + .text.SYSCTRL_DeepSleep + 0x01002410 0x24 output/obj/yc_sysctrl.o + 0x01002410 SYSCTRL_DeepSleep + .text.lightsleep_enter + 0x01002434 0x78 output/obj/yc_sysctrl.o + .text.SYSCTRL_LightSleep + 0x010024ac 0xd4 output/obj/yc_sysctrl.o + 0x010024ac SYSCTRL_LightSleep + .text.SYSCTRL_LightSleepWakeSrcIT + 0x01002580 0x16 output/obj/yc_sysctrl.o + 0x01002580 SYSCTRL_LightSleepWakeSrcIT + *fill* 0x01002596 0x2 + .text.SYSCTRL_DeepSleepGpioWake + 0x01002598 0x6c output/obj/yc_sysctrl.o + .text.SYSCTRL_DeepSleepLseRtcWake + 0x01002604 0x14 output/obj/yc_sysctrl.o + .text.SYSCTRL_DeepSleepLsiRtcWake + 0x01002618 0x14 output/obj/yc_sysctrl.o + .text.SYSCTRL_DeepSleepSecWake + 0x0100262c 0x14 output/obj/yc_sysctrl.o + .text.SYSCTRL_DeepSleepHChgrWake + 0x01002640 0x2c output/obj/yc_sysctrl.o + .text.SYSCTRL_DeepSleepLChgrWake + 0x0100266c 0x2c output/obj/yc_sysctrl.o + .text.SYSCTRL_DeepSleepPowerKeyWake + 0x01002698 0x20 output/obj/yc_sysctrl.o + .text.SYSCTRL_DeepSleepWakeSrcIT + 0x010026b8 0x9c output/obj/yc_sysctrl.o + 0x010026b8 SYSCTRL_DeepSleepWakeSrcIT + .text.SYSCTRL_SoftReset + 0x01002754 0x20 output/obj/yc_sysctrl.o + 0x01002754 SYSCTRL_SoftReset + .text.SYSCTRL_PowerOff + 0x01002774 0x84 output/obj/yc_sysctrl.o + 0x01002774 SYSCTRL_PowerOff + .text.LPM_RegisterClk.constprop.2 + 0x010027f8 0x18 output/obj/yc_sysctrl.o + .text.LPM_AccessCode.constprop.3 + 0x01002810 0x24 output/obj/yc_sysctrl.o + .text 0x01002834 0x0 output/obj/yc_timer.o + .text.delay_ms + 0x01002834 0xc output/obj/yc_timer.o + 0x01002834 delay_ms + .text.delay_us + 0x01002840 0xc output/obj/yc_timer.o + 0x01002840 delay_us + .text.TIM_Init + 0x0100284c 0x90 output/obj/yc_timer.o + 0x0100284c TIM_Init + .text.TIM_DeInit + 0x010028dc 0x28 output/obj/yc_timer.o + 0x010028dc TIM_DeInit + .text.TIM_Cmd 0x01002904 0x6c output/obj/yc_timer.o + 0x01002904 TIM_Cmd + .text.TIM_ModeConfig + 0x01002970 0x78 output/obj/yc_timer.o + 0x01002970 TIM_ModeConfig + .text.TIM_SetPeriod + 0x010029e8 0x38 output/obj/yc_timer.o + 0x010029e8 TIM_SetPeriod + .text.TIM_PWMInit + 0x01002a20 0x98 output/obj/yc_timer.o + 0x01002a20 TIM_PWMInit + .text.TIM_SetPWMPeriod + 0x01002ab8 0x44 output/obj/yc_timer.o + 0x01002ab8 TIM_SetPWMPeriod + .text.TIM_ITConfig + 0x01002afc 0x70 output/obj/yc_timer.o + 0x01002afc TIM_ITConfig + .text.TIM_ClearITPendingBit + 0x01002b6c 0x5c output/obj/yc_timer.o + 0x01002b6c TIM_ClearITPendingBit + .text.TIM_GetITStatus + 0x01002bc8 0x44 output/obj/yc_timer.o + 0x01002bc8 TIM_GetITStatus + .text.TIM_GetAllITStatus + 0x01002c0c 0x2c output/obj/yc_timer.o + 0x01002c0c TIM_GetAllITStatus + .text 0x01002c38 0x0 output/obj/yc_bpu.o + .text.BPU_Init + 0x01002c38 0x48 output/obj/yc_bpu.o + 0x01002c38 BPU_Init + .text.BPU_Reset + 0x01002c80 0x20 output/obj/yc_bpu.o + 0x01002c80 BPU_Reset + .text.BPU_ITCmd + 0x01002ca0 0x20 output/obj/yc_bpu.o + 0x01002ca0 BPU_ITCmd + .text.BPK_WriteKey + 0x01002cc0 0x28 output/obj/yc_bpu.o + 0x01002cc0 BPK_WriteKey + .text.BPK_ReadKey + 0x01002ce8 0x28 output/obj/yc_bpu.o + 0x01002ce8 BPK_ReadKey + .text.BPK_KeyClear + 0x01002d10 0x30 output/obj/yc_bpu.o + 0x01002d10 BPK_KeyClear + .text.BPK_AlterClearKey + 0x01002d40 0x40 output/obj/yc_bpu.o + 0x01002d40 BPK_AlterClearKey + .text.BPK_KeyWriteLock + 0x01002d80 0x5c output/obj/yc_bpu.o + 0x01002d80 BPK_KeyWriteLock + .text.BPK_KeyReadLock + 0x01002ddc 0x5c output/obj/yc_bpu.o + 0x01002ddc BPK_KeyReadLock + .text.BPK_Lock + 0x01002e38 0x3c output/obj/yc_bpu.o + 0x01002e38 BPK_Lock + .text.BPK_LockSelf + 0x01002e74 0x10 output/obj/yc_bpu.o + 0x01002e74 BPK_LockSelf + .text.BPK_GetLockStatus + 0x01002e84 0x34 output/obj/yc_bpu.o + 0x01002e84 BPK_GetLockStatus + .text.SENSOR_EXTInit + 0x01002eb8 0x3c8 output/obj/yc_bpu.o + 0x01002eb8 SENSOR_EXTInit + .text.SENSOR_EXTPortCmd + 0x01003280 0x70 output/obj/yc_bpu.o + 0x01003280 SENSOR_EXTPortCmd + .text.SENSOR_ANAConfig + 0x010032f0 0x5c output/obj/yc_bpu.o + 0x010032f0 SENSOR_ANAConfig + .text.SENSOR_ANACmd + 0x0100334c 0xfc output/obj/yc_bpu.o + 0x0100334c SENSOR_ANACmd + .text.SENSOR_ChkConfig + 0x01003448 0x74 output/obj/yc_bpu.o + 0x01003448 SENSOR_ChkConfig + .text.SENSOR_Config + 0x010034bc 0xb8 output/obj/yc_bpu.o + 0x010034bc SENSOR_Config + .text.SENSOR_ANADvddLpmConfig + 0x01003574 0x1c output/obj/yc_bpu.o + 0x01003574 SENSOR_ANADvddLpmConfig + .text.SENSOR_ANAVbutConfig + 0x01003590 0x30 output/obj/yc_bpu.o + 0x01003590 SENSOR_ANAVbutConfig + .text.SENSOR_ANATsConfig + 0x010035c0 0x30 output/obj/yc_bpu.o + 0x010035c0 SENSOR_ANATsConfig + .text.SENSOR_ShieldConfig + 0x010035f0 0x58 output/obj/yc_bpu.o + 0x010035f0 SENSOR_ShieldConfig + .text.SENSOR_ShieldPortCmd + 0x01003648 0x6c output/obj/yc_bpu.o + 0x01003648 SENSOR_ShieldPortCmd + .text.SENSOR_SecLockConfig + 0x010036b4 0x4c output/obj/yc_bpu.o + 0x010036b4 SENSOR_SecLockConfig + .text.SENSOR_GetITStatus + 0x01003700 0x38 output/obj/yc_bpu.o + 0x01003700 SENSOR_GetITStatus + .text.SENSOR_GetITStatusReg + 0x01003738 0xc output/obj/yc_bpu.o + 0x01003738 SENSOR_GetITStatusReg + .text.SENSOR_IRQCmd + 0x01003744 0x38 output/obj/yc_bpu.o + 0x01003744 SENSOR_IRQCmd + .text.SENSOR_ClearITPending + 0x0100377c 0xc output/obj/yc_bpu.o + 0x0100377c SENSOR_ClearITPending + .text.SENSOR_ClearITPendingBit + 0x01003788 0x30 output/obj/yc_bpu.o + 0x01003788 SENSOR_ClearITPendingBit + .text.SENSOR_SetSecThreshold + 0x010037b8 0x3c output/obj/yc_bpu.o + 0x010037b8 SENSOR_SetSecThreshold + .text.SENSOR_GetSecCnt + 0x010037f4 0x10 output/obj/yc_bpu.o + 0x010037f4 SENSOR_GetSecCnt + .text.SENSOR_ClearSecCount + 0x01003804 0x14 output/obj/yc_bpu.o + 0x01003804 SENSOR_ClearSecCount + .text 0x01003818 0x0 output/obj/yc_otp.o + .text.init_otp + 0x01003818 0xc output/obj/yc_otp.o + 0x01003818 init_otp + .text.deinit_otp + 0x01003824 0xc output/obj/yc_otp.o + 0x01003824 deinit_otp + .text.read_chipid + 0x01003830 0x18 output/obj/yc_otp.o + 0x01003830 read_chipid + .text.read_chip_life + 0x01003848 0x18 output/obj/yc_otp.o + 0x01003848 read_chip_life + .text.read_otp + 0x01003860 0x24 output/obj/yc_otp.o + 0x01003860 read_otp + .text.dataxor_otp + 0x01003884 0x1e output/obj/yc_otp.o + 0x01003884 dataxor_otp + *fill* 0x010038a2 0x2 + .text.write_otp + 0x010038a4 0x50 output/obj/yc_otp.o + 0x010038a4 write_otp + .text 0x010038f4 0x0 output/obj/yc_7816.o + .text.ISO7816_Init + 0x010038f4 0x11c output/obj/yc_7816.o + 0x010038f4 ISO7816_Init + .text.ISO7816_Detect_Io_State + 0x01003a10 0xc output/obj/yc_7816.o + 0x01003a10 ISO7816_Detect_Io_State + .text.ISO7816_Vcard_Control + 0x01003a1c 0x80 output/obj/yc_7816.o + 0x01003a1c ISO7816_Vcard_Control + .text.ISO7816_TXRX_TIME_Init + 0x01003a9c 0x40 output/obj/yc_7816.o + 0x01003a9c ISO7816_TXRX_TIME_Init + .text.ISO7816_Reg_Init + 0x01003adc 0xa6 output/obj/yc_7816.o + 0x01003adc ISO7816_Reg_Init + *fill* 0x01003b82 0x2 + .text.ISO7816_RX_APDU_Config + 0x01003b84 0x3c output/obj/yc_7816.o + 0x01003b84 ISO7816_RX_APDU_Config + .text.ISO7816_TX_First_Byte_Enable + 0x01003bc0 0xe output/obj/yc_7816.o + 0x01003bc0 ISO7816_TX_First_Byte_Enable + *fill* 0x01003bce 0x2 + .text.ISO7816_TX_APDU_Config + 0x01003bd0 0x78 output/obj/yc_7816.o + 0x01003bd0 ISO7816_TX_APDU_Config + .text.ISO7816_Deactive + 0x01003c48 0xa8 output/obj/yc_7816.o + 0x01003c48 ISO7816_Deactive + .text.ISO7816_Atr_Timer_Start + 0x01003cf0 0x4c output/obj/yc_7816.o + 0x01003cf0 ISO7816_Atr_Timer_Start + .text.ISO7816_RecAtrBytes + 0x01003d3c 0x2cc output/obj/yc_7816.o + 0x01003d3c ISO7816_RecAtrBytes + .text.ISO7816_Cold_Reset + 0x01004008 0x3d0 output/obj/yc_7816.o + 0x01004008 ISO7816_Cold_Reset + .text.ISO7816_Warm_Reset + 0x010043d8 0x170 output/obj/yc_7816.o + 0x010043d8 ISO7816_Warm_Reset + .text.ISO7816_Config_Mode_Fun + 0x01004548 0x48 output/obj/yc_7816.o + 0x01004548 ISO7816_Config_Mode_Fun + .text.ISO7816_GetAtr_LOOP + 0x01004590 0x270 output/obj/yc_7816.o + 0x01004590 ISO7816_GetAtr_LOOP + .text.ISO7816_DisposeATR + 0x01004800 0x278 output/obj/yc_7816.o + 0x01004800 ISO7816_DisposeATR + .text.ISO7816_OperateSelect + 0x01004a78 0x6a output/obj/yc_7816.o + 0x01004a78 ISO7816_OperateSelect + .text.ISO7816_DisposePPS + 0x01004ae2 0x56 output/obj/yc_7816.o + 0x01004ae2 ISO7816_DisposePPS + .text.ISO7816_Dispose_CMD_LOOP + 0x01004b38 0x30 output/obj/yc_7816.o + 0x01004b38 ISO7816_Dispose_CMD_LOOP + .text.ISO7816_LoopBack + 0x01004b68 0x1d8 output/obj/yc_7816.o + 0x01004b68 ISO7816_LoopBack + .text.ISO7816_Dispose_CMD_LOOP.part.6 + 0x01004d40 0x110 output/obj/yc_7816.o + .text 0x01004e50 0x0 output/obj/yc_7816_T0.o + .text.ISO7816_RecBytes + 0x01004e50 0x274 output/obj/yc_7816_T0.o + 0x01004e50 ISO7816_RecBytes + .text.ISO7816_SendBytes_T0 + 0x010050c4 0x204 output/obj/yc_7816_T0.o + 0x010050c4 ISO7816_SendBytes_T0 + .text.ISO7816_TPDU_T0_LOOP + 0x010052c8 0x1ba output/obj/yc_7816_T0.o + 0x010052c8 ISO7816_TPDU_T0_LOOP + .text 0x01005482 0x0 output/obj/yc_7816_T1.o + .text.ISO7816_CalcLRC + 0x01005482 0x28 output/obj/yc_7816_T1.o + 0x01005482 ISO7816_CalcLRC + .text.ISO7816_CheckLRC + 0x010054aa 0x24 output/obj/yc_7816_T1.o + 0x010054aa ISO7816_CheckLRC + *fill* 0x010054ce 0x2 + .text.ISO7816_SendBytes_T1 + 0x010054d0 0x204 output/obj/yc_7816_T1.o + 0x010054d0 ISO7816_SendBytes_T1 + .text.ISO7816_RecBlock_DATA + 0x010056d4 0x280 output/obj/yc_7816_T1.o + 0x010056d4 ISO7816_RecBlock_DATA + .text.ISO7816_SendBlock_Soft + 0x01005954 0x16 output/obj/yc_7816_T1.o + 0x01005954 ISO7816_SendBlock_Soft + .text.ISO7816_read_recfifo + 0x0100596a 0x26 output/obj/yc_7816_T1.o + 0x0100596a ISO7816_read_recfifo + .text.ISO7816_RecBlock_Soft + 0x01005990 0x66 output/obj/yc_7816_T1.o + 0x01005990 ISO7816_RecBlock_Soft + .text.ISO7816_T1_Is_Blk_Valid + 0x010059f6 0xca output/obj/yc_7816_T1.o + 0x010059f6 ISO7816_T1_Is_Blk_Valid + .text.ISO7816_TPDU_T1Rec_LOOP + 0x01005ac0 0x28c output/obj/yc_7816_T1.o + 0x01005ac0 ISO7816_TPDU_T1Rec_LOOP + .text.ISO7816_TPDU_T1Send_LOOP + 0x01005d4c 0x370 output/obj/yc_7816_T1.o + 0x01005d4c ISO7816_TPDU_T1Send_LOOP + .text.ISO7816_TPDU_T1 + 0x010060bc 0x76 output/obj/yc_7816_T1.o + 0x010060bc ISO7816_TPDU_T1 + .text.ISO7816_SendBlock_Soft.part.3 + 0x01006132 0x9c output/obj/yc_7816_T1.o + .text 0x010061ce 0x0 output/obj/main.o + *fill* 0x010061ce 0x2 + .text.startup.main + 0x010061d0 0x64 output/obj/main.o + 0x010061d0 main + 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(ORIGIN (RAM) + LENGTH (RAM)) + 0x00040000 __StackLimit = (__StackTop - SIZEOF (.stack_dummy)) + [!provide] PROVIDE (__stack = __StackTop) + 0x00000001 ASSERT ((__StackLimit >= __HeapLimit), region RAM overflowed with stack) +OUTPUT(output/out elf32-littlearm) + +.ARM.attributes + 0x00000000 0x2d + .ARM.attributes + 0x00000000 0x21 output/obj/startup_yc3122.o + .ARM.attributes + 0x00000021 0x31 output/obj/system_yc3122.o + .ARM.attributes + 0x00000052 0x31 output/obj/system.o + .ARM.attributes + 0x00000083 0x31 output/obj/yc_uart.o + .ARM.attributes + 0x000000b4 0x31 output/obj/yc_gpio.o + .ARM.attributes + 0x000000e5 0x31 output/obj/yc_sysctrl.o + .ARM.attributes + 0x00000116 0x31 output/obj/yc_timer.o + .ARM.attributes + 0x00000147 0x31 output/obj/yc_bpu.o + .ARM.attributes + 0x00000178 0x31 output/obj/yc_otp.o + .ARM.attributes + 0x000001a9 0x31 output/obj/yc_7816.o + .ARM.attributes + 0x000001da 0x31 output/obj/yc_7816_T0.o + .ARM.attributes + 0x0000020b 0x31 output/obj/yc_7816_T1.o + .ARM.attributes + 0x0000023c 0x31 output/obj/main.o + .ARM.attributes + 0x0000026d 0x2c C:/gcc-arm-none-eabi-7-2018-q2-update-win32/arm-none-eabi/lib/thumb/v6-m\libc.a(lib_a-memcpy-stub.o) + .ARM.attributes + 0x00000299 0x2c C:/gcc-arm-none-eabi-7-2018-q2-update-win32/arm-none-eabi/lib/thumb/v6-m\libc.a(lib_a-memset.o) + .ARM.attributes + 0x000002c5 0x1e C:/gcc-arm-none-eabi-7-2018-q2-update-win32/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_thumb1_case_sqi.o) + .ARM.attributes + 0x000002e3 0x1e C:/gcc-arm-none-eabi-7-2018-q2-update-win32/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_thumb1_case_uqi.o) + .ARM.attributes + 0x00000301 0x1e C:/gcc-arm-none-eabi-7-2018-q2-update-win32/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_udivsi3.o) + .ARM.attributes + 0x0000031f 0x1e C:/gcc-arm-none-eabi-7-2018-q2-update-win32/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_divsi3.o) + .ARM.attributes + 0x0000033d 0x1e C:/gcc-arm-none-eabi-7-2018-q2-update-win32/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m\libgcc.a(_dvmd_tls.o) + +.comment 0x00000000 0x7f + .comment 0x00000000 0x7f output/obj/system_yc3122.o + 0x80 (size before relaxing) + .comment 0x0000007f 0x80 output/obj/system.o + .comment 0x0000007f 0x80 output/obj/yc_uart.o + .comment 0x0000007f 0x80 output/obj/yc_gpio.o + .comment 0x0000007f 0x80 output/obj/yc_sysctrl.o + .comment 0x0000007f 0x80 output/obj/yc_timer.o + .comment 0x0000007f 0x80 output/obj/yc_bpu.o + .comment 0x0000007f 0x80 output/obj/yc_otp.o + .comment 0x0000007f 0x80 output/obj/yc_7816.o + .comment 0x0000007f 0x80 output/obj/yc_7816_T0.o + .comment 0x0000007f 0x80 output/obj/yc_7816_T1.o + .comment 0x0000007f 0x80 output/obj/main.o + +.debug_info 0x00000000 0x1bb40 + .debug_info 0x00000000 0x8e5 output/obj/system_yc3122.o + .debug_info 0x000008e5 0x1556 output/obj/system.o + .debug_info 0x00001e3b 0x1a0a output/obj/yc_uart.o + .debug_info 0x00003845 0x1f3e output/obj/yc_gpio.o + .debug_info 0x00005783 0x55e9 output/obj/yc_sysctrl.o + .debug_info 0x0000ad6c 0x164e output/obj/yc_timer.o + .debug_info 0x0000c3ba 0x3d19 output/obj/yc_bpu.o + .debug_info 0x000100d3 0xbb5 output/obj/yc_otp.o + .debug_info 0x00010c88 0x3bdc output/obj/yc_7816.o + .debug_info 0x00014864 0x20a0 output/obj/yc_7816_T0.o + .debug_info 0x00016904 0x2c8d output/obj/yc_7816_T1.o + .debug_info 0x00019591 0x25af output/obj/main.o + +.debug_abbrev 0x00000000 0x2bab + .debug_abbrev 0x00000000 0x1b4 output/obj/system_yc3122.o + .debug_abbrev 0x000001b4 0x412 output/obj/system.o + .debug_abbrev 0x000005c6 0x3ad output/obj/yc_uart.o + .debug_abbrev 0x00000973 0x2e9 output/obj/yc_gpio.o + .debug_abbrev 0x00000c5c 0x579 output/obj/yc_sysctrl.o + .debug_abbrev 0x000011d5 0x328 output/obj/yc_timer.o + .debug_abbrev 0x000014fd 0x3da output/obj/yc_bpu.o + .debug_abbrev 0x000018d7 0x2df output/obj/yc_otp.o + .debug_abbrev 0x00001bb6 0x4f9 output/obj/yc_7816.o + .debug_abbrev 0x000020af 0x360 output/obj/yc_7816_T0.o + .debug_abbrev 0x0000240f 0x461 output/obj/yc_7816_T1.o + .debug_abbrev 0x00002870 0x33b output/obj/main.o + +.debug_aranges 0x00000000 0x700 + .debug_aranges + 0x00000000 0x28 output/obj/system_yc3122.o + .debug_aranges + 0x00000028 0x50 output/obj/system.o + .debug_aranges + 0x00000078 0x98 output/obj/yc_uart.o + .debug_aranges + 0x00000110 0x90 output/obj/yc_gpio.o + .debug_aranges + 0x000001a0 0x180 output/obj/yc_sysctrl.o + .debug_aranges + 0x00000320 0x80 output/obj/yc_timer.o + .debug_aranges + 0x000003a0 0x118 output/obj/yc_bpu.o + .debug_aranges + 0x000004b8 0x50 output/obj/yc_otp.o + .debug_aranges + 0x00000508 0xc0 output/obj/yc_7816.o + .debug_aranges + 0x000005c8 0x30 output/obj/yc_7816_T0.o + .debug_aranges + 0x000005f8 0x78 output/obj/yc_7816_T1.o + .debug_aranges + 0x00000670 0x90 output/obj/main.o + +.debug_ranges 0x00000000 0xae0 + .debug_ranges 0x00000000 0x18 output/obj/system_yc3122.o + .debug_ranges 0x00000018 0xb8 output/obj/system.o + .debug_ranges 0x000000d0 0xc8 output/obj/yc_uart.o + .debug_ranges 0x00000198 0x80 output/obj/yc_gpio.o + .debug_ranges 0x00000218 0x2a0 output/obj/yc_sysctrl.o + .debug_ranges 0x000004b8 0x70 output/obj/yc_timer.o + .debug_ranges 0x00000528 0x158 output/obj/yc_bpu.o + .debug_ranges 0x00000680 0x78 output/obj/yc_otp.o + .debug_ranges 0x000006f8 0x190 output/obj/yc_7816.o + .debug_ranges 0x00000888 0x50 output/obj/yc_7816_T0.o + .debug_ranges 0x000008d8 0x188 output/obj/yc_7816_T1.o + .debug_ranges 0x00000a60 0x80 output/obj/main.o + +.debug_line 0x00000000 0x417d + .debug_line 0x00000000 0x217 output/obj/system_yc3122.o + .debug_line 0x00000217 0x425 output/obj/system.o + .debug_line 0x0000063c 0x589 output/obj/yc_uart.o + .debug_line 0x00000bc5 0x528 output/obj/yc_gpio.o + .debug_line 0x000010ed 0xb2e output/obj/yc_sysctrl.o + .debug_line 0x00001c1b 0x413 output/obj/yc_timer.o + .debug_line 0x0000202e 0x768 output/obj/yc_bpu.o + .debug_line 0x00002796 0x293 output/obj/yc_otp.o + .debug_line 0x00002a29 0x91d output/obj/yc_7816.o + .debug_line 0x00003346 0x3b3 output/obj/yc_7816_T0.o + .debug_line 0x000036f9 0x68e output/obj/yc_7816_T1.o + .debug_line 0x00003d87 0x3f6 output/obj/main.o + +.debug_str 0x00000000 0x4bff + .debug_str 0x00000000 0x580 output/obj/system_yc3122.o + 0x5ee (size before relaxing) + .debug_str 0x00000580 0x668 output/obj/system.o + 0xc34 (size before relaxing) + .debug_str 0x00000be8 0x27b output/obj/yc_uart.o + 0x9ac (size before relaxing) + .debug_str 0x00000e63 0x2ed output/obj/yc_gpio.o + 0xa09 (size before relaxing) + .debug_str 0x00001150 0x1f15 output/obj/yc_sysctrl.o + 0x2872 (size before relaxing) + .debug_str 0x00003065 0x31a output/obj/yc_timer.o + 0x913 (size before relaxing) + .debug_str 0x0000337f 0x921 output/obj/yc_bpu.o + 0x1835 (size before relaxing) + .debug_str 0x00003ca0 0xaf output/obj/yc_otp.o + 0x65f (size before relaxing) + .debug_str 0x00003d4f 0xaf6 output/obj/yc_7816.o + 0x16a0 (size before relaxing) + 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+ 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + yc3122 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 4 + + + + + + + + + + ..\..\..\..\..\ConfigFiles\MDK\flash.ini + Segger\JL2CM3.dll + + + + 0 + JL2CM3 + -U788594195 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO31 -FD20000 -FCA000 -FN1 -FF0YC3122_x.FLM -FS01000000 -FL080000 -FP0($$Device:YC3122-a$CMSIS\Flash\YC3122_x.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FN1 -FCA000 -FD00020000 -FF0YC3122_x -FL080000 -FS01000000 -FP0($$Device:YC3122-a$CMSIS\Flash\YC3122_x.FLM) + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + d + + + + + + 1 + 0 + SCI7816_IER_Reg + 0 + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 1 + 10000000 + + + + + + core + 1 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\core\system.c + system.c + 0 + 0 + + + 1 + 2 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\CMSIS\Device\YICHIP\YC3122\Source\Templates\system_yc3122.c + system_yc3122.c + 0 + 0 + + + + + main + 1 + 0 + 0 + 0 + + 2 + 3 + 1 + 0 + 0 + 0 + ..\..\user\main.c + main.c + 0 + 0 + + + + + sdk + 1 + 0 + 0 + 0 + + 3 + 4 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\sdk\yc_gpio.c + yc_gpio.c + 0 + 0 + + + 3 + 5 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\sdk\yc_uart.c + yc_uart.c + 0 + 0 + + + 3 + 6 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\sdk\yc_timer.c + yc_timer.c + 0 + 0 + + + 3 + 7 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\sdk\yc_sysctrl.c + yc_sysctrl.c + 0 + 0 + + + 3 + 8 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\sdk\yc_bpu.c + yc_bpu.c + 0 + 0 + + + 3 + 9 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\sdk\yc_otp.c + yc_otp.c + 0 + 0 + + + + + startup + 1 + 0 + 0 + 0 + + 4 + 10 + 2 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\CMSIS\Device\YICHIP\YC3122\Source\Templates\arm\startup_yc3122.s + startup_yc3122.s + 0 + 0 + + + + + SCI + 1 + 0 + 0 + 0 + + 5 + 11 + 1 + 1 + 0 + 0 + ..\..\..\..\..\Libraries\sdk\yc_7816_emv_L1\yc_7816.c + yc_7816.c + 0 + 0 + + + 5 + 12 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\sdk\yc_7816_emv_L1\yc_7816_T0.c + yc_7816_T0.c + 0 + 0 + + + 5 + 13 + 1 + 0 + 0 + 0 + ..\..\..\..\..\Libraries\sdk\yc_7816_emv_L1\yc_7816_T1.c + yc_7816_T1.c + 0 + 0 + + + + Index: SCI7816_EMV_L1/prj/MDK/YC3122_Keil.uvprojx =================================================================== --- /public/yc3122/trunk/SDK/ModuleDemo/SCI/SCI7816_EMV_L1/prj/MDK/YC3122_Keil.uvprojx (nonexistent) +++ /public/yc3122/trunk/SDK/ModuleDemo/SCI/SCI7816_EMV_L1/prj/MDK/YC3122_Keil.uvprojx (working copy) @@ -0,0 +1,482 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + yc3122 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + YC3122-a + YICHIP + YICHIP.YC3122.1.0.4 + www.yichip.com + IRAM(0x00020004,0x0001FFFC) IROM(0x01000200,0x0007FE00) CPUTYPE("Cortex-M0") CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD00020000 -FCA000 -FN1 -FF0YC3122_x -FS01000000 -FL080000 -FP0($$Device:YC3122-a$CMSIS\Flash\YC3122_x.FLM)) + 0 + $$Device:YC3122-a$Libraries\CMSIS\Device\YICHIP\YC3122\Include\yc3122.h + + + + + + + + + + $$Device:YC3122-a$CMSIS\SVD\YC3122.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Objects\ + yc3122_Keil + 1 + 0 + 1 + 1 + 1 + .\Listings\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf.exe --text -a -c --output=@L_asm.txt "!L" + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 1 + 1 + 1 + 4100 + + 0 + Segger\JL2CM3.dll + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20004 + 0x1fffc + + + 1 + 0x1000200 + 0x7fe00 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x1000200 + 0x7fe00 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20004 + 0x1fffc + + + 0 + 0x0 + 0x0 + + + + + + 1 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + __USE_YC_M0__ + + ..\..\..\..\..\Libraries\sdk\yc_7816_emv_L1;..\..\..\..\..\Libraries\sdk;..\..\..\..\..\Libraries\CMSIS\Device\YICHIP\YC3122\Include;..\..\..\..\..\Libraries\core;..\..\..\..\..\Libraries\CMSIS\Include + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0xd0000 + + + + + + + + + + + + + core + + + system.c + 1 + ..\..\..\..\..\Libraries\core\system.c + + + system_yc3122.c + 1 + ..\..\..\..\..\Libraries\CMSIS\Device\YICHIP\YC3122\Source\Templates\system_yc3122.c + + + + + main + + + main.c + 1 + ..\..\user\main.c + + + + + sdk + + + yc_gpio.c + 1 + ..\..\..\..\..\Libraries\sdk\yc_gpio.c + + + yc_uart.c + 1 + ..\..\..\..\..\Libraries\sdk\yc_uart.c + + + yc_timer.c + 1 + ..\..\..\..\..\Libraries\sdk\yc_timer.c + + + yc_sysctrl.c + 1 + ..\..\..\..\..\Libraries\sdk\yc_sysctrl.c + + + yc_bpu.c + 1 + ..\..\..\..\..\Libraries\sdk\yc_bpu.c + + + yc_otp.c + 1 + ..\..\..\..\..\Libraries\sdk\yc_otp.c + + + + + startup + + + startup_yc3122.s + 2 + ..\..\..\..\..\Libraries\CMSIS\Device\YICHIP\YC3122\Source\Templates\arm\startup_yc3122.s + + + + + SCI + + + yc_7816.c + 1 + ..\..\..\..\..\Libraries\sdk\yc_7816_emv_L1\yc_7816.c + + + yc_7816_T0.c + 1 + ..\..\..\..\..\Libraries\sdk\yc_7816_emv_L1\yc_7816_T0.c + + + yc_7816_T1.c + 1 + ..\..\..\..\..\Libraries\sdk\yc_7816_emv_L1\yc_7816_T1.c + + + + + + + + + + + + + + Index: SCI7816_EMV_L1/user/main.c =================================================================== --- /public/yc3122/trunk/SDK/ModuleDemo/SCI/SCI7816_EMV_L1/user/main.c (nonexistent) +++ /public/yc3122/trunk/SDK/ModuleDemo/SCI/SCI7816_EMV_L1/user/main.c (working copy) @@ -0,0 +1,361 @@ +/* + * Copyright (c) 2006-2020, YICHIP Development Team + * @file main.c + * @brief source file for sample sci7816 poll dirve test + * + * Change Logs: + * Date Author Version Notes + * 2020-05-28 dengzhiqian V1.0.0 the first version + */ + +/* Includes ------------------------------------------------------------------*/ +#include "yc3122.h" +#include "yc_gpio.h" +#include "yc_uart.h" +#include "yc_timer.h" +#include "yc_sysctrl.h" +#include "yc_7816.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +uint32_t PllClockFreq = 0; +/* Private variables ---------------------------------------------------------*/ +volatile uint32_t tick_Timer[9] = {0}; + +SCI_Struct_Type SCI_Struct0; //SCI_Struct0 全局变量 用于sci0 +SCI_Struct_Type SCI_Struct1; //SCI_Struct1 全局变量 用于sci1 + +/* Private function prototypes -----------------------------------------------*/ +static void PrintList(void); +static void ISO7816_Scix_Init(void); +void Sci7816_Adapter_FW_HW(SCI_Struct_Type* SCIx); +static uint32_t Get_Timer_Clock_Freq(void); + +#define SCI0_ENABLE + +/** + * @brief Main program + * @param None + * @retval None + */ +//通过宏定义#define EMV_L1_43D来区别4.3c、4.3d +int main(void) +{ + Board_Init(); //UART + + ISO7816_Scix_Init(); //7816 初始化 + + PllClockFreq = Get_Timer_Clock_Freq(); + + MyPrintf("YC3122 sci7816 poll receive demo V1.0.0!\r\n"); + + PrintList(); + + while(1) + { + ISO7816_LoopBack(&SCI_Struct0); + } +} + +/** + * @method ISO7816_Sci0_Init + * @brief Enable sci0 + * @param None + * @retval None + */ +static void ISO7816_Scix_Init(void) +{ + #ifdef SCI0_ENABLE + /*enable sci0, pwm, clock*/ + SYSCTRL_APBPeriphClockCmd(SYSCTRL_APBPeriph_7816CTRL | SYSCTRL_APBPeriph_PWM, ENABLE); + + SCI_Struct0.SCIx7816 = MSCI0; //sci0 接口 + ISO7816_Init(&SCI_Struct0); //sci07816 相关参数初始化 + Sci7816_Adapter_FW_HW(&SCI_Struct0); + #endif + + #ifdef SCI1_ENABLE + SYSCTRL_APBPeriphClockCmd(SYSCTRL_APBPeriph_7816CTRL_2 , ENABLE); + + SCI_Struct1.SCIx7816 = MSCI1; //sci1 接口 + ISO7816_Init(&SCI_Struct1); //sci17816 相关参数初始化 + Sci7816_Adapter_FW_HW(&SCI_Struct1); + #endif +} + +/** + * @method PrintList + * @brief menu + * @param None + * @retval None + */ +static void PrintList(void) +{ + MyPrintf("\r\n\r\n"); + MyPrintf("\" Now Timer Clock Freq : %d Hz\n",PllClockFreq); +} + + +/** + * @method Sci7816_Adapter_FW_HW + * @brief + * @param None + * @retval None + */ +void Sci7816_Adapter_FW_HW(SCI_Struct_Type* SCIx) +{ + //卡到位引脚配置 + GPIO_Config(SCI7816_DETECT_PORT, SCI7816_DETECT_IO_PIN, INPUT|PULL_PU); + SCIx->SCI_Tran_StateCB.Sci_Pin_Detect_State = 1; //卡到位引脚电压状态。此变量配置为不插卡时此引脚状态。1代表高电平、0代表低电平 + + #ifndef EMV_L1_43D + //收atr超时计时器及时间 + SCIx->SCI_Tran_StateCB.atrovertime_index = TIM3; + SCIx->SCI_Tran_StateCB.contact_reset_l_cnt = 42000 * (48000000 / 1000000)/4; + SCIx->SCI_Tran_StateCB.contact_atr_rfb_time_cnt = 47000 * (48000000 / 1000000)/4; + SCIx->SCI_Tran_StateCB.contact_atr_rab_time_cnt = (20164 * (48000000 / 1000000)/4) * 372; + + //clk产生定时器及频率 + SCIx->SCI_Tran_StateCB.pwmclk_index = TIM7; + SCIx->SCI_Tran_StateCB.pwmclk_num = 4000000*2;//CLK=4Mhz + #else + //收atr超时计时器及时间 + SCIx->SCI_Tran_StateCB.atrovertime_index = TIM3; + SCIx->SCI_Tran_StateCB.contact_reset_l_cnt = 42000 * (48000000 / 1000000)/4.8; + SCIx->SCI_Tran_StateCB.contact_atr_rfb_time_cnt = 47000 * (48000000 / 1000000)/4.8; + SCIx->SCI_Tran_StateCB.contact_atr_rab_time_cnt = (20164 * (48000000 / 1000000)/4.8) * 372; + + //clk产生定时器及频率 + SCIx->SCI_Tran_StateCB.pwmclk_index = TIM7; //要根据所使用的gpio对应的定时器初始化此变量 + SCIx->SCI_Tran_StateCB.pwmclk_num = 4800000*2;//CLK=4.8Mhz + #endif + + if(SCIx->SCIx7816 == MSCI0) + { + ISO7816_Vcard_Control(ISO7816_VCC_0V); //CARD0 供电 + } + else + { + GPIO_Config(SCI17816_CARD1_EN_PORT, SCI17816_CARD1_EN_IO_PIN, OUTPUT_HIGH); //CARD1 供电 + } + + //board_config.h内以下宏定义要适配使用的硬件 +// #define SCI7816_RESET_PORT GPIOE +// #define SCI7816_RESET_IO_PIN GPIO_Pin_14 +// #define SCI7816_CLK_PORT GPIOE +// #define SCI7816_CLK_IO_PIN GPIO_Pin_15 +// #define SCI7816_DATA_PORT GPIOE +// #define SCI7816_DATA_IO_PIN GPIO_Pin_13 + +// #define SCI7816_DETECT_PORT GPIOC +// #define SCI7816_DETECT_IO_PIN GPIO_Pin_1 +} + + + +/** + * @brief Get_Timer_Clock_Freq + * @param None + * @retval pclk freq + */ +static uint32_t Get_Timer_Clock_Freq(void) +{ + return SYSCTRL_GetClocksFreq(PCLK_FRE); +} + +/** + * @method TIMER0_IRQHandler + * @brief Timer0 interrupt service function + * @param None + * @retval None + */ +void TIMER0_IRQHandler(void) +{ + tick_Timer[0]++; + TIM_ClearITPendingBit(MTIM, TIM0); +} + +/** + * @method TIMER1_IRQHandler + * @brief Timer1 interrupt service function + * @param None + * @retval None + */ +void TIMER1_IRQHandler(void) +{ + tick_Timer[1]++; + TIM_ClearITPendingBit(MTIM, TIM1); +} + +/** + * @method TIMER2_IRQHandler + * @brief Timer2 interrupt service function + * @param None + * @retval None + */ +void TIMER2_IRQHandler(void) +{ + tick_Timer[2]++; + TIM_ClearITPendingBit(MTIM, TIM2); +} + +/** + * @method TIMER3_IRQHandler + * @brief Timer3 interrupt service function + * @param None + * @retval None + */ +void TIMER3_IRQHandler(void) +{ + tick_Timer[3]++; + TIM_ClearITPendingBit(MTIM, TIM3); +} + +/** + * @method TIMER4_IRQHandler + * @brief Timer4 interrupt service function + * @param None + * @retval None + */ +void TIMER4_IRQHandler(void) +{ + tick_Timer[4]++; + TIM_ClearITPendingBit(MTIM, TIM4); +} + +/** + * @method TIMER5_IRQHandler + * @brief Timer5 interrupt service function + * @param None + * @retval None + */ +void TIMER5_IRQHandler(void) +{ + tick_Timer[5]++; + TIM_ClearITPendingBit(MTIM, TIM5); +} + +/** + * @method TIMER6_IRQHandler + * @brief Timer6 interrupt service function + * @param None + * @retval None + */ +void TIMER6_IRQHandler(void) +{ + tick_Timer[6]++; + TIM_ClearITPendingBit(MTIM, TIM6); +} + +/** + * @method TIMER7_IRQHandler + * @brief Timer7 interrupt service function + * @param None + * @retval None + */ +void TIMER7_IRQHandler(void) +{ + tick_Timer[7]++; + TIM_ClearITPendingBit(MTIM, TIM7); +} + +/** + * @method TIMER8_IRQHandler + * @brief Timer8 interrupt service function + * @param None + * @retval None + */ +void TIMER8_IRQHandler(void) +{ + tick_Timer[8]++; + TIM_ClearITPendingBit(MTIM, TIM8); +} + +/** + * @method TMRG0_IRQHandler + * @brief Timer0~3 interrupt entry function + * @param None + * @retval None + */ +void TMRG0_IRQHandler(void) +{ + uint32_t TIM_IRQ_pend = 0; + + TIM_IRQ_pend = TIM_GetAllITStatus(MTIM); + + if(TIM_IRQ_pend & BIT0) + { + TIMER0_IRQHandler(); + } + if(TIM_IRQ_pend & BIT1) + { + TIMER1_IRQHandler(); + } + if(TIM_IRQ_pend & BIT2) + { + TIMER2_IRQHandler(); + } + if(TIM_IRQ_pend & BIT3) + { + TIMER3_IRQHandler(); + } +} + +/** + * @method TMRG1_IRQHandler + * @brief Timer4~8 interrupt entry function + * @param None + * @retval None + */ +void TMRG1_IRQHandler(void) +{ + uint32_t TIM_IRQ_pend = 0; + + TIM_IRQ_pend = TIM_GetAllITStatus(MTIM); + + if(TIM_IRQ_pend & BIT4) + { + TIMER4_IRQHandler(); + } + if(TIM_IRQ_pend & BIT5) + { + TIMER5_IRQHandler(); + } + if(TIM_IRQ_pend & BIT6) + { + TIMER6_IRQHandler(); + } + if(TIM_IRQ_pend & BIT7) + { + TIMER7_IRQHandler(); + } + if(TIM_IRQ_pend & BIT8) + { + TIMER8_IRQHandler(); + } +} +/** + * @method SCI0_IRQHandler + * @brief Protocol of sending and receiving data and processing in interrupt + * @param None + * @retval None + */ +void SCI0_IRQHandler(void) +{ + MyPrintf("irq\r\n"); +// ISO7816_IRQ(&SCI_Struct0); +} + +/** + * @method SCI1_IRQHandler + * @brief Protocol of sending and receiving data and processing in interrupt + * @param None + * @retval None + */ +void SCI1_IRQHandler(void) +{ + //ISO7816_IRQ(&SCI_Struct1); +} + +/************************ (C) COPYRIGHT Yichip Microelectronics *****END OF FILE****/